BR25H040FVM-2C_技术文档

Datasheet

Serial EEPROM Series Automotive EEPROM

125℃ Operation SPI BUS EEPROM

BR25H040-2C

●General Description

BR25H040-2C is a serial EEPROM of SPI BUS interface method.

●Features

High speed clock action up to 10MHz (Max.)

Wait function by HOLDB terminal.

Part or whole of memory arrays settable as read only

memory area by program.

MSOP8, TSSOP-B8, SOP8, SOP-J8 Package

Data at shipment Memory array: FFh, status register

BP1, BP0 : 0

More than 100 years data retention.

More than 1 million write cycles.

AEC-Q100 Qualified.

2.5V to 5.5V single power source action most

suitable

for battery use.

Page write mode useful for initial value write at

factory shipment.

●Package

For SPI bus interface (CPOL, CPHA)=(0, 0), (1, 1)

Self-timed programming cycle.

Low Supply Current

At write operation (5V)

At read operation (5V)

At standby operation (5V)

: 1.0mA (Typ.)

: 0.1μA (Typ.)

Address auto increment function at read operation

Prevention of write mistake

Write prohibition at power on.

MSOP8

TSSOP-B8

Write prohibition by command code (WRDI).

Write prohibition by WPB pin.

2.90mm x 4.00mm x 0.90mm

3.00mm x 6.40mm x 1.20mm

Write prohibition block setting by status registers

(BP1, BP0).

Prevention of write mistake at low voltage.

SOP8

SOP-J8

5.00mm x 6.20mm x 1.71mm

4.90mm x 6.00mm x 1.65mm

●Page write

Number of pages

16 Byte

Product Number

BR25H040-2C

●BR25H040-2C

Capacity

4Kbit

Bit Format

Product Number

BR25H040-2C

Supply Voltage

2.5V to 5.5V

MSOP8

TSSOP-B8

SOP8

SOP-J8

512×8

●

○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays

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●Absolute maximum ratings (Ta=25°C)

Parameter

Symbol

VCC

Limits

Unit

V

Supply Voltage

-0.3 to +6.5

380(MSOP8) ^*1

410(TSSOP-B8) ^*2

560(SOP8) ^*3

560(SOP-J8) ^*4

-65 to +150

Permissible Dissipation

Pd

mW

Storage Temperature Range

Operating Temperature Range

Terminal Voltage

Tstg

Topr

－

°C

V

-40 to +125

-0.3 to VCC+0.3

・When using at Ta=25℃ or higher, 3.1mW(*1) , 3.3mW(*2) , 4.5mW (*3,*4)to be reduced per 1℃

●Memory cell characteristics (VCC=2.5V to 5.5V)

Limits

Parameter

Unit

Condition

Min.

1,000,000

500,000

300,000

100

Typ.

－

Max.

－

Ta≦85°C

Ta≦105°C

Ta≦125°C

Ta≦25°C

Ta≦105°C

Ta≦125°C

Cycles

Years

Write Cycles ^*5

－

Data Retention ^*5

－

60

50

－

*5: Not 100% TESTED

●Recommended Operating Ratings

Parameter

Symbol

VCC

Vin

Limits

Unit

V

Supply Voltage

Input Voltage

2.5 to 5.5

0 to VCC

●Input / output capacity (Ta=25°C, frequency=5MHz)

Parameter

Input Capacity ^*6

Symbol

C_IN

Conditions

V_IN=GND

Min

－

Max

8

Unit

pF

Output Capacity ^*6

C_OUT

V_OUT=GND

－

8

*6: Not 100% TESTED

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●DC characteristics (Unless otherwise specified, Ta=-40°C to +125°C, VCC=2.5V to 5.5V)

Limits

Parameter

Symbol

Unit Conditions

Min.

Typ.

－

Max.

VCC

+0.3

Input High Voltage

Input Low Voltage

Output Low Voltage

VIH 0.7xVCC

V

2.5V≦VCC≦5.5V

0.3x

VCC

VIL

-0.3

0

－

2.5V≦VCC≦5.5V

IOL=2.1mA

VOL

－

0.4

VCC

2

Output High Voltage VOH VCC-0.5

Input Leakage

－

IOH=-0.4mA

ILI

-2

－

μA V_IN=0V to VCC

Current

Output Leakage

Current

ILO

-2

－

2

μA V_OUT=0V to VCC, CSB=VCC

VCC=2.5V,fSCK=5MHz, tE/W=4ms

ICC1

ICC2

－

2.0

3.0

mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN

Byte write, Page write, Write status register

Supply Current

(WRITE)

VCC=5.5V,fSCK=5 or 10 MHz, tE/W=4ms

mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN

Byte write, Page write, Write status register

VCC=2.5V,fSCK=5MHz

ICC3

ICC4

ICC5

ISB

－

1.5

2.0

4.0

10

mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN

Read, Read status register

VCC=5.5V,fSCK=5MHz

mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN

Read, Read status register

Supply Current

(READ)

VCC=5.5V,fSCK=10MHz

mA VIH/VIL=0.9VCC/0.1VCC, SO=OPEN

Read, Read status register

VCC=5.5V

μA CSB=HOLDB=WPB=VCC,

SCK=SI=VCC or =GND, SO=OPEN

Standby Current

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BR25H040-2C

●AC characteristics (Ta=-40°C to +125°C, unless otherwise specified, load capacity C_L1=100pF)

2.5V≦VCC≦5.5V

4.5V≦VCC≦5.5V

Parameter

Symbol

Unit

Min.

Typ.

－

Max.

Min.

－

Typ.

－

Max.

10

－

SCK Frequency

SCK High Time

SCK Low Time

CSB High Time

CSB Setup Time

CSB Hold Time

SCK Setup Time

SCK Hold Time

SI Setup Time

fSCK

tSCKWH

tSCKWL

tCS

－

85

90

85

90

20

30

－

5

MHz

ns

－

60

40

30

10

－

tCSS

－

tCSH

－

tSCKS

tSCKH

tDIS

－

SI Hold Time

tDIH

－

Data Output Delay Time1

tPD1

40

Data Output Delay Time2

(CL2=30pF)

tPD2

－

50

－

30

ns

Output Hold Time

Output Disable Time

HOLDB Setting

Setup Time

tOH

tOZ

0

－

0

－

ns

－

100

－

40

tHFS

tHFH

tHRS

tHRH

tHOZ

tHPD

0

－

0

－

40

ns

HOLDB Setting

Hold Time

40

0

30

0

HOLDB Release

Setup Time

－

HOLDB Release

Hold Time

70

－

30

－

Time from HOLDB

to Output High-Z

Time from HOLDB

to Output Change

SCK Rise Time^*1

SCK Fall Time^*1

OUTPUT Rise Time^*1

OUTPUT Fall Time^*1

100

60

tRC

tFC

－

1

－

1

μs

ns

ms

tRO

tFO

tE/W

40

4

40

4

Write Time

*1 NOT 100% TESTED

●AC measurement conditions

Limits

Parameter

Symbol

Unit

Min.

－

Typ.

－

Max.

100

30

Input Voltage

0.8Vcc

Input/Output judgement voltage

Load Capacity 1

Load Capacity 2

Input Rise Time

Input Fall Time

Input Voltage

C_L1

C_L2

－

pF

ns

－

0.7Vcc

0.3Vcc

－

50

－

50

0.2Vcc

－

0.2VCC/0.8VCC

0.3VCC/0.7VCC

V

Input / Output

Judgment Voltage

－

Figure 1. Input/Output judgment voltage

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●Serial Input / Output Timing

tCSS

tCS

CSB

SCK

tSCKS

tRC

tFC

tSCKWH

tSCKWL

tDIS

tDIH

SI

High-Z

SO

Figure 2. Input timing

SI is taken into IC inside in sync with data rise edge of SCK. Input address and data from the most significant bit MSB.

tCS

tSCKH

CSB

tCSH

SCK

SI

tPD

tRO,tFO

tOZ

tOH

High-Z

SO

Figure 3. Input / Output timing

SO is output in sync with data fall edge of SCK. Data is output from the most significant bit MSB.

CSB ^"H"

"L"

tHFS tHFH

tHRS tHRH

SCK

SI

tDIS

n

n+1

n-1

tHOZ

Dn

tHPD

High-Z

SO

Dn+1

Dn

Dn-1

HOLDB

Figure 4. HOLD timing

●Block diagram

VOLTAGE

DETECTION

CSB

SCK

INSTRUCTION DECODE

CONTROL CLOCK

GENERATION

HIGH VOLTAGE

GENERATOR

WRITE

INHIBITION

SI

INSTRUCTION

REGISTER

STATUS REGISTER

ADDRESS

HOLDB

ADDRESS

9bit

REGISTER

DECODER

4K

EEPROM

DATA

READ/WRITE

AMP

WPB

SO

8bit

REGISTER

Figure 5. Block diagram

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BR25H040-2C

●Pin Configuration

VCC HOLDB SCK

SI

BR25H040-2C

CSB

SO

WPB

GND

Figure 6. Pin assignment diagram

●Pin Descriptions

Terminal

number

Terminal

name

Input

/Output

Function

1

CSB

SO

Input

Chip select input

2

3

Output

Serial data output

Write protect input

Write status register command is prohibited.

Write command is prohibited.

WPB

Input

4

5

6

GND

SI

－

All input / output reference voltage, 0V

Start bit, ope code, address, and serial data input

Serial clock input

Input

SCK

Hold input

7

8

HOLDB

VCC

Input

Command communications may be suspended

temporarily (HOLD status)

－

Power source to be connected

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BR25H040-2C

●Typical Performance Curves

6

5

4

3

2

1

0

Ta= -40

℃

Ta= -40

℃

5

4

3

2

1

0

Ta= 25

℃

Ta= 25

℃

Ta= 125

℃

Ta= 125

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［

］

SUPPLY VOLTAGE : VCC V

［

］

Figure 7. Input High Voltage VIH

(CSB,SCK,SI,HOLDB,WPB)

Figure 8. Input Low Voltage VIL

(CSB,SCK,SI,HOLDB,WPB)

1

3

Ta= -40

℃

2.5

Ta= 25

℃

0.8

0.6

0.4

0.2

0

Ta= 125

℃

SPEC

2

Ta= -40

℃

Ta= 25

℃

Ta= 125

℃

1.5

SPEC

1

0.5

0

-1.2

0

1

2

3

4

5

6

-1

-0.8

-0.6

-0.4

-0.2

0

OUTPUT LOW CURRENT : IOL mA

［

］

OUTPUT HIGH CURRENT : IOH mA

［

］

Figure 9. Output Low Voltage VOL, IOL (Vcc=2.5V)

Figure 10. Output High Voltage VOH, IOH (Vcc=2.5V)

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●Typical Performance Curves‐Continued

3.0

2.5

3

2

1

0

SPEC

2.0

Ta= -40

℃

1.5

1.0

0.5

0.0

Ta= -40

℃

Ta= 25

℃

Ta= 25

℃

Ta= 125

℃

Ta= 125

℃

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC [V]

SUPPLY VOLTAGE : Vcc

V

］

（

Figure 11. Input Leakage Current ILI

Figure 12. Output Leakage Current ILO(SO)(Vcc=5.5V)

(CSB,SCK,SI,HOLDB,WPB)

4

3

2

1

0

2.5

Ta= -40

℃

Ta= 25

℃

SPEC

Ta= 125

℃

SPEC

2

Ta= -40

℃

Ta= 25

℃

Ta= 125

℃

SPEC

1.5

SPEC

1

0.5

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［

］

［

］

Figure 14. Supply Current (READ) ICC3,4

Figure 13. Supply Current (WRITE) ICC1,2

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●Typical Performance Curves‐Continued

5

12

10

8

SPEC

Ta= -40

℃

4

3

2

1

0

Ta= 25

℃

SPEC

Ta= 125

℃

Ta= -40

℃

Ta= 25

℃

6

4

2

0

Ta= 125

℃

0

1

2

3

4

5

6

0

1

2

3

5

6

Figure 15. Supply Current (READ) ICC5

Figure.16 Standby Curre⁴nt ISB

SUPPLY VOLTAGE : VCC V

［

］

SUPPLY VOLTAGE : VCC V

［

］

100

80

60

40

20

0

SPEC

10

Ta= -40

℃

SPEC

Ta= 25

℃

Ta= 125

℃

SPEC

Ta= -40

℃

1

Ta= 25

℃

Ta= 125

℃

0.1

0

2

3

4

5

6

Fi¹gure 17. SCK Frequency fSCK

0

1

2

3

6

Figure 18. SCK High Time t⁴SCKWH ⁵

SUPPLY VOLTAGE : VCC V

［

］

［

］

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●Typical Performance Curves‐Continued

100

80

60

40

20

0

SPEC

80

Ta= -40

℃

Ta= -40

℃

Ta= 25

℃

Ta= 25

℃

60

40

20

0

Ta= 125

℃

Ta= 125

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［］

SUPPLY VOLTAGE : VCC V

［

］

Figure 20. CSB high time tCS

Figure 19. SCK low time tSCKWL

100

80

60

40

20

0

100

80

60

40

20

0

SPEC

Ta= -40

℃

Ta= 25

℃

Ta= 125

℃

Ta= -40

℃

Ta= 25

℃

Ta= 125

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［

］

SUPPLY VOLTAGE : VCC V

［］

Figure 22. CSB hold time tCSH

Figure 21. CSB setup time tCSS

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●Typical Performance Curves‐Continued

50

40

50

40

30

20

10

0

Ta= -40

℃

Ta= 25

℃

Ta= 125

℃

Ta= -40

℃

Ta= 25

℃

Ta= 125

℃

SPEC

30

20

10

0

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［

］

SUPPLY VOLTAGE : VCC V

［］

Figure 23. SI Setup Time tDIS

Figure 24. SI Hold Time tDIH

100

80

60

40

20

0

100

80

60

40

20

0

Ta= -40

℃

Ta= 25

℃

Ta= 125

℃

Ta= -40

℃

Ta= 25

℃

Ta= 125

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［

］

SUPPLY VOLTAGE : VCC V

［

］

Figure 26. Data Output Delay Time tPD2 (CL=30pF)

Figure 25. Data Output Delay Time tPD1 (CL=100pF)

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●Typical Performance Curves‐Continued

120

50

40

30

20

10

0

SPEC

100

Ta= -40

℃

80

60

40

20

0

Ta= -40

℃

Ta= 25

℃

SPEC

Ta= 25

℃

Ta= 125

℃

Ta= 125

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［

］

［

］

Figure 28. HOLDB Setting Hold Time tHFH

Figure 27.Output Disable Time tOZ

100

80

60

40

20

0

120

90

60

30

0

SPEC

Ta= -40

℃

Ta= 25

℃

Ta= -40

℃

Ta= 125

℃

Ta= 25

℃

Ta= 125

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［

］

［

］

Figure 30. Time from HOLDB to Output High-Z tHOZ

Figure 29. HOLDB Release Hold Time tHRH

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●Typical Performance Curves‐Continued

100

80

60

40

20

0

Ta= -40

℃

Ta= 25

℃

Ta= -40

℃

80

60

40

20

0

Ta= 125

℃

Ta= 25

℃

Ta= 125

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［］

［

］

Figure 31. Time from HOLDB to Output Change tHPD

Figure 32. Output Rise Time tRO

100

80

60

40

20

0

8

6

4

2

0

Ta= -40

℃

Ta= 25

℃

Ta= -40

℃

Ta= 125

℃

Ta= 25

℃

Ta= 125

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE : VCC V

［］

SUPPLY VOLTAGE : VCC V

［

］

Figure 34. Write Cycle Time tE/W

Figure 33. Output Fall Time tFO

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BR25H040-2C

●Features

○Status registers

This IC has status registers. The status registers are of 8 bits and express the following parameters.

BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore are

valid even when power source is turned off.

Number of data rewrite times and data hold time are same as characteristics of the EEPROM.

WEN can be set by write enable command and write disable command. WEN becomes write disable status when power

source is turned off. R/B is for write confirmation, therefore cannot be set externally.

The value of status register can be read by read status command.

●Status registers

Product number

bit 7

1

bit 6

1

bit 5

1

bit 4

1

bit 3

BP1

bit 2

BP0

bit 1

bit 0

――

BR25H040-2C

WEN

R/B

Memory

bit

Function

Contents

location

This designates the write disable area of

EEPROM. Write designation areas of product

numbers are shown below.

BP1

EEPROM

BP0

EEPROM write disable block designation bit

Write and write status register write enable

This confirms prohibited status or permitted

status of the write and the write status register.

WEN Register

/ disable status confirmation bit

WEN=0=prohibited , WEN=1=permitted

――

Write cycle status (READY / BUSY) confirmation bit

This confirms READY status or BUSY status of

the write cycle.

Register

R/B

R/B=0=READY , R/B=1=BUSY

●Write disable block setting

BP1

BP0

BR25H040-2C

0

1

0

1

0

1

None

180h-1FFh

100h-1FFh

000h-1FFh

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BR25H040-2C

○WPB pin

By setting WPB=LOW, write command is prohibited. As for BR25H040-2C, both WRITE and WRSR commands are

prohibited. However, when write cycle is in execution, no interruption can be made.

Product number

BR25H040-2C

WRSR

WRITE

Prohibition

possible

Prohibition

possible

○HOLDB pin

By HOLDB pin, data transfer can be interrupted. When SCK=”0”, by making HOLDB from “1” into”0”, data transfer to

EEPROM is interrupted. When SCK = “0”, by making HOLDB from “0” into “1”, data transfer is restarted.

●Command mode

Command

Contents

Ope codes

WREN

WRDI

Write enable

Write disable

Read

Write enable command

Write disable command

Read command

0000

*110

*100

READ

WRITE

RDSR

WRSR

A8011

A8010

*101

Write

Write command

Read status

register

Write status

register

Status register read command

Status register write command

*001

*=Don’t Care Bit.

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●Timing Chart

1. Write enable (WREN) / disable (WRDI) cycle

WREN (WRITE ENABLE): Write enable

CSB

SCK

SI

0

1

2

3

4

5

6

7

0

*1

1

0

*

High-Z

SO

*= Don’t care

Figure 35. Write enable command

WRDI (WRITE DISABLE): Write disable

CSB

SCK

SI

0

1

2

3

4

5

6

7

0

*1

*

1

0

High-Z

SO

*= Don’t care

Figure 36. Write disable

○This IC has write enable status and write disable status. It is set to write enable status by write enable command, and

it is set to write disable status by write disable command. As for these commands, set CSB LOW, and then input the

respective ope codes. The respective commands accept command at the 7-th clock rise. Even with input over 7 clocks,

command becomes valid.

When to carry out write and write status register command, it is necessary to set write enable status by the write enable

command. If write or write status register command is input in the write disable status, commands are cancelled. And even in

the write enable status, once write and write status register command is executed. It gets in the write disable status. After

power on, this IC is in write disable status.

2. Read command (READ)

CSB

SCK

～～

0

1

2

3

4

5

6

7

8

9

10

11

15

16

22

～～

0

1

A7 A6 A5

A4

A1 A0

～～

SI

A8

～～

Product

number

Address

length

～～

High-Z

D7 D6

D2 D1 D0

SO

BR25H040-2C

A8-A0

Figure 37. Read command

By read command, data of EEPROM can be read. As for this command, set CSB LOW, then input address after read ope

code. EEPROM starts data output of the designated address. Data output is started from SCK fall of 15 clock, and from D7 to

D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input of SCK, data

of the next address can be read. Increment read can read all the addresses of EEPROM. After reading data of the most

significant address, by continuing increment read, data of the most insignificant address is read.

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3. Write command (WRITE)

CSB

～～

0

1

2

3

4

5

6

7

8

15

16

22

23

SCK

～～

0

A8

0

1

0

A7

A6 A5

A4

A1

A0

D7 D6

D2

～～

D1 D0

SI

Product

number

Address

length

～～

High-Z

SO

BR25H040-2C

A8-A0

Figure 38. Write command

CSB 立ち上げ有効区間

CSB

SCK

～～

22

(8n+16)-8(8n+16)-7(8n+16)-2 (8n+16)-1 8n+16

～～

0

1

2

3

4

5

6

7

8

12

15

16 17

23

24 25

～～

D7 D6

D0

A8

A7

A6

A3

A1 A0 D7 D6

D1 D0 D7 D6

～～

0

1

0

SI

～～

n= up to 16 bytes

High-Z

～～

SO

Figure 39. N Byte page write command

By write command, data of EEPROM can be written. As for this command, set CSB LOW, then input address and data

after write ope code. Then, by making CSB HIGH, the EEPROM starts writing. The write time of EEPROM requires time of

tE/W (Max 4ms). During tE/W, other than status read command is not accepted. Start CSB after taking the last data (D0),

and before the next SCK clock starts. At other timing, write command is not executed, and this write command is

cancelled. This IC has page write function, and after input of data for 1 byte (8 bits), by continuing data input without

starting CSB, data up to 16 bytes can be written for one tE/W. In page write, the insignificant 4 bit of the designated

address is incremented internally at every time when data of 1 byte is input and data is written to respective addresses.

When data of the maximum bytes or higher is input, address rolls over, and previously input data is overwritten.

Write command is executed when CSB rises between the SCK clock rising edge to recognize the 8th bits of data input and

the next SCK rising edge. At other timings the write command is not executed and cancelled (Figure.48 valid timing c). In

page write, the CSB valid timing is every 8 bits. If CSB rises at other timings page write is cancelled together with the write

command and the input data is reset.

This column addresses are

Top address of this page

16byte

*1 n=511d=1FFh : BR25H040-2C

*2 m=31 : BR25H040-2C

page0

page 1

page 2

・

000h

010h

020h

・

001h

011h

021h

・

002h

012h

022h

・

･･･

・

00Eh

01Eh

02Eh

・

00Fh

01Fh

02Fh

・

page m-1

page ^*2

n-31

n-15

n-30

n-14

n-29

n-13

･･･

n-17

n-1

n-16

^*1n

m

This column addresses are

the last address of this page

Figure 40. EEPROM physical address for Page write command (16Byte)

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○Example of Page write command

No.

①

Addresses of Page0

Previous data

000h

00h

001h

01h

55h

00h

002h

02h

-

････

00Eh

0Eh

-

00Fh

0Fh

-

②

2 bytes input data

After No.②

AAh

FFh

③

02h

AAh

-

0Eh

AAh

-

0Fh

55h

-

④

⑤

18 byte input data

After No.④

AAh

55h

a：In case of input the data of No.② which is 2 bytes page write command for the data of No.①, EEPROM data changes

like No.③.

b：In case of input the data of No.④ which is 18 bytes page write command for the data of No.①, EEPROM data changes

like No.⑤.

c：In case of a or b, when write command is cancelled, EEPROM data keep No.①.

In page write command, when data is set to the last address of a page (e.g. address “01Fh” of page 1), the next data will be

set to the top address of the same page (e.g. address “010h” of page 1). This is why page write address increment is

available in the same page. As a reference, if of 16 bytes, page write command is executed for 2 bytes the data of the other

14 bytes without addresses will not be changed.

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4. Status register write / read command

CSB

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

SCK

bit7

bit6

bit5

bit4

bit3

bit2

bit1

bit0

0

＊

0

1

＊

BP1 BP0

＊

SI

High-Z

SO

＊=Don't care

Figure 41. Status register write command

Write status register command can write status register data. The data can be written by this command are 2 bits, that is,

BP1 (bit3) and BP0 (bit2) among 8 bits of status register. By BP1 and BP0, write disable block of EEPROM can be set. As

for this command, set CSB LOW, and input ope code of write status register, and input data. Then, by making CSB HIGH,

EEPROM starts writing. Write time requires time of tE/W as same as write. As for CSB rise, start CSB after taking the last

data bit (bit0), and before the next SCK clock starts. At other timing, command is cancelled. Write disable block is

determined by BP1 and BP0, and the block can be selected from 1/4 of memory array, 1/2, and entire memory array.

(Refer to the write disable block setting table.)

To the write disabled block, write cannot be made, and only read can be made.

*

CSB

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

SCK

SI

0

＊

1

0

1

bit7

bit6

bit5

bit4

bit3

bit2

bit1

WEN

bit0

R/B

High-Z

1

BP1 BP0

SO

1

＊=Don’t care

Figure 42. Status register read command

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●At standby

○Current at standby

Set CSB “H”, and be sure to set SCK, SI, WPB, HOLDB input “L” or “H”. Do not input intermediate electric potential.

○Timing

As shown in Figure.43, at standby, when SCK is “H”, even if CSB is fallen, SI status is not read at fall edge. SI status is

read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB “H” status.

Even if CSB is fallen at SCK=SI=”H”,

SI status is not read at that edge.

CSB

Command start here. SI is read.

SCK

SI

0

1

2

Figure 43. Operating timing

●WPB cancel valid area

WPB is normally fixed to “H” or “L” for use, but when WPB is controlled so as to cancel write status register command and

write command, pay attention to the following WPB valid timing.

While write or write status register command is executed, by setting WPB = “L” in cancel valid area, command can be

cancelled. The area from command ope code before CSB rise at internal automatic write start becomes the cancel valid area.

However, once write is started, any input cannot be cancelled. WPB input becomes Don’t Care, and cancellation becomes invalid.

CSB

SCK

6

7

15

16

tE/W

Ope Code

Data

Data write time

Valid(WEN is reset by WPB=L)

Invalid

Figure 44. WPB valid timing (WRSR)

CSB

SCK

23

24

6

7

8

15

tE/W

Data write time

Ope code

Address

Data

Valid(WEN is reset by WPB=L)

Invalid

Figure 45. WPB valid timing (WRITE)

●HOLDB pin

By HOLDB pin, command communication can be stopped temporarily (HOLD status). The HOLDB pin carries out command

communications normally when it is HIGH. To get in HOLD status, at command communication, when SCK=LOW, set the

HOLDB pin LOW. At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z). To release

the HOLD status, set the HOLDB pin HIGH when SCK=LOW. After that, communication can be restarted from the point

before the HOLD status. For example, when HOLD status is made after A5 address input at read, after release of HOLD

status, by starting A4 address input, read can be restarted. When in HOLD status, leave CSB LOW. When it is set

CSB=HIGH in HOLD status, the IC is reset, therefore communication after that cannot be restarted.

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●Method to cancel each command

○READ

・Method to cancel : cancel by CSB = “H”

Ope code

8 bits

Address

8 bits

Data

8 bits

Cancel available in all areas of read mode

Figure 46 READ cancel valid timing

○RDSR

・Method to cancel : cancel by CSB = “H”

Data

Ope code

8 bits

Cancel available in all

areas of rdsr mode

Figure 47 RDSR cancel valid timing

○WRITE,PAGE WRITE

a：Ope code, address input area.

Address

8bits

Data

tE/W

d

Ope code

8bits

Cancellation is available by CSB=”H”

b：Data input area (D7 to D1 input area)

Cancellation is available by CSB=”H”

8bits

b

a

c

c：Data input area (D0 area)

When CSB is started, write starts.

After CSB rise, cancellation cannot be made by any means.

d：tE/W area.

SCK

SI

D7 D6 D5 D4 D3 D2 D1 D0

Cancellation is available by CSB = “H”. However, when

write starts (CSB is started) in the area c, cancellation

cannot be made by any means. And by inputting on

SCK clock, cancellation cannot be made. In page write

mode, there is write enable area at every 8 clocks.

c

b

Figure 48. WRITE cancel valid timing

Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore

write it once again.

Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable,

therefore, it is recommended to fall in SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or higher.

○WRSR

a：From ope code to 15 rise.

14 15

16

17

SCK

SI

Cancel by CSB =”H”.

b：From 15 clock rise to 16 clock rise (write enable area).

When CSB is started, write starts.

D1

D0

a

b

c

After CSB rise, cancellation cannot be made by any means.

c：After 16 clock rise.

tE/W

c

Ope code

8 bits

Data

8 bits

Cancel by CSB=”H”. However, when write starts (CSB is started)

in the area b, cancellation cannot be made by any means.

And, by inputting on SCK clock, cancellation cannot be made.

a

b

Figure 49. WRSR cancel valid timing

Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore write it once again

Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable,

therefore, it is recommended to fall in SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or higher.

○WREN/WRDI

a：From ope code to 7-th clock rise, cancel by CSB = “H”.

7

8

9

SCK

b：Cancellation is not available when CSB is started after 7-th clock.

Ope code

8 bits

a

b

Figure 50. WREN/WRDI cancel valid timing

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●High speed operation

In order to realize stable high speed operations, pay attention to the following input / output pin conditions.

○Input terminal pull up, pull down resistance

When to attach pull up, pull down resistance to EEPROM input terminal, select an appropriate value for the

microcontroller VOL, IOL from VIL characteristics of this IC.

○Pull up resistance

V_CC-V_OLM

R_PU≧

･･･①

･･･②

Microcontroller

V_OLM

“L” output

I_OLM

EEPROM

V_ILE

I_OLM

V_ILE

R_PU

V_OLM≦

Example) When Vcc=5V, V_ILE=1.5V, V_OLM=0.4V, I_OLM=2mA,

“L” input

from the equation ①,

5-0.4

2×10^-3

・V_ILE:EEPROM V_ILspecifications

・V_OLM:Microcontroller V_OLspecifications

・I_OLM:Microcontroller I_OLspecifications

R_PU≧

∴R_PU≦

2.3[kΩ]

Figure 51. Pull up resistance

With the value of Rpu to satisfy the above equation, V_OLM

becomes 0.4V or lower, and with V_ILE(=1.5V), the equation ② is

also satisfied.

And, in order to prevent malfunction, mistake write at power ON/OFF, be sure to make CSB pull up.

○Pull down resistance

V_OHM

Microcontroller

V_OHM

EEPROM

V_IHE

R_PD≧

･･･③

･･･④

I_OHM

V_OHM≧

V_IHE

R_PD

“H” output

“H” input

I_OHM

Example) When V_CC=5V, V_OHM=V_CC-0.5V, I_OHM＝0.4mA,

V_IHE=V_CC×0.7V, from the equation③,

5-0.5

0.4×10^-3

R_PD≧

Figure 52. Pull down resistance

∴R_PU≧

11.3[kΩ]

Further, by amplitude VIHE, VILE of signal input to EEPROM, operation speed changes. By inputting signal of amplitude of

VCC / GND level to input, more stable high speed operations can be realized. On the contrary, when amplitude of 0.8VCC /

0.2VCC is input, operation speed becomes slow.^*1

In order to realize more stable high speed operation, it is recommended to make the values of R_PU, R_PDas large as possible,

and make the amplitude of signal input to EEPROM close to the amplitude of VCC / GND level.

(^ж1 At this moment, operating timing guaranteed value is guaranteed.)

tPD_VIL characteristics

80

70

Spec

60

50

40

30

Vcc=2.5V

20

Ta=25

℃

VIH=Vcc

C_L=100pF

10

0

0.2

0.4

0.6

0.8

1

VIL[V]

Figure 53. VIL dependency of data output delay time tPD

○SO load capacity condition

Load capacity of SO output terminal affects upon delay characteristic of SO output. (Data output delay time, time from

HOLDB to High-Z) In order to make output delay characteristic into higher speed, make SO load capacity small. In concrete,

“Do not connect many devices to SO bus”, “Make the wire between the controller and EEPROM short”, and so forth.

○Other cautions

Make the wire length from the microcontroller to EEPROM input signal same length, in order to prevent setup / hold violation

to EEPROM, owing to difference of wire length of each input.

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●I/O equivalence circuit

○Output circuit

SO

OEint.

Figure 54. SO output equivalent circuit

○Input circuit

RESET_int.

CSB

Figure 55. CSB input equivalent circuit

SCK

SI

Figure 57. SI input equivalent circuit

Figure 56. SCK input equivalent circuit

WPB

HOLDB

Figure 59. WPB input equivalent circuit

Figure 58. HOLDB input equivalent circuit

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●Power-UP/Down conditions

○At power ON/OFF, set CSB “H” (=VCC).

When CSB is “L”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may

cause malfunction, mistake write or so. To prevent these, at power ON, set CSB “H”. (When CSB is in “H” status, all inputs

are canceled.)

Vcc

GND

Vcc

CSB

GND

Good

Bad

example

Figure 60. CSB timing at power ON/OFF

(Good example) CSB terminal is pulled up to VCC.

At power OFF, take 10ms or higher before supply. If power is turned on without observing this condition, the IC internal

circuit may not be reset, which please note.

(Bad example)

CSB terminal is “L” at power ON/OFF.

In this case, CSB always becomes “L” (active status), and EEPROM may have malfunction, mistake write owing to noises

and the likes.

Even when CSB input is High-Z, the status becomes like this case, which please note.

○LVCC circuit

LVCC (VCC-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.

At LVCC voltage (Typ. =1.9V) or below, it prevent data rewrite.

○P.O.R. circuit

This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR action, it gets in write disable

status. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if the

recommended conditions of the following tR, tOFF, and Vbot are not satisfied, it may become write enable status owing to

noises and the likes.

Recommended conditions of tR, tOFF, Vbot

tR

Vcc

tR

tOFF

Vbot

tOFF

10ms or below

100ms or below

10ms or higher

0.3V or below

0.2V or below

Vbot

0

Figure 61. Rise waveform

●Noise countermeasures

○VCC noise (bypass capacitor)

When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is

recommended to attach a bypass capacitor (0.1μF) between IC VCC and GND. At that moment, attach it as close to IC as

possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND.

○SCK noise

When the rise time (tR) of SCK is long, and a certain degree or more of noise exists, malfunction may occur owing to clock

bit displacement. To avoid this, a Schmitt trigger circuit is built in SCK input. The hysteresis width of this circuit is set about

0.2V, if noises exist at SCK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise time

(tR) of SCK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise countermeasures.

Make the clock rise, fall time as small as possible.

○WPB noise

During execution of write status register command, if there exist noises on WPB pin, mistake in recognition may occur and

forcible cancellation may result, which please note. To avoid this, a Schmitt trigger circuit is built in WPB input. In the same

manner, a Schmitt trigger circuit is built in CSB input, SI input and HOLDB input too.

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●Operational Notes

(1) Described numeric values and data are design representative values, and the values are not guaranteed.

(2) Application circuit

Although we can recommend the application circuits contained herein with a relatively high degree of confidence, we

ask that you verify all characteristics and specifications of the circuit as well as its performance under actual conditions.

Please note that we cannot be held responsible for problems that may arise due to patent infringements or

noncompliance with any and all applicable laws and regulations.

(3) Absolute maximum ratings

Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit

between pins or an open circuit between pins. Therefore, it is important to consider circuit protection measures, such as

adding a fuse, in case the IC is operated over the absolute maximum ratings.

(4) Ground Voltage

The voltage of the ground pin must be the lowest voltage of all pins of the IC at all operating conditions. Ensure that no

pins are at a voltage below the ground pin at any time, even during transient condition.

(5) Thermal consideration

Use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (Pd) in

actual operating conditions. Consider Pc that does not exceed Pd in actual operating conditions (Pc≥Pd).

Package Power dissipation

Power dissipation

: Pd (W)=(Tjmax－Ta)/θja

: Pc (W)=(Vcc－Vo)×Io+Vcc×Ib

Tjmax : Maximum junction temperature=150℃, Ta : Peripheral temperature[℃] ,

θja : Thermal resistance of package-ambience[℃/W], Pd : Package Power dissipation [W],

Pc : Power dissipation [W], Vcc : Input Voltage, Vo : Output Voltage, Io : Load, Ib : Bias Current

(6) Short between pins and mounting errors

Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong

orientation or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pins.

(7) Operation under strong electromagnetic field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

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●Part Numbering

B

R

2

5

H

0

4

0

x

-

2

C

x

BUS type

25: SPI

Operating temperature/

Operating voltage

H: -40℃ to +125℃ / 2.5V to 5.5V

Capacity

040= 4K

Package

FVM: MSOP8

FVT: TSSOP-B8

F: SOP8

FJ: SOP-J8

Process Code

Packaging and forming specification

E2: Embossed tape and reel

TR: Embossed tape and reel (MSOP8 package only)

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●Physical Dimension Tape and Reel Information

Package Name

MSOP8

Tape

Embossed carrier tape

3000pcs

Quantity

TR

Direction

of feed

The direction is the 1pin of product is at the upper right when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

1pin

Direction of feed

Order quantity needs to be multiple of the minimum quantity.

Reel

∗

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Package Name

TSSOP-B8

Tape

Embossed carrier tape

3000pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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TSZ22111・15・001

TSZ02201-0R1R0G100090-1-2

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BR25H040-2C

Package Name

SOP8

(Max 5.35 (include.BURR))

(UNIT : mm)

PKG : SOP8

Drawing No. : EX112-5001-1

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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TSZ22111・15・001

TSZ02201-0R1R0G100090-1-2

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BR25H040-2C

Package Name

SOP-J8

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

www.rohm.com

TSZ22111・15・001

TSZ02201-0R1R0G100090-1-2

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BR25H040-2C

●Marking Diagrams(TOP VIEW)

TSSOP-B8(TOP VIEW)

MSOP8 (TOP VIEW)

Part Number Marking

LOT Number

H

0

4

LOT Number

1PIN MARK

SOP8(TOP VIEW)

SOP-J8(TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

H 0 4 0

LOT Number

1PIN MARK

www.rohm.com

TSZ22111・15・001

TSZ02201-0R1R0G100090-1-2

21.Mar.2013 Rev.001

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BR25H040-2C

●Revision History

Date

Revision

001

Changes

21. Mar. 2013

New Release

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TSZ22111・15・001

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Notice

●General Precaution

1) Before you use our Products, you are requested to carefully read this document and fully understand its contents.

ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any

ROHM’s Products against warning, caution or note contained in this document.

2) All information contained in this document is current as of the issuing date and subject to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales

representative.

●Precaution on using ROHM Products

1) Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

2) ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3) Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4) The Products are not subject to radiation-proof design.

5) Please verify and confirm characteristics of the final or mounted products in using the Products.

6) In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7) De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual

ambient temperature.

8) Confirm that operation temperature is within the specified range described in the product specification.

9) ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Notice - Rev.004

Daattaasshheeeett

●Precaution for Mounting / Circuit board design

1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the

ROHM representative in advance.

For details, please refer to ROHM Mounting specification

●Precautions Regarding Application Examples and External Circuits

1) If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2) You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

●Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

●Precaution for Storage / Transportation

1) Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2) Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3) Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4) Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

●Precaution for Product Label

QR code printed on ROHM Products label is for ROHM’s internal use only.

●Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

●Precaution for Foreign Exchange and Foreign Trade act

Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,

please consult with ROHM representative in case of export.

●Precaution Regarding Intellectual Property Rights

1) All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable

for infringement of any intellectual property rights or other damages arising from use of such information or data.:

2) No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the information contained in this document.

Notice - Rev.004

Daattaasshheeeett

●Other Precaution

1) The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or

concerning such information.

2) This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

3) The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

4) In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

5) The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice - Rev.004


型号：	BR25H040FVM-2C
厂家：	ROHM
描述：	Serial EEPROM Series Automotive EEPROM 125â Operation SPI BUS EEPROM 串行EEPROM系列汽车EEPROM 125A ????操作SPI总线的EEPROM 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总35页 (文件大小：1060K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BR25H040FVM-2C [ROHM]

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