BU1574KU [ROHM]

Real Time Video Processor ICs; 实时视频处理器IC
BU1574KU
型号: BU1574KU
厂家: ROHM    ROHM
描述:

Real Time Video Processor ICs
实时视频处理器IC

消费电路 商用集成电路
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AIE Adaptive Image Enhancer Series  
Real Time  
Video Processor ICs  
BU1572GUW, BU1573KV, BU1574KU  
No.09060EBT02  
Description  
BU1572GUW/BU1573KV/BU1574KU is AIE : Adaptive Image Enhancer (image processing technology by ROHM’s  
hardware). Camera video images are optimized for maximum visibility.  
Features  
1) Compatible with image data from QCIF size (176 144) up to WVGA+ size (864 480)  
2) Compatible with 80-system CPU bus interface and RGB interface.(BU1572GUW/BU1573KV)  
3) Compatible with Input/Output data formats with RGB 5:6:5 and 6:6:6.(BU1572GUW/BU1573KV)  
4) Multiple operation modes: Image Enhance, Analysis, Through and Sleep. *1  
5) Two selectable register settings: indirect addressing through the 80-system CPU bus interface  
or the 2-wire serial interface (I2C) *2  
6) PWM output for image adjustment LCD backlight control.  
7) Built-in edge-enhancement and gamma filters.  
*1: BU1574KU is an analysis mode setting interdiction.  
*2: BU1574KU becomes only the register set by the two-wire system serial interface.  
Extra document is prepared separately about each register setup. Please refer to the Development Scheme on page 10.  
Application  
Portable media player, Mobile phone, car display, Car navigation system, and portable DVD etc.  
Lineup  
Supply power  
source voltage  
Control  
Interface  
Output  
Interface  
Input  
Interface  
Parameter  
PWM Output  
Package  
1.4-1.6(VDDCore)  
1.65-3.3(VDDIo)  
Supported up to Max  
WVGA+(864×480)  
I2C BUS  
(At RGB interface)  
18bit RGB interface  
or bus interface  
Image adjustment  
PWM output  
BU1572GUW  
BU1573KV  
BU1574KU  
VBGA063W050  
VQFP64  
1.4-1.6(VDDCore)  
2.7-3.6(VDDIo)  
Supported up to Max  
WVGA+(864×480)  
I2C BUS  
(At RGB interface)  
18bit RGB interface  
or bus interface  
Image adjustment  
PWM output  
8bit YUV=4:2:2 parallel  
1.4-1.6(VDDCore)  
2.7-3.6(VDDIo)  
Supported up to Max  
WVGA+(864×480)  
image adjustment  
PWM output  
I2C BUS  
CCIR601  
CCIR656  
UQFP64  
Absolute maximum ratings (Ta=25)  
Recommended operating range  
Parameter  
Symbol  
VDDIO  
VDD  
VIN  
Rating  
-0.3+4.2  
-0.3+2.1  
-0.3VDDIO+0.3  
-40+125  
310 *1  
Unit  
V
Parameter  
Symbol  
Rating  
Unit  
V
Supply power  
source voltage 1  
Supply power source  
voltage 1IO)  
VDDIO 1.653.30(Typ:2.85V) *1  
Supply power  
source voltage 2  
Supply power source  
voltage 2CORE)  
V
VDD  
1.401.60(Typ:1.50V)  
0VDDIO  
V
V
Input voltage range VIN-VDDIO  
V
Input voltage  
Storage  
temperature range  
Operating  
Topr  
Tstg  
-20+70 *2  
temperature range  
Power dissipation  
PD  
mW  
*Please supply power source in order of VDDVDDIO.  
*In the case exceeding 25ºC, 3.1mW should be reduced at the rating 1ºC.  
(BU1573KV: 7.5mW / BU1574KU: 7mW should be reduced at the rating.)  
*1: BU1573KV is 750mW, and BU1574KU is 700mW.  
*1 : BU1573KV and BU1574KU correspond to 2.703.60V(Typ:3.00V)  
*2 : BU1573KV and BU1574KU correspond to –40+85℃  
www.rohm.com  
2009.04- Rev.B  
1/12  
© 2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
●Electric characteristics  
(Unless otherwise specified, VDD=1.50V,VDDIO=2.85V,GND=0.0V,Ta=25,fIN=36.0MHz) *1  
Limits  
TYP.  
-
24  
-
Parameter  
Symbol  
Unit  
Condition  
MIN.  
-
-
MAX.  
36.0  
-
30  
10  
Input frequency  
IN  
IDD1  
IDDst  
IIH  
MHz DCKI (DUTY45%55%) *2  
Operating consumption current  
Static consumption current  
Input ”H” current  
mA  
μA  
μA  
μA  
At enhance mode setting (36MHz)  
At sleep mode setting, input terminal=GND setting  
-
-10  
-10  
VDDIO  
0.8  
-
-
VIH=VDDIO  
VIL=GND  
Input ”L” current  
IIL  
10  
VDDIO  
+0.3  
VDDIO  
0.2  
Input ”H” voltage 1  
Input ”L” voltage 1  
VIH1  
VIL1  
-
-
V
V
Normal input (including input mode of I/O terminal)  
Normal input (including input mode of I/O terminal)  
-0.3  
Hysteresis input *3  
(RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC,  
LCDRDBI/I2CDEV0)  
Hysteresis input *4  
(RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC,  
LCDRDBI/I2CDEV0)  
Hysteresis input *5  
(RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC,  
LCDRDBI/I2CDEV0)  
VDDIO  
0.85  
VDDIO  
+0.3  
Input ”H” voltage 2  
Input ”L” voltage 2  
VIH2  
VIL2  
Vhys  
-
-
V
V
V
VDDIO  
0.15  
-0.3  
-
Hysteresis voltage width  
0.7  
-
VDDIO  
-0.4  
IOH=-1.0mA(DC)  
(including output mode of I/O terminal)  
IOL=1.0mA(DC)  
Output ”H” voltage  
Output ”L” voltage  
VOH  
VOL  
-
-
VDDIO  
0.4  
V
V
0.0  
(including output mode of I/O terminal)  
*1 : VDDIO=3.00V in case of BU1573KV / BU1574KU  
*2 : CAMCKI in case of BU1574KU  
*3,*4,*5 : It corresponds with RESETB CAMCKI SDA SDC I2CDEV0 for BU1574KU  
Block Diagram  
BU1572GUW/BU1573KV)  
BU1574KU)  
Color correction  
CAMDI[17:0]  
Color correction  
LCDDI[17:0]  
Luminance  
distinction  
Image enhance  
CAMDO[17:0]  
Luminance  
distinction  
Image enhance  
LCDDO[17:0]  
Register  
LCDRS0/1I  
LCDCSBI  
LCDWRBI  
LCDRDBI  
Edge  
enhancement  
Gamma control  
Register  
Edge  
enhancement  
Gamma control  
PWM control  
generation  
PWM control  
generation  
SDA  
SDC  
SDA  
SDC  
I2C interface  
I2C interface  
PWMO  
PWMO  
LCDRS0O  
LCDCSBO  
LCDWRBO  
LCDVSO  
LCDHSO  
VLDO  
CAMVSO  
CAMHSO  
CAMCKO  
Timing generator  
LCDVSI  
LCDHSI  
VLDI  
ENAI  
DCKI  
Timing generator  
CAMVSI  
CAMHSI  
CAMCKI  
ENAO  
DCKO  
MSEL0/1/2  
RESETB  
MSEL0/1/2  
RESETB  
Recommended Application Circuit  
BU1572GUW/BU1573KV)  
BU1574KU)  
CAMDO[7:0]  
CAMHSO  
CAMVSO  
CAMCKO  
CAMDI[7:0]  
CAMHSI  
LCD Controller  
D[17:0]  
CPU  
BU1572GUW/BU1573KV  
CAMDI[7:0]  
CAMDO[7:0]  
CAMHSO  
CAMVSO  
CAMCKO  
LCDDATA[17:0]  
LCDDI[17:0]  
LCDDO[17:0]  
Image  
Camera  
CAMHSI  
Processing  
IC  
LCDRS/  
LCDCSB/  
LCDWRB  
LCDRS0I/  
LCDCSBI/  
LCDWRBI  
LCDRS0O/  
LCDCSBO/  
LCDWRBO  
RS/  
CSB/  
WRB  
Module  
BU1574KU  
CAMVSI  
CAMCKI  
CAMVSI  
CAMCKI  
LCDRDB  
LCDRDBI  
RDB  
VSYNC/  
HSYNC/  
DOTCLOCK  
LCDVSO/  
LCDHSO/  
DCKO  
LCDVSI/  
LCDHSI/  
DCKI  
VSYNC/  
HSYNC/  
CLK  
SDA  
SDC  
LED Driver  
PWM IN  
SDA/SDC  
SDA/SDC  
PWMO  
www.rohm.com  
2009.04- Rev.B  
2/12  
© 2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
Terminal functions (BU1572GUW/BU1573KV)  
Interface Type *1  
TYPE 1 TYPE 2  
LCDVSI  
PIN  
No.  
PIN  
Name  
Active  
Level  
In/output  
type  
In/Out  
Init  
Description  
Vertical timing input  
1
2
LCDVSI  
LCDVSI  
-
In  
-
*
-
-
-
C *1  
-
N.C.*2  
-
-
LCDHSI/  
LCDRS01  
LCDCSBI/  
SDA  
Horizontal timing input/  
Register select input signal 0  
Chip select input signal /  
In/output serial data  
3
4
5
6
*3  
LCDHSI  
SDA  
In  
In/Out  
In  
*
-
In  
-
C *1  
G
Low/  
DATA  
Low/  
CLK  
LCDCSBI  
LCDWRBI  
LCDWRDBI/  
SDC  
Write enable input signal /  
In/output serial clock  
SDC  
D *1  
D *1  
LCDRDBI/  
I2CDEV0  
Read enable input signal /  
I2C device address setting  
LCDRDBI  
LCDDI0  
I2CDEV0  
In  
Low/ *  
-
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
C *1  
C *1  
-
7
LCDDI0  
LCDDI1  
LCDDI2  
LCDDI3  
LCDDI4  
LCDDI5  
LCDDI6  
LCDDI7  
LCDDI8  
LCDDI9  
LCDDI10  
LCDDI11  
LCDDI12  
LCDDI13  
LCDDI14  
LCDDI15  
LCDDI16  
LCDDI17  
ENAI  
LCDDI0  
LCDDI1  
LCDDI2  
LCDDI3  
LCDDI4  
LCDDI5  
LCDDI6  
LCDDI7  
LCDDI8  
LCDDI9  
LCDDI10  
LCDDI11  
LCDDI12  
LCDDI13  
LCDDI14  
LCDDI15  
LCDDI16  
LCDDI17  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
*
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
-
Data input: bit 0  
Data input: bit 1  
Data input: bit 2  
Data input: bit 3  
Data input: bit 4  
Data input: bit 5  
Data input: bit 6  
Data input: bit 7  
Data input: bit 8  
Data input: bit 9  
Data input: bit 10  
Data input: bit 11  
Data input: bit 12  
Data input: bit 13  
Data input: bit 14  
Data input: bit 15  
Data input: bit 16  
Data input: bit 17  
RAM write enable input signal  
VLD input signal  
8
LCDDI1  
LCDDI2  
LCDDI3  
LCDDI4  
LCDDI5  
LCDDI6  
LCDDI7  
LCDDI8  
LCDDI9  
LCDDI10  
LCDDI11  
LCDDI12  
LCDDI13  
LCDDI14  
LCDDI15  
LCDDI16  
LCDDI17  
*3  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
ENAI  
VLDI  
VDDIO  
DCKI  
GND  
VDD  
*3  
VLDI  
In  
*
-
VDDIO  
DCKI  
VDDIO  
DCKI  
GND  
-
PWR  
CLK  
-
DIGITAL IO power source  
Clock input  
In  
-
D *1  
-
GND  
-
GND  
PWR  
-
Common GROUND  
CORE power source  
VDD  
VDD  
-
-
-
MSEL0/  
Mode select 0/  
31  
32  
LCDRS0I  
LCDRS1I  
MSEL0 *3  
MSEL1 *3  
In  
In  
*
-
-
A
A
LCDRS0I  
Register select input signal 0  
MSEL1/  
Mode select 1/  
*
LCDRS1I  
Register select input signal 1  
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset.  
*1 : It suspends during reset (initial state)  
*2 : With no ball(Please connect it with GND for BU1573KV)  
*3 : Please connect with GND.  
www.rohm.com  
2009.04- Rev.B  
3/12  
© 2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
Interface Type *1  
TYPE 1 TYPE 2  
PIN  
No.  
PIN  
Active  
Level  
*
In/output  
type  
In/Out  
In  
Init  
-
Description  
Mode select 2  
Name  
33  
MSEL2  
MSEL2 *3  
LCDRS0O/  
PWM_O(1)  
MSEL2 *4  
A
LCDRS0O/  
PWMO1 *5  
PWMO3 *5/  
VLDO  
Register select output signal 0/  
PWM output for the LCD backlight  
PWM output for the LCD backlight/  
VLD output signal  
34  
PWM_O(1)  
Out  
*
Low  
E
PWM_O(3)/  
VLDO  
35  
36  
37  
PWM_O(3)  
Out  
Out  
*
*
Low  
Low  
Low  
E
E
F
ENAO  
-
ENAO  
RAM write enable output signal  
Data output: bit 17/  
LCDDO17/  
PWMO2 *5  
LCDDO16  
LCDDO15  
LCDDO14  
LCDDO13  
LCDDO12  
LCDDO11  
LCDDO10  
LCDDO9  
LCDDO8  
GND  
LCDDO17/  
PWM_O(2)  
LCDDO16  
LCDDO15  
LCDDO14  
LCDDO13  
LCDDO12  
LCDDO11  
LCDDO10  
LCDDO9  
LCDDO8  
GND  
LCDDO17/  
PWM_O(2)  
LCDDO16  
LCDDO15  
LCDDO14  
LCDDO13  
LCDDO12  
LCDDO11  
LCDDO10  
LCDDO9  
LCDDO8  
GND  
In/Out  
DATA  
PWM output for the LCD backlight  
Data output: bit 16  
Data output: bit 15  
Data output: bit 14  
Data output: bit 13  
Data output: bit 12  
Data output: bit 11  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
-
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
GND  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
-
F
F
F
F
F
F
F
F
F
-
Data output: bit 10  
Data output: bit 9  
Data output: bit 8  
Common GROUND  
LCDDO7  
LCDDO6  
LCDDO5  
LCDDO4  
LCDDO3  
LCDDO2  
LCDDO1  
LCDDO0  
LCDWRBO/  
I2CDEV6B  
LCDCSBO  
SDA /  
LCDDO7  
LCDDO6  
LCDDO5  
LCDDO4  
LCDDO3  
LCDDO2  
LCDDO1  
LCDDO0  
LCDDO7  
LCDDO6  
LCDDO5  
LCDDO4  
LCDDO3  
LCDDO2  
LCDDO1  
LCDDO0  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
In/Out  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
High/  
In  
Data output: bit 7  
F
F
F
F
F
F
F
F
Data output: bit 6  
Data output: bit 5  
Data output: bit 4  
Data output: bit 3  
Data output: bit 2  
Data output: bit 1  
Data output: bit 0  
56  
57  
58  
LCDWRBO  
LCDCSBO  
-
I2CDEV6B *3  
"H" *6  
In/Out  
Out  
*
*
*
Write enable output signal  
F
E
G
High  
Chip select output signal  
In/output serial clock/  
Horizontal timing output signal  
In/output serial clock/  
Vertical timing output signal  
System reset signal  
LCDHSO  
Out  
Low  
Low  
LCDHSO  
SDC/  
59  
-
LCDVSO  
Out  
*
G
LCDVSO  
RESETB  
VDDIO  
60  
61  
62  
63  
64  
RESETB  
VDDIO  
DCKO  
GND  
RESETB  
VDDIO  
DCKO  
GND  
In  
Low  
PWR  
CLK  
-
B
-
-
-
DIGITAL IO power source  
Clock output  
DCKO  
Out  
Low  
E
-
GND  
-
-
GND  
PWR  
-
-
Common GROUND  
VDD  
VDD  
VDD  
CORE power source  
-
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset.  
*3 : Please connect with GND  
*4 : Please connect with VDDIO  
*5 : It selects it according to PWMCNT register (40h).  
*6 : “High”output  
www.rohm.com  
2009.04- Rev.B  
4/12  
© 2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
Terminal functions (BU1574KU)  
PIN  
No.  
PIN  
Name  
In/  
Out  
Active  
Level  
In/Output  
Init  
Descriptions  
Vertical timing input  
type  
C *1  
-
1
CAMVSI  
In  
-
*
-
-
-
In  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2
N.C. *2  
*
-
3
CAMHSI  
In  
In/Out  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
In  
-
*
Horizontal timing input  
In/Output serial data  
In/Output serial clock  
I2C device address setting  
Data input: bit 0  
Data input: bit 1  
Data input: bit 2  
Data input: bit 3  
Data input: bit 4  
Data input: bit 5  
Data input: bit 6  
Data input: bit 7  
RESERVE  
C *1  
G
4
SDA  
DATA  
5
SDC  
CLK  
D *1  
D *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
H *1  
C *1  
C *1  
C *1  
C *1  
C *1  
C *1  
C *1  
C *1  
C *1  
C *1  
C *1  
C *1  
-
6
I2CDEV0  
*
7
CAMDI0  
DATA  
8
CAMDI1  
DATA  
9
CAMDI2  
DATA  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
CAMDI3  
DATA  
CAMDI4  
DATA  
CAMDI5  
DATA  
CAMDI6  
DATA  
CAMDI7  
DATA  
RESERVEI0 *3  
RESERVEI1 *3  
RESERVEI2 *3  
RESERVEI3 *3  
RESERVEI4 *3  
RESERVEI5 *3  
RESERVEI6 *3  
RESERVEI7 *3  
RESERVEI8 *3  
RESERVEI9 *3  
RESERVEI10 *3  
RESERVEI11 *3  
VDDIO  
*
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
*
RESERVE  
RESERVE  
PWR  
CLK  
GND  
PWR  
*
DIGITAL IO power source  
Clock input  
CAMCKI  
In  
-
D *1  
-
GND  
Common GROUND  
CORE power source  
Mode select 0  
Mode select 1  
VDD  
-
-
MSEL0 *3  
MSEL1 *3  
In  
In  
A
*
A
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under  
reset.  
*1 : It suspends during reset (initial state)  
*2 : Please connect with GND  
*3 : Please connect with GND.  
www.rohm.com  
© 2009 ROHM Co., Ltd. All rights reserved.  
2009.04- Rev.B  
5/12  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
PIN  
No.  
PIN  
Name  
Active  
Level  
In/Output  
type  
In/Out  
Init  
Descriptions  
Mode select 2  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
MSEL2 *4  
In  
*
-
A
E
E
E
E
E
E
E
E
E
E
E
E
E
-
PWMO  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
-
*
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
-
PWM output for LCD backlight  
RESERVE  
RESERVEO11 *5  
RESERVEO10 *5  
RESERVEO9 *5  
RESERVEO8 *5  
RESERVEO7 *5  
RESERVEO6 *5  
RESERVEO5 *5  
RESERVEO4 *5  
RESERVEO3 *5  
RESERVEO2 *5  
RESERVEO1 *5  
RESERVEO0 *5  
GND  
*
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
*
RESERVE  
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
*
RESERVE  
GND  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
DATA  
*
Common GROUND  
Data output: bit 7  
Data output: bit 6  
Data output: bit 5  
Data output: bit 4  
Data output: bit 3  
Data output: bit 2  
Data output: bit 1  
Data output: bit 0  
RESERVE  
CAMDO7  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
In  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
-
E
E
E
E
E
E
E
E
A
E
E
E
B
-
CAMDO6  
CAMDO5  
CAMDO4  
CAMDO3  
CAMDO2  
CAMDO1  
CAMDO0  
I2CDEV6B *3  
RESERVEO12 *5  
CAMHSO  
Out  
Out  
Out  
In  
*
High  
Low  
Low  
-
RESERVE  
*
Horizontal timing output signal  
Vertical timing output signal  
System reset signal  
DIGITAL IO power source  
Clock output  
CAMVSO  
*
RESETB  
Low  
PWR  
CLK  
GND  
PWR  
VDDIO  
-
-
CAMCKO  
Out  
-
Low  
-
E
-
GND  
Common GROUND  
CORE power source  
VDD  
-
-
-
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under  
reset.  
*3 : Please connect with GND  
*4 : Please connect with VDDIO  
*5 : Please leave OPEN  
www.rohm.com  
© 2009 ROHM Co., Ltd. All rights reserved.  
2009.04- Rev.B  
6/12  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
Equivalent Circuit Structures of input / output pins  
Type  
The equivalent circuit structure  
Type  
The equivalent circuit structure  
VDDIO  
VDDIO  
VDDIO  
A
B
To internal  
To internal  
GND  
GND  
GND  
Input pin  
Input pin with the hysteresis function  
VDDIO  
VDDIO  
Internal signal  
VDDIO  
To internal  
C
D
GND  
Internal signal  
GND  
Internal signal  
GND  
Input pin with the suspend function  
Input pin with the hysteresis and suspend functions  
VDDIO  
VDDIO  
VDDIO  
VDDIO  
VDDIO  
Internal signal  
To internal  
E
F
Internal signal  
GND  
Internal signal  
Internal signal  
GND  
GND  
GND  
GND  
Output pin  
In/output pin  
VDDIO  
To internal  
VDDIO  
VDDIO  
VDDIO  
To internal  
Internal signal  
Internal signal  
VDDIO  
Internal signal  
Internal signal  
Internal signal  
G
H
Internal signal  
GND  
GND  
GND  
GND  
Internal signal  
In/output pin with the hysteresis function  
In/output pin with the suspend function  
www.rohm.com  
2009.04- Rev.B  
7/12  
© 2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
Terminal Layout  
BU1572GUW Bottom View)  
(BU1573KV/BU1574KU Top View)  
H
17  
18  
22  
24  
27  
29  
31  
33  
LCDDI10 LCDDI11 LCDDI15 LCDDI17  
VDDIO  
GND  
MSEL0/  
LCDRS01  
MSEL2  
G
F
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
15  
LCDDI8  
16  
LCDDI9  
20  
21  
25  
ENAI  
30  
VDD  
32  
MSEL1/  
LCDRS1I  
34  
LCDDI13 LCDDI14  
LCDRS0O/  
PWMO1  
2
3
4
13  
LCDDI6  
14  
LCDDI7  
19  
23  
26  
VLDI  
35  
PWMO3/  
VLDO  
36  
ENAO  
38  
LCDDO1  
5
LCDDI12 LCDDI16  
6
E
D
C
B
A
7
VQFP64 (BU1573KV)  
11  
LCDDI4  
9
10  
LCDDI3  
12  
LCDDI5  
28  
DCKI  
39  
37  
40  
8
LCDDI2  
LCDDO1 LCDDO17/ LCDDO1  
PWMO2  
9
10  
11  
12  
13  
14  
15  
16  
UQFP64 (BU1574KU)  
8
5
7
60  
44  
42  
41  
43  
LCDDI1 LCDWRBI/ LCDDI0  
SDC  
RESETB LCDDO1 LCDDO1 LCDDO1 LCDDO1  
2
6
4
3
58  
SDA/  
LCDHSO  
55  
51  
46  
45  
LCDDRBI/ LCDCSBI/ LCDHSI/  
I2CDEV0  
LCDDO0 LCDDO4 LCDDO8 LCDDO9  
SDA  
LCDRS01  
64  
VDD  
62  
DCKO  
57  
53  
52  
48  
47  
GND  
LCDCSB LCDCSB LCDDO3 LCDDO7  
1
63  
61  
59  
56  
54  
50  
49  
LCDVSI  
GND  
VDDIO  
SDC/ LCDWRBO/ LCDDO1 LCDDO5 LCDDO6  
LCDVSO I2CDEV6B  
1
2
3
4
5
6
7
8
The terminal arrangement follows terminal function table of P.3-6.  
Timing Chart  
1. I2C interface  
1.1 I2C interface timing  
SDA  
tSU;DAT  
tLOW  
tBUF  
tHD;ST  
SDC  
tHD;STA  
tSU;STA  
tSU;STO  
tHD;DAT  
tHIGH  
Table 1.1-1 I2C Interface timing  
Symbol  
fSCL  
Parameter  
MIN.  
TYP.  
MAX.  
400  
Unit  
kHz  
SDC Clock Frequency  
0
-
-
Hold-time(repetition)STARTconditions  
tHD;STA  
0.6  
-
us  
(The first clock pulse is generated after this period.)  
fLOW  
The "L" period of SDC clock  
1.3  
0.6  
0.6  
0
-
-
-
-
-
-
-
-
-
-
us  
us  
us  
us  
ns  
us  
us  
tHIGH  
The "H" period of SDC clock  
Setup time of repetitive STARTconditions  
Hold time of SDA  
tSU;STA  
tHD;DAT  
tSU;DAT  
tSU;STO  
tBUF  
Setup time of SDA  
100  
0.6  
1.3  
-
-
-
Setup time of the STOPconditions  
Bus free time betweenSTOPconditions and theSTARTconditions  
www.rohm.com  
2009.04- Rev.B  
8/12  
© 2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
2.  
RGB interface  
2.1. RGB interface timing  
The input timing of image signal on RGB I/F is shown in Table 2.1-1.  
Table 2.1-1 BU1572GUW/BU1573KV  
RGB interface input timing  
LCDVSI  
UN  
LCDHSI  
LCDDI0  
Symbol  
tDS  
Explanation  
MIN.  
8
TYP.  
-
MAX  
-
Camera setup period  
(between the DCKI rising and falling edges)  
ns  
ns  
LCDDI17  
DCKI  
(CKPOL=“0”)  
Camera holding period  
(between the DCKI rising and falling edges)  
tDH  
8
-
DCKI  
(CKPOL=“1”)  
tDH  
tDS  
The output timing of image signal on RGB I/F is shown in Table 2.1-2.  
Table 2.1-2  
BU1572GUW/BU1573KV Image signal output timing  
tDCLK  
Symbol  
tDCLK  
dDCLK  
tODD  
Explanation  
MIN.  
TYP.  
MAX.  
UNIT  
ns  
DCKO  
Clock Cycle  
Clock Duty  
27.7  
-
50  
-
-
60  
5
tOCD  
LCDVSO  
LCDHSO  
tOCD  
40  
-
%
tODD  
Decision of LCDDO from DCKO  
ns  
LCDDO  
[17:0]  
tOCD  
Decision of LCDVSO or LCDHSO from DCKO  
-
-
5
ns  
3.  
YUV interface  
3.1. YUV interface timing  
The input timing of image signal on YUV I/F is shown in Table 3.1-1.  
Table 3.1-1 BU1574KU  
YUV interface input timing  
CAMVSI  
TYP  
UNI  
Symbol  
tDS  
tDH  
Explanation  
MIN.  
MAX  
CAMHSI  
CAMDI0  
Camera setup period  
(between the CAMCKI rising and falling edges)  
8
8
-
-
-
ns  
ns  
CAMDI7  
Camera holding period  
(between the CAMCKI rising and falling edges)  
CAMCKI  
(CKPOL=“1”)  
CAMCKI  
(CKPOL=“0”)  
tDH  
tDS  
The output timing of image signal on YUV I/F is shown in Table 3.1-2.  
Table 3.1-2  
BU1574KU Image signal output timing  
tPCLK  
Symbol  
tPCLK  
dPCLK  
tODD  
Explanation  
MIN.  
TYP.  
MAX.  
UNIT  
ns  
CAMCKO  
Clock Cycle  
Clock Duty  
27.7  
-
50  
-
-
60  
5
tOCD  
CAMVSO  
tOCD  
40  
-
%
CAMHSO  
tODD  
Decision of CAMDO from CAMCKO  
ns  
CAMDO[7:0]  
tOCD  
Decision of CAMVSO or CAMHSO from CAMCKO  
-
-
5
ns  
www.rohm.com  
2009.04- Rev.B  
9/12  
© 2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
Development Scheme  
This technical note is aimed at trying the connectivity in the hardware between customer’s system and our AIE Adaptive  
Image Enhancer series.  
We prepare various data and tools for every development STEP as follows other than this technical note, please  
contact the sales staff in your duty also including the support system.  
(1) Demonstration STEP  
(You can try the standard image processing functions by the standard Demonstration kit at once.)  
You can confirm on TV screen what carried out AIE processing of a camera image and the DVD video image.  
Standard Demonstration board kit  
Demonstration board(TV-INBU1573KVTV-OUT board)  
Demonstration board operation manual  
Demonstration software  
If the software for the trial board is installed in your Windows PC(Windows 2000/XP), more detailed setting  
is possible.  
USB cable  
(2) Confirmation STEP  
(We will respond to customer’s camera module.)  
Specifications  
We will provide specifications for AIE Adaptive Image Enhancer according to customer’s requirements.  
Function explanation  
We will deliver you the function explanation describing detailed functions, register settings, external  
interfaces, timing, and so forth of AIE Adaptive Image Enhancer according to your requests.  
Application note  
We will deliver you the detailed explanation data on application development of AIE Adaptive Image  
Enhancer according to your requests.  
(3) System check STEP  
(You can check the application operation as a system by the kit of system check tools and your camera  
module.)  
You can check the interface with your camera module and the application operation on the system check board using  
the tools for user’s only.  
System check tools kit  
Board for system evaluation  
Manual for system evaluation  
Macro command file for reference  
*You can check the detailed functions of the application operation by your PC using the macro command file.  
(4) Integrated check STEP with user’s system  
(You can check the application operation as a system on your system check board using the integrated  
check software.)  
You can check the application operation on the sample LSI-equipped system check board by your camera  
module using the integrated check software.  
On line SupportWe will answer your questions about the software development.  
Cautions on use  
(1) Absolute Maximum Ratings  
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break  
down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode  
exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures  
including the use of fuses, etc.  
(2) Operating conditions  
These conditions represent a range within which characteristics can be provided approximately as expected. The electrical  
characteristics are guaranteed under the conditions of each parameter.  
(3) Reverse connection of power supply connector  
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due  
to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal.  
(4) Power supply line  
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines.  
In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the  
same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing  
the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For  
the GND line, give consideration to design the patterns in a similar manner.  
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the  
same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used  
present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant.  
www.rohm.com  
2009.04- Rev.B  
10/12  
© 2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
(5)GND voltage  
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.  
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient.  
(6)Short circuit between terminals and erroneous mounting  
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break  
down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal  
and the power supply or the GND terminal, the ICs can break down.  
(7)Operation in strong electromagnetic field  
Be noted that using ICs in the strong electromagnetic field can malfunction them.  
(8)Inspection with set PCB  
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.  
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB  
to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the  
completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection  
against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the  
storage of the set PCB.  
(9)Input terminals  
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic  
element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal.  
Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than  
the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals  
when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input  
terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics.  
(10)Ground wiring pattern  
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern  
from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the  
wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay  
attention not to cause fluctuations in the GND wiring pattern of external parts as well.  
(11)External capacitor  
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation  
in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.  
Order Model Name Selection  
2
B U  
1 5 7 2  
G U W  
E
Package type  
ROHM model name  
Product number  
Taping model name  
GUW: VBGA063W050  
KV: VQFP64  
E2: Embossed reel tape  
None: Tray  
KU: UQFP64  
Tape and Reel information  
VBGA063W050  
<Tape and Reel information>  
<Dimension>  
Embossed carrier tape (With dry pack)  
Tape  
2500pcs  
E2  
Quantity  
Direction  
of feed  
(The direction is the 1pin of product is at the upper left when you hold  
reel on the left hand and you pull out the tape on the right hand.)  
1234  
1234  
1234  
1234  
1234  
1234  
Direction of feed  
1Pin  
Reel  
(Unit:mm)  
When you order , please order in times the amount of package quantity.  
www.rohm.com  
2009.04- Rev.B  
11/12  
© 2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BU1572GUW, BU1573KV, BU1574KU  
VQFP64  
<Dimension>  
<Packing information>  
Container  
Tray(with dry pack)  
12.0 0.2  
10.0 0.1  
Quantity  
1000pcs  
48  
33  
Direction  
of feed  
49  
64  
32  
17  
Direction of product is fixed in a tray.  
1
16  
1.25  
+0.05  
0.03  
0.145  
+6°  
4°  
4°  
0.08  
S
0.5 0.1  
0.05  
+
0.04  
0.2  
M
0.08  
(Unit:mm)  
When you order , please order in times the amount of package quantity.  
UQFP64  
<Dimension>  
<Packing information>  
Container  
Tray(with dry pack)  
9.0 0.2  
7.0 0.1  
Quantity  
1000pcs  
48  
33  
Direction  
of feed  
Direction of product is fixed in a tray.  
49  
32  
17  
64  
0.5 1  
16  
+0.05  
0.03  
0.145  
°+6  
4°  
4
°
0.4  
0.08  
+0.05  
0.17  
0.03  
M
0.08  
(Unit:mm)  
When you order , please order in times the amount of package quantity.  
www.rohm.com  
© 2009 ROHM Co., Ltd. All rights reserved.  
2009.04- Rev.B  
12/12  
Notice  
N o t e s  
No copying or reproduction of this document, in part or in whole, is permitted without the  
consent of ROHM Co.,Ltd.  
The content specified herein is subject to change for improvement without notice.  
The content specified herein is for the purpose of introducing ROHM's products (hereinafter  
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,  
which can be obtained from ROHM upon request.  
Examples of application circuits, circuit constants and any other information contained herein  
illustrate the standard usage and operations of the Products. The peripheral conditions must  
be taken into account when designing circuits for mass production.  
Great care was taken in ensuring the accuracy of the information specified in this document.  
However, should you incur any damage arising from any inaccuracy or misprint of such  
information, ROHM shall bear no responsibility for such damage.  
The technical information specified herein is intended only to show the typical functions of and  
examples of application circuits for the Products. ROHM does not grant you, explicitly or  
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and  
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the  
use of such technical information.  
The Products specified in this document are intended to be used with general-use electronic  
equipment or devices (such as audio visual equipment, office-automation equipment, commu-  
nication devices, electronic appliances and amusement devices).  
The Products specified in this document are not designed to be radiation tolerant.  
While ROHM always makes efforts to enhance the quality and reliability of its Products, a  
Product may fail or malfunction for a variety of reasons.  
Please be sure to implement in your equipment using the Products safety measures to guard  
against the possibility of physical injury, fire or any other damage caused in the event of the  
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM  
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed  
scope or not in accordance with the instruction manual.  
The Products are not designed or manufactured to be used with any equipment, device or  
system which requires an extremely high level of reliability the failure or malfunction of which  
may result in a direct threat to human life or create a risk of human injury (such as a medical  
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller,  
fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of  
any of the Products for the above special purposes. If a Product is intended to be used for any  
such special purpose, please contact a ROHM sales representative before purchasing.  
If you intend to export or ship overseas any Product or technology specified herein that may  
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to  
obtain a license or permit under the Law.  
Thank you for your accessing to ROHM product informations.  
More detail product informations and catalogs are available, please contact us.  
ROHM Customer Support System  
http://www.rohm.com/contact/  
www.rohm.com  
© 2009 ROHM Co., Ltd. All rights reserved.  
R0039  
A

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SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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VISHAY