ML22Q254_技术文档

FEDL22Q254-03

Issued: Jun. 20, 2022

ML22Q254

ADPCM Speech Synthesis LSI

■ GENERAL DESCRIPTION

ML22Q254 is a speech synthesis LSI that incorporates Flash for storing sound code data, and can be controlled with a

I²C interface.

By integrating D-class speaker amplifier, solution required for sound output is made possible with single chip.

● Playback time

Maximum playback time (sec) (at fs^*1= 6.4 kHz)

Product name

ML22Q254

Flash capacity (bit)

HQ-ADPCM

16-bit Straight PCM

676K

(when 30 phrases

are selected)

672K

33.8

6.88

(when 62 phrases

are selected)

33.6

6.72

Notes: Flash capacity shows the numerical value of only a sound area

*1: Sampling frequency

● Speech synthesis algorithm:

HQ-ADPCM

4-bit ADPCM2

8-bit Nonlinear PCM

8-bit / 16-bit Straight PCM

(Can be specified for each phrase)

● Flash capacity:

● Sampling frequency (Fs):

676 Kbit (30 phrases selection),672 Kbit (62 phrases selection)

6.4kHz，8.0kHz，10.7kHz，12.8kHz，16.0kHz，

21.3kHz，25.6kHz，32.0kHz

(Can be specified for each phrase)

● Speaker driving amplifier:

● CPU command interface:

D-class amplifier (driven by 8 Ω)

I²C interface (slave, Maximum communication speed : 400kbps)

30 phrases or 62 phrases

● Maximum number of pharases:

● Disconnection detection function

● Speaker pin short detection function

● Source oscillation frequency:

● Power supply voltage:

8.192MHz (Typ) (internal)

2.0 to 5.5 V

● Flash memory access function by MCU

● Flash memory rewritable time:

● Operating temperature range:

● Package:

100 times

-40°C～+85°C

20-pin plastic TSSOP

ML22Q254-NNNTD/ML22Q254-xxxTD

(xxx: ROM code No.)

HQ-ADPCM is a high sound quality audio compression technology of "Ky's".

"Ky's" is a Registered trademark of National Universities corporate Kyushu

Institute of Technology

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The following table shows the differences from ML22Q234, ML22Q244.

Parameter

MCU interface

ML22Q254 (This product)

I²C

ML22Q234

ML22Q244

Clock synchronization Serial

Standalone

676 Kbit (when 30 phrases

are selected)

692 Kbit (when 30

phrases are selected)

Flash capacity

←

672 Kbit (when 62 phrases

are selected)

688 Kbit (when 62

phrases are selected)

HQ-ADPCM

4-bit ADPCM2

Speech synthesis algorithm

8-bit Nonlinear PCM

8-bit Straight PCM

16-bit Straight PCM

←

Maximum number of phrases:

Sampling frequency (kHz)

30/62

←

6.4/8.0/10.7/12.8/

16.0/21.3/25.6/32.0

8.192 MHz (internal

oscillation)

Clock frequency

←

Low-pass filter

FIR interpolation filter

D-class amplifier

←

Speaker driving amplifier

Speaker driving amplifier output

load

8Ω

←

Speaker driving amplifier output

voltage

1 W

Yes

←

Edit ROM function

Code setting : 32 levels

(Including Mute)

Code setting : 32 levels

(Including Mute)

Volume control

←

Command setting : 31 levels

4 ms to 1024 ms

(4 ms/step)

Silence insertion

Repeat function

←

Yes

Flash memory access function by

MCU

No

Power supply voltage

Operating temperature range

Package

2.0 to 5.5 V

-40 to +85°C

←

20-pin plastic TSSOP

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■ BLOCK DIAGRAMS

DV_DD

Address

Regulator

16bit

Multiplexer

676Kbit

Flash

DGND

V_DDL

Controller

Phrase

Address Latch

16bit

Address Counter

ADPCM/PCM

Synthesizer

I²C

CSB

SCL

SDA

Interface

LPF

TEST0

SPV_DD

TEST1_N

SPGND

Timing

Controller

BUSYB

D-class

Speaker

Amplifier

OUTPUT

Interface

SPM

SPP

OSC

(internal)

RESET_N

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■ PIN CONFIGURATIONS (TOP VIEW)

20-Pin Plastic TSSOP

RESET_N

NC

1

2

20

19

SPP

SPM

3

18 NC

SPGND

SPV_DD

4

17

16

15

14

13

12

11

TEST0

TEST1_N

SCL

BUSYB

DGND

V_DDL

5

6

7

SDA

CSB

DV_DD

NC

8

9

NC

10

NC

NC：Unused pin

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■ PIN DESCRIPTION

Initial value

(At the

RESET_N

Input)

Initial value

(At

standby)

Symbol

I/O

Description

1

2

3

SPP

SPM

O

-

Hi-Z

-

Hi-Z

-

Positive (+) output pin of the speaker amplifier built-in

Negative (-) output pin of the speaker amplifier built-in.

SPGND

Ground pin for the speaker amplifier.

Power supply pin for the speaker amplifier

Connect a bypass capacitor of 1 µF±30% or more between this pin and

4

SPV_DD

-

SPGND pin.

BUSY output pin. When BUSYB use mode is set, the "L" level is outputted

during playback. When disconnection is detected with disconnection

detection function, and command processing in flash memory access

mode, the "L" level is outputted.

*1

5

BUSYB

O

Hi-Z

BUSYB unused mode and logic inversion can be set with Speech LSI

Utility.

6

7

DGND

V_DDL

-

Digital ground pin.

Regulator output pin for internal logic circuitry.

Connect a capacitor of 1 µF±30% between this pin and DGND pin

Digital power supply pin.

Connect a capacitor of 1 µF±30% or more between this pin and DGND

pin.

Chip select pin.

8

DV_DD

CSB

-

I

-

Internal oscillation starts in response to turning “H” level down to “L” level,

and input through Clock synchronization Serial interface becomes

available. CSB unused mode and initial state can be set with Speech LSI

Utility.

*1

13

I²C serial data input pin.

Used for writing slave address and data.

Pull-up resistor must be inserted between this pin and DV_DD

I²C serial clock input pin.

14

15

SDA

SCL

I

1

Pull-up resistor must be inserted between this pin and DV_DD

Input pin for testing. This pin has a pull-up resistor built in. Fix this pin to

16

17

TEST1_N

TEST0

I

1

0

1

0

DV_DD

.

I/O

Input/output pin for testing. Leave this pin open.

Reset pin. Pull-up resistor is built in.

Input “L” level for initialization, when power is turned on, or when voltage

falls below recommended operation power supply voltage range. After the

power supply voltage is stable, drive this pin to “H” level.

20

RESET_N

I

0

1

9

10

11

12

18

19

Unused pin.

N.C.

-

Leave this pin open.

^*1: This value depends on Speech LSI Utility setting. Please refer to a "Code Option Setting Item" for details.

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■ ABSOLUTE MAXIMUM RATINGS

(DGND = SPGND = 0 V)

Parameter

Symbol

Condition

Rating

Unit

DV_DD

SPV_DD

Power supply voltage

-0.3 to + 6.5

-0.3 to +2.0

V

Internal logic power supply

voltage

Ta = 25 °C

V_DDL

V

Input voltage

V_IN

P_D

-0.3 to V_DD+0.3

1

V

Power dissipation

W

Applied to pin other than SPP or

SPM

I_SC1

-12 to +11

mA

Output short-circuit current

Storage temperature

I_SC2

SPP pin, SPM pin

-

600

mA

°C

T_STG

-55 to +150

■ RECOMMENDED OPERATING CONDITIONS

(DGND = SPGND = 0 V)

Parameter

Symbol

Condition

-

Range

Unit

2.0 to 5.5

2.2 to 5.5

DV_DD

SPV_DD

Power supply voltage

V

Flash memory write

Flash memory rewrite cycles ^*1

Operating temperature range

N

-

100

times

°C

T_OP1

T_OP2

-

-40 to +85

0 to +40

Flash memory write

Capacitor externally connected

to DV_DDpin

Capacitor externally connected

to SPV_DDpin

C_V

-

1±30% or more

μF

C_SV

Capacitor externally connected

to V_DDLpin

C_L

-

1±30%

15

μF

FLASH Memory write cycle

Y_DR

years

^*1: It means one erase and one program. Even when erasing is interrupted, it counts as one time.

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■ ELECTRICAL CHARACTERISTICS

● DC Characteristics

DV_DD= SPV_DD= 2.0 to 5.5 V, DGND = SPGND = 0 V, Ta = -40 to +85°C

Parameter

“H” input voltage

“L” input voltage

“H” output voltage 1

“L” output voltage 1

“H” input current 1

Symbol

V_IH

V_IL

V_OH1

V_OL1

I_IH1

Condition

Min.

0.7 × DV_DD

Typ.

Max.

DV_DD

0.3 × DV_DD

Unit

V

-

0

I_OH= －0.5 mA

I_OL= 0.5mA

V_IH= DV_DD

DV_DD－0.5

-

0.5

1

-

µA

V_IH= DV_DD

TEST0 pin

V_IL= DGND

“H” input current 2

“L” input current 1

“L” input current 2

I_IH2

I_IL1

I_IL2

0.02

-1

0.3

-

1.5

-

mA

µA

V_IL= DGND

-1.5

-0.3

-0.02

mA

RESET_N pin, TEST1_N

V_IL= DGND

“L” input current 3

“H” output current 1

I_IL3

-250

-

-30

-

-2

1

µA

CSB terminal pull-up input is set

VOH= DV_DD= SPV_DD

(High impedance)

BUSYB，SPP，SPM pin

VOH= DV_DD

I_OOH1

“H” output current 2

“L” output current 1

“L” output current 2

I_OOH2

I_OOL1

I_OOL2

(Nch Open drain)

BUSYB pin

VOL=DGND=SPGND

(High impedance)

BUSYB，SPP，SPM pin

VOL=DGND

-

1

-

µA

-1

(Pch Open drain)

BUSYB pin

-

No output load

DVDD= SPVDD=3.0 V

No output load

DVDD= SPVDD= 5.0 V

I_DD1

I_DD2

-

3.0

5.0

2.0

6.0

9.0

3.5

Supply current during

playback

mA

Supply current during

stabilizing chattering

I_DDC1

DV_DD= 5.0 V

mA

µA

I_DDS1

I_DDS2

Ta ≤ 50°C

Ta ≤ 85°C

-

0.5

3.0

8.0

Standby supply current

-10 to +50°C

-40 to +85°C

8.069

7.946

8.192

8.315

8.438

Source oscillation frequency

f_OSC

MHz

● Characteristics of Analog Circuitry

DV_DD= SPV_DD= 2.0 to 5.5 V, DGND = SPGND = 0 V, Ta = -40 to +85°C

Parameter

SPM, SPP output load

resistance

Symbol

RLSP

Condition

Min.

Typ.

Max.

Unit

-

8

-

Ω

Speaker amplifier output

voltage

SPV^DD= 5.0 V, Sin wave f = 1 kHz

P^SPO

-

1.0

-

W

R^LSP= 8 Ω, THD ≥ 10%

● Power-on/Shutdown Sequence

DV_DD= SPV_DD= 2.0 to 5.5 V, DGND = SPGND = 0 V, Ta = -40 to +85°C

Parameter

RESET_N input pulse width at

Power on

RESET_N input pulse width at

shut down

Symbol

Condition

Min.

Typ.

Max.

Unit

t^RSTR

t^RSTF

100

-

µs

-

0

-

µs

-

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● AC Characteristics

DV_DD= SPV_DD= 2.0 to 5.5 V, DGND = SPGND = 0 V, Ta = -40 to +85°C

Parameter

Initialization time after reset release

SCL Clock frequency

Symbol

t_INIT

Condition

Min.

Typ.

Max.

65

Unit

ms

-

t_SCL

0

400

kHz

Hold time (repeated) START condition

After this period, the first clock pulse is generated.

SCL clock “L” level pulse width

t_HD;STA

-

0.6

-

µs

t_LOW

t_HIGH

t_SU;STA

t_HD;DAT

t_SU;DAT

t_R

-

1.3

0.6

0

-

µs

ns

µs

pF

SCL clock “H” level pulse width

Setup time for repeated [START] condition

Data hold time: For I²C bus devices

Data setup time

-

0.9

-

100

20

SDA and SCL signal rise time

300

-

SDA and SCL signal fall time

t_F

20

STOP condition setup time

t_SU;STO

t_BUF

0.6

1.3

-

Bus-free time between STOP and START conditions

Capacitive load for each bus line

Noise margin at a “L” level in each device connected

(including hysteresis)

-

C_b

400

0.1 x

DV_DD

0.1 x

DV_DD

V_nL

V_nH

t_SP

-

V

Noise margin at a “H” level in each device connected

(including hysteresis)

Pulse width of spikes which must be suppressed by the

input filter

0

50

ns

Data reception possible time, after an oscillation start

Clock stretching time

Playback time

t_PUP1

t_CKST

t_VCYC

-

2

-

440

-

ms

µs

20

ms

BUSYB change time from "H" to "L", after a command

is inputted

t_CB

-

400

µs

CSB “H” level pulse width

t_CSW

CSB use mode

-

1

-

ms

µs

Oscillation stop time, after playback

t_OSST

500

Next command transmit timeꢀ

In the case of the playback

t_NCM

t_CMS

t_DCDS

t_DCDE

t_SD

-

500

1.5

-

10

-

ms

µs

ms

s

CSB use mode is

not set

Next command input time after transition to standby

Disconnection judging by the DISCONNECT command

start time

-

Disconnection judging by the DISCONNECT command

end time

1

BUSYB change time from "L" to "H", after over-current

detection of a speaker amplifier

-

80

µs

Processing time before playback start

Processing time after playback start

t_PLBF

t_PLAF

-

0.3

-

2.1

1.2

ms

0.15

Fade-out time at Change Immediately mode or Change

Immediately Once mode

t_FDO

-

22

-

ms

Note: Output pin load capacitance = 45 pF (max.)

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● AC Characteristics (Flash memory access mode)

DV_DD=SPV_DD=2.2～5.5V，DGND=SPGND=0V，Ta=0～＋40°C

Parameter

BUSYB change time from "H" to "L", after a command

is inputted

Symbol

Condition

Min.

Typ.

Max.

Unit

t_FCB

-

50

µs

Command execution time

t_FCP

t_FER

t_FCS

t_FWV

t_FV

-

15

2.4

45

9

µs

s

Flash memory erase time

Checksum confirmation time

-

ms

µs

In Flash memory

access mode

Flash memory write verify processing time

Flash memory verify time

-

2.2

-

Sound code data transmission interval

t_FDI

11

Wait time for accepting the next command after

command processing

t_FCE

0

-

µs

Note: Output pin load capacitance = 45 pF (max.)

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■ PLAYBACK FUNCTION

I²C interface

●

Serial interface that is compliant with I²C bus specification and can communicate data at speeds up to 400kbps. SCL and

SDA pins are used to input the command data.

Pull-up resister should be connected to SCL pin and SDA pin.

For the master on the I²C bus to communicate with this device (: slave), input the slave address with the first seven bits

after setting the start condition. The slave address can be set using the Speech Utility. The eighth bit of slave address is

used to set the direction (: write or read) of communication. If the eighth bit is “0” level, it is write mode from master to

slave. And, if the eighth bit is “1” level, it is read mode from master. Then, the communication is made in the unit of byte.

Acknowledge is needed for each byte.

Communication flow/timing chart with I²C is described below.

S： Start condition

Slave Address： Slave Address

A： Acknowledge

Command Data： Command

P： Stop condition

Timing chart for 1-byte configuration command input

SCL

A6

W

A

A5 A4 A3 A2 A1 A0

Slave Address

D7 D6D5 D4 D3D2 D1 D0

Command Data

SDA

A

P

S

Timing chart for 2-byte configuration command input

SCL

D15 D13

D11

A6 A5 A4 A3 A2 A1 A0 W

Slave Address

A

D9 D8

D14 D12 D10

A

D7 D6D5 D4 D3D2 D1 D0

Command Data

SDA

P

A

Command Data

A

S

Slave address can be set up with the option screen of Speech LSI Utility.

Please refer to "Code Option Setting Item" for details.

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● Speech Synthesis algorithm

Supporting four types of Speech Synthesis methods, which are HQ-ADPCM, 4bit ADPCM2, 8-bit nonlinear PCM, 8-bit

Straight PCM, and 16-bit Straight PCM. Any of these can be selected based on the characteristics of the sound to be

played back.

Speech Synthesis Compression

Suitable waveform

Characteristics

algorithm

rate^*1

Sound including high

frequency components

4bit ADPCM2 algorithm is improved. Adopting

variable bit length enables high sound quality and

high data compression.

HQ-ADPCM

1/5

(such as sound effects)

Unique scheme which is a refined version of 4bit

4-bit ADPCM2

1/4

1/2

Normal voice sound wave ADPCM Offers higher sound quality with better

waveform followability.

A part around the center of the waveform is played

back with a sound quality equivalent to 10 bits.

8-bit Nonlinear PCM

Sound including high

frequency components

8-bit Straight PCM

16-bit Straight PCM

1/2

1

Normal 8-bit Straight PCM.

(such as sound effects)

Normal 16-bit Straight PCM.

*1: When the same sampling frequency is used.

● Memory Allocation and Creating Sound Code Data

The sound code data consists of a sound management area, a sound data area, and an edit ROM area.

The sound control area manages setting infomation of 30 phrases or 62 phrases.

The sound area contains actual waveform data.

The edit ROM area contains data for effective use of sound data. For the details, refer to the section of “Edit ROM

Function”. The edit ROM area only available when the edit ROM is used.

The ROM data is created using Speech LSI Utility.

The 30 or 62 phrases can be switched using the Speech LSI Utility.

Please refer to a "Code Option Setting Item" for details.

Sound code data configuration (30 phrase selection)

Sound code data configuration (62 phrase selection)

0x00000

Sound control area

0x001FF

0x00200

Sound control area

0x003FF

0x00400

Sound data area /

Edit ROM area^*1

Sound data area /

Edit ROM area^*1

0x153FF

*1： Edit ROM area depends on creation of the data

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● Playback Time and Flash Capacity

The playback time depends on the memory capacity, sampling frequency, and the playback method. The equation to

know the playback time is shown below. But this is not applied if the edit ROM function is used.

1.024 × （Voice data area/Edit ROM area）（Kbit）

Playback time [sec]＝

Sampling frequency [kHz] × Bit length

(Bit length is 3.2 at the HQ-ADPCM, 4 at the 4-bit ADPCM2 and 8/16 at the PCM.)

In the case that the sampling frequency is 8 kHz, algorithm is HQ-ADPCM, the playback time is as follows.

When 30 phrases are selected

1.024 × 676（Kbit）

≈ 27.0 [sec]）

≈ 26.9 [sec]）

Playback time＝

8（kHz） × 3.2(bit)

When 62 phrases are selected

1.024 × 672（Kbit）

8（kHz） × 3.2(bit)

Playback time＝

Make the playback time of one phrase more than 20 msec.

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● Edit ROM function

The edit ROM function makes it possible to play back multiple phrases in succession. The following functions are set

using the edit ROM function:

• Continuous playback: There is no limit to set the number of times of the continuous playback. It depends on the

Flash capacity only.

• Silence insertion function: 4 ms to 1,024 ms

*Note: Silent insertion time varies for ±1 ms depends on the sampling frequency.

An independent phrase generated by edit ROM shall be 20 ms or longer.

It is possible to use sound ROM effectively to use the edit ROM function.

An example of the ROM structure, in a case of using the edit ROM function is as follows.

Example 1) Phrases using the Edit ROM Function

Phrase 2

Phrase 3

Phrase 4

Phrase 5

Phrase 6

Phrase 7

A

B

C

D

A

E

B

C

D

E

D

A

B

D

Silence (4 ms)

E

C

Silence (20 ms)

Example 2) Structure of the ROM storing contents of Example 1 (When 30 phrases are selected)

Sound control area

0x00200

A

B

D

C

Sound data area

E

Edit ROM area^*1

*1：Information on phrases 2 to 7 stored

0x153FF

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● Playback mode setup

Five playback modes are available. Can be set up for every phrase.

Set when the sound code data is generated.

 Play Once mode

This mode is playback once.

All the commands become invalid during playback.

Phrase(m)

Phrase(n)

Slave

Address

Command

data

Slave

Address

Command

data

SDA

BUSYB^*1

Good morning。

Sound output

Status

Awaiting

command

Playing Phrase(m)

Standby

*1：When used with default “H” level, CMOS output

Command

Standby

Next command must be input in the standby state after the playback ends.

Phrase(m)

Phrase(n)

Slave Command

Address data

SDA

Address

data

BUSYB^*1

Sound output

Status

Good morning。

Good agternoon。

Awaiting

Playing Phrase(m)

Playing Phrase(n)

Command Standby

command

Command

Standby

*1：When used with default “H” level, CMOS output

 Scheduled Play Once mode

This mode is playback once.

When the next command is inputted during playback, after playback of the present phrase ends, playback of the next

phrase starts.

Phrase(n)

Phrase(m)

Slave

Address

Comman

dadta

Slave

Address

Comman

dadta

SDA

BUSYB^*1

Sound output

Good morning。

Good agternoon。

Awaiting

command

Playing Phrase(m)

Playing Phrase(n)

Status

Standby

*1：When used with default “H” level, CMOS output

Command

Standby

When a plurality of commands are inputted, the last command input at the end of the phrase is valid.

In the following case, the phrase (n) is not played back because the last command is STOP command.

Phrase(m)

Phrase(n)

STOP

Slave

Address

Comman

dadta

Slave

Address

Comman

dadta

Slave

Address

Comman

dadta

SDA

BUSYB^*1

Sound output

Good morning。

Awaiting

command

Playing Phrase(m)

Status

Standby

*1：When used with default “H” level, CMOS output

Command

Standby

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 Change Immediately Once mode

This mode is for playing back once.

When the following phrase is inputted into playback, playback of the present phrase is ended on the way, and playback of

the following phrase starts.

Phrase(m)

Phrase(n)

Slave Command

SDA

Address

data

Address

data

BUSYB^*1

Sound output

Good morning

Good agternoon

Awaiting

command

Playing Phrase(m)

Playing Phrase(n)

Status

Fading out

Standby

*1：When used with default “H” level, CMOS output

Command

Standby

When a plurality of commands are inputted, the last command input at the end of the phrase is valid.

In the following case, the last input phrase (o) is played back.

Phrase(m)

Phrase(n)

Phrase(o)

Slave Command

SDA

Address

data

Address

data

Address

data

BUSYB^*1

Sound output

Good morning

Good evening

Awaiting

command

Playing Phrase(m)

Playing Phrase(o)

Status

Fading out

Standby

*1：When used with default “H” level, CMOS output

Command

Standby

 Scheduled Play mode

Once the playback starts, it is repeated until the next command is input.

The next command input during the playback is executed after the playback ends.

When a plurality of commands are inputted, the last command input at the end of the phrase is valid, as in Scheduled Play

Once.

STOP command

Phrase(m)

Slave Command

Address data

Slave Command

Address data

SDA

BUSYB^*1

Sound output

Good morning

Awaiting

command

Playing Phrase(m)

Status

Standby

Command

Standby

*1：When used with default “H” level, CMOS output

 Change Immediately mode

Once the playback starts, it is repeated until the next command is input.

When the next command is inputted, the phrase being played back is terminated, and the next command is executed.

When a plurality of commands are inputted, the last command input at the end of the phrase is valid, as in Change

Immediately Once.

STOP command

Phrase(m)

Slave Command

Address data

Slave Command

Address data

SDA

BUSYB^*1

Sound output

Good morning

Awaiting

command

Playing Phrase(m)

Status

Standby

Command

Fading out

*1：When used with default “H” level, CMOS output

Standby

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● Volume setup function

Each phrase can set up the volume setup.

The volume is set when soundcode data is generated and when PHRASE command is input.

For the setting of volume when PHRASE command is input, refer to “PHRASE command” in Description of Command

Functions.

The relationship between the setting and volume at the time of generating sound code data is as follows.

Value

00h

01h

02h

03h

04h

05h

06h

07h

08h

09h

Volume [dB]

+2.98

Value

0Ah

0Bh

0Ch

0Dh

0Eh

0Fh

10h

11h

12h

13h

14h

Volume [dB]

-0.41

Value

15h

16h

17h

18h

19h

1Ah

1Bh

1Ch

1Dh

1Eh

1Fh

Volume [dB]

-6.87

+2.70

-0.83

-7.79

+2.40

-1.28

-8.82

+2.10

-1.75

-9.99

+1.78

-2.25

-11.34

-12.94

-14.90

-17.44

-21.04

-27.31

OFF

+1.45

-2.77

+1.11

-3.34

+0.76

-3.94

+0.39

-4.58

+0.00

-5.28

-6.04

● Function of setting wait time before and after playback (WS1, WS2, WS3, WS4)

Wait time before playback (WS1, WS2) and after playback (WS3, WS4) can be set for each phrase.

Set when the sound code data is generated.

Phrase

Slave

Address

Command

data

SDA

BUSYB^*1

WS1 WS2

WS3 WS4

SPP/SPM

Hi-Z

Awaiting Command

Standby

Playing

Standby

状態

Command

processing

Awaiting oscillation stop

*1：When used with default “H” level, CMOS output

WS1: Time after inputting a phrase address, until SPP/SPM pins are enabled.

WS2: Time after SPP/SPM pins are enabled, until playback is started.

WS3: Time after playback is completed, until SPP/SPM pins are disabled.

WS4: Time after SPP/SPM pins are disabled, until it will be in a standby state.

WS1-WS4 can be arbitrarily set up between 0 to1020 ms (4 ms unit).

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● Speaker Pin Short Detection Function

The speaker pin short detection function detect the short-circuit between SPP pin and SPM pin, or between SPP/SPM pin

and GND during playback.

When short-circuit of a speaker pin is detected, the playback will be stopped automatically, BUSYB pin will become "H"

level, and LSI will become in a standby state.

Speaker short detection prevents IC destruction, but the detection circuit is effective to prevent destruction caused by

sudden accidents, and is not intended for use in the condition like short detection occurs continuously.

This function can be set up with the option screen of Speech Utility.

Please refer to a "Code Option Setting Item" for details.

Phrase

Command

data

Phrase

Command

data

Slave

Address

Slave

Address

SDA

BUSYB^*1

Speaker pin short

SPP/SPM

Status

Hi-Z

Speaker pin short

Playing

Speaker pin short

Playing

Awaiting command

Standby

Awaiting command

Standby

Command

processing

Command

processing

Forced outage by speaker

*1：When used with default “H” level, CMOS output

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■ PLAYBACK COMMANDS

● Playback commands list

The following playback commands are used for the LSI. Use the playback commands in the condition ensuring that the

sound code data is set on the flash memory of this LSI.

Command

STOP

Description

Stop command.

The STOP command becomes effective for phrase other than those in Play Once mode and

Scheduled Play Once mode.

Disconnection detection command.

DISCONNECT

PHRASE

Speaker disconnection is detected. The STOP command must be input after using the

DISCONNECT command.

Playback command.

Playback phrase is selected from 30 phrases or 62phrases.

●

Playback commands configuration

1-byte command and 2-byte command can be selected.

When the 2-byte command is selected, the volume can be expanded to 32 levels and the number of phrases can be

expanded to 62 phrases.

PHRASE command is allocated with a bit sequence other than the set values for STOP command and DISCONNECT

command.

These are set when the sound code data is generated.

Please refer to a "Code Option Setting Item" for details.

The command configuration when the initial value (STOP command is set to be 00h and DISCONNECT command is set

to be 01h) is as follows.

(1) 1-byte command (8 levels of volume and 30 phrases)

First byte

Command

D7

0

D6

0

D5

0

D4

0

D3

0

D2

0

D1

0

D0

0

STOP

DISCONNECT

0

1

V2

V1

V0

0

1

0

PHRASE

：

V2

V1

V0

1

(2) 2-byte command (initial value: 32 levels of volume and 62 phrases)

First byte

Second byte

Command

D15 D14 D13 D12 D11 D10

D9

0

D8

0

D7

0

D6

0

D5

0

D4

0

D3

0

D2

0

D1

0

D0

0

STOP

0

DISCONNECT

0

1

V4

V3

V2

V1

V0

0

1

0

PHRASE

：

0

V4

V3

V2

V1

V0

0

1

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Any bit sequence can be set for STOP command and DISCONNECT command.

The following shows examples of a case where a non-initial value is set.

When STOP command is changed from the initial value, the number of phrase available decreases by one.

(1) 1-byte command (when STOP command is set to be 1Fh and DISCONNECT command is set to be 01h)

First byte

Command

D7

0

D6

0

D5

0

D4

0

D3

0

D2

0

D1

0

D0

0

1

*

DISCONNECT

PHRASE

STOP

0

1

V2

V1

V0

0

1

0

：

V2

0

V1

0

V0

0

1

0

1

*1:

00h cannot be set to PHRASE command. 29 phrases from 02h to 1Eh can be set to PHRASE command.

(2) 2-byte command (when STOP command is set to be 3Eh and DISCONNECT command is set to be 02h)

First byte

Second byte

Command

D15 D14 D13 D12 D11 D10

D9

0

D8

0

D7

0

D6

0

D5

0

D4

0

D3

0

D2

0

D1

0

D0

0

1

*

0

PHRASE

0

1

DISCONNECT

0

1

0

V4

0

V3

0

V2

0

V1

0

V0

0

1

PHRASE

0

：

0

1

0

1

0

1

STOP

0

PHRASE

V4

V3

V2

V1

V0

0

*1:

00h cannot be set to PHRASE command. 61 phrases of 01h, from 03h to 3Dh, and 3Fh can be set to PHRASE

command.

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● STOP command

(1) 1-byte command selection（initial value）

・command

0

(2) 2-byte command selection（initial value）

・command

0

*：Since it is a bit that is not used to identify the command, it can be set to any value.

The STOP command is used to stop the playback. BUSYB pin will become “H”, if the playback is stopped.

The STOP command becomes effective for the phrase waiting to be played in Scheduled Play Once mode, and in

Scheduled Play modem, Change Immediately Once mode, and Change Immediately mode.

STOP command used for phrases played back in Play Once mode or Scheduled Play Once mode, the STOP is ignored.

When STOP command is input in Scheduled Play mode, the playback stops after the phrase is played back to the end.

When STOP command is input in Change Immediately Once mode or Change Immediately mode, the sound fades out,

and the playback stops.

For PHRASEn command (Phrase(n)) after STOP command, input it after the end of playback phrase (BUSYB=”H”) is

confirmed and the time tSST+tCMS is passed.

Operations where STOP command is effective are described below.

 STOP command operation in the case of Scheduled Play Once mode

STOP command

PHRASE command 1

PHRASE command 2

Slave

Address

Slave

Address

Slave

Address

Command

data

Command

data

Command

data

SDA

BUSYB^*1

SPP/SPM

Hi-Z

Awaiting command

Standby

Playing (playback phrase 1 to the last)

Status

Command

processing

Standby

*1：When used with default “H” level, CMOS output

 STOP command operation in the case of Scheduled Play mode

PHRASE command

STOP command

Slave

Address

Slave

Address

Command

data

Command

data

SDA

BUSYB^*1

SPP/SPM

Hi-Z

Awaiting command

Standby

Playing (playback phrase to the last)

Status

Command

processing

Standby

*1：When used with default “H” level, CMOS output

 STOP command operation in the case of Change Immediately Once mode or Change Immediately mode

PHRASE command

STOP command

Slave

Address

Slave

Address

Command

data

Command

data

SDA

BUSYB^*1

SPP/SPM

Hi-Z

Awaiting command

Standby

Playing

Fading out

Standby

Status

Command

processing

*1：When used with default “H” level, CMOS output

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● DISCONNECT command

(1) 1-byte command selection（initial value）

・command

0

1

0

(2) 2-byte command selection（initial value）

・command

0

1

*：Since it is a bit that is not used to identify the command, it can be set to any value.

The DISCONNECT command is used to diagnose whether the speaker is disconnected or not.

The command cannot be used during sound playback. The command shall be used during standby (no playback).

Disconnection detection result is output to BYSYB pin. "L” is output when the speaker is disconnected, and outputs "H”

when the speaker is not disconnected. Please input the STOP command to transition to standby state, after you use the

DISCONNECT command.

STOP command

DISCONNECT command

Slave

Address

Slave

Address

Command

data

Command

data

SDA

t_DCDS

BUSYB*1

Disconnection judgment

(L: disconnect H: Connect)

Under speaker disconnection

detection

Disconnection detection

result output

Awaiting command

Standby

Status

Command

processing

Command processing

*1：When used with default “H” level, CMOS output

When no STOP command is input after the execution of DISCONNECT command, the disconnection detection

automatically stops in one second, and transition to standby occurs.

DISCONNECT command

Slave

Address

Command

data

SDA

t_DCDS

t_DCDE

BUSYB^*1

Disconnection judgment

(L: disconnect H: Connect)

Under speaker disconnection

detection

Disconnection detection

result output

Awaiting command

Standby

Status

Command

processing

*1：When used with default “H” level, CMOS output

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● PHRASE command

(1) 1-byte command selection

・command

V2 V1 V0 F4 F3 F2 F1 F0

(2) 2-byte command selection

・command

0

V4 V3 V2 V1 V0

0

F5 F4 F3 F2 F1 F0

*：Since it is a bit that is not used to identify the command, it can be set to any value.

PHRASE command is playback command. Specifies an address of a phrase to be played back.

Command that is not set to be STOP command or DISCONNECT command is set to be PHRASE command.

An address of phrase to be played back is set when sound code data is generated with Speech LSI Utility.

Timings of PHRASE command are shown below.

Phrase

Volume

Command data+Acknowledge

Slave Address+W(0)+Acknowedge

SDA

SCL

BUSYB^*1

SPP/SPM

Hi-Z

Awaiting command

Playing

Command

Status

Standby

*1：When used with default “H” level, CMOS output

Set the playback Phrase with F4-F0 or F5-F0.

(1) 1-byte command selection

No.

F4

F3

F2

F1

F0

0

Playing Phrase

Phrase 2

：

1

0

1

：

30

1

Phrase 1F

(2) 2-byte command selection

No.

F5

F4

F3

0

F2

0

F1

1

F0

0

Playing Phrase

Phrase 2

：

1

0

：

62

1

Phrase 3F

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The volume can be set up with V2-V0 or V4-V0 set.

This is used to playback sound with a volume other than one set when the sound code data is generated.

(1) When 1-byte command is selected.

V2

V1

V0

Volume [dB]

Volume set at

the time of

0

generating

sound code data

is used^*1

0

1

0

1

0

1

0

1

0

1

0

1

+2.98

+1.78

0

-2.25

-5.28

-9.99

-21.04

*Note 1: For edited phrase, volume set for each registered phrase is used

(2) When 2-byte command is selected.

V4

0

V3

0

1

V2

0

1

0

1

V1

0

1

0

1

0

1

0

1

V0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Volume [dB]

+2.98

V4

V3

V2

V1

V0

Volume [dB]

-3.34

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

+2.70

+2.40

+2.10

+1.78

+1.45

+1.11

+0.76

+0.39

+0.00

-0.41

-0.83

-1.28

-1.75

-2.25

-2.77

-3.94

-4.58

-5.28

-6.04

-6.87

-7.79

-8.82

-9.99

-11.34

-12.94

-14.90

-17.44

-21.04

-27.31

Volume set at the

time of

generating sound

code data is

used^*1

*Note 1: For edited phrase, volume set for each registered phrase is used

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■ Flash memory access function by MCU interface

By sending dedicated commands to this function through the MCU interface, the following can be executed^*1,*2

・Rewriting the sound code data in the Built-in flash memory.

.

・Verifying the sound code data in the Built-in flash memory.

・Checking the sound code data version^*3.

This function always rewrites and verifies data from the start data. Cannot be specified as any address. Also, data in the

flash memory cannot be directly referenced.

●

Flow of flash memory access function by MCU interface

Flash memory

Write and Verify / Verify /

Version check START

Reset

(RESET_N input)

Standby State

*4

Flash memory access

mode entry

Failure

Mode entry result

Success

Write and Verify

Version check

Selecting Flash memory

processing

Verify

Write and Verify

processing

Version check

processing

Verify processing

Reset

(RESET_N input)

Standby State

Flash memory

Write and Verify / Verify /

Version check END

*Note 1: This function should be used under the conditions of DV_DD=2.2 to 5.5V and Ta=0 to +40°C.

*Note 2: The sound playback function cannot be used while this function is in use.

*Note 3: The code option information in the sound code data is reflected when the flash memory is rewritten,

reset is input once, and initialization is performed. When checking the version of the new code data, execute it

after initialization.

*Note 4: Detailed processing flow is shown on the later page for

in the flow

24/57

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●

List of Flash memory access commands

The flash memory access function is controlled using the following dedicated commands.

Command value

Flash memory

processing

Command name

Description

1st byte 2nd byte

Flash memory access mode command:

FLASH_ACCESS

1Fh

00h

This command can be input only for the first time after this

reset. To cancel Flash access mode, input a reset.

Flash memory

access mode entry

Access code input command:

Access

Code^*1

When the access code input in the second byte matches the

access code in the flash memory, entry to the flash access

mode is completed.

ACCESS_CODE

ERASE

C0h

A0h

Flash memory erase command:

After this command is input, the contents of the flash memory

are erased. Rewrite the sound code data with the contents of

the flash memory erased by this command. ^*3

40h

Write and verify mode entry command:

After inputting this command, write and verify the input code

simultaneously by continuously inputting the sound code data

in even byte units and then setting the stop condition. Up to

256 bytes can be input at a time.

WRITE_VERIFY

WRITE_END

VERIFY

80h

60h

40h

C0h

Write and Verify

Write and verify mode exit command.

Verify mode entry command:

or

Verify

After inputting this command, verify the input code

simultaneously by continuously inputting the sound code data

in even byte units and then setting the stop condition. Up to

256 bytes can be input at a time.

VERIFY_END

CHECKSUM

Verify mode exit command.

Checksum command:

Upper

Byte

Lower

Byte

The checksum of rewritten sound code data can be checked

by inputting this command after inputting the WRITE_END

or VERIFY_END commands.

Version check command:

It is possible to check that the code input in the second byte

matches the sound code data version in the flash memory.

Version

Code^*1

Version check

CHECK_VER

40h

*Note 1: Access Code and Version Code can be set up with the option screen of Speech Utility.Please refer to a

"Code Option Setting Item" for details.

*Note 2: The checksum is the lower 16 bits of the sum of 8-bit units of the sound code data. In the .inf-file generated

by Speech LSI Utility, the checksum information of the created sound code data is displayed.

*Note 3: After the flash memory is erased, use the playback commands in the condition ensuring that the sound code data

is set on the flash memory of this LSI.

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●

Checking the processing status and results of control commands by BUSYB

The status and results of flash memory access control commands can be checked with BUSYB.

If the processing of each command fails, or if processing that deviates from the described processing flow is executed,

BUSYB may not return to the default state even if each command execution time is passed. In that case, enter reset and

try again from the flash memory access mode entry.

For the processing time of each command, see the timing chart for flash memory access mode and AC characteristics of

electrical characteristics (flash memory access mode).

Flash memory access mode control commands

Slave

Address

Command

data

SDA

BUSYB^*1

STATUS

Results (L:failure H:success)

Command running

Commands standby

*1:When used with default “H” level, CMOS output

Identifying commands

Commands standby

Inputting commands

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●

Flow of flash memory access mode entry processing

After reset release

(Input RESET_N)

Standby State

Send FLASH_ACCESS command

Send ACCESS_CODE command

Failure

Access code unlock result

Success

Reset

(Input RESET_N)

Flash memory access mode

entry complete

Standby State

END

To the next process

27/57

FEDL22Q254-03

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●

Flow of “Write and Verify” and “Verify” processing

Flow of Write and Verify

Flow of Verify

After reset release

(Input RESET_N)

After reset release

(Input RESET_N)

Send ERASE command

Confirmation of

Failure

erasing result by BUSYB

Success

Send WRITE_VERIFY

command

Send VERIFY command

Continuous transmission of

sound code data

Continuous transmission of

sound code data

(Until the stop condition is set )

Confirmation of

Failure

Confirmation of

Failure

Write and Verify result by BUSYB

Verify result by BUSYB

Success

No

All data input completed?

Yes

Send VERIFY command

Send WRITE_VERIFY command

Send CHECKSUM command

Confirmation of

Failure

Confirmation of

Failure

Checksum result by BUSYB

Success

Reset

(Input RESET_N)

Reset

(Input RESET_N)

Reset

(Input RESET_N)

Reset

(Input RESET_N)

To the flow of flash memory

access mode entry

To the flow of flash memory

access mode entry

End

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●

Flow of Version check processing

After completion of the Flash memory

access mode entry

Send CHECK_VER

command

Confirmation of

Version check result

by BUSYB

Failure

Success

Reset

(Input RESET_N)

To the flow of flash memory

access mode entry

End

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■ TIMING DIAGRAMS

● Power-On Timing

5V

MIN 2.0V

DV_DD

5V

SPV_DD

VIH

VIL

t_RSTF

t_RSTR

CSB

RESET_N

BUSYB^*1

VIH

VIL

t_RSTF

VOH

VOL

Hi-Z

Indefinite

Oscillation stopped

OSC

(internal)

Oscillation stopped

Oscillating

t_INIT

VOH

VOL

Hi-Z

SPP

VOH

VOL

SPM

Performing a reset

Initializing

Standby

Status

Performing a reset

*1： Used with default “H” level, CMOS output

When the power is turned on and off, there is no restriction on the order of turning on DV_DDand SPV_DD.

When DV_DDor SPV_DDfalls below recommended operation power supply voltage range, “L” level must be

input to RESET_N pin.

When CSB unused mode is set, fix CSB pin at "H" level or "L" level.

● Power down timing (RESET_N pin)

t_RSTR

RESET_N

Hi-Z

BUSYB^*1

Indefinite

Oscillation

stopped

OSC

(internal)

Oscillating

t_INIT

SPP

SPM

Playing

Initializing

Standby

Status

*1：Used with default “H” Level, CMOS output

Performing a reset

When DV_DDor SPV_DDfalls below recommended operation power supply voltage range, “L” level must be

input to RESET_N pin.

When CSB unused mode is set, fix CSB pin at "H" level or "L" level.

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●

I²C interface timing

VIH

SDA

VIL

t_F

t_SP

t_R

t_SU;DAT

t_HD;STA

t_F

t_R

t_LOW

VIH

VIL

t_HIGH

t_HD;DAT

SCL

t_HD;STA

t_SU;STA

t_SU;STO

Sr

S

P

S： Start condition

Slave Address： Slave Address

A： Acknowledge

Command Data： Command

P： Stop condition

Timing chart for 1-byte configuration command input

SCL

t_CKST

A6

W

A

A5 A4 A3 A2 A1 A0

Slave Address

D7 D6D5 D4 D3D2 D1 D0

SDA

A

Command Data

A

P

S

Timing chart for 2-byte configuration command input

SCL

t_CKST

D9 D8

t_CKST

D15 D13

D11

A6 A5 A4 A3 A2 A1 A0 W

Slave Address

A

D7 D6D5 D4 D3D2 D1 D0

SDA

D14 D12 D10

P

A

Command Data

A

Command Data

S

BUSYB Output timing

SCL

A6 A5 A4 A3 A2 A1 A0 W

A

D7 D6D5 D4 D3D2 D1 D0

A

SDA

P

Slave Address

A

Command Data

A

S

tCB

BUSYB

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● CSB use mode

 Play Oncemode/Scheduled Play Once/Change Immediately Once timing

After playback of phrase (m) ends, playback request for the next phrase (n) is accepted and the phrase (n) is played back.

All the commands become invalid during playback of phrase (m).

CSB^*1

Slave address +

D7-D0 or D15-D0

+ Acknowledge

t_PUP1

SDA

SCL

Write bit + Acknowledge

t_CB

VOH

VOL

BUSYB^*2

OSC

(internal)

Oscillating

t_PLBF

WS1

WS2

t_VCYC

Stabilizing oscillation

peaker enable

(internal)

SPP

SPM

Hi-Z

Awaiting command

Playing

Status

Standby

Command processing

定中

VIH

CSB^*1

VIL

Slave address + D7-D0 or D15-D0

t_PUP1

t_CSW

SDA

SCL

Write bit +

+ Acknowledge

t_CB

VOH

VOL

BUSYB^*2

OSC

(internal)

Oscillating

t_PLAF

t_OSST

t_PLBF

WS2

WS3 WS4

WS1

Stabilizing oscillation

Speaker

enable

(internal)

SPP

Hi-Z

SPM

Playing

Command processing

Awaiting command

Standby

Status

Awaiting command

Awaiting oscillation stop

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

32/57

FEDL22Q254-03

ML22Q254

 Scheduled Play Once mode and Scheduled Play mode Timing (Continuous Play)

After inputting the next PHRASEn command (Phrase (n)), a phrase (Phrase (m)) is played back to the last and the Phrase

(n) playback is started.

*1

t_NCM

CSB^*1

Phrase (n)

Phrase (m)

D7-D0 or D15-D0

+ Acknowledge

Slave address +

D7-D0 or D15-D0

t_PUP1

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_NCM1

t_CB

BUSYB^*2

VOH

VOL

OSC

(internal)

Oscillating

WS1(m)

WS2(m)

t_PLBF

t_VCYC

Stabilizing oscillation

peaker enable

(internal)

SPP

SPM

Hi-Z

Awaiting command

Playing phrase (m)

Status

Command processing

Standby

CSB^*1

SDA

SCL

VOH

BUSYB^*2

VOL

OSC

(internal)

Oscillating

WS3(n)

t_VCYC

t_PLAF

WS4(n)

t_OSST

Speaker enable

(internal)

SPP

SPM

Hi-Z

Playing

Playing phrase (n)

Awaiting command

Status

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

Awaiting oscillation stop

Standby

・Under Scheduled Play mode, playback is stopped by STOP command.

*1:In Scheduled Play Once mode, the phrase (n) is played back immediately after the end of the playback of the phrase (m), in

response to an input of a playback request (PHRASE command) for the next phrase (phrase (n)) within t_NCM

.

33/57

FEDL22Q254-03

ML22Q254

 Change Immediately Once mode and Change Immediately mode Timing (Continuous Play)

After inputting the next PHRASEn command(Phrase(n)), fade-out of the playback(Phrase(m)) is carried out and

thePhrase(n) playback is started.

t_NCM

CSB^*1

Phrase (n)

D7-D0 or D15-D0

+ Acknowledge

Phrase (m)

D7-D0 or D15-D0

+ Acknowledge

Slave address +

t_PUP1

SDA

SCL

Write bit + Acknowledge

t_CB

VOH

VOL

BUSYB^*2

OSC

(internal)

Oscillating

t_PLBF

WS1(m)

WS2(m)

Stabilizing oscillation

Speaker enable

(internal)

Hi-Z

SPP

SPM

Awaiting command

Playing phrase (m)

Status

Command processing

Standby

CSB^*1

SDA

SCL

t_FDO

Phrase (m) voice stop

Oscillating

VOH

BUSYB^*2

VOL

OSC

(internal)

t_OSST

t_VCYC

t_PLAFWS3(n)

WS4(n)

Speaker enable

(internal)

SPP

SPM

Hi-Z

Status

Playing

Fade out processing

Playing phrase (n)

Awaiting command

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

Awaiting oscillation stop

Standby

・Under Change Immediately mode, playback is stopped by STOP command.

34/57

FEDL22Q254-03

ML22Q254

 Scheduled Play Once mode and Scheduled Play mode Timing sound stop timing

After STOP command is input, the phrase is played back until the end, and the playback stops.

t_NCM

CSB^*1

Phrase (m)

D7-D0 or D15-D0

+ Acknowledge

STOP command

Slave address +

D7-D0 or D15-D0

t_PUP1

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_CB

VOH

VOL

BUSYB^*2

OSC

(internal)

Oscillating

t_PLBF

WS1

WS2

Stabilizing oscillation

peaker enable

(internal)

SPP

SPM

Hi-Z

Awaiting command

Playing phrase

Status

Command processing

Standby

CSB^*1

SDA

SCL

VOH

BUSYB^*2

VOL

OSC

(internal)

Oscillating

WS3(n)

WS4(n)

t_PLAF

t_OSST

Speaker enable

(internal)

Hi-Z

Standby

SPP

SPM

Playing

(Play until the end of phrase)

Awaiting command

Status

Awaiting oscillation

stop

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

35/57

FEDL22Q254-03

ML22Q254

 Timing which stops the playback in Change Immediately mode and Change Immediately Once mode

After STOP command is input, the sound fades out, and the playback stops.

t_NCM

CSB^*1

STOP

Phrase (m)

D7-D0 or D15-D0

+ Acknowledge

Slave address +

t_PUP1

SDA

SCL

Write bit + Acknowledge

t_CB

VOH

VOL

BUSYB^*2

OSC

(internal)

Oscillating

t_PLBF

WS1

WS2

Stabilizing oscillation

peaker enable

(internal)

SPP

SPM

Hi-Z

Awaiting command

Playing phrase

Status

Command processing

Standby

CSB^*1

STOP command

D7-D0 or D15-D0

+ Acknowledge

SDA

SCL

t_FDO

VOH

BUSYB^*2

VOL

OSC

(internal)

Oscillating

WS3 WS4

t_PLAF

t_OSST

Speaker enable

(internal)

SPP

SPM

Hi-Z

Playing

Fade out processing

Awaiting command

Standby

Status

Awaiting

*1：Used with default “H” Level

oscillation stop

*2：Used with default “H” Level, CMOS output

36/57

FEDL22Q254-03

ML22Q254

 Disconnection detection timing

VIH

CSB^*1

VIL

DISCONNECT command

Slave address +

D7-D0 or D15-D0

t_PUP1

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_NCM

t_DCDS(min)

t_CB

VOH

VOL

BUSYB^*2

Stabilizing oscillation

Oscillating

OSC

(internal)

Awaiting command

Command processing

Disconnection detecting

Status

Standby

VIH

VIL

CSB^*1

STOP command

Slave address +

Write bit + Acknowledge

D7-D0 or D15-D0

+ Acknowledge

SDA

SCL

t_NCM

t_CB

t_OSST

BUSYB^*2

OSC

(internal)

Oscillating

Disconnection detecting

Command processing

Standby

Status

Awaiting oscillation stop

Awaiting command

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

 Speaker short detection timing

t_SD

VOH

BUSYB^*1

VOL

t_OSST

OSC

(internal)

Oscillating

Speaker enable

(internal)

Speaker short

detection

(internal)

Hi-Z

SPP

SPM

Playing

Short detection processing

Standby

*1： Used with default “H” Level, CMOS output

Status

37/57

FEDL22Q254-03

ML22Q254

 Flash memory access mode

 Flash memory access mode entry

VIH

CSB^*1

VIL

FLASH_ACCESS

command

ACCESS_CODE

command

Slave address +

D15-D0

t_PUP1

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_FCB

t_FCP

t_FCB

t_FCE

t_CB

VOH

VOL

BUSYB^*2

Results (L: failure H: success)

Oscillation

stabilizing

OSC

(internal)

Oscillating

Checking Access code

match

Command being

executed

定中

Awaiting command

Command inputting

定中

Command inputting

Awaiting command

Status

Awaiting

command

Standby

Command

identifying

Command

identifying 中

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

 Flash memory erase or version check

VIH

CSB^*1

VIL

ERASE or

CHECK_VER command

Next command^*3

Slave address +

D15-D0

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

ERASE：t_FER

CHECK_VER：t_FCP

t_FCB

t_FCE

VOH

VOL

BUSYB^*2

Results (L: failure H: success)

OSC

(internal)

Oscillating

Command being

executed

Awaiting command

Command inputting

定中

Command inputting

Status

Command

identifying

Awaiting command

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

*3：To end only by version check, enter reset.

38/57

FEDL22Q254-03

ML22Q254

 “Write verify” or “Verify”

VIH

CSB^*1

VIL

WRITE_VERIFY or

VERIFY command

Sound code data

Slave address +

D7-D0

+ Acknowledge

D15-D0

D7-D0

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_FDI

t_FCB

t_FCE

VOH

BUSYB^*2

VOL

OSC

(internal)

Oscillating

Awaiting command

Command inputting

Command identifying

Command being executed

Data inputting

status

Awaiting command

VIH

VIL

CSB^*1

Sound code data

D7-D0

SDA

SCL

+ Acknowledge

WRITE_VERIFY：t_FWV

VERIFY：t_FV

t_FDI

t_FCB

定中

BUSYB^*2

VOH

VOL

Results (L: failure H: success)

OSC

(internal)

Oscillating

Data

identifying 定

Data inputting

Writing and Verifying

or Verifying

Awaiting command

status

CSB^*1

VIH

VIL

WRITE_END or

CHECKSUM

command

VERIFY_END command

Slave address +

Write bit + Acknowledge

D15-D0

+ Acknowledge

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_FCS

t_FCB

t_FCE

t_CB

VOH

VOL

BUSYB^*2

Results (L: failure H: success)

OSC

(internal)

Oscillating

Command identifying

Checksum processing

Command being

executed

Awaiting command

Command inputting

Command identifying

Command inputting

Awaiting command

Status

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

*3：Sound code data input is in even byte units

Awaiting command

39/57

FEDL22Q254-03

ML22Q254

● CSB unused mode

 Play Once/Scheduled Play Once/Change Immediately Once mode timing

After playback of phrase (m) ends, playback request for the next phrase (n) is accepted and the phrase (n) is played back.

All the commands become invalid during playback of phrase (m).

Input PHRASEn command following BUSYB ”H” level transition after the time tOSST+tCMS is passed.

CSB

“H”or”L” fix

Slave address +

D7-D0 or D15-D0

+ Acknowledge

t_PUP1

SDA

SCL

Write bit + Acknowledge

t_CB

VOH

VOL

BUSYB^*1

OSC

(internal)

Oscillating

t_PLBF

WS1

WS2

t_VCYC

Oscillation stable

Speaker amplifier

enable (internal)

SPP

SPM

Hi-Z

Standby

Awaiting command

Playing

Status

Command processing

定中

CSB

“H”or”L”fix

Slave address +

Write bit +

D7-D0 or D15-D0

+ Acknowledge

t_PUP1

SDA

SCL

t_CMS

t_CB

VOH

BUSYB^*1

VOL

OSC

(internal)

Oscillating

t_PLAF

t_OSST

t_PLBF

WS2

WS3 WS4

WS1

Oscillation stable

Speaker amplifier

enable (internal)

SPP

SPM

Hi-Z

Playing

Awaiting oscillation stop

Standby

Playing

Status

Awaiting

Command processing

*1： Used with default “H” Level, CMOS output

40/57

FEDL22Q254-03

ML22Q254

 Scheduled Play Once mode and Scheduled Play mode Timing (Continuous Play)

After inputting the next PHRASEn command (Phrase (n)), a phrase (Phrase (m)) is played back to the last and the Phrase

(n) playback is started.

*1

t_NCM

“H”or”L”fix

CSB

Phrase (n)

D7-D0 or D15-D0

Phrase (m)

Slave address +

D7-D0 or D15-D0

t_PUP1

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_CB

VOH

VOL

BUSYB^*1

OSC

(internal)

Oscillating

WS1(m)

WS2(m)

t_PLBF

t_VCYC

Speaker enable

(internal)

Stabilizing oscillation

SPP

SPM

Hi-Z

Standby

Awaiting command

Playing phrase (m)

Status

Command processing

CSB

“H”or”L”fix

SDA

SCL

VOH

BUSYB^*1

VOL

OSC

(internal)

Oscillating

WS3(n)

t_VCYC

t_PLAF

WS4(n) t_OSST

Speaker enable

(internal)

SPP

SPM

Hi-Z

Playing

Playing phrase (n)

Awaiting oscillation stop

*1：Used with default “H” Level, CMOS output

Status

Standby

・・Under Scheduled Play mode, playback is stopped by STOP command.

*1:In Scheduled Play Once mode, the phrase (n) is played back immediately after the end of the playback of the phrase (m), in

response to an input of a playback request (PHRASE command) for the next phrase (phrase (n)) within t_NCM

.

41/57

FEDL22Q254-03

ML22Q254

 Change Immediately Once mode and Change Immediately mode Timing (Continuous Play)

After inputting the next PHRASEn command(Phrase(n)), fade-out of the playback(Phrase(m)) is carried out and

thePhrase(n) playback is started.

t_NCM

“H”or”L”fix

CSB

Phrase (m)

D7-D0 or D15-D0

Phrase (n)

D7-D0 or D15-D0

+ Acknowledge

Slave address +

t_PUP1

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

Write bit + Acknowledge

t_CB

BUSYB^*1

VOH

VOL

OSC

(internal)

Oscillating

t_PLBF

WS1(m)

WS2(m)

Stabilizing oscillation

Speaker enable

(internal)

SPP

SPM

Hi-Z

Standby

Awaiting command

Playing phrase (m)

Status

Command processing

CSB

“H”or”L”fix

SDA

SCL

t_FDO

Phrase (m) voice stop

Oscillating

VOH

BUSYB^*1

VOL

OSC

(internal)

t_OSST

t_VCYC

t_PLAFWS3(n)

WS4(n)

Speaker enable

(internal)

SPP

SPM

Hi-Z

Status

Playing

Fade out processing

Playing phrase (n)

Awaiting oscillation stop

*1：Used with default “H” Level, CMOS output

Standby

・Under Change Immediately mode, playback is stopped by STOP command.

42/57

FEDL22Q254-03

ML22Q254

 Scheduled Play Once mode and Scheduled Play mode Timing sound stop timing

After STOP command is input, the phrase is played back until the end, and the playback stops.

VIH

t_NCM

“H”or”L”fix

CSB

VIL

STOP command

Phrase (m)

D7-D0 or D15-D0

+ Acknowledge

Slave address +

D7-D0 or D15-D0

t_PUP1

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_CB

BUSYB^*1

VOH

VOL

OSC

(internal)

Oscillating

t_PLBF

WS1

WS2

Stabilizing oscillation

Speaker enable

(internal)

SPP

SPM

Hi-Z

Standby

Awaiting command

Playing phrase

Status

Command processing

VIH

CSB

“H”or”L”fix

VIL

VIH

VIL

SDA

SCL

VIH

VIL

VOH

VOL

BUSYB^*1

OSC

(internal)

Oscillating

WS3(n)

WS4(n)

t_PLAF

t_OSST

Speaker enable

(internal)

SPP

Hi-Z

SPM

Standby

Playing

(Play until the end of phrase)

Awaiting oscillation stop

Status

*1：Used with default “H” Level, CMOS output

43/57

FEDL22Q254-03

ML22Q254

 Timing which stops the playback in Change Immediately mode and Change Immediately Once mode

After STOP command is input, the sound fades out, and the playback stops.

VIH

“H”or”L”fix

t_NCM

CSB

VIL

STOP

Slave address +

Phrase (m)

Slave address +

D7-D0 or D15-D0

+ Acknowledge

t_PUP1

SDA

SCL

Write bit + Acknowledge

t_CB

VOH

VOL

BUSYB^*1

OSC

(internal)

Oscillating

t_PLBF

WS1

WS2

Stabilizing

oscillation

Speaker enable

(internal)

SPP

SPM

Hi-Z

Standby

Awaiting command

Playing phrase

Status

Command processing

CSB

“H”or”L”fix

STOP command

D7-D0 or D15-D0

SDA

SCL

+ Acknowledge

t_FDO

VOH

VOL

BUSYB^*1

OSC

(internal)

Oscillating

WS3

WS4

t_PLAF

t_OSST

Speaker enable

(internal)

Hi-Z

SPP

SPM

Hi-Z

Playing

Fade out processing

Awaiting oscillation stop

*1：Used with default “H” Level, CMOS output

Standby

Status

44/57

FEDL22Q254-03

ML22Q254

 Disconnection detection timing

VIH

CSB

“H”or”L”fix

VIL

DISCONNECT command

Slave address +

D7-D0 or D15-D0

t_PUP1

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_NCM

t_CB

t_DCD(min)

BUSYB^*1

VOH

VOL

Stabilizing

oscillation

OSC

(internal)

Oscillating

Standby

Awaiting command

Disconnection detecting

Status

Command processing

VIH

VIL

CSB

“H”or”L”fix

t_NCM

STOP command

Slave address +

D7-D0 or D15-D0

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_CB

t_OSST

BUSYB^*1

OSC

(internal)

Oscillating

Disconnection detecting

Standby

Status

Awaiting oscillation stop

Command processing

*1：Used with default “H” Level, CMOS output

 Speaker short detection timing

t_SD

VOH

BUSYB^*1

VOL

t_OSST

OSC

発振中

(internal)

Speaker enable

(internal)

Speaker short

detection

(internal)

Hi-Z

SPP

SPM

Playing

Short detection processing

Standby

Status

*1：Used with default “H” Level, CMOS output

45/57

FEDL22Q254-03

ML22Q254

 Flash memory access mode

 Flash memory access mode entry

VIH

CSB^*1

“H”or”L”fix

VIL

FLASH_ACCESS

command

ACCESS_CODE

command

Slave address +

D15-D0

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_PUP1

t_FCB

t_FCP

t_FCB

t_FCE

t_CB

VOH

VOL

BUSYB^*2

Results (L: failure H: success)

Oscillation

stabilizing

OSC

(internal)

Oscillating

Command being

executed

Checking Access code

match

Command inputting

Command

identifying

Command inputting

Awaiting command

状態

Standby

Command identifying

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

 Flash memory erase or version check

VIH

CSB^*1

“H”or”L”fix

VIL

ERASE or

CHECK_VER command

Next command^*3

Slave address +

D15-D0

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

ERASE：t_FER

CHECK_VER：t_FCP

t_FCB

t_FCE

VOH

VOL

BUSYB^*2

Results (L: failure H: success)

OSC

(internal)

Oscillating

Command being

executed

Awaiting command

Command inputting

定中

Command inputting

Status

Command

identifying

Awaiting command

*1：Used with default “H” Level

*2：Used with default “H” Level, CMOS output

*3：To end only by version check, enter reset.

46/57

FEDL22Q254-03

ML22Q254

 “Write verify” or “Verify”

VIH

CSB^*1

“H”or”L”fix

VIL

WRITE_VERIFY or

VERIFY command

Sound code data

Slave address +

D7-D0

+ Acknowledge

D15-D0

D7-D0

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_FDI

t_DI

t_FCB

t_FCE

VOH

BUSYB^*2

VOL

OSC

(internal)

Oscillating

Awaiting command

Command inputting

Command identifying

Command being executed

Data inputting ^*3

status

Awaiting command

VIH

VIL

CSB^*1

“H”or”L”fix

Sound code data

D7-D0

SDA

SCL

+ Acknowledge

WRITE_VERIFY：t_FWV

VERIFY：t_FV

t_DI

t_FCB

定中

BUSYB^*2

VOH

VOL

Results (L: failure H: success)

OSC

(internal)

Oscillating

Command

Writing and Verifying

or Verifying

identifying 定中

Data inputting

Awaiting command

status

CSB^*1

VIH

“H”or”L”fix

WRITE_END or

VIL

CHECKSUM

command

VERIFY_END command

Slave address +

Write bit + Acknowledge

D15-D0

+ Acknowledge

SDA

SCL

Write bit + Acknowledge

+ Acknowledge

t_FCS

t_FCB

t_FCE

t_CB

VOH

VOL

BUSYB^*2

Results (L: failure H: success)

OSC

(internal)

Oscillating

Command identifying

Command being

executed

Checksum processing

Awaiting command

Command inputting

Command identifying

Command inputting

*1：Used with default “H” Level

Awaiting command

Status

Awaiting command

*2：Used with default “H” Level, CMOS output

*3：Sound code data input is in even-numbered bytes

47/57

FEDL22Q254-03

ML22Q254

■ Code Option Setting Item

Items set on Code Option Setting screen for Speech LSI Utility are as follows.

For the blank product(-NNNTD), the setting described as (Blank) or description about blank product in an each item is set.

Because Code Option Setting item contains MCU interface specification items, if the Code Option Setting Items are

changed, be sure to manage the settings before and after the change as MCU interface inconsistency does not occur.

・Speaker pin short detection function

☐ (Not used)

Use of speaker pin short detection function

□ (Used) (Blank)

・Num of Phrases and Command type setting

〇30 phrases / 1 byte

(30 phrases can be played and communicate with 1-byte

command)

〇62 phrases / 2 byte

Num of Phrases / Command type

(62 phrases can be played and communicate with 1-byte

command) (Blank)

Select 62 phrases / 2 byte when using the flash memory access function by MCU.

STOP/DISCONNECT Command

Command bit sequence

Set 00h

DISCONNECT command Set 01h

STOP command

Set any bit sequence (Blank) ^*1

Set any bit sequence

STOP command

〇Standard

〇Custom

DISCONNECT command (Set value different from STOP command)

(Blank) ^*2

^*1: 3Fh is set in the blank product.

^*2: 00h is set in the blank product.

・BUSYB Pin Setting

Use of BUSYB

Initial State

〇L level Output

〇H level Output

Condition

BUSYB pin status

Fixed to “L” output

Fixed to “H” output

*3

☐ (Not used)

*3

〇CMOS

Output initial value “L” with CMOS output

Output initial value “L” with Nch open drain

output

〇Nch Open Drain

〇L level Output

Output initial value HiZ with Pch open drain

output

Hiz output

〇Pch Open Drain

〇Hi-Z

□ (Used)

Output initial value “H” with CMOS output

(Blank)

〇CMOS

Output initial value HiZ with Nch open drain

output

〇Nch Open Drain

〇H level Output

Output initial value “H” with Pch open drain

output

Hiz output

〇Pch Open Drain

〇Hi-Z

^*3: Setting value invalid

Check Use of BUSYB when using the flash memory access function by MCU.

48/57

FEDL22Q254-03

ML22Q254

・I²C Setting

Use CSB

Initial State

Condition

CSB pin status

Not used

Fix this pin at "H" level or "L" level because it is

fixed to Hi-Z setting by Speech LSI Utility.

(Blank) ^*2

*1

☐ (Not used)

□ (Used)

Hi-Z

〇 Pch Pull-up

〇Hi-Z

Setting prohibited

〇L level Input

〇H level Input

Used with high impedance input

Start internal oscillation with pin input “H” level

Used with pull-up input

Start internal oscillation with pin input “L” level

Used with high impedance input

Start internal oscillation with pin input “L” level

〇 Pch Pull-up

〇Hi-Z

^*1: Setting value invalid

^*2: Pull-up input is set in the blank product.

Slave address

Set any value from 00h to 7 Fh

7Fh is set in the blank product.

・Sound code data version information (Speech ROM Information)

Speech ROM

Information

Set sound code data version information of any 7 bits string.

FFh is set in the blank product.

・Flash protect option

Flash protect option

Set FFh. Any access code can be unlocked

when ACCESS_CODE command is entered.

(Blank)

〇Not Use

Set 69h. The flash memory access function is

disabled. Select this when the flash memory

access function is not used.^*3

Access codes of any 8 bits string other than

FFh and 69h can be set. The flash memory

access mode can be entered when the access

codes match.

〇Use Lock protect

〇Use Access code

Select Use Lock protect when 30 phrases / 1 byte is selected by Command setting.

^*3: FLASH_ACCESS command is invalid. Even with this setting, the flash memory can be rewritten

using SDCB Controller.

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■ Phrase information Setting Item

The items to be set on the phrase info setting screen of Speech LSI Utility are as follows.

・Playback mode (EVENT Mode)

Set playback mode suitable for target playback, with reference to “Playback mode” in FUNCTIONAL DESCRIPTION.

・Volume setup

Set playback mode suitable for target playback, with reference to “Volume setup function” in FUNCTIONAL

DESCRIPTION.

・Setting Wait time before and after volume playback (WS1,WS2,WS3,WS4)

Set desired Wait time with reference to “Function of setting wait time before and after playback (WS1, WS2, WS3,

WS4)”.

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■ PULL-UP RESISTOR VALUE OF SCL AND SDA PIN

The pull-up resistor value of SCL and SDA pin is computed as follows.

○Minimum Value （R_P.min）

R_P.min = (V_DD- V_OLmax)/I_OL

V_DD: Power supply voltage

V_OL.max: The maximum output "L" level of a driver

I_OL: Sink current of a driver

For example, in this case of V_DD=5 V, V_OL.max=0.4 V, I_OL=3 mA,

R_P.min = (5 V - 0.4 V)/3 mA ≈ 1.5kΩ

holds.

○Maximum Value (R_P.max)

R_P.max = 300 ns/[maximum capacitance of bus (F)]

For example, when the maximum capacitance of the bus is 100 pF,

R_P.max = 300 ns/100 pF = 3kΩ

holds.

Pull-up resistor must be inserted between this pin and DV_DD

■ TERMINATION OF THE V_DDLPIN

The VDDL pin is the regulator output that is power supply pin for the internal logic circuits. Connect a capacitor between

this pin and the ground in order to prevent noise generation and power fluctuation.

The recommended capacitance value is shown below. However, it is important to evaluate and decide using the own

board.

Also, start the next operation after each output voltage is stabilized.

Recommended

capacitance value

Remarks

V_DDL

1 µF ±30%

The larger the connection capacitance, the longer the settling time.

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■ POWER SUPPLY WIRING

The power supplies of this LSI are divided into the following two:

• Power supply for logic circuitry (: DV_DD

)

• Power supply for speaker amplifier (: SPV_DD

)

The example of power connection is shown below

DV_DD

DGND

SPV_DD

SPGND

5V

DV_DD

DGND

3V

SPV_DD

SPGND

5V

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■ APPLICATION CIRCUIT

DV_DD

R_P

RESET_N

MCU

CSB

SCL

SDA

BUSYB

SPP

SPM

TEST0

DV_DD

SPV_DD

DV_DD

TEST1_N

5V

1µF

V_DDL

1µF

DGND

SPGND

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■ PACKAGE DIMENSIONS

Notes for Mounting the Surface Mount Type Package

The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore,

before you perform reflow mounting, contact a ROHM sales office for the product name, package name, pin number, package

code and desired mounting conditions (reflow method, temperature and times).

PCB Layer

PCB

JEDEC 4layers

JEDEC 2layers

(W/L/t= 76.2 / 114.3 / 1.6 (mm))

Air cooling condition

Heat resistance(θja)

Heat resistance(θjc)

Maximum power consumption

of LSI (PMax)

Calm(0m/sec)

0.3[W]

68.48[^oC/W]

0.61[^oC/W]

74.00[^oC/W]

0.61[^oC/W]

during 8Ω/1W speaker amp. output

TjMax of this LSI is 110 ^oC. TjMax is expressed with the following formulas.

TjMax = TaMax + θJa × PMax

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■ REVISION HISTORY

Page

Document No

Date

Jun. 15, 2021

Description

Current

Edition

FEDL22Q254-01

―

8, 10

10

Formal 1st edition.

8, 10

10

Added Clock stretching time

Removed BUSYB signal in I2C interface timing chart

Added the note when using the playback commands

Added the note for phrase command after STOP command

Added BUSYB Output timing

18, 25

20

18, 25

20

31

Added the note of phrase command after BUSYB “H” level

transition

FEDL22Q254-02 Sep. 10, 2021

40

Added Code Optin Setting and its explanation of the blank prodect

(-NNNTD)

Corrected the explanation of Sound code data version information

(Speech ROM Information)

48, 49

49

48, 49

49

54

8

54

8

Descrobed heat resistance and TjMax of this LSI

Removed start time SPV_DDafter starting DV_DD(t_VDD

)

8

Added data reception possible time, after an oscillation start (t_PUP1)

Changed the command setting value in the main text from binary

to hexadecimal

18, 19

26

Improved the description in the main text

FEDL22Q254-03

Jun. 20, 2022

32-37

34-36,

42-44

32-37

34-36,

42-44

Revised the description in the timing diagrams

Added t_NCMand revised the t_NCMdescription in the timing diagrams

Revised the command bit string description of the STOP /

DISCONNECT command

48

56

―

Added “Notes for product usage”

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Notes for product usage

1. HANDLING OF UNUSED INPUT PINS

Fix the unused input pins to the power pin or GND to prevent to cause the device performing wrong

operation or increasing the current consumption due to noise, etc. If the handlings for the unused pins

are described in the chapters, follow the instruction.

2. STATE AT POWER ON

At the power on, the internal setting and output of the ports are undefined until the power supply

voltage reaches to the recommended operating condition and "L" level is input to the reset pin.

Be careful to design the application system does not work incorrectly due to the undefined data of

internal setting and output of the ports.

3. CHARACTERISTICS DIFFERENCE BETWEEN THE PRODUCTS

Electrical characteristics, noise tolerance, noise radiation amount, and the other characteristics are

different from each product.

When replacing from other product to LAPIS Technology products, please evaluate enough the

apparatus/system which implemented LAPIS Technology products.

4. USE ENVIRONMENT

When using LAPIS Technology products in a high humidity environment and an environment where

dew condensation, take moisture-proof measures.

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Notes

1) The information contained herein is subject to change without notice.

2) When using LAPIS Technology Products, refer to the latest product information (data sheets, user’s manuals, application

notes, etc.), and ensure that usage conditions (absolute maximum ratings, recommended operating conditions, etc.) are within

the ranges specified. LAPIS Technology disclaims any and all liability for any malfunctions, failure or accident arising out of

or in connection with the use of LAPIS Technology Products outside of such usage conditions specified ranges, or without

observing precautions. Even if it is used within such usage conditions specified ranges, semiconductors can break down and

malfunction due to various factors. Therefore, in order to prevent personal injury, fire or the other damage from break down or

malfunction of LAPIS Technology Products, please take safety at your own risk measures such as complying with the derating

characteristics, implementing redundant and fire prevention designs, and utilizing backups and fail-safe procedures. You are

responsible for evaluating the safety of the final products or systems manufactured by you.

3) Descriptions of circuits, software and other related information in this document are provided only to illustrate the standard

operation of semiconductor products and application examples. You are fully responsible for the incorporation or any other

use of the circuits, software, and information in the design of your product or system. And the peripheral conditions must be

taken into account when designing circuits for mass production. LAPIS Technology disclaims any and all liability for any

losses and damages incurred by you or third parties arising from the use of these circuits, software, and other related

information.

4) No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of LAPIS Technology

or any third party with respect to LAPIS Technology Products or the information contained in this document (including but not

limited to, the Product data, drawings, charts, programs, algorithms, and application examples, etc.). Therefore LAPIS

Technology shall have no responsibility whatsoever for any dispute, concerning such rights owned by third parties, arising out

of the use of such technical information.

5) The Products are intended for use in general electronic equipment (AV/OA devices, communication, consumer systems,

gaming/entertainment sets, etc.) as well as the applications indicated in this document. For use of our Products in applications

requiring a high degree of reliability (as exemplified below), please be sure to contact a LAPIS Technology representative and

must obtain written agreement: transportation equipment (cars, ships, trains, etc.), primary communication equipment, traffic

lights, fire/crime prevention, safety equipment, medical systems, servers, solar cells, and power transmission systems, etc.

LAPIS Technology disclaims any and all liability for any losses and damages incurred by you or third parties arising by using

the Product for purposes not intended by us. Do not use our Products in applications requiring extremely high reliability, such

as aerospace equipment, nuclear power control systems, and submarine repeaters, etc.

6) The Products specified in this document are not designed to be radiation tolerant.

7) LAPIS Technology has used reasonable care to ensure the accuracy of the information contained in this document. However,

LAPIS Technology does not warrant that such information is error-free and LAPIS Technology shall have no responsibility for

any damages arising from any inaccuracy or misprint of such information.

8) Please use the Products in accordance with any applicable environmental laws and regulations, such as the RoHS Directive.

LAPIS Technology shall have no responsibility for any damages or losses resulting non-compliance with any applicable laws

or regulations.

9) When providing our Products and technologies contained in this document to other countries, you must abide by the

procedures and provisions stipulated in all applicable export laws and regulations, including without limitation the US Export

Administration Regulations and the Foreign Exchange and Foreign Trade Act..

10) Please contact a ROHM sales office if you have any questions regarding the information contained in this document or LAPIS

Technology's Products.

11) This document, in part or in whole, may not be reprinted or reproduced without prior consent of LAPIS Technology.

(Note) “LAPIS Technology” as used in this document means LAPIS Technology Co., Ltd.

2-4-8 Shinyokohama, Kouhoku-ku, Yokohama 222-8575, Japan

https://www.lapis-tech.com/en/

57/57


型号：	ML22Q254
厂家：	ROHM
描述：	ML22Q234/244/254仅需从MCU输入简单的指令即可轻松播放语音。具有时钟同步串行接口、独立型接口和I2C接口，可满足客户不同的需求。另外，不仅具备高音质、高压缩算法HQ-ADPCM、振荡电路、1W单声道D类扬声器放大器等语音输出所需的功能，还具有改写来自MCU的语音数据的功能。仅需添加本LSI，即可轻松实现语音功能。时钟放大器 PC 高压
文件：	总57页 (文件大小：1321K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ML22Q254 [ROHM]

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