ML22Q532 [ROHM]
ML2253x系列是内置串行音频接口的车载级4通道混合语音合成LSI，可提供Flash存储器内置型和外置型两种类型的产品。产品采用实现高音质的HQ-ADPCM、16位D/A转换器和低通滤波器，并内置用来直接驱动扬声器的1.0W单声道扬声器放大器。另外，还配备了车载应用所需的故障检测功能，可以检测LSI内部的异常以及LSI与扬声器之间连接线的异常。语音输出所需的功能已经全部集成于1枚芯片中，因此仅需增加本LSI，即可轻松实现语音功能。;
| 型号： | ML22Q532 |
| 厂家： | 
ROHM |
| 描述： | ML2253x系列是内置串行音频接口的车载级4通道混合语音合成LSI，可提供Flash存储器内置型和外置型两种类型的产品。产品采用实现高音质的HQ-ADPCM、16位D/A转换器和低通滤波器，并内置用来直接驱动扬声器的1.0W单声道扬声器放大器。另外，还配备了车载应用所需的故障检测功能，可以检测LSI内部的异常以及LSI与扬声器之间连接线的异常。语音输出所需的功能已经全部集成于1枚芯片中，因此仅需增加本LSI，即可轻松实现语音功能。 语音合成 放大器 PC 驱动 存储 转换器 |
| 文件： | 总176页 (文件大小：4243K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FEDL22Q53X-06
Issue date: Jun 29, 2022
ML22Q532 / ML22Q533 / ML22Q535
4-Channel Mixing Speech Synthesis LSIs with Built-in Flash Memory for Automotive
■ Overview
ML22Q532/ML22Q533/ML22Q535 is a 4-channel mixing speech synthesis LSI with a serial audio interface and a built-in
flash-memory for sound data.
It adopts a HQ-ADPCM*1, 16-bit D/A converter, and low-pass filter for high sound quality, and incorporates a 1.0W mono
speaker amplifier for driving speakers directly. It is also equipped with a function to detect failure.
The functions necessary for sound output are integrated into a single chip, so that sound functions can be realized simply by
adding this LSI.
● Memory capacity and maximum sound production time (HQ-ADPCM*1 algorithm, registered phrase 1024)
Product Name
Flash memory capacity
Maximum sound production time (sec)
fs=8.0kHz
fs =16.0kHz
fs =32.0kHz
ML22Q532
ML22Q533
ML22Q535
2Mbits
4Mbits
16Mbits
80
40
20
161
652
81
40
326
163
Analog Signal
FLASH
MEMORY
16bit
DAC
Speaker
Filter
MIX
Decode
SAI
MIX
AMP
Volume
Line
Speaker
AMP
HOST
MCU
AMP
I2C
Sound
Check
SPI
Application Circuit
*1
HQ-ADPCM is "Ky's" high-quality audio compression technique.
"Ky's" is a registered trademark of Kyushu Institute of Technology, a
national university corporation.
FEDL22Q53X-06
ML22Q53X
■ Feature
● Sound data
Speech synthesis algorithm:
Sampling frequency:
The algorithm can be specified for each phrase.
HQ-ADPCM/4bit ADPCM2/8bit non-linear PCM /
8bit Straight PCM/16bit Straight PCM
The sampling frequency can be specified for each phrase.
10.7/21.3kHz,
6.4/12.8/25.6kHz,
8.0/16.0/32.0kHz,
11.025/22.05/44.1kHz,
12.0/24.0/48.0kHz
Maximum number of phrases: 4096 Phrases
● Edit ROM function
● Playback function
Repeat function:
Mixing-function:
LOOP command
Up to 4-channel *1
Volume adjustment function: CVOL command 128 levels (including off-state)
AVOL command 16 levels (including off-state)
● Serial audio interface (slave)
PCM format:
8bit Straight PCM/16bit Straight PCM
8.0/16.0/32.0kHz,
Sampling frequency:
11.025/22.05/44.1kHz,
12.0/24.0/48.0kHz
8bit/16bit
Data length:
BCLK frequency:
LRCLK transfer mode
32fs to 64fs
LRCLK forward/reverse selectable
1-bit delay ON/OFF selectable
MSB first/LSB first selectable
● Low-pass filter
● 16-bit D/A converter
● Speaker amplifier:
● Line amplifier output:
Class AB 1. 0W 8Ω (SPVDD =5V, Ta=25 OC)
10kΩ driving (Exclusive operation from speaker amplifier output)
● External analog sound input (with analog mixing function)
● MCU command interface:
Clock Synchronous Serial Interface/I2C Interface (Slave)
● Failure detection function
Playback sound error detection
Speaker short detection: Speaker pin ground fault detection, speaker pin short detection
Speaker disconnection detection
Thermal detection
Clock error detection
Flash memory error detection
● Clock backup function
● Master clock frequency:
● Power-supply voltage
4.096MHz, 4.000MHz
2.7V to 5.5V*2
DVDD，SPVDD/SPOVDD and IOVDD can be set independently.
(SPVDD=SPOVDD≥DVDD
)
● Operating temperature range:
● Package:
● Ordered Part Name:
-40 OC to +105 OC*3
48-pin TQFP (7mm x 7mm, 0.5mm pitch)
ML22Q53X-NNNTB, ML22Q53X-xxxTB (48-pin TQFP) *4
*1 Mixing with SAI is limited by the sampling frequency. Refer to the "Function description".
*2 Handle VDDR pin in two different ways depending on the voltage range 2.7-3.6V or 3.3-5.5V.
Refer to the "Application Circuit".
*3 The operating time of the speaker amplifier may be limited depending on the average ambient temperature (Ta) used.
*4 The NNN is blanked. xxx represents ROM code number.
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■ Pin Configuration (TOP VIEW)
● ML22Q53X-NNNTB/ML22Q53X-xxxTB
(N.C.)
(N.C.)
37
38
39
40
41
42
43
44
45
XT
24
23
22
21
20
19
18
17
16
15
14
13
XTB
SPP
SAD2
SAD1
SAD0
VDDR
IOVDD
IRON
IRSI
SPM
(N.C.)
(N.C.)
(TOP VIEW)
TQFP48
RESETB
TEST0
STATUS1
STATUS2
CBUSYB
(N.C.)
IRSO
IRSCK
IRCSB
46
47
48
(N.C.) Unused pin
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■ Pin Description
Initial
value *1
—
Pin
Symbol
DGND
I/O
G
Attribute
-
Description
1,25
Digital ground pin.
I2C slave serial clock pin.
When using an I2C, be sure to insert a pull-up resistor between DVDD
pin.
2
3
SCL
I
-
H
Accessing with clock synchronous serial interface at the same time is
prohibited.
I2C slave serial data input/output pin.
When using an I2C, be sure to insert a pull-up resistor between DVDD
pin.
SDA
IO
-
Output: Nch MOS OPEN DRAIN output
Input: High-impedance input
H
Accessing with clock synchronous serial interface at the same time is
prohibited.
4
5
LRCLK
BCLK
I
I
-
-
SAI word clock input pin.
SAI bit clock input pin.
L
L
SAI bit data input pin.
6
7
SAI_IN
I
-
-
L
L
The data are loaded at the rising edges of BCLK.
SAI bit data output pin. Output data at the falling edge of BCLK.
Clock synchronous serial interface chip select pin.
The SCK and SI inputs are accepted only when this pin is at the "L"
level.
SAI_OUT
O
8
CSB
I
Negative
H
Accessing with I2C slave interface at the same time is prohibited.
Clock synchronous serial interface clock input pin.
Accessing with I2C slave interface at the same time is prohibited.
Clock synchronous serial interface data input pin.
Data is fetched in synchronization with SCK.
Accessing with I2C slave interface at the same time is prohibited.
Clock synchronous serial interface data output pin.
When the CSB pin is at an "L" level, data is output in synchronization
with SCK.
9
SCK
SI
I
I
-
-
L
L
10
11
13
SO
O
I
-
Hi-Z
H
When the CSB pin is at an "H" level, this pin enters a high-impedance
state.
Accessing with I2C slave interface at the same time is prohibited.
Flash memory interface chip select input pin.
IRCSB
Negative Input the "H" level during non-access and the "L" level during access.
Setting the IRON pin to "H" enables input.
Flash memory interface serial clock input pin.
Setting the IRON pin to "H" enables input.
Flash memory interface serial data output pin.
Setting the IRON pin to "H" enables output.
Flash memory interface serial data input pin.
Setting the IRON pin to "H" enables input.
14
15
16
IRSCK
IRSO
IRSI
I
O
I
-
H
Hi-Z*2
L
-
-
Pin to enable the flash memory interface.
When this bit is set to "L", the flash memory interface pin is disabled. A
pull-down resistor is internally connected to the LSI.
Positive Set this bit to "L" during playback operation using flash memory.
Setting this bit to "H" allows rewriting of the flash memory using the
flash memory interface.
17
IRON
I
L
Set this bit to "H" for onboard rewriting.
*1 Initial value at reset input and power-down. The pin whose IO is "I" indicates a fixed level from outside.
*2 IRON pin "L" setting status
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Initial
Pin
18
Symbol
IOVDD
I/O
P
Attribute
-
Description
value *1
Flash memory interface power supply pin.
Connect to DVDD pin even when not using flash memory interface.
Connect a bypass capacitor between this pin and the DGND pin.
3.0V regulator outputs. Used as a power supply for flash memory.
—
Connect a capacitor between this pin and DGND pin as close as
possible.
19
VDDR
O
-
L
Connect this pin to the DVDD pin when DVDD = 2.7 to 3.6V.
20
21
22
SAD0
SAD1
SAD2
I
I
I
-
-
-
I2C slave address select pin.
—
—
—
I2C slave address select pin.
I2C slave address select pin.
Crystal or ceramic resonator connection pin.
When an external clock is used, leave it open and capacitor is not
23
XTB
O
Negative required when a crystal or ceramic resonator is connected.
When using a resonator, connect it as close as possible.
Leave it open when not in use.
H
Crystal or ceramic resonator connection pin.
A feedback resistor of about 1MΩ is built in between the XT pin and
the XTB pin.
24
XT
I
Positive To use an external clock, input from this pin. Delete the capacitor
when a crystal or ceramic resonator is connected.
When using a resonator, connect it as close as possible.
Leave it open when not in use.
L
Digital power supply pin.
Connect a bypass capacitor between this pin and the DGND pin.
2.5V regulator output pin.
Used as internal power supply.
26
27
DVDD
VDDL
P
-
—
L
O
-
Connect a capacitor between this pin and DGND pin as close as
possible.
28
29
30
FB1
FB2
LOUT
I
I
O
-
-
-
Analog input pin 1 for playback sound error detection.
Analog input pin 2 for playback sound error detection.
This pin is used exclusively for line amplifier output.
Reference voltage output pin for the built-in speaker amplifier.
Connect a capacitor between this pin and SPGND pin.
Speaker amplifier analog signal input pin.
L
L
L
31
32
33
SG
AIN
O
I
-
-
-
L
L
Initially, input is disabled.
Power supply pin for speaker amplifier.
SPVDD
P
—
Connect a bypass capacitor between this pin and the SPGND pin.
Power supply pin for the speaker amplifier output circuit.
Set it at the same potential as the SPVDD pin.
Speaker amplifier ground pin.
Ground pin for the speaker amplifier output circuit.
Set it at the same potential as the SPGND pin.
Positive output pin of the speaker amplifier.
34
35
36
SPOVDD
SPGND
P
G
G
-
-
-
—
—
—
SPOGND
39
40
SPP
SPM
O
O
-
-
L
Line amplifier outputs are also available with AMODE command.
Negative output pin of the speaker amplifier.
Hi-Z
*1 Initial value at reset input and power-down. The pin whose IO is "I" indicates a fixed level from outside.
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Initial
Pin
43
Symbol
I/O
I
Attribute
Negative
Description
value *1
Reset input pin.
The LSI is initialized by the "L" level input. After a reset is input, all the
circuits stop operating and enter the power-down state.
At power-on, input an "L" level to this pin. After the power supply
voltage stabilizes, set this pin to an "H" level.
RESETB
(*2)
A pull-up resistor is internally connected to the LSI.
Input pin for testing.
44
45
TEST0
I
Positive A pull-down resistor is internally connected to the LSI.
Fix to the DGND.
L
Status/error output pin 1.
Execute OUTSTAT command to select BUSYB*3 and NCR*3 in each
STATUS1
O
-
H
channel, or errors.
The initial value is BUSYB*3 of channel 0, and output data is "H" level.
Status/error output pin 2.
Execute OUTSTAT command to select BUSYB*3 and NCR*3 in each
46
47
STATUS2
O
-
H
channel, or errors.
The initial value is BUSYB*3 of channel 0, and output data is "H" level.
Command processing status signal output pin.
CBUSYB
N.C.
O
-
Negative An "L" level is output during command processing.
Be sure to input a command with this pin at an "H" level.
(*2)
12,37,
38,41,
42,48
Unused pin.
Leave open.
-
Hi-Z
*1 Initial value at reset input and power-down. The pin whose IO is "I" indicates a fixed level from outside.
*2 "L" at reset, "H" at power-down
*3 For NCR, BUSYB, refer to the description of "RDSTAT command".
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■ Termination of Unused Pins
This section explains how to terminate unused pins.
Symbol
SCL
SDA
Recommended pin termination
Connect to the DVDD
.
SAD0
SAD1
SAD2
LRCLK
BCLK
SAI_IN
CSB
Connect to the DGND.
Connect to the DGND.
Connect to the DVDD
Connect to the DGND.
Connect to the IOVDD
.
SCK
SI
IRCSB
IRSCK
IRSO
IRSI
IRON
XT
.
Connect to the DGND.
Leave open.
Connect to the DGND.
Leave open.
XTB
FB1
FB2
Connect to the SPGND.
AIN
TEST0
N.C.
Connect to the SPGND.
Connect to the DGND.
Leave open.
SAI_OUT
SO
LOUT
SPP
Leave open.
SPM
STATUS1
STATUS2
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■ I/O Equivalent Circuit
Classifi
cation
A
Circuit
Overview
Attribute: Input
Power: DVDD
Function: CMOS inputs with pull-down
Applicable pin: TEST0
B
Attribute: Input
Power: IOVDD
Function: CMOS inputs with pull-down
Applicable pin: IRON
C
Attribute: Input
Power: DVDD
Function: CMOS inputs with pull-up
Applicable pin: RESETB
D
Attribute: Input
Power: DVDD
Function: CMOS inputs
Applicable pins: SI SCK, CSB, SAD0, SAD1, SAD2,
LRCLK, BCLK, SAI_IN
E
Attribute: Input
Power: IOVDD
Function: CMOS inputs
Applicable pins: IRCSB, IRSCK
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Classifi
cation
F
Circuit
Overview
Attribute: output
Power: DVDD
Function: CMOS outputs
Applicable pins: STATUS1, STATUS2, CBUSYB,
SO, SAI_OUT
G
H
I
Attribute: Input
Power: IOVDD
Function: CMOS inputs
Applicable pin: IRSI
Attribute: output
Power: IOVDD
Function: CMOS outputs
Applicable pin: IRSO
Attribute: Oscillator circuit
Power: DVDD
XTB
Function: 4.096M, 4.000MHz oscillation
Applicable pins: XT, XTB
XT
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Classifi
cation
J
Circuit
Overview
Attribute: Analog
Power: SPOVDD
Function: Sound output
Applicable pins: SPP, SPM
analog input
-
+
SG
K
Attribute: Analog
Power: SPVDD
Function: Sound output
Applicable pin: LOUT
analog input
-
+
SG
L
Attribute: Analog
Power: SPVDD
Function: Sound input
Applicable pins: AIN, FB1, FB2
M
Attribute: Input
Power: DVDD
Function: Nch Open Drain
Applicable pins: SCL, SDA
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■ Electrical characteristics
● Absolute maximum rating
DGND=SPGND=SPOGND=0V, Ta=25°C
Parameter
Symbol
DVDD
IOVDD
SPVDD
SPOVDD
VDDR
Condition
—
Rating
Unit
Power supply voltage 1
-0.3 to +6.0
V
Power supply voltage 2
Input voltage 1
—
—
-0.3 to +4.6
V
V
V
VIN1
-0.3 to DVDD+0.3
-0.3 to IOVDD+0.3
Input voltage 2
VIN2
—
Applies to the FB1 and FB2
pins.
Input voltage 3
VIN3
-0.3 to SPVDD+0.3
V
When the LSI is mounted on
JEDEC 4-layer board.
SPVDD = SPOVDD = 5V
Applies to pins other than
SPM,SPP,VDDL and VDDR pins.
Applies to SPM and SPP pins.
Applies to the VDDL/VDDR pin.
—
Allowable loss
PD
1000
mW
Output short-circuit current
IOS
10
mA
500
50
mA
mA
°C
Storage temperature
TSTG
-55 to +150
● Recommended operating conditions
DGND=SPGND=SPOGND=0V
Parameter
Symbol
DVDD
IOVDD
SPVDD
SPOVDD
Top
Condition
—
Range
Unit
DVDD
IOVDD
SPVDD*1, SPOVDD
,
,
2.7 to 3.6 / 3.3 to 5.5
V
*1
Power-supply voltage
Operating temperature
—
—
-40 to +105
°C
Min.
Typ.
4.096
4.000
Max.
Master clock frequency
fOSC
MHz
Typ
-5%
Typ
+5%
*1 SPVDD=SPOVDD≥DVDD
● Flash memory condition
Parameter
Symbol
TOP
Condition
At write/erase
At read
―
Range
0 to +70
-40 to +105
100
Unit
°C
°C
Time
Year
Operating temperature
Number of rewrites
Data retention period
CEP
YDR
―
10
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● DC characteristics
SPVDD=SPOVDD≥DVDD=IOVDD=2.7 to 5.5V, DGND=SPGND=SPOGND=0V, Ta=-40 to +105°C, Load capacitance of output pin =15pF(Max.)
Parameter
Symbol
Condition
Applicable pin
LRCLK/BCLK/SAI_IN/
CSB/SCK/SI/
SAD0/SAD1/SAD2/
SDA/SCL/
Min.
Typ.*1
Max.
Unit
"H" input voltage 1
VIH1
—
0.8×DVDD
—
DVDD
V
XT/RESETB/TEST0
IRCSB/IRSCK/
IRSI/IRON
"H" input voltage 2
"L" input voltage 1
VIH2
—
—
0.8×IOVDD
—
—
IOVDD
V
V
LRCLK/BCLK/SAI_IN/
CSB/SCK/SI/
SAD0/SAD1/SAD2/
SDA/SCL/
VIL1
0
0.2×DVDD
XT/RESETB/TEST0
IRCSB/IRSCK/IRSI/
IRON
"L" input voltage 2
"H" output voltage 1
VIL2
—
0
—
—
0.2×IOVDD
—
V
V
VOH1
IOH = -50µA
XTB
DVDD-0.4
SAI_OUT/
SO/
"H" output voltage 2
VOH2
IOH = -1mA
DVDD-0.4
—
—
V
CBUSYB/STATUS1/
STATUS2
"H" output voltage 3
"L" output voltage 1
VOH3
VOL1
IOH = -1mA
IOL = 50µA
IRSO
IOVDD-0.4
—
—
—
—
V
V
XTB
0.4
SAI_OUT/
SO/
"L" output voltage 2
VOL2
IOL = 2mA
—
—
0.4
V
CBUSYB/STATUS1/
STATUS2
"L" output voltage 3
"L" output voltage 4
VOL3
VOL4
IOL = 2mA
IOL = 3mA
IRSO
—
—
—
—
0.4
0.4
V
V
SDA/SCL
VOH=DVDD
(in high-impedance state)
VOL=DGND
(in high-impedance state)
VOH=IOVDD
(in high-impedance state)
VOL=DGND
SDA/SCL/
Output leakage
current 1
IOOH1
IOOL1
IOOH2
—
–10
—
—
—
—
10
—
10
µA
µA
µA
SO
Output leakage
current 2
IRSO
IOOL2
IIH1
–10
0.8
—
—
µA
µA
(in high-impedance state)
VIH = DVDD
"H" input current 1
"H" input current 2
XT
RESETB/
5.0
20
LRCLK/BCLK/SAI_IN/
CSB/SCK/SI/
SDA/SCL
IIH2
VIH = DVDD
—
—
10
µA
"H" input current 3
"H" input current 4
"H" input current 5
"L" input current 1
IIH3
IIH4
IIH5
IIL1
VIH = DVDD
VIH = IOVDD
VIH = IOVDD
VIL = DGND
TEST0
20
—
500
—
1000
10
µA
µA
µA
µA
IRCSB/IRSCK/IRSI
IRON
20
500
–5.0
1000
–0.8
XT
–20
LRCLK/BCLK/SAI_IN/
CSB/SCK/SI/
SDA/SCL/
"L" input current 2
"L" input current 3
IIL2
VIL = DGND
VIL = DGND
–10
—
—
µA
IRCSB/IRSCK/IRSI/
IRON/
TEST0
IIL3
RESETB
–400
–100
–2
µA
*1 Typ. : DVDD=SPVDD=SPOVDD=IOVDD=5.0V,DGND=SPGND=0V,Ta=25°C
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SPVDD=SPOVDD≥DVDD=IOVDD=2.7 to 5.5V, DGND=SPGND=SPOGND=0V, Ta=-40 to +105°C, Load capacitance of output pin =15pF(Max.)
Parameter
Symbol
Condition
fOSC=4.096MHz
Fs=48kHz, f=1kHz,
During HQADPCM
playback
Applicable pin
Min.
Typ.*1
Max.
Unit
mA
During playback
Current
consumption
IDDO
—
—
25*3
45*3
SPP/SPM No output
load
DVDD
IOVDD
SPVDD
SPOVDD
3.3V~5.5V
DVDD
IOVDD
SPVDD
SPOVDD
VDDR
2.7V~3.6V
=
=
=
Ta=-40 to
+55°C
—
—
—
—
—
—
1*3
1*3
10.0*3
30.0*3
20.0*3
µA
µA
µA
Ta=-40 to
+105°C
=
Power-down
Current
consumption
IDDS
=
=
=
Ta=-40 to
+55°C
6*2*3
=
Ta=-40 to
+105°C
—
—
6*2*3
80.0*3
µA
=
*1 Typ. : DVDD=SPVDD=SPOVDD=IOVDD=5.0V,DGND=SPGND=0V,Ta=25°C
*2 Typ. : DVDD=SPVDD=SPOVDD=IOVDD=3.0V,DGND=SPGND=0V,Ta=25°C
*3 Total values of the DVDD pin, SPVDD pin, SPOVDD pin, and IOVDD pin
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● Analog Part Characteristics
SPVDD=SPOVDD≥DVDD=IOVDD=2.7 to 5.5V, DGND=SPGND=SPOGND=0V, Ta=-40 to +105°C, Load capacitance of output pin =15pF(Max.)
Parameter
Symbol
Condition
Min.
3.89
Typ.
Max.
4.31
Unit
Ta=-40 to +70°C
4.096
MHz
RC4MHz
Frc
Ta=-40 to +105°C
Input gain 0dB
3.68
10
4.096
20
4.51
30
MHz
kΩ
AIN pin input resistance
RAIN
VAIN
AIN pin input voltage range
—
—
—
SPVDD×2/3
Vp-p
SPVDD = 3.3 to 5.5V
When 1/2SPVDD ± 1 mA is
applied
Line amplifier output
resistance1*1
RLA1
—
—
—
—
100
300
Ω
Ω
SPVDD = 2.7 to 3.6V
When 1/2SPVDD ± 1 mA is
applied
Line amplifier output
resistance2*1
RLA2
Line amplifier
output-load-resistance *1
Line amplifier Output Voltage
Range *1
RLA
VAO
For SPGND
10
—
—
—
kΩ
No output load
SPVDD /6
SPVDD×5/6
V
0.95x
SPVDD /2
57
1.05x
SPVDD /2
135
SG pin output voltage
VSG
RSG
—
—
—
SPVDD /2
V
kΩ
Ω
SG pin output resistance
SPP/SPM pins Output-Load
Resistance
96
8
RLSP1
6
—
6
To the SPP and SPM pins
Short circuit detection
Class AB speaker amplifier
4.5V≤SPVDD≤5.5V
SPVDD = SPOVDD =5.0V,
f=1kHz RSPO=8Ω,
THD=10%
ROCDAB
0.1
—
1
Ω
Speaker amplifier output power
1
PSPO1
0.8
—
W
SPVDD = SPOVDD =3.0V,
f=1kHz RSPO=8Ω,
THD=10%
Speaker amplifier output power
2
PSPO2
0.1
-50
0.3
—
—
W
During no-signal SPM-SPP
Output offset voltage
AVOL=0dB
8 Ω load
VOF
50
mV
*1 Applies to the SPP and LOUT pins when outputting LINE.
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ML22Q53X
● AC characteristic
SPVDD=SPOVDD≥DVDD=IOVDD=2.7 to 5.5V, DGND=SPGND=SPOGND=0V, Ta=-40 to +105°C, Load capacitance of output pin =15pF(Max.)
Parameter
Master clock duty cycle
RESETB input pulse width
Symbol
fduty
Condition
—
Min.
40
Typ.
50
Max.
60
Unit
%
tRST
—
10
—
—
μs
Reset noise rejection pulse width tNRST
RESETB pin
—
—
0.1
μs
fOSC = 4.096MHz
After input the first command at
two-times command input mode
fOSC = 4.096MHz
During continuous playback
at SLOOP input
Command input interval time
Command input enable time
tINTC
0
—
—
μs
tcm
—
—
—
—
10
8
ms
ms
At PUP command input
CBUSYB "L" level output time
tPUP
4.096MHz external clock input
4.096MHz external clock input
POP="L"
At AMODE command input
CBUSYB "L" level output time
tPUPA1
tPUPA2
tPUPA3
AEN0="L"→"H"
AEN1 = "L"
AVOL = -4dB is selected
4.096MHz external clock input
DAMP="L",POP="H"
35
71
31
37
73
33
39
75
35
ms
ms
ms
At AMODE command input
CBUSYB "L" level output time
AEN1="L"→"H"
(AEN0= "L": SPP-pin line amplifier output)
(AEN0= "H": LOUT pin line amplifier output)
4.096MHz external clock input
DAMP="L",POP="L"
AEN1="L"→"H"
(AEN0= "L": SPP-pin line amplifier output)
(AEN0= "H": LOUT pin line amplifier output)
At AMODE command input
CBUSYB "L" level output time
At PDWN command input
CBUSYB "L" level output time
tPD
fOSC = 4.096MHz
—
—
10
μs
4.096MHz external clock input
POP="L"
AEN1="L",AEN0="H"→"L"
4.096MHz external clock input
DAMP="L",POP="H"
At AMODE command input
CBUSYB "L" level output time
tPDA1
100
102
104
ms
At AMODE command input
CBUSYB "L" level output time
tPDA2
AEN1="H"→"L"
142
102
144
104
146
106
ms
ms
(AEN0= "L": SPP-pin line amplifier output)
(AEN0= "H": LOUT pin line amplifier output)
4.096MHz external clock input
DAMP="L",POP= "L"
At AMODE command input
CBUSYB "L" level output time
tPDA3
AEN1="H"→"L"
(AEN0= "L": SPP-pin line amplifier output)
(AEN0= "H": LOUT pin line amplifier output)
fOSC = 4.096MHz
CBUSYB "L" level output time 1*1
CBUSYB "L" level output time 2*2
tCB1
tCB2
—
—
—
—
—
—
—
—
10
3
μs
ms
μs
fOSC = 4.096MHz
FAD="L" at fOSC = 4.096MHz
FAD="H" at fOSC = 4.096MHz
200
10
CBUSYB "L" level output time 3*3
tCB3
ms
*1 Applies when inputting commands except the timings after PUP, PDWN, PLAY, or START command is input.
*2 Applies when inputting PLAY, START, MUON command.
*3 Applies when inputting STOP command.
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● AC Characteristics (Clock Synchronous Serial Interface)
SPVDD=SPOVDD≥DVDD=IOVDD=2.7 to 5.5V, DGND=SPGND=SPOGND=0V, Ta=-40 to +105°C, Load capacitance of output pin =15pF(Max.)
Parameter
CSB input enable time from IRON falling edge
CSB hold time from IRON rising edge
SCK setup time from CSB falling edge
SCK input enable time from CSB falling edge
SCK hold time from CSB rising edge
Data floating time from CSB rising edge
Data setup time from SCK
Symbol
tEIRON
tIRONH
tSCKS
tESCK
tCSH
Condition
Min.
1000
1000
100
100
100
—
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
—
—
—
—
—
—
—
—
—
tDOZ
RL=3KΩ
—
100
—
tDIS
50
Data hold time from SCK
tDIH
—
50
—
Data output delay time from SCK
LSB data hold time from SCK
tDOD
—
—
90
—
tDOH
—
100
100
100
—
SCK "H" level pulse width
tSCKH
tSCKL
tDBSY
—
—
SCK "L" level pulse width
—
—
CBUSYB output delay time from SCK
—
90
<When rewriting the flash memory using the clock synchronous serial interface>
SPVDD=SPOVDD≥DVDD=IOVDD=2.7 to 5.5V, DGND=SPGND=SPOGND=0V, Ta=-40 to +105°C, Load capacitance of output pin =15pF(Max.)
Parameter
CSB input enable time from IRON falling edge
CSB hold time from IRON rising edge
SCK setup time from CSB falling edge
SCK input enable time from CSB falling edge
SCK hold time from CSB rising edge
Data floating time from CSB rising edge
Data setup time from SCK
Symbol
tEIRON
tIRONH
tSCKS
tESCK
tCSH
Condition
Min.
1000
1000
125
125
125
—
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
Max.
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
—
—
—
—
—
—
—
—
—
tDOZ
RL=3KΩ
—
125
—
tDIS
50
Data hold time from SCK
tDIH
—
50
—
Data output delay time from SCK
LSB data hold time from SCK
tDOD
—
—
110
—
tDOH
—
100
125
125
SCK "H" level pulse width
tSCKH
tSCKL
—
—
SCK "L" level pulse width
—
—
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● AC Characteristics (I2C Interface)
SPVDD=SPOVDD≥DVDD=IOVDD=2.7 to 5.5V, DGND=SPGND=SPOGND=0V, Ta=-40 to +105°C, Load capacitance of output pin =15pF(Max.)
Parameter
Symbol
tSCL
Min
0
Max.
400
—
Unit
kHz
μs
SCL clock frequency
SCL hold time (start/restart condition)
SCL clock "L" level time
SCL clock "H" level time
SCL setup time (restart condition)
SDA hold time
tHD;STA
tLOW
0.6
1.3
0.6
0.6
0
—
μs
tHIGH
—
μs
tSU;STA
tHD;DAT
tSU;DAT
tSU;STO
tBUF
—
μs
—
μs
SDA setup time
0.1
0.6
1.3
—
—
μs
SDA setup time (stop condition)
Bus free time
—
μs
—
μs
Capacitive load on each bus line
Cb
400
pF
17/176
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● AC Characteristics (SAI Interface (Slave))
SPVDD=SPOVDD≥DVDD=IOVDD=2.7 to 5.5V, DGND=SPGND=SPOGND=0V, Ta=-40 to +105°C, Load capacitance of output pin =15pF(Max.)
Parameter
SAI_BCLK period
Symbol
tC_BCLK
tHW_BCLK
tLW_BCLK
tH_LRCLK
tSU_LRCLK
tD_SDO *1
tSU_SDI
Condition
—
Min.
32fs
100
100
80
Typ.
—
Max.
64fs
—
Unit
Hz
ns
ns
ns
ns
ns
ns
ns
—
—
—
—
—
—
—
SAI_BCLK "H" period
SAI_BCLK "L" period
SAI_LRCLK hold time
SAI_LRCLK setup time
SAI_SDOUT delay time
SAI_SDIN setup time
SAI_SDIN hold time
—
—
—
—
—
80
—
—
—
—
80
20
—
—
tH_SDI
20
—
—
*1 tD_SDO is the time based on the slower change of SAI_BCLK or SAI_LRCLK.
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ML22Q53X
● AC Characteristics (Flash Memory Interface)
SPVDD=SPOVDD≥DVDD=IOVDD=2.7 to 5.5V, DGND=SPGND=SPOGND=0V, Ta=-40 to +105°C, Load capacitance of output pin =15pF(Max.)
Parameter
IRCSB enable time from IRON falling edge
IRCSB hold time from IRON rising edge
IRSCK enable time from IRCSB falling edge
IRSCK hold time from IRCSB rising edge
Data setup time from IRSCK rising edge
Data hold time from IRSCK rising edge
Data delay time from IRSCK falling edge
IRSCK frequency
Symbol
tEIRON
tIRONH
tICSS
Condition
Min.
1000
1000
100
100
50
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
Max.
—
—
—
—
—
—
80
5
Unit
ns
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
tICSH
ns
tIDIS
ns
tIDIH
50
ns
tIDOD
tISCKF
tISCKH
tISCKL
tIFLH
—
ns
—
MHz
ns
IRSCK "H" level pulse width
100
100
—
—
—
1
IRSCK "L" level pulse width
ns
IRSO delay time from IRON rising edge
IRSO delay time from IRON falling edge
ms
ms
tIFHL
—
1
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■ Block diagram
The block diagram is shown below.
XTB XT
CSB
SCK
SI
OSC4.096MHz
or 4.000MHz
Timing
Controller
PLL
SO
RC4.096MHz
MCU
SCL
SDA
SAD0
SAD1
SAD2
Interface
IRCSB
IRSCK
IRSI
IRSO
IRON
IOVDD
Flash Memory
Command
Analyzer
Address
Controller
CBUSYB
STATUS1
STATUS2
PCM Synthesizer
Digital Mixing
LPF
LRCLK
BCLK
SAI_IN
Serial
Audio
Interface
SAI_OUT
DVDD
DGND
VDDL
VDDR
ΔΣ
16bit DAC
Line Amplifier
Analog Mixing
SG
LOUT
RESETB
TEST0
PWM
SPVD
SPGND
AIN
Sound Check
D Class
Amplifier
AB Class
Amplifier
SPOVDD
SPOGND
FB0 FB1
SPP
SPM
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■ Function description
● Clock Synchronous Serial Interface
The CSB, SCK, SI, and SO pins are used to input various command data and to read the status.
For command and data inputting, after "L" level is input to the CSB pin, data is input to the SI pin in MSB first in
synchronization with the input clock signal of the SCK pin. The SI pin data is loaded into the LSI in synchronization with the
SCK pin clock, and the command data is determined by the SCK pin clock of the eighth pulse.
When reading, after "L" level is input to the CSB pin, it is output from the SO pin in synchronization with the input clock
signal of the SCK pin.
The selection of the rising or falling edge of the SCK pin clock depends on the state of the SCK pin at the falling edge of the
CSB pin.
When the SCK pin is "H" at the falling edge of the CSB pin, the SI pin data is loaded into the LSI on the rising edge of the
SCK pin clock, and the status signal is output from the SO pin on the falling edge of the SCK pin clock.
When the SCK pin is "L" at the falling edge of the CSB pin, the SI pin data is loaded into the LSI on the falling edge of the
SCK pin clock, and the status signal is output from the SO pin on the rising edge of the SCK pin clock.
When the CSB pin is fixed to "L" level, the SI pin data is loaded into the LSI on the rising edge of the SCK pin clock, and the
status signal is output from the SO pin at the falling edge of the SCK pin clock.
However, if unexpected pulses are input to the SCK pin due to noise, etc., the count of the number of SCK pin clocks may be
shifted, and normal command input may not be performed.
The serial interface can be returned to the initial state by setting the CSB pin to "H" level.
When the CSB pin is "H" level, the SO pin becomes a high impedance state.
Accessing with I2C slave interface at the same time is prohibited.
Command data input timing： SCK rising edge operation
(When the SCK is "H" at the falling edge of the CSB)
CSB
SCK
D7 D6 D5 D4 D3 D2 D1 D0
(MSB) (LSB)
SI
Command data input timing： SCK falling edge operation
(When the SCK is "L" at the falling edge of the CSB)
CSB
SCK
D7 D6 D5 D4 D3 D2 D1 D0
(MSB) (LSB)
SI
Command data output timing： SCK falling edge operation
(When the SCK is "H" at the falling edge of the CSB)
CSB
SCK
D7 D6 D5 D4 D3 D2 D1 D0
(MSB) (LSB)
SO
Command data output timing： SCK rising edge operation
(When the SCK is "L" at the falling edge of the CSB)
CSB
SCK
D7 D6 D5 D4 D3 D2 D1 D0
(MSB) (LSB)
SO
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ML22Q53X
● I2C Interface (Slave)
This serial interface conforms to the I2C bus specifications. It supports Fast modes and can transmit and receive data at
400kbit/s. The SCL and SDA pins are used to input various command data and to read the status. The slave addresses are set
by the SAD0 to 2 pins.
When I2C is used, be sure to insert a pull-up resistor between SCL and SDA pins and DVDD pin.
In the communication flow between the master and this device (slave) on the I2C bus, after the start condition is set, the slave
address (upper 3 bits of the slave address are set by the SAD0 to 2 pins) is entered in the first 7 bits, the data direction is
determined in the 8th bit (when the 8th bit is "0", data is written from the master, and data is read from the master when "1")
and communication is performed in byte units thereafter. At this time, acknowledgment is required for each byte.
Accessing with clock synchronous serial interface at the same time is prohibited.
The I2C communication flow/timing chart is shown below.
Command flow when writing data (1-byte command)
Start condition
Slave address +W(0)
Write data (ex. Command 1st byte)
Stop condition
- Timing chart when writing data. （1 byte command）
SCL
A6 A5A4 A3 A2A1 A0 W A D7 D6D5 D4 D3D2 D1 D0 A
SDA
P
Slave Address
A
1st Command Data
A
S
CBUSYB
S
P
A
Start condition
Stop condition
Acknowledge
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FEDL22Q53X-06
ML22Q53X
Command flow when writing data (2-byte command)
Start condition
Slave address +W(0)
Write data (ex. Command 1st byte)
Write data (ex. Command 2nd byte)
Stop condition
- Timing chart when writing data. （2 byte command）
SCL
A6 A5 A4 A3 A2A1 A0 W A D7 D6D5 D4 D3D2 D1 D0 A
Slave Address 1st Command Data
A
D7 D6D5 D4 D3D2 D1 D0
2nd Command Data
SDA
P
A
A
S
A
CBUSYB
Command flow when writing data (3-byte command)
Start condition
Slave address +W(0)
Write data (ex. Command 1st byte)
Write data (ex. Command 2nd byte)
Write data (ex. Command 3rd byte)
Stop condition
- Timing chart when writing data. （3 byte command）
SCL
A6 A5 A4 A3 A2A1 A0 W A D7 D6D5 D4 D3D2 D1 D0 A
Slave Address 1st Command Data
SDA
A
A
S
CBUSYB
SCL
SDA
D7 D6D5 D4 D3D2 D1 D0
2nd Command Data
A
A
D7 D2D5 D4 D3D6 D1 D0
3rd Command Data
A
P
A
CBUSYB
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FEDL22Q53X-06
ML22Q53X
Command flow when reading data
Start condition
Slave address +W(0)
RDSTAT Command
Stop condition
Start condition
Slave address + R(1)
Read data (ex. Status read)
Stop condition
- Timing chart when reading data.
SCL
A6
W A
A
A
A5 A4 A3 A2A1 A0
Slave Address
D7 D6D5 D4 D3D2 D1 D0
RDSTAT Command
SDA
A
P
S
CBUSYB
SCL
SDA
A6
R
A
A
A5 A4 A3 A2 A1 A0
Slave Address
D7D6D5 D4 D3D2 D1 D0
Read Data*1
A
A
P
S
CBUSYB
*1 When the two-time input mode, the error state reading is 2 bytes
The data read flow is used when data is read by RDSTAT/RDERR/RDVER commands. The data to be read is updated by
inputting RDSTAT/RDERR/RDVER command. Be sure to enter the RDSTAT/RDERR/RDVER command before reading
the internal status.
The slave address can be set as follows using the SAD2 to SAD0 pins.
SAD2 SAD1 SAD0 Lower 4 bits
Slave address
000_0101
001_0101
010_0101
011_0101
100_0101
101_0101
110_0101
111_0101
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0101
0101
0101
0101
0101
0101
0101
0101
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FEDL22Q53X-06
ML22Q53X
● SAI (Serial Audio Interface)
SAI transfers digital sound data serially.
The sound data input from the SAI_IN pin can be played using the speaker amplifier or LINE amplifier.
Furthermore, not only can it e mixed with the sound data in the flash memory and played back by the speaker amplifier or
LINE amplifier, but it can also be output from SAI_OUT pin.
Various serial data formats are supported by a combination of command settings.
A WSLI, DLYI and MSBI are used to represent the supported formats.
For WSLI, DLYI and MSBI, refer to the "SAIRCON command".
When using SAI, set the analog power-up state with the AMODE command.
<DLYI="0", ISSCKI="0" / DLYO="0", ISSCKO="0", MSBI="0">
<DLYI="0", ISSCKI="1" / DLYO="0", ISSCKO="1", MSBI="0">
<DLYI="1", ISSCKI="1" / DLYO="1", ISSCKO="1", MSBI="0">
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ML22Q53X
<DLYI="0", ISSCKI="0" / DLYO="0", ISSCKO="0", MSBI="1">
26/176
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ML22Q53X
● Volume Settings (Differences Between AVOL and CVOL and PAN)
The volume can be set with four commands CVOL, PAN, AVOL and AMODE.
The CVOL can set the volume of each channel, the PAN can set the volume of each channel (Lch/Rch) output to the
SAI_OUT pin, the AVOL can set the volume after channel mixing, and the AMODE can set the input gain to the amplifier.
By using the fade function with FADE command, the volume can be adjusted stepwise when the volume is changed with
CVOL and PAN.
AIN
Setting AIG of
AMODE command
Speaker
amplifier
GAIN
AMP
SPP
SPM
Channel 0 (CH0)
Channel 1 (CH1)
Channel 2 (CH2)
Channel 3 (CH3)
[0]
[1]
[2]
[3]
GAIN
AMP
Setting DAG of
AMODE command
AVOL
command
[3:0]
LINE
AMP
CVOL command
FADE command
LOUT
[0]
[1]
LRCLK
BCLK
[2]
[3]
[3:0]
SAI_OUT
PAN command
FADE command
[3:0]
[0]
[1]
[2]
[3]
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● Speech synthesis algorithm
This LSI contains five algorithm types to match the characteristic of playback sound: 4-bit ADPCM2 algorithm,
HQ-ADPCM algorithm, 8-bit non-linear PCM algorithm, 8-bit straight PCM algorithm, and 16-bit straight PCM algorithm.
Key feature of each algorithm is described in the table below.
Speech synthesis
algorithm
Compression
rate*1
Feature
4bit ADPCM algorithm is improved. Adopting variable bit length
enables high sound quality and high data compression. Suitable for
sound effects with sharp changes in waveforms or for pulsed
waveforms.
HQ- ADPCM
1/5
LAPIS original 4bit ADPCM algorithm is improved. Better
followability to the waveform improves the sound quality. Suitable for
human voices, animal crying, and natural sounds.
This algorithm enables playing back a sound with 10-bit equivalent
quality in the center of the waveform. Suitable for low-amplitude
sounds that are easily distorted.
This algorithm has excellent followability to the waveform in all
sound areas. Suitable for sound effects with sharp changes in
waveforms or for pulsed waveforms.
This algorithm has excellent followability to the waveform in all
sound areas. Suitable for sound effects with sharp changes in
waveforms or for pulsed waveforms.
4-bit ADPCM2
8-bit non-linear PCM
8-bit straight PCM
16-bit straight PCM
1/4
1/2
1/2
1
*1: When using the same sampling frequency.
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ML22Q53X
● Memory Allocation and Creating Sound Data
The flash memory is partitioned into four data areas: sound (i.e., phrase) control area, test area, sound area, and edit ROM
area.
The sound control area manages the sound data in the ROM. It contains data for controlling the start/stop addresses of sound
data for 4,096 phrases, use/non-use of the edit ROM function and so on.
The test area contains data for testing.
The sound area contains actual waveform data.
The edit ROM area contains data for effective use of sound data. For the details, refer to the section of "Edit ROM
Function".
The edit ROM area is not available if the edit ROM is not used.
The Sound data is created using a dedicated tool (Speech LSI Utility).
Configuration of Flash Memory Data (4Mbit)
0x00000
Test area
0x0007F
0x00080
Sound control area (*)
(The number of phrases can be set
with the dedicated tools.)
0x0207F
0x02080
Sound area
Edit ROM area
Depends on creation of sound
data.
0x7FFFF
(*) When the number of phrases is set to 1024
The number of phrases can be set from 1024 to 4096 in 1024 units
using the dedicated tools.
● Playback time and memory capacity
The playback time depends on the number of phrases, memory capacity, sampling frequency, and playback algorithm. The
relationship is shown below. However, this is the playback time when the edit ROM function is not used.
1.024 × (Memory Capacity (kbit)-(0.0625 × Number of Phrases)-0.625)
(sec)
Playback Time =
Sampling frequency (kHz) × bit length
When the number of phrases is 1024, the sampling frequency is 16kHz, and the HQ-ADPCM algorithm is selected, the
playback time will be approximately 81 seconds.
1.024 × (4096(kbit)- (0.0625×1024) - 0.625)
Playback Time =
≒ 81 (sec)
16 (kHz) × 3.2 (bit) (average)
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● Edit ROM Function
With the edit ROM function, multiple phrases can be played in succession. The following functions can be configured using
the edit ROM function:
• Continuous playback: There is no limit to the continuous playback count that can be specified. It depends on the
memory capacity only.
• Silence insertion: 20 to 1024 ms
Using the edit ROM function enables an effective use of the flash memory capacity.
Below is an example of the ROM configuration in the case of using the edit ROM function.
Examples of Phrases Using the Edit ROM Function
A
A
E
E
A
B
C
D
D
Phrase 1
Phrase 2
Phrase 3
Phrase 4
Phrase 5
B
C
D
D
B
D
Silence
E
C
D
Example of Sound data Where the Contents Above Are Stored in ROM
Address control
area
A
B
D
C
E
Editing area
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● Mixing function
Up to 4 channels mixing playback is possible at the same time. Commands with channel designation can set channels
independently.
Restrictions when using Serial Audio Interface(SAI).
When the serial audio interface (SAI) is not used, there is no limitation to the maximum number of mixing in each speech
synthesis algorithm.
<When the serial audio interface (SAI) is not used>
Playable channels
Sampling frequency
(kHz)
Speech synthesis
algorithm
Maximum
(○: Playable/×: Not playable)
mixing number
CH0
CH1
CH2
CH3
4-bit ADPCM2
HQ-ADPCM
All sampling
frequency
8-bit non-linear PCM
8-bit straight PCM
16-bit straight PCM
4
○
○
○
○
When the serial audio interface (SAI) is used, there are some limitations to the maximum number of mixing and playable
channels depending on the sampling frequency.
<When the serial audio interface (SAI) is used>
Playable channels
Sampling frequency
(kHz)
Speech synthesis
algorithm
Maximum
(○: Playable/×: Not playable)
mixing number
CH0
○
CH1
○
CH2
○
CH3
×
4-bit ADPCM2
HQ-ADPCM
○
○
○
×
×
×
×
12.0/24.0/48.0
11.025/22.05/44.1
8-bit non-linear PCM
8-bit straight PCM
16-bit straight PCM
SAI*1
3*2
2
○
○
○
○
○
○
○
○
○
○
○
○
×
4-bit ADPCM2
HQ-ADPCM
8-bit non-linear PCM
8-bit straight PCM
16-bit straight PCM
SAI*1
○
×
○
○
○
○
○
×
○
○
○
○
○
×
○
○
○
○
○
×
○
○
○
○
4*3
8.0/16.0/32.0
2
*1 When both Lch and Rch are used by SAI, two channels are used by SAI. When only one of Lch or Rch is used, one
channel is used for SAI.
*2 When two channels are used in SAI, one channel can be used, and when one channel is used in SAI, two channels can
be used.
*3 When two channels are used in SAI, two channels can be used, and when one channel is used in SAI, three channels
can be used.
When mixing at the sampling frequencies of 8.0/16.0/32.0kHz with using Serial Audio Interface(SAI), HQ-ADPCM cannot
be used.
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Waveform clamp precautions for mixing
When mixing, the clamp may be generated as shown in the figure below due to the calculation of the synthesis. If the clamp
is known to be generated in advance, adjust the volume of each channel by CVOL and PAN commands.
SPVDD
5/6SPVDD
Channel 0
1/6SPVDD
SPGND
SPVDD
5/6SPVDD
Channel 1
1/6SPVDD
SPGND
SPVDD
5/6SPVDD
For channels 0 and 1
Mixing waveform
1/6SPVDD
SPGND
If the result of mixing channels 0 and 1 exceeds from the 1/6SPVDD to 5/6SPVDD level
(as indicated by the broken line), the sound quality may be reduced by clamping.
Waveforms when AVOL is set to 0.0dB.
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Different sampling frequency mixing algorithm
It is not possible to perform channel mixing by a different sampling frequency group.
Note that when channel synthesis is performed on a sampling frequency group other than the selected sampling frequency
group, playback will be faster or slower. When either LEN or REN is set to "1" by the SAI (serial audio interface) SAICH
command, the frequency is fixed to the frequency group of the SAI selected by the SAICON command.
The following table lists the frequency groups that can be used when mixing different sampling frequency groups.
6.4kHz, 12.8kHz, 25.6kHz
8.0kHz, 16.0kHz, 32.0kHz
11.025kHz, 22.05kHz, 44.1kHz
12.0kHz, 24.0kHz, 48.0kHz
10.7kHz, 21.3kHz
... (Group 1)
... (Group 2)
... (Group 3)
... (Group 4)
... (Group 5)
The figure below shows the operation image when a sampling frequency group with different sampling frequency group is
played back.
Playback at
Switch to playback at fs=12.8kHz.
fs=16.0kHz
Channel 1
Channel 2
Playback at fs = 25.6kHz
Figure 1) Case where a phrase is played at a sampling frequency belonging to a different
sampling frequency group during playback on channels 1 and 2
Playback at
fs=16.0kHz
Channel 1
Channel 2
Playback at fs = 25.6kHz
Figure 2) Case where a phrase is played at a sampling frequency belonging to a different
sampling frequency group after playback is finished at the other channel
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● Misoperation detection and failure detection functions
Misoperation detection and failure detection functions can be set with SAFE command. The error detection status can be read
by the RDERR command, and the error bit indicating the error detection status can be cleared by the ERRCL command. In
addition, OUTSTAT command can be used to send whether an error is detected or not to the STATUS1 pin or STATUS2 pin.
For SAFE, RDERR, ERRCL and OUTSTAT commands, refer to the "Command" section.
Misoperation detection and failure detection are shown below.
• Command error detection
• Speaker disconnection detection
• LSI temperature error detection
• SPP pin and SPM pin short detection
• Flash memory error detection
• Watchdog timer overflow detection
• RST counter overflow detection
• Detects the stop of clock input from a crystal resonator or ceramic resonator.
• Detects disconnection/short-circuit of the BCLK.
• Detects disconnection/short-circuit of the LRCLK.
• Detects disconnection/short-circuit of the SAI_IN.
• Mixing number error detection
• Playback sound error detection*1
*1 For details on the playback sound error detection function, refer to How to use the playback sound error detection
function.
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Command error detection
This LSI detects two command errors: phrase number error and command error. Use the WCMEN bit of the SAFE
command to set command error detection.
① Phrase number error.
Set the number of phrases (1024, 2048, 3072 or 4096) to use when creating sound data in the Speech LSI Utility. If you
specify a phrase that exceeds the number of phrases specified by the Speech LSI Utility with the PLAY2 or FADR2
command, an error in the command is detected and the error bit (WCMERR) is set to "1".
② Command error.
This LSI has a function to input various commands and data two-times to prevent malfunction due to noise at the serial
interface pin. The setting of the two-times input mode is made at power-up. Refer to the "PUP command" for the setting
method.
In the two-times input mode, the command data is input two-times in succession, and it is valid only when the input data
matches. If a mismatch occurs during the second data input after the first data input, an error in the command is detected and
the error bit (WCMERR) is set to "1", and the command entered is ignored.
Error bit (WCMERR) can be read with RDERR command. Also, error bit (WCMERR) can be cleared by ERRCL command.
Command
1st
Command
2nd
ERRCL command ERRCL command
1st 2nd
Command
STATUSn*1
(n：1 or 2)
WCMERR
*1 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
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Speaker disconnection detection
Set the speaker disconnection detection with the DCDEN bit of the SAFE command.
The speaker connection status of the SPP and SPM pins is checked when the analog power-up is activated in speaker
amplifier output mode by AMODE command. When the disconnection of the speaker is detected, the error bit (DCDERR) is
set to "1".
Error bit (DCDERR) can be read with RDERR command. Also, error bit (DCDERR) can be cleared by ERRCL command.
AMODE*2
RDERR
ERRCL
Command PUP
DCDEN
SAFE*1
SPVDD
SPP
SPGND
SPVDD
SPM
HiZ
SPGND
STATUSn*3
(n：1 or 2)
“H”: Disconnected “L”: Not disconnected
“H”: Disconnected “L”: Not disconnected
DCDERR
Status
analog power-up
speaker power-up
analog power-down
speaker power-down
Speaker disconnection detection
*1 Set DCDEN = "1"
*2 Analog power-up in speaker amplifier output mode
*3 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
LSI temperature error detection
Set the LSI temperature error detection with the TSDEN bit of the SAFE command.
When the TSDEN bit is set to "1" by the SAFE command, LSI temperature error detection starts. When the TSDEN bit is set
to "0", LSI temperature error detection ends.
When the LSI becomes 130OC or more, the error bit (TSDERR) becomes "1".
Error bit (TSDERR) can be read with RDERR command. Also, error bit (TSDERR) can be cleared by ERRCL command.
Command
PUP
SAFE*1
SAFE*2
RDERR
ERRCL
TSDEN
LSI temperature is over 130 degrees
STATUSn*3
(n：1 or 2)
TSDERR
Error-temperature detection of LSI is operating
*1 Set TSDEN = "1"
*2 Set TSDEN = "0"
*3 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
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SPP pin and SPM pin short detection
Set the SPP pin and SPM pin short detection with the SPDEN bit of the SAFE command.
Detects short circuit between SPP pin and SPM pin, or SPP pin and GND (ground fault), or SPM pin and GND (ground
fault). Can be used when SPVDD ≥ 4.5V. Operation is started by analog power-up in the speaker amplifier output mode by
the AMODE command, and operation is terminated by power-down in the speaker amplifier output mode by the AMODE
command.
After inputting SAFE command, start the analog power-up operation by AMODE command within 10ms.
When a short-circuit is detected, the error bit (SPDERR) is set to "1". When using a class D amplifier with the DAMP bit of
AMODE command set to "1", if the PWM output is fixed to "H" level for 62.5μs or longer, the error bit (SPDERR) is set to
"1". At the same time, the speaker amplifier output pin (SPP/SPM) is forcibly turned off. Read the error bit (SPDERR) with
the RDERR command, end playback, and perform analog power-down with the AMODE command. Then, use ERRCL
command to clear the error bit (SPDERR).
To restart playback, use the AMODE command to analog power-up the speaker amplifier output mode and enter the PLAY
command. However, if shorting to ground continues, the error bit (SPDERR) is set to "1" and the speaker amplifier output pin
(SPP/SPM) is forcibly turned off simultaneously.
Short detection prevents damage to LSI. However, the detection circuit is effective in preventing damage due to
unexpected accidents. It does not support continuous short operation or transient use.
AMODE*2
10ms
RDERR
AMODE*3
ERRCL
AMODE*2
Command
PUP
SAFE*1
SPDEN
SPP
SPVDD
SPGND
SPVDD
SPM
HiZ
Short detection
HiZ
SPGND
STATUSn*4
(n：1 or 2)
SPDERR
Status
analog power-up，speaker power-up
analog power-down
speaker power-down
analog power-up
speaker power-up
analog power-down
speaker power-down
SPP pin and SPM pin short detection
is operating
SPP pin and SPM pin short detection
is operating
*1 Set 1 SPDEN = "1"
*2 Analog power-up in speaker amplifier output mode
*3 Analog power-down in speaker amplifier output mode
*4 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
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Flash memory error detection
Set the Flash memory error detection with the ROMEN bit of the SAFE command. It is possible to detect two kinds of
errors.
① Flash memory read data error
When an error is detected in the read data from the flash memory, the error bit (ROMERR) is set to "1". At the same time,
playback of the corresponding channel is stopped.
If the error bit (ROMERR) is set to "1" after the PUP command and before the PLAY command or START command starts
playback, this LSI may have error at the time of start. In such cases, initialize this LSI by moving the LSI to the power-down
mode by resetting the LSI by the RESETB pin or by using PDWN command.
② Access outside the flash memory address range
If the flash memory is accessed outside the flash memory address range, an error is detected and the error bit (ROMERR) is
set to "1".
At the same time, playback of the corresponding channel is stopped.
Error bit (ROMERR) can be read with RDERR command. Error bit (ROMERR) can be cleared by ERRCL command.
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Watchdog timer overflow detection
A communication error between the HOST MCU and this LSI (disconnection or short-circuit of the MCU command
interface, etc.) can be detected.
Set the watchdog timer overflow detection with WDTEN bit of the SAFE command.
When the detection operation is started, the detection does not stop even if the WDTEN bit is set to "0".
After the detection operation starts, clear the WDT counter with the WDTCL command before the WDT counter
overflows.
When the WDT counter overflows (for the first time), the error bit (WDTERR) is set to "1".
Error bit (WDTERR) can be read with RDERR command. In addition, the error bit (WDTERR) can be cleared by the
ERRCL command after the WDTCL command.
The count time of the WDT counter is 2s the initial value. The counting time can be set to 125ms, 500ms, 2s, 4s. In addition,
it is possible to shift to the command wait state after power-up by the second overflow of the WDT counter.
The count time and the second overflow operation can be set with the dedicated tools (Speech LSI Utility).
SAFE
WDTCL
WDTCL
WDTCL
Command
WDTEN
Count-up
0h Count-up
0h Count-up
0h Count-up
WDT counter
WDT overflow
WDTERR
RSTERR
STATUSn pin *1 n:1 or 2
Signal to shift command
standby state after power-up
Stop WDT
WDT operation
Status
Set WDTEN = "1"
Clears the WDT counter by WDTCL commands.
*1 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
Recommended Operation Flow of Watchdog Timer
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The operation when no WDTCL command is entered is as follows.
< When "Transition to the command standby state after power-up" is selected by the second overflow of the WDT counter >
SAFE
WDTCL
Command
WDTEN
0h
0h
0h
Count-up
Count-up
Count-up
WDT counter
WDT overflow
WDTERR*2
RSTERR*2
STATUSn pin *1 n:1 or 2
Signal to shift command
standby state after power-up
Stop WDT
Status
WDT operation
Stop WDT
Set WDTEN = "1"
Change to RSTERR = "1" on the second overflow of
the WDT counter.
Change to WDTERR = "1"on the
first overflow of the WDT counter.
Shifts to the command standby state after power-up.
*1 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
*2 Even if transferring to the command standby state after power-up by the second overflow of the WDT counter, the
states of WDTERR bit and RSTERR bit remain. The state configured by OUTSTAT command also remains.
< When "Transition to the command standby state after power-up" is not selected by the second overflow of the WDT
counter >
SAFE
WDTCL
Command
WDTEN
0h
0h
Count-up
Count-up
Count-up
0h
Count-up
WDT counter
WDT overflow
WDTERR
RSTERR
STATUSn pin *1 n:1 or 2
Signal to shift command
standby state after power-up
Stop WDT
WDT operation
Status
Set WDTEN = "1"
Change to RSTERR = "1" on the second overflow of the
WDT counter.
Change to WDTERR = "1"on the
first overflow of the WDT counter.
No shifting to command standby state after power-up
*1 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
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RST counter overflow detection
By using the RST counter overflow detection, it is possible to shift the LSI to the command standby state after power-up
after misoperation detection and failure detection occurs.
When the overflow detection of RST counter is set by RSTEN bit of SAFE command, the detection operation will start.
When the detection operation is started, the detection does not stop even if the RSTEN bit is set to "0".
The RST counter starts counting up after misoperation detection and failure detection occurs.
If the RST counter is cleared with the ERRCL command before it overflows, it stops until the next error occurs.
When the RST counter overflows, the error bit (RSTERR) is set to "1".
Error bit (RSTERR) can be read with RDERR command. Also, error bit (RSTERR) can be cleared by ERRCL command.
The count time of the RST-counter is 2s, the initial-value. The counting time can be set to 125ms, 500ms, 2s, or 4s.
Set the counting time and overflow operation (shift to the command standby state after power-up) with the dedicated tools
(Speech LSI Utility).
The operation when RSTEN is set to "1" is as follows.
RDERR
SAFE
ERRCL
Command
RSTEN
Error detection
Count-up
0h
0h
RST counter
Overflow
RSTERR
STATUSn pin *1 n:1 or 2
Signal to shift command
standby state after power-up
Set RSTEN = "1"
Clears the RST-counter with ERRCL commands.
The RST counter stops operating.
*1 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
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The operation when no ERRCL command is entered is as follows.
< When "Transition to the command standby state after power-up" is selected by the overflow of the RST counter >
RDERR
ERRCL
SAFE
Command
RSTEN*2
Error detection
RST counter
Overflow
0h
Count-up
0h
RSTERR*3
STATUSn pin *1*3 n:1 or 2
Signal to shift command
standby state after power-up
Set RSTEN = "1"
The RSTERR bit is set to "1" when the RST-counter overflows.
Shifts to the command standby state after power-up.
*1 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
*2 If transferring to the command standby state after power-up is executed by the overflow of the RST counter, each bit of
SAFE command is cleared. Also, error bits readable by RDERR command are cleared by ERRCL command.
*3 Even if transferring to the command standby state after power-up is executed by the overflow of the RST counter,
error bits readable by RDERR command and the state configured by OUTSTAT command remain.
< When "Transition to the state after PUP command input" is not selected by the overflow of the RST counter >
SAFE
RDERR
ERRCL
Command
RSTEN
Error detection
RST counter
0h
Count-up
0h
Overflow
RSTERR
STATUSn pin *1 n:1 or 2
Signal to shift command
standby state after power-up
Set RSTEN = "1"
The RSTERR bit is set to "1" when the RST-counter overflows.
No shifting to command wait state after power-up
*1 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
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Detects the stop of clock input from a crystal resonator or ceramic resonator.
Set the "Detects the stop of clock input from a crystal resonator or ceramic resonator" with the OSCEN bit of the SAFE
command.
When the clock input from the crystal resonator or the ceramic resonator is stopped, the error bit (OSCERR) is set to "1".
At the same time, the clock backup function is activated and the clock is automatically switched to the RC oscillator circuit
(4.096MHz).
Error bit (OSCERR) can be read with RDERR command. However, if the RDERR command (first byte) is inputted before
the crystal or ceramic resonator stops and switches to RC oscillation (about 500μs), the CBUSYB pin will remain "L".
Therefore, read the command after the CBUSYB pin becomes "H". Also, error bit (OSCERR) can be cleared by ERRCL
command. However, if the clock input from the crystal resonator or the ceramic resonator continues to be stopped while the
OSCEN bit of the SAFE command is "1", the error bit (OSCERR) is set to "1".
When the crystal resonator or the ceramic resonator stops and switches to RC oscillation, playback may become abnormal.
Therefore, after confirming that the error bit (OSCERR) is "1", enter STOP command to stop playback.
If the clock input from the crystal resonator or the ceramic resonator is stopped while the OSCEN bit is "0", the error bit
(OSCERR) does not change to "1", but the clock backup function is activated and the clock backup circuit is automatically
switched to the RC oscillator circuit (4.096MHz).
Command
OSCEN
PUP
SAFE*1
SAFE*2
RDERR
ERRCL
OSC0 pin
OSC1 pin
Normal oscillation state
Oscillation stopped state
Normal oscillation state
Oscillation stopped state
Normal oscillation state
X’tal or
RC oscillation
X’tal or
RC oscillation
X’tal or
Internal clock
Ceramic resonator
（Clock backup state）
Ceramic resonator
（Clock backup state）
Ceramic resonator
STATUSn pin*3
(n：1 or 2)
OSCERR
Error bit (OSCERR) is operating
*1 Set OSCEN = "1"
*2 Set OSCEN = "0"
*3 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
<When the OSCEN bit of SAFE command continue to be "1">
SAFE*1
RDERR
ERRCL
ERRCL
Command
OSCEN
PUP
OSC0 pin
OSC1 pin
Normal oscillation state
Oscillation stopped state
Normal oscillation state
Oscillation stopped state
Normal oscillation state
X’tal or
RC oscillation
X’tal or
RC oscillation
X’tal or
Internal clock
Ceramic resonator
（Clock backup state）
Ceramic resonator
（Clock backup state）
Ceramic resonator
STATUSn pin*2
(n：1 or 2)
OSCERR
Error bit (OSCERR) is operating
*1 Set OSCEN = "1"
*2 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
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Detects disconnection/short circuit of BCLK.
Set the "Detects disconnection/short circuit of BCLK" with the BCKEN bit of the SAFE command.
When the BCLK is stopped, the error bit (BCKERR) is set to "1".
Error bit (BCKERR) can be read with RDERR command. Also, error bit (BCKERR) can be cleared by ERRCL command.
Command
PUP
SAICON*4
SAFE*1
SAFE*2
RDERR
ERRCL
BCKEN
BCLK pin
Input normal
Input stop
Input normal
STATUSn pin*3
(n：1 or 2)
BCKERR
Detects disconnection/short circuit of BCLK is operating
*1 Set BCKEN = "1"
*2 Set BCKEN = "0"
*3 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
*4 Set OUTEN = "1" or INEN = "1"
Detects disconnection/short circuit of LRCLK.
Set the "Detects disconnection/short circuit of LRCLK" with the LRCKEN bit of the SAFE command.
When the LRCLK is stopped, the error bit (LRCKERR) is set to "1".
Error bit (LRCKERR) can be read with RDERR command. Also,error bit (LRCKERR) can be cleared by ERRCL command.
Command
PUP
SAICON*4
SAFE*1
SAFE*2
RDERR
ERRCL
LRCKEN
LRCLK pin
Input normal
Input stop
Input normal
STATUSn pin*3
(n：1 or 2)
LRCKERR
Detects disconnection/short circuit of LRCLK is operating
*1 Set LRCKEN = "1"
*2 Set LRCKEN = "0"
*3 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
*4 Set OUTEN = "1" or INEN = "1"
< When SAFE command LRCKEN bit is "0" >
Disconnection or short circuit of LRCLK is not detected.
When LRCLK is faster than 5%, SAICH is initialized and the recorder stops playing.*5 At that time, the error bit
(LRCKERR) keeps "0".
< When SAFE command LRCKEN bit is "1" >
Disconnection or short circuit of LRCLK is detected.
When LRCLK is faster than 5%, SAICH is initialized and the recorder stops playing.*5 At that time, the error bit
(LRCKERR) changes "1".
*5 : The unit does not recover even if a normal LRCLK is input after stopping playback. Enter MUON command →
SAICH command after inputting a normal LRCLK.
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Detects disconnection/short circuit of SAI_IN.
Set the "Detects disconnection/short circuit of SAI_IN" with the SAIINEN bit of the SAFE command.
When SAI_IN does not change for more than 1.8 seconds (min.), the error bit (SAIINERR) is set to "1".
Error bit (SAIINERR) can be read with RDERR command. Also,error bit (SAIINERR) can be cleared by ERRCL command.
When OUTEN is set to "1" and INEN is set to "0" by the SAICON command, the SAI_IN input is disabled. Therefore, set
SAIINEN to "0".
Command
PUP
SAICON*4
SAFE*1
SAFE*2
RDERR
ERRCL
SAIINEN
SAI_IN pin
Input normal
Input stop
1.8 sec(min.)
Input normal
STATUSn pin*3
(n：1 or 2)
SAIINERR
Detects disconnection/short circuit of SAI_IN is operating
*1 Set SAIINEN = "1"
*2 Set SAIINEN = "0"
*3 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
*4 Set INEN = "1"
Mixing number error detection
When using the serial audio interface (SAI), the sampling frequency limits the maximum number of mixings and playable
channels. If the setting exceeds the limit, it will be detected as a mixing error.
Set the mixing error detection with the MIXEN bit of the SAFE command.
①
When FS3 to FS0 =12/24/48 kHz or 11.025/22.05/44.1kHz is set by the SAICON command, and either LEN or REN is
set to "1" by the SAICH command, specifying channel 3 and inputting the PLAY, PLAY2, START, or MUON command sets
the error bit (MIXERR) to "1". Also, the input command is ignored.
②
If FS3 to FS0=12/24/48kHz or 11.025/22.05/44.1kHz is set by the SAICON command, and if the Rch or Lch side
selects channel 3 (CH3) by the SAICH command and either LEN or REN is set to "1", the error bit (MIXERR) is set to "1".
Also, the entered SAICH command is ignored.
Error bit (MIXERR) can be read with RDERR command. Also, error bit (MIXERR) can be cleared by ERRCL command.
For mixing restriction when using serial audio interface (SAI), refer to “Restrictions when using Serial Audio Interface
(SAI)” in the chapter on mixing function.
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Playback sound error detection
The playback sound error detection function detects error when the sound being played back by this LSI sounds different
from the expected sound due to distortion, etc.
The error is detected by fetching the output of the speaker of this LSI from inside or outside of the LSI and comparing it with
the playback data.
Connect the FB1 and the FB2 to the SPP and SPM to detect errors in the playback sound outside the LSI.
For details on the playback sound error detection function, refer to How to use the playback sound error detection function.
Speaker
AMP
SPP
SPM
Digital Filter
Volume
DAC
Sound Check
Expect Data
Error
Compare
FB2
FB1
Feed Back Data
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● Flash memory rewrite function
The flash memory can be rewritten in the following two ways.
SOUND LSI
IRON
①CPU command
②Flash・memory
interface
interface
CSB
SCK
SI
IRCSB
IRSCK
IRSI
SO
IRSO
①
Rewrite using the clock synchronous serial interface of the MCU command interface
By using the CSB, SCK, SI and SO pins, which are clock synchronous serial interfaces of the MCU command interface
the flash memory can be rewritten. When the PUP command and FDIRECT command are entered with the IRON pin set to
"L", direct access to the flash memory is enabled from the CSB, SCK, SI and SO pins.
When returning to the normal mode, insert a reset to initialize (RESETB pin is “L” level.) or shut off the power.
PUP command
FDIRECT command
1st byte
FDIRECT command
2nd byte
Direct access to the flash memory
is enabled
IRON
CSB
SCK
SI
“L”
tPUP
tCB1
tCB1
CBUSYB
Status
Normal mode
Flash memory access mode
For the PUP command, refer to the "PUP command" in the "Command" section. For the FDIRECT command, refer to the
"FDIRECT command" in the "Command" section.
②
Rewrite using flash memory interface
The flash memory can be rewritten using the IRON, IRCSB, IRSCK, IRSI and IRSO pins that is the flash memory interface.
When the PUP command and FDIRECT command are entered with the IRON pin set to "H", direct access to the flash
memory is enabled from the IRCSB, IRSCK, IRSI and IRSO pins.
When returning to the normal mode, insert a reset to initialize (RESETB pin is “L” level.) or shut off the power.
PUP command
FDIRECT command FDIRECT command
1st byte 2nd byte
Direct access to the flash memory
is enabled
IRON
IRCSB
IRSCK
IRSI
tPUP
tCB1
tCB1
CBUSYB
Status
Normal mode
Flash memory access mode
For the PUP command, refer to the "PUP command" in the "Command" section. For the FDIRECT command, refer to the
"FDIRECTcommand" in the "Command" section.
The Chip Erase, Status Read, Program and Read of the flash memory are described on the next page.
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● Chip Erase
06h
C7h
CSB/
IRCSB
SCK/
IRSCK
SI/
IRSI
Confirm that BUSY is "0" by Status Read after Chip Erase.
● Status Read
05h
CSB/
IRCSB
SCK/
IRSCK
SI/
IRSI
BUSY
1:erase/program executing
0:erase/program completed
SO/
IRSO
● Program
06h
02h
24-bit Address
CSB/
IRCSB
SCK/
IRSCK
2 2 2 2 1 1 1 1
3 2 1 0 9 8 7 6
SI/
7 6 5 4 3 2 1 0
IRSI
Data Byte 1
Data Byte 2
Data Byte 255 Data Byte 256
CSB/
IRCSB
SCK/
IRSCK
SI/
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
IRSI
Confirm that BUSY is "0" by Status Read after Program.
● Read
03h
24-bit Address
Data Out 1
Data Out 2
CSB/
IRCSB
SCK/
IRSCK
2 2 2 2 1 1 1 1
3 2 1 0 9 8 7 6
SI/
7 6 5 4 3 2 1 0
IRSI
SO/
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
IRSO
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■ Timing chart
● Common
Power-on timing
DVDD
SPVDD
SPOVDD
90%
IOVDD
RESETBVIH
tRST
VIL
Status
Power-down
After the power is turned on, the device enters the power-down state.
Start up in the order of DVDD, SPVDD and IOVDD or DVDD, IOVDD and SPVDD
.
It is possible that the DVDD and SPVDD start up at the same time and then the IOVDD starts up, or the DVDD
and IOVDD starts up at the same time and then the SPVDD starts up.
The DVDD, SPVDD and IOVDD can also start up at the same time.
tRST is specified based on the last power-on pin.
Be sure to input "L" to the RESETB pin before inputting the first command after power-on.
Be sure to enter "L" at the RESETB pin when the DVDD is below the (recommended) operating voltage range.
Power-off timing
90%
DVDD
SPVDD
SPOVDD
IOVDD
Status
Power-down
Shut down in the order of IOVDD, SPVDD, and DVDD or SPVDD, IOVDD, and DVDD
.
It is possible that the IOVDD shuts down and then the SPVDD and DVDD shuts down at the same time,
or the SPVDD shuts down and then the IOVDD and DVDD shut down at the same time.
The DVDD, SPVDD and IOVDD can also shut down at the same time.
Shut down each power supply after changing to the power down status with PDWN commands.
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Reset input timing
VIH
VIL
RESETB
XT/XTB
tRST
Oscillating
Oscillation stopped
VDDL/VDDR
SG
GND
GND
SPM
SPP
Hi-Z
GND
Reset
Power-down
During playback
Status
The same timing is applied when a reset is input during command standby.
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SAI interface timing (slave)
VIH
LRCLK
VIL
tH_LRCLK tSU_LRCLK tC_BCLK
VIH
BCLK
VIL
tD_SDO
tHW_BCLK tLW_BCLK
VIH
SAI_OUT
VIL
VIH
LRCLK
VIL
tH_LRCLK tSU_LRCLK tC_BCLK
VIH
BCLK
VIL
tSU_SDI
tHW_BCLK tLW_BCLK
VIH
SAI_IN
VIL
tH_SDI
Flash memory interface timing
VIH
IRON
VIL
tEIRON
tIRONH
VIH
IRCSB
VIL
tISCKF
tISCKL
tICSH
tICSS
VIH
IRSCK
VIL
tIDIS tIDIH
tISCKH
VIH
IRSI
VIL
tIFHL
tIFLH
tIDOD
VOH
IRSO
VOL
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● Clock synchronous serial
Clock Synchronous Serial Interface Timing (SCK Initial Value = "H" Level)
VIH
tEIRON
tIRONH
IRON
VIL
VIH
CSB
VIL
tCSH
tSCKS tESCK
tSCKH
VIH
VIL
SCK
tDIS
tDIH
tSCKL
VIH
VIL
SI
tDOH
tDOD
tDOZ
VIH
VIL
SO
tDBSY
CBUSYB VOH
VOL
Clock Synchronous Serial Interface Timing (SCK Initial Value = "L" Level)
VIH
tEIRON
tIRONS
IRON
VIL
VIH
CSB
VIL
tCSH
tSCKS tESCK
tSCKL
VIH
VIL
SCK
tDIS
tDIH
tSCKH
VIH
VIL
SI
tDOH
tDOD
tDOZ
VIH
VIL
SO
tDBSY
CBUSYB VOH
VOL
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Power-up timing
CSB
SCK
SI
tPUP
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
RC
oscillation
(internal)
XT・XTB*1
Oscillation stopped
Oscillation stopped
Oscillating
Power up
Oscillating
VDDL
VDDR
DGND
Power down
Oscillation stabilized
Awaiting command
Status
*1 When using a crystal or ceramic resonator
Power-down timing
CSB
SCK
SI
tPD
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Oscillation
stopped
RC oscillation
(internal)
Oscillating
Oscillation
stopped
XT・XTB*1
Oscillating
Power up
VDDL
VDDR
DGND
Command is being
processed
Awaiting command
Power down
Status
*1 When using a crystal or ceramic resonator
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Speaker amplifier power-up timing (DAMP bit = "0", AEN1 bit = "0", AEN0 bit = "0" → "1")
AMODE command AMODE command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tPUPA1
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
1/2SPVDD
1/2SPVDD
LINE output
(internal)
GND
Hi-Z
SPM
GND
SPP
Command standby
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
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Line amplifier power-up timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "0" → "1", AEN0 bit = "0")
AMODE command AMODE command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tPUPA2
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
SPP
GND
GND
LOUT
Status
Awaiting command
Awaiting command
POP noise suppressed
Awaiting command
Command is being processed
Command is being processed
Line amplifier power-up timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "0" → "1", AEN0 bit = "0")
AMODE command AMODE command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tPUPA3
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
GND
GND
SPP
LOUT
Status
Awaiting command
Awaiting command
Awaiting command
Command is being processed
Command is being processed
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Line amplifier power-up timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "0" → "1", AEN0 bit = "0" → "1")
AMODE command AMODE command
1st byte 2nd byte
CSB
SCK
SI
tCB1
tPUPA2
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
SPP
GND
GND
1/2SPVDD
LOUT
Status
Awaiting command
Awaiting command
POP noise suppressed
Awaiting command
Command is being processed
Command is being processed
Line amplifier power-up timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "0" → "1", AEN0 bit = "0" → "1")
AMODE command AMODE command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tPUPA3
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
GND
GND
SPP
1/2SPVDD
LOUT
Status
Awaiting command
Awaiting command
Awaiting command
Command is being processed
Command is being processed
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Speaker amplifier power-down timing (DAMP bit = "0", AEN1 bit = "0", AEN0 bit = "1" → "0")
AMODE command AMODE command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tPDA1
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
LINE output
(internal)
GND
1/2SPVDD
1/2SPVDD
Hi-Z
SPM
SPP
GND
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
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Line amplifier power-down timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "1" → "0", AEN0 bit = "0")
AMODE command AMODE command
1st byte 2nd byte
CSB
SCK
SI
tCB1
tPDA2
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
SPP
GND
LOUT
Status
GND
Awaiting command
Awaiting command
POP noise suppressed
Awaiting command
Command is being processed
Command is being processed
Line amplifier power-down timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "1" → "0", AEN0 bit = "0")
AMODE command AMODE command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tPDA3
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
SPP
LOUT
Status
GND
GND
Command is being processed
Awaiting command
Awaiting command
Awaiting command
Command is being processed
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Line amplifier power-down timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "1" → "0", AEN0 bit = "1" → "0")
AMODE command AMODE command
1st byte 2nd byte
CSB
SCK
SI
tCB1
tPDA2
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
SPP
GND
1/2SPVDD
LOUT
Status
GND
Awaiting command
Awaiting command
POP noise suppressed
Awaiting command
Command is being processed
Command is being processed
Line amplifier power-down timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "1" → "0, AEN0 bit = "1" → "0")
AMODE command AMODE command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tPDA3
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
SPP
LOUT
Status
GND
1/2SPVDD
GND
Command is being processed
Awaiting command
Awaiting command
Awaiting command
Command is being processed
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FDIRECT command timing
FDIRECT command
1st byte
FDIRECT command
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYBVOH
VOL
Normal mode
（Awaiting command）
Normal mode
Flash memory access
Status
（Awaiting command）
Command is being processed
Command is being processed
WDTCL command timing
WDTCL command
CSB
SCK
SI
tCB1
CBUSYBVOH
VOL
Normal mode
Normal mode
Status
（Awaiting command）
（Awaiting command）
Command is being processed
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Change volume timing by AVOL command
AVOL command
1st byte
AVOL command
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
Speaker amplifier volume setting by AVOL commands is valid only when Class AB speaker amplifier is used.
When a Class D speaker amplifier is used, the setting value is ignored and +0.0dB is selected.
FADE command timing
FADE command
1st byte
FADE command
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
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Setting playback phrases using FADR command
FADR command
1st byte
FADR command
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
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Playback start timing by PLAY command
PLAY command
1st byte
PLAY command
2nd byte
CSB
SCK
SI
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
*1
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Address is being
controlled
Awaiting command
Awaiting command
Playing
Awaiting command
Status
Command is being processed
When the first byte of the PLAY command is input, the device waits for the input of the second byte after the command
processing time (tCB1). When the second byte is entered, the address data of the phrase to be played after the command
processing time (tCB2) is read from the flash memory.
When the phrase address data is read, the specified phrase starts playback, and when playback is completed, the BUSYB
signal of the playback channel becomes "H" level.
The NCR signal goes to the "L" level during playback preparation, and goes to the "H" level when playback preparation is
completed and playback starts. When the NCR signal of the playback channel becomes "H" level, the PLAY command of the
next phrase to be played can be accepted.
*1 The length of the "L" interval in the BUSYBn is (tCB2+ sound production time).
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Continuous playback timing by PLAY command
PLAY command
2nd byte
PLAY command PLAY command
1st byte 2nd byte
CSB
SCK
SI
tcm
tCB1
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Awaiting command
Playing phrase 1
Playing phrase 2
Status
Address is being controlled
When making continuous playbacks, input the PLAY command for the next phrases within the specified time period (tcm)
after the NCR of the corresponding channel changes to "H" level, so that the LSI playbacks the next phrases without silence
sounds after the current phrase playback ends.
When the playback is not continuous, input the PLAY command for the next phrases after confirming the playback is
completed by RDSTAT command, etc.
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Playback start timing by START command
START command
CSB
SCK
SI
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
*1
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Address is being
controlled
Awaiting command
Playing
Awaiting command
Status
When the START command is input, the address data of the phrase to be played after the command processing time (tCB2) is
read from the flash memory. When the phrase address data is read, the specified phrase starts playback, and when playback is
completed, the BUSYB signal of the playback channel becomes "H" level.
The NCR signal goes to the "L" level during playback preparation, and goes to the "H" level when playback preparation is
completed and playback starts. When the NCR signal of the playback channel becomes "H" level, the START command of
the next phrase to be played can be accepted.
*1 The length of the "L" interval in the BUSYBn is (tCB2+ sound production time).
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Continuous playback timing by START command
FADR command
1st byte 2nd byte
START command
START command
CSB
SCK
SI
tcm
tCB1
tCB1
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Awaiting command
Playing phrase 1
Playing phrase 2
Status
Address is being controlled
When making continuous playbacks, input the START command for the next phrases within the specified time period (tcm)
after the NCR of the corresponding channel changes to "H" level, so that the LSI plays back the next phrases without silence
sounds after the current phrase playback ends.
When the playback is not continuous, input the START command for the next phrases after confirming the playback is
completed by RDSTAT command, etc.
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STOP command (when the FAD bit is "L")
STOP command
CSB
SCK
SI
tCB3
VOH
CBUSYB
VOL
NCRn
(internal)
fs×1cycle
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Playing
Awaiting command
Status
Command is being processed
STOP command (when the FAD bit is "H")
STOP command
CSB
SCK
SI
tCB3
VOH
CBUSYB
VOL
NCRn
(internal)
Changed by sampling
frequency*1
BUSYBn
(internal)
1/2SPVDD
1/2SPVDD
SPM
SPP
Playing
Awaiting command
Status
Command is being processed
*1 The duration of the BUSYBn varies depending on the sampling frequency groups.
At 10.7/21.3kHz
: Approx. 3ms
: Approx. 5ms
: Approx. 4ms
: Approx. 2.9ms
: Approx. 2.7ms
At 6.4/12.8/25.6kHz
At 8.0/16.0/32.0kHz
At 11.025/22.05/44.1kHz
At 12.0/24.0/48.0kHz
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Playback start timing by MUON command
MUON command
1st byte
MUON command
2nd byte
CSB
SCK
SI
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
*1
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Address is being
controlled
Awaiting command
Awaiting command
Playing
Awaiting command
Status
Command is being processed
When the first byte of the MUON command is input, the device waits for the input of the second byte after the command
processing time (tCB1). When the second byte is entered, the silence time is calculated after the command processing time
(tCB2). When the calculation of the silence duration is completed, the calculated silence is played back, and when the
playback is completed, the BUSYB signals of the playback channels become "H" level.
The NCR signal becomes "L" level during playback preparation, and becomes "H" level when playback preparation is
completed and playback starts. When the NCR signal of the playback channel becomes "H" level, the PLAY command of the
next phrase to be played can be accepted.
*1 The length of the "L" interval of the BUSYBn is (tCB2+ silence playback time).
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Continuous playback timing by MUON command
PLAY command
2nd byte
MUON command
1st byte 2nd byte
PLAY command
1st byte 2nd byte
CSB
SCK
SI
tcm
tCB1
tcm
tCB1
tCB1
tCB1
tCB2
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Awaiting command
Playing
Silence is being inserted
Playing
Status
Address is being controlled
Waiting for silence insertion to be finished
After the PLAY command is input, the CBUSYB signal and NCR signal change to "H" level when the address management
of phrase 1 is completed and start playing back. Input the MUON command after the CBUSYB signal changed to "H" level.
After the MUON command is received, the LSI is in a state waiting for the end of playback of phrase 1 and the NCR signal
remains "L" level until the end of playback.
When the playback of phrase 1 ends, playback of the silence sound starts and the NCR signal changes to "H" level. After the
NCR signal of the corresponding channel changes to "H" level, send the PLAY command again to playback the phrase 1.
The NCR signal changes to "L" level again after the PLAY command is received and the LSI is in a state waiting for the end
of the playback of silence sound.
After ending the playback of silence sound and starting the playback of phrase 1, the NCR signal changes to "H" level and
LSI is in state that accepts the next PLAY or MUON command.
The BUSYB signal remains "L" level until the sequence of playback is completed.
When making continuous playbacks, input the MUON/PLAY/START command for the next phrases within 10ms (tcm)
after the NCR of the corresponding channel changes to "H" level.
When the playback is not continuous, input the MUON/PLAY/START command for the next phrases after confirming the
playback is completed by RDSTAT command, etc.
69/176
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Repeat playback setting/release timing by SLOOP/CLOOP command
SLOOP command
CLOOP command
PLAY command
nd byte
2
CSB
SCK
SI
tcm
tCB1
tCB1
tCB2
VOH
VOL
CBUSYB
NCRn
(internal)
BUSYBn
(internal)
1/2SPVDD
1/2SPVDD
SPM
SPP
Awaiting command
1st Repeat playing
2nd Repeat playing
Awaiting command
Status
Address is being controlled
Address is being controlled
Command is being processed
The SLOOP command is valid only during playback. After the PLAY command is input, input the SLOOP command within
the specified period (tcm) after the NCR of the corresponding channel becomes "H" level. This enables the SLOOP command
and repeats playback. While the repeat playback mode is set, the NCR signal is "L" level.
70/176
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ML22Q53X
Change volume timing by CVOL command
CVOL command
1st byte
CVOL command
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
*1
Volume transition time
SPM
SPP
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
*1 Refer to the "FADE command" for more information on volume-transition time.
RDSTAT command timing
RDSTAT command
1st byte
2nd byte
CSB
SCK
SI
Hi-Z
Hi-Z
tCB1
SO
CBUSYB VOH
VOL
NCR
(internal)
BUSYB
(internal)
Under
reading
Awaiting command
Awaiting command
Status
Command is being processed
71/176
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RDVER command timing
RDVER command
1st byte
2nd byte
CSB
SCK
SI
Hi-Z
Hi-Z
tCB1
SO
CBUSYB VOH
VOL
NCR
(internal)
BUSYB
(internal)
Under
reading
Awaiting command
Awaiting command
Status
Command is being processed
RDERR command timing
RDERR command
1st byte
2nd byte
CSB
SCK
SI
Hi-Z
Hi-Z
tCB1
SO
CBUSYB VOH
VOL
NCR
(internal)
BUSYB
(internal)
Under
reading
Awaiting command
Awaiting command
Status
Command is being processed
72/176
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OUTSTAT command timing
OUTSTAT command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tCB1
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
ERR
(internal)
STATUS1
STATUS2
STATUS2
ch0 NCR output
ch1 BUSYB output
output status
SAFE command timing
SAFE command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tCB1
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
Awaiting
command
Awaiting
command
Awaiting command
Status
Command is being processed
Command is being processed
ERRCL command timing
ERRCL command
CSB
SCK
SI
tCB1
CBUSYBVOH
VOL
RDERR
00h
ERR register
(internal)
20h
00h
73/176
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Setting timing of playback phrases by FADR2 command
FADR2 command
1st byte
FADR2 command FADR2 command
2nd byte
3rd byte
CSB
SCK
SI
tCB1
tCB1
tCB1
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
Command is being processed
Playback start timing by PLAY2 command
PLAY2 command PLAY2 command PLAY2 command
1st byte
2nd byte
3rd byte
CSB
SCK
SI
tCB1
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
*1
BUSYBn
(internal)
1/2VDD
SPM
1/2VDD
SPP
Address is being
controlled
Awaiting command
Awaiting command
Awaiting command
Playing
Awaiting command
Status
Command is being processed
Command is being processed
When the first byte of the PLAY command is input, the 2nd byte waits for input after the command processing time (tCB1),
and when the 2nd byte is input, the 3rd byte waits for input after the command processing time (tCB1). When the third byte is
entered, the address data of the phrase to be played after the command processing time (tCB2) is read from the flash memory.
When the phrase address data is read, the specified phrase is played back, and when playback is completed, the BUSYB
signal of the playback channel becomes "H" level.
The NCR signal goes to the "L" level during playback preparation, and goes to the "H" level when playback preparation is
completed and playback starts. When the NCR signal of the playback channel becomes "H" level, the PLAY command of the
next phrase to be played can be accepted.
*1 The length of the "L" interval in the BUSYBn is (tCB2+ sound production time).
74/176
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ML22Q53X
Change volume timing by PAN command
PAN command
1st byte
PAN command
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
SAICH command timing
SAICH command
1st byte
SAICH command
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
75/176
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SAICON command timing
SAICON command SAICON command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
SAITCON command timing
SAITCON command SAITCON command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
76/176
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SAIRCON command timing
SAIRCON command SAIRCON command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
SAIMOD command timing
SAIMOD command SAIMOD command
1st byte
2nd byte
CSB
SCK
SI
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
77/176
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ML22Q53X
Setting timing by playback sound error detection command
Command
1st byte
Command
2nd byte
Command
3rd byte
CSB
SCK
SI
tCB1
tCB1
tCB1
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
78/176
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ML22Q53X
● I2C Interface (Slave)
I2C Interface Timing
Start
Condition
Restart
Condition
Stop
Condition
SDA
SCL
tBUF
tSU:STO
tHD:STA
tLOW tHIGH
tSU:STA tHD:STA
tSU:DAT tHD:DAT
79/176
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ML22Q53X
Power-up timing
SCL
SDA
Slave Address
WA
A
tPUP
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Oscillation stopped
Oscillation stopped
Oscillating
(RinCteOrnscailll)ation
XT・XTB*1
Oscillating
VDDL
VDDR
Power up
DGND
Power down
Oscillation stabilized
Awaiting command
Status
*1 When using a crystal or ceramic resonator
Power-down timing
SCL
SDA
Slave Address
WA
A
tPD
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
RC Oscillation
(internal)
Oscillating
Oscillating
Oscillation stopped
XT・XTB*1
Oscillation stopped
VDDL
VDDR
Power up
DGND
Command is being
processed
Command standby
Power down
Status
*1 When using a crystal or ceramic resonator
80/176
FEDL22Q53X-06
ML22Q53X
Speaker amplifier power-up timing (DAMP bit = "0", AEN1 bit = "0", AEN0 bit = "0" → "1")
AMODE command
1st byte
AMODE command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPUPA1
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
1/2SPVDD
1/2SPVDD
LINE output GND
(internal)
Hi-Z
SPM
GND
SPP
Command is being
processed
Command standby
Command standby
Command standby
Status
Command is being processed
81/176
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ML22Q53X
Line amplifier power-up timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "0" → "1", AEN0 bit = "0")
AMODE command
1st byte
AMODE command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPUPA2
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
SPP
GND
GND
LOUT
Status
Awaiting command
Command is being processed
Awaiting command
POP noise suppressed
Awaiting command
Command is being processed
Line amplifier power-up timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "0" → "1", AEN0 bit = "0")
AMODE command AMODE command
1st byte
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPUPA3
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
SPP
GND
GND
LOUT
Status
Command is being
processed
Awaiting command
Command is being processed
Awaiting command
Awaiting command
82/176
FEDL22Q53X-06
ML22Q53X
Line amplifier power-up timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "0" → "1", AEN0 bit = "0" → "1")
AMODE command AMODE command
1st byte 2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPUPA2
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
SPP
GND
GND
1/2SPVDD
LOUT
Status
Awaiting command
Command is being processed
Awaiting command
Command is being processed
POP noise suppressed
Awaiting command
Line amplifier power-up timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "0" → "1", AEN0 bit = "0" → "1")
AMODE command AMODE command
1st byte
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPUPA3
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
SPP
GND
GND
1/2SPVDD
LOUT
Status
Command is being
processed
Awaiting command
Command is being processed
Awaiting command
Awaiting command
83/176
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ML22Q53X
Speaker amplifier power-down timing (DAMP bit = "0", AEN1 bit = "0", AEN0 bit = "1" → "0")
AMODE command AMODE command
1st byte
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPDA1
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
LINE output
(internal)
GND
1/2SPVDD
1/2SPVDD
Hi-Z
SPM
SPP
GND
Command is being
processed
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
84/176
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ML22Q53X
Line amplifier power-down timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "1" → "0", AEN0 bit = "0")
AMODE command AMODE command
1st byte 2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPDA2
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
SPP
GND
GND
LOUT
Status
Awaiting command
Command is being processed
Awaiting command
Command is being processed
POP noise suppressed
Awaiting command
Line amplifier power-down timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "1" → "0", AEN0 bit = "0")
AMODE command AMODE command
1st byte
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPDA3
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
1/2SPVDD
SPP
LOUT
Status
GND
GND
Command is being
processed
Awaiting command
Command is being processed
Awaiting command
Awaiting command
85/176
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ML22Q53X
Line amplifier power-down timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "1" → "0", AEN0 bit = "1" → "0")
AMODE command
1st byte
AMODE command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPDA2
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
SPP
GND
1/2SPVDD
GND
LOUT
Status
Awaiting command
Awaiting command
POP noise suppressed
Awaiting command
Command is being processed
Command is being processed
Line amplifier power-down timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "1" → "0", AEN0 bit = "1" → "0")
AMODE command AMODE command
1st byte
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tPDA3
VOH
VOL
CBUSYB
NCR
(internal)
BUSYB
(internal)
SPP
LOUT
Status
GND
1/2SPVDD
GND
Command is being
processed
Awaiting command
Awaiting command
Awaiting command
Command is being processed
86/176
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ML22Q53X
WDTCL command timing
WDTCL command
SCL
SDA
Slave Address
WA
A
tCB1
CBUSYBVOH
VOL
Normal mode（Awaiting command）
Awaiting command
Status
Command is being processed
87/176
FEDL22Q53X-06
ML22Q53X
Change volume timing by AVOL command
AVOL command
1st byte
AVOL command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
Speaker amplifier volume setting by AVOL commands is valid only when Class AB speaker amplifier is used.
When a Class D speaker amplifier is used, the setting value is ignored and +0.0dB is selected.
FADE command timing
FADE command
1st byte
FADE command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
88/176
FEDL22Q53X-06
ML22Q53X
Setting playback phrases using FADR command
FADR command
1st byte
FADR command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
89/176
FEDL22Q53X-06
ML22Q53X
Playback start timing by PLAY command
PLAY command
1st byte
PLAY command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
*1
BUSYBn
(internal)
1/2SPVDD
1/2SPVDD
SPM
SPP
Address is being
controlled
Awaiting command
Awaiting command
Playing
Awaiting command
Status
Command is being processed
When the first byte of the PLAY command is input, the device waits for the input of the second byte after the command
processing time (tCB1). When the second byte is entered, the address data of the phrase to be played after the command
processing time (tCB2) is read from the flash memory.
When the phrase address data is read, the specified phrase is played back, and when playback is completed, the BUSYB
signal of the playback channel becomes "H" level.
The NCR signal goes to the "L" level during playback preparation, and goes to the "H" level when playback preparation is
completed and playback starts. When the NCR signal of the playback channel becomes "H" level, the PLAY command of the
next phrase to be played can be accepted.
*1 The length of the "L" interval in the BUSYBn is (tCB2+ sound production time).
90/176
FEDL22Q53X-06
ML22Q53X
Continuous playback timing by PLAY command
PLAY command
2nd byte
PLAY command PLAY command
1st byte 2nd byte
SCL
tcm
SDA
Slave Address
A
WA
A
A
tCB1
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Awaiting command
Playing phrase 1
Playing phrase 2
Status
Address is being controlled
When making continuous playbacks, input the PLAY command for the next phrases within the specified time period (tcm)
after the NCR of the corresponding channel changes to "H" level, so that the LSI plays back the next phrases without silence
sounds after the current phrase playback ends.
When the playback is not continuous, input the PLAY command for the next phrases after confirming the playback is
completed by RDSTAT command, etc.
91/176
FEDL22Q53X-06
ML22Q53X
Playback start timing by START command
START command
SCL
SDA
Slave Address
WA
A
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
*1
BUSYBn
(internal)
1/2SPVDD
1/2SPVDD
SPM
SPP
Address is being
controlled
Awaiting command
Playing
Awaiting command
Status
When the START command is input, the address data of the phrase to be played after the command processing time (tCB2) is
read from the flash memory. When the phrase address data is read, the specified phrase is played back, and when playback is
completed, the BUSYB signal of the playback channel becomes "H" level.
The NCR signal goes to the "L" level during playback preparation, and goes to the "H" level when playback preparation is
completed and playback starts. When the NCR signal of the playback channel becomes "H" level, the START command of
the next phrase to be played can be accepted.
*1 The length of the "L" interval in the BUSYBn is (tCB2+ sound production time).
92/176
FEDL22Q53X-06
ML22Q53X
Continuous playback timing by START command
FADR command
1st byte 2nd byte
START command
SCL
START command
tcm
SDA
Slave Address
A
WA
A
A
A
tCB1
tCB1
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
1/2SPVDD
1/2SPVDD
SPM
SPP
Awaiting command
Playing phrase 1
Playing phrase 2
Status
Address is being controlled
When making continuous playbacks, input the START command for the next phrases within the specified time period (tcm)
after the NCR of the corresponding channel changes to "H" level, so that the LSI plays back the next phrases without silence
sounds after the current phrase playback ends.
When the playback is not continuous, input the START command for the next phrases after confirming the playback is
completed by RDSTAT command, etc.
93/176
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ML22Q53X
STOP command (when the FAD bit is "L")
STOP command
SCL
SDA
Slave Address
WA
A
tCB3
VOH
VOL
CBUSYB
NCRn
(internal)
fs×1cycle
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Playing
Awaiting command
Status
Command is being processed
STOP command (when the FAD bit is "H")
STOP command
SCL
SDA
Slave Address
WA
A
tCB3
VOH
VOL
CBUSYB
NCRn
(internal)
Changed by sampling
frequency*1
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Playing
Awaiting command
Status
Command is being processed
*1 The duration of the BUSYBn varies depending on the sampling frequency groups.
At 10.7/21.3kHz
: Approx. 3ms
: Approx. 5ms
: Approx. 4ms
: Approx. 2.9ms
: Approx. 2.7ms
At 6.4/12.8/25.6kHz
At 8.0/16.0/32.0kHz
At 11.025/22.05/44.1kHz
At 12.0/24.0/48.0kHz
94/176
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Playback start timing by MUON command
MUON command
1st byte
MUON command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
*1
BUSYBn
(internal)
1/2SPVDD
1/2SPVDD
SPM
SPP
Address is being
controlled
Awaiting command
Awaiting command
Playing
Awaiting command
Status
Command is being processed
When the first byte of the MUON command is input, the device waits for the input of the second byte after the command
processing time (tCB1). When the second byte is entered, the silence time is calculated after the command processing time
(tCB2). When the calculation of the silence duration is completed, the calculated silence is played back, and when the
playback is completed, the BUSYB signals of the playback channels become "H" level.
The NCR signal becomes "L" level during playback preparation, and becomes "H" level when playback preparation is
completed and playback starts. When the NCR signal of the playback channel becomes "H" level, the PLAY command of the
next phrase to be played can be accepted.
*1 The length of the "L" interval of the BUSYBn is (tCB2+ silence playback time).
95/176
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ML22Q53X
Continuous playback timing by MUON command
PLAY command
2nd byte
MUON command
1st byte 2nd byte
PLAY command
1st byte 2nd byte
SCL
SDA
tcm
tcm
A
A
A
A
SlaveAddress WA
SlaveAddress WA
A
tCB1
tCB1
tCB1
tCB1
tCB2
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
1/2SPVDD
SPM
1/2SPVDD
SPP
Awaiting command
Playing
Silence is being inserted
Playing
Status
Address is being controlled
Waiting for silence insertion to be finished
After the PLAY command is input, the CBUSYB signal and NCR signal change to "H" level when the address management
of phrase 1 is completed and start playing back. Input the MUON command after the CBUSYB signal changed to "H" level.
After the MUON command is received, the LSI is in a state waiting for the end of playback of phrase 1 and the NCR signal
remains "L" level until the end of playback.
When the playback of phrase 1 ends, playback of the silence sound starts and the NCR signal changes to "H" level. After the
NCR signal of the corresponding channel changes to "H" level, send the PLAY command again to playback the phrase 1.
The NCR signal changes to "L" level again after the PLAY command is received and the LSI is in a state waiting for the end
of the playback of silence sound.
After ending the playback of silence sound and starting the playback of phrase 1, the NCR signal changes to "H" level and
LSI is in state that accepts the next PLAY or MUON command.
The BUSYB signal remains "L" level until the sequence of playback is completed.
When making continuous playbacks, input the MUON/PLAY/START command for the next phrases within 10ms (tcm) after
the NCR of the corresponding channel changes to "H" level.
When the playback is not continuous, input the MUON/PLAY/START command for the next phrases after confirming the
playback is completed by RDSTAT command, etc.
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Repeat playback setting/release timing by SLOOP/CLOOP command
SLOOP command
CLOOP command
PLAY command
2nd byte
SCL
SDA
tcm
A
A
A
SlaveAddress WA
SlaveAddress WA
tCB1
tCB1
tCB2
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
1/2SPVDD
1/2SPVDD
SPM
SPP
Awaiting command
1st Repeat playing
2nd Repeat playing
Awaiting command
Status
Address is being controlled
Address is being controlled
Command is being processed
The SLOOP command is valid only during playback. After the PLAY command is input, input the SLOOP command within
the specified period (tcm) after the NCR of the corresponding channel becomes "H" level. This enables the SLOOP command
and repeats playback. While the repeat playback mode is set, the NCR signal is "L" level.
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Change volume timing by CVOL command
CVOL command
1st byte
CVOL command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
*1
Volume transition time
SPM
SPP
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
*1 Refer to the "FADE command" for more information on volume-transition time.
RDSTAT command timing
RDSTAT command（Write）
RDSTAT command（Read）
1st byte
2nd byte
SCL
SDA
A
SlaveAddress
A
R
A
SlaveAddress WA
tCB1
CBUSYBVOH
VOL
NCR
(internal)
BUSYB
(internal)
Awaiting
command
Awaiting command
Under reading
Awaiting command
Status
Command is being processed
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RDVER command timing
RDVER command（Write）
1st byte
RDVER command（Read）
2nd byte
SCL
SDA
A
SlaveAddress
A
R
A
SlaveAddress WA
tCB1
CBUSYBVOH
VOL
NCR
(internal)
BUSYB
(internal)
Awaiting
command
Awaiting command
Under reading
Awaiting command
Status
Command is being processed
RDERR command timing
RDERR command（Write）
RDERR command（Read）
1st byte
2nd byte
SCL
SDA
A
SlaveAddress
A
R
A
SlaveAddress WA
tCB1
CBUSYBVOH
VOL
NCR
(internal)
BUSYB
(internal)
Awaiting
command
Awaiting command
Under reading
Awaiting command
Status
Command is being processed
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OUTSTAT command timing
OUTSTAT command OUTSTAT command
1st byte
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYBVOH
VOL
NCR
(internal)
BUSYB
(internal)
ERR
(internal)
STATUS1
STATUS2
STATUS2
ch0 NCR output
ch1 BUSYB output
output status
SAFE command timing
SAFE command
1st byte
SAFE command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYBVOH
VOL
NCR
(internal)
BUSYB
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
ERRCL command timing
ERRCL command
SCL
SDA
Slave Address
WA
A
tCB1
CBUSYBVOH
VOL
RDERR
ERR register
(internal)
00h
20h
00h
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Setting timing of playback phrases by FADR2 command
FADR2 command
1st byte
FADR2 command FADR2 command
2nd byte
3rd byte
SCL
SDA
Slave Address
WA
A
A
A
tCB1
tCB1
tCB1
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being
processed
Command is being
processed
Playback start timing by PLAY2 command
PLAY2 command
1st byte
PLAY2 command PLAY2 command
2nd byte
3rd byte
SCL
SDA
Slave Address
WA
A
A
A
tCB1
tCB1
tCB2
CBUSYBVOH
VOL
NCRn
(internal)
*1
BUSYBn
(internal)
1/2VDD
1/2VDD
SPM
SPP
Address is being
controlled
Awaiting command
Awaiting command
Awaiting command
Playing
Awaiting command
Status
Command is being processed
Command is being processed
When the first byte of the PLAY command is input, the 2nd byte waits for input after the command processing time (tCB1),
and when the 2nd byte is input, the 3rd byte waits for input after the command processing time (tCB1). When the third byte is
entered, the address data of the phrase to be played after the command processing time (tCB2) is read from the flash memory.
When the phrase address data is read, the specified phrase is played back, and when playback is completed, the BUSYB
signal of the playback channel becomes "H" level.
The NCR signal goes to the "L" level during playback preparation, and goes to the "H" level when playback preparation is
completed and playback starts. When the NCR signal of the playback channel becomes "H" level, the PLAY command of the
next phrase to be played can be accepted.
*1 The length of the "L" interval in the BUSYBn is (tCB2+ sound production time).
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Change volume timing by PAN command
PAN command
1st byte
PAN command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
SAICH command timing
SAICH command
1st byte
SAICH command
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
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SAICON command timing
SAICON command SAICON command
1st byte
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
SAITCON command timing
SAITCON command SAITCON command
1st byte
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
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SAIRCON command timing
SAIRCON command SAIRCON command
1st byte
2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
SAIMOD command timing
SAIMOD command SAIMOD command
1st byte 2nd byte
SCL
SDA
Slave Address
WA
A
A
tCB1
tCB1
CBUSYB VOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Status
Command is being processed
Command is being processed
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Setting timing by playback sound error detection command
Command
1st byte
Command
2nd byte
Command
3rd byte
SCL
SDA
Slave Address
WA
A
A
A
tCB1
tCB1
tCB1
CBUSYBVOH
VOL
NCRn
(internal)
BUSYBn
(internal)
Awaiting command
Awaiting command
Awaiting command
Awaiting command
Status
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Command
● Command list
Each command is configured in 1-byte (8-bit) units. The PUP, WDTCL, PDWN, START, STOP, SLOOP, CLOOP and
ERRCL commands are configured by one byte, the FADR2 and PLAY2 command and playback sound error detection
command group are configured by three bytes, and the other commands are configured by two bytes.
Do not enter command that is not described in this manual. Enter the command with the CBUSYB "H".
Command
name
PUP
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
1
0
DAMP
AEN0
0
WCM
HPF
POP
0
0
0
0
0
AMODE
AVOL
FAD
DAG1
DAG0
AIG1
AIG0
1
AEN1
0
0
0
0
0
0
0
AV5
AV4
AV3
1
AV2
1
0
0
0
0
0
0
0
0
FADE
FCON2
0
FCON1
0
FCON0
0
FADE
0
0
0
0
0
0
0
0
1
FDIRECT
PRT7
PRT6
PRT5
PRT4
PRT3
0
PRT2
1
PRT1
0
PRT0
0
WDTCL
PDWN
0
0
0
1
0
0
1
0
0
0
0
0
0
0
1
1
F9
F8
C1
C0
FADR
PLAY
F7
F6
F5
F4
F3
F2
F1
F0
0
1
0
0
F9
F8
C1
C0
F7
F6
F5
F4
F3
F2
F1
F0
START
STOP
0
1
0
1
CH3
CH3
CH3
M3
CH3
CH3
CH3
CV5
0
CH2
CH2
CH2
M2
CH2
CH2
CH2
CV4
0
CH1
CH1
CH1
M1
CH0
CH0
CH0
M0
0
1
1
0
0
1
1
1
MUON
M7
M6
M5
M4
SLOOP
CLOOP
1
0
0
0
CH1
CH1
CH1
CV3
0
CH0
CH0
CH0
CV2
0
1
0
0
1
1
0
1
0
CVOL
0
CV1
CV0
CV6
1
0
BUSYB2
0
1
1
RDSTAT
RDVER
NCR3
0
NCR2
1
NCR1
0
NCR0
0
BUSYB3
BUSYB1
BUSYB0
1
1
VER5
1
1
VER4
1
VER3
1
VER2
0
VER1
0
VER0
ERSEL
VER7
VER6
0
1
RDERR
OUTSTAT
FADR2
OSCERR/
MIXERR
RSTERR/
SAIINERR LRCKERR
WDTERR/ ROMERR/
DCDERR WCMER
SPDERR/ TSDERR/
/
R/
BCKERR
1
1
0
0
0
CH3
0
0
CH2
1
0
0
0
PORT
STA1
STA0
CH1
0
CH0
1
1
0
0
0
0
0
C1
C0
F11
F3
1
F10
F2
0
F9
F1
0
F8
F7
F6
F5
F4
F0
1
1
0
0
0
F8
PLAY2
0
0
C1
C0
F11
F3
0
F10
F2
0
F9
F1
0
F7
1
F6
F5
F4
1
F0
1
0
ERSEL
WCMEN/
WVDIFEN
1
SAFE
OSCEN/
MIXEN
1
RSTEN/
SAIINEN
1
WDTEN/
LRCKEN
1
ROMEN/
BCKEN
1
SPDEN/
1
TSDEN/
1
DCDEN/
1
ERRCL
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Command
name
D7
D6
D5
D4
D3
D2
D1
D0
1
R3
1
1
R2
1
1
R1
1
1
R0
0
0
C1
L1
C0
L0
PAN
L3
L2
0
0
0
0
1
SAICH
0
LC1
1
LC0
1
LEN
0
0
RC1
RC0
1
REN
0
1
0
0
SAICON
SAITCON
SAIRCON
SAIMOD
FS3
1
FS2
1
FS1
1
FS0
0
0
1
INEN
1
OUTEN
1
0
0
BWO
1
0
0
MSBO
0
ISSCKO
AFOO
DLYO
0
WSLO
0
1
1
0
1
AFOI
1
BWI
1
0
0
MSBI
0
ISSCKI
DLYI
0
WSLI
1
1
1
0
0
0
0
0
BSWP
0
0
MST
The playback sound error detection command group is a single command in three bytes, and can be read by setting the RW
bit in the first byte to 0, and can be written by setting the RW bit to 1.
For details on the playback sound error detection command, refer to How to use the playback sound error detection function.
The following is the playback sound error detection command group.
Command
name
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
1
1
RW
0
0
0
SCMODE
0
0
0
0
0
0
0
1
0
0
0
0
0
AINDET
FBPATH
0
0
0
1
1
RW
1
0
0
0
0
0
WVDIFS
TH1
0
1
WVDIFS
TH0
1
1
WVDIFD
TH3
1
1
WVDIFD
TH1
0
0
WVDIFD
TH0
0
WVDIFTH
WVDIFS
TH3
WVDIFS
TH2
WVDIFD
TH2
RW
0
0
0
0
0
0
WVDIFEDA
TH
1
0
0
0
1
1
DIFE
DAT13
0
DIFE
DAT12
1
DIFE
DAT11
1
DIFE
DAT10
RW
DIFE
DAT09
0
DIFE
DAT08
0
0
0
0
0
WVDIFEDA
TL
1
0
0
1
0
0
DIFE
DAT07
DIFE
DAT06
DIFE
DAT05
DIFE
DAT04
DIFE
DAT03
DIFE
DAT02
DIFE
DAT01
DIFE
DAT00
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● Description of Command Functions
PUP command
・ Command
0
0
0
0
0
0
0
WCM
The PUP command shifts from the power-down state to the command standby state.
Since only the PUP command is accepted when the LSI is in the power-down state, the command is ignored if another
command is input.
To return to the power-down mode, enter the PDWN command.
The WCM bit is used to set the mode for inputting command and data two-times. When this bit is set to "1", the subsequent
command and data inputs are set to the two-times input mode, and the command is accepted only when they match.
If they do not match, the accepted command is discarded. Refer to the "RDSTAT command", "OUTSTAT command", and
"SAFE command" for handling when a mismatch occurs.
Even if two-times input modes are used for the I2C interface, one-time input is used for the slave address input. If the slave
address matches, ACK is returned. If the slave address does not match, NACK is returned. The command is input two-times.
WCM
Description
0
1
Do not use input mode two-times. (Initial value)
Use the two-times input mode
For the power-up timing by the PUP command, refer to the "Power-up timing" in the timing chart.
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AMODE command
・ Command
0
0
0
0
0
1
DAMP
HPF
POP
1st byte
2nd byte
FAD DAG1 DAG0 AIG1 AIG0 AEN1 AEN0
The AMODE command sets the analog part.
The AMODE command is ignored during power-down, power-up transition, power-down transition and playback sound.
When the PDWN command is input while powering up the analog parts, the LSI power downs without pop noise
suppression. When power down with POP noise suppression, to set the PDWN command after powering down with
AMODE command.
To perform power-down under a setting condition that differs from the power-up condition of the analog unit, set the
AMODE command to set the power-down condition again.
To power up the analog part, set the CVOL command to 00h (initial value) and then enter the AMODE command.
The settings are initialized when the reset is released or when the PDWN command is inputted.
Each setting is as follows.
DAMP
Description
0
1
Use Class AB amplifier for speaker amplifier output.
Use Class D amplifier for speaker amplifier output.
When using line amplifier and using analog mixing from the AIN pin, set DAMP = "0" (Class AB amplifier is used).
In this LSI, select DAMP = "0" (Class AB amplifier is used).
HPF
Description
0
1
No high-pass filter is used.
Use a high-pass filter with a cut-off frequency of 200Hz
FAD
Description
0
1
Fade-out is not processed when inputting STOP command.
Fade out when inputting STOP command
The fade-out processing BUSYB signal becomes "L" and becomes "H" after processing is completed.
DAG1 DAG0
Description
Internal DAC signal input OFF
0
0
1
1
0
1
0
1
Internal DAC signal input ON (-6 dB)
Internal DAC signal input ON (0dB)
Internal DAC signal input ON (0dB) (setting prohibited)
The setting is enabled in the speaker amplifier output mode when using Class AB amplifier.
Refer to the "Volume Settings" in the "Function description".
AIG1
AIG0
Description
0
0
1
1
0
1
0
1
Analog input from the AIN pin OFF
Analog input from AIN pin ON (-6 dB)
Analog input from AIN pin ON (0dB)
Analog input from AIN pin ON (0dB) (setting prohibited)
Input the sound signals to the AIN pin after CBUSYB pin becomes "H" by the AMODE command.
The setting is enabled in the speaker amplifier output mode only when using Class AB amplifier.
Refer to the "Volume Settings" in the "Function description".
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POP
Description
Without pop noise suppression
With pop noise suppression
0
1
This bit is valid when line amplifier output is selected.
When power up with pop noise suppression, the line amplifier output rises from the DGND level to the SG level at
the specified time (tPUPA2).When power down with pop noise suppression, the line amplifier output falls from the
SG level to the DGND level at the specified time (tPDA2).
When power up without pop noise suppression, the line amplifier output rises from the DGND level to the SG level
at the specified time (tPUPA3).When power down without pop noise suppression, the line amplifier output falls
from the SG level to the DGND level at the specified time (tPDA3).
The settings of the AEN1/AEN0/POP bits for power-down and power-up of the analog section when the speaker amplifier
output and line amplifier output are as follows.
Mode
AEN1 AEN0
POP
Description
In the power-down state or
changeover to the power-down state.
In the power-up state or
changeover to the power-up state
In the power-down state or
changeover to the power-down state without Pop Noise Suppression
In the power-up state or
changeover to the power-up state without Pop Noise Suppression
In the power-down state or
changeover to the power-down state with pop noise suppression
In the power-up state or
changeover to the power-up state with pop noise suppression
In the power-down state or
changeover to the power-down state without Pop Noise Suppression
In the power-up state or
changeover to the power-up state without Pop Noise Suppression
In the power-down state or
changeover to the power-down state with pop noise suppression
In the power-up state or
*1
0
0
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
1
0
1
Speaker amplifier
output
*1
(Class AB amplifier)
0
0
1
1
0
0
1
1
Line amplifier output
(When using SPP pin)
Line amplifier output
(When using LOUT pin)
changeover to the power-up state with pop noise suppression
*1 Settings can be enabled for both 0 and 1.
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Pin states at AMODE power-down are as follows.
Analog output pin
Condition
2.5V(typ)
3.0V(typ)
DGND
HiZ
VDDL
VDDR
SG
SPM
SPP
LOUT
SPGND
DGND
The timing of AMODE command is shown in the timing chart.
"Speaker amplifier power-up timing (DAMP bit "0", AEN1 bit "0", AEN0 bit "0"→ "1")"
"Line amplifier power-up timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "0" → "1", AEN0 bit = "0") "
"Line amplifier power-up timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "0" → "1", AEN0 bit = "0")"
"Line amplifier power-up timing (DAMP bit "0", POP bit "1", AEN1 bit "0" → "1", AEN0 bit = "0" → "1")"
"Line amplifier power-up timing (DAMP bit "0", POP bit "0", AEN1 bit "0" → "1", AEN0 bit = "0" → "1")"
"Speaker amplifier power-down timing (DAMP bit "0", AEN1 bit "0", AEN0 bit "1"→"0")"
"Line amplifier power-down timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "1" → "0", AEN0 bit = "0")"
"Line amplifier power-down timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "1" → "0", AEN0 bit = "0")"
"Line amplifier power-down timing (DAMP bit = "0", POP bit = "1", AEN1 bit = "1" → "0", AEN0 bit = "1" → "0")"
"Line amplifier power-down timing (DAMP bit = "0", POP bit = "0", AEN1 bit = "1" → "0, AEN0 bit = "1" → "0")"
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AVOL command
・ Command
0
0
0
0
0
0
1
0
0
0
0
0
1st byte
2nd byte
AV5 AV4 AV3 AV2
The AVOL command sets the volume of the speaker amplifier. This command can be input regardless of the NCR signal
status.
The initial value after reset release is set to-4.0dB. Also, the setting values of the AVOL command are retained when the
STOP command is inputted, but they are initialized when the power is down.
AV5-AV2
Description
+12.0dB
+10.0dB
AV5-AV2
Description
-8.0dB
F
E
D
C
B
A
9
7
6
5
4
3
2
1
0
-12.0dB
-18.0dB
-26.0dB
-34.0dB
Prohibited
Prohibited
OFF
+8.0dB
+6.0dB
+4.0dB
+2.0dB
+0.0dB
8
-4.0dB (initial value)
For timing of the AVOL command, refer to the "Change volume timing by AVOL command" in the timing chart.
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FADE command
・ Command
0
0
0
0
0
0
0
0
1
1
0
0
1st byte
2nd byte
FCON2
FCON1
FCON0
FADE
The FADE command sets the Fade function. This command can be input regardless of the NCR signal status.
By using the fade function, the volume changes stepwise when the volume is changed by the CVOL command or the PAN
command.
FADE
Description
Fade function disabled (initial value)
Fade function enabled
0
1
FCON2 to FCON0 set the volume that changes at every unit-time (sampling group period *1) when the volume is changed to
the volume set by the CVOL command or the PAN command.
FCON2 FCON1
FCON0
Description
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Volume change in 0 dB × 128/32768 steps
Volume change in 0 dB × 64/32768 steps
Volume change in 0 dB × 32/32768 steps
Volume change in 0 dB × 16/32768 steps
Volume change in 0 dB × 8/32768 steps
Volume change in 0 dB × 4/32768 steps
Volume change in 0 dB × 2/32768 steps
Volume change in 0 dB × 1/32768 steps
The smaller the voltage step that changes for each sampling frequency group, the less the pop noise, but the longer the
transition time until the set volume is reached. The transition time is expressed by the following equation.
Volume-transition time for CVOL command
=|[Current CVOL setting]-[New CVOL setting]|
× [Sampling-frequency group *1
]
× {264 ÷ (256 ÷ 2^[FCON2-FCON0 setting])}*2
*1 Sampling frequency group
At 10.7/21.3kHz:
At 6.4/12.8/25.6kHz:
At 8.0/16.0/32.0kHz:
At 11.025/22.05/44.1kHz:
At 12.0/24.0/48.0kHz:
23.44μs
39.06μs
31.25μs
22.68μs
20.83μs
*2 Rounding up after the decimal point
For the timing of the FADE command, refer to the "FADE command timing" in the timing chart.
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ML22Q53X
FDIRECT command
・ Command
0
0
0
1
0
0
0
0
1st byte
2nd byte
PRT7
PRT6
PRT5
PRT4
PRT3
PRT2
PRT1
PRT0
The FDIRECT command controls accesses to the flash memory using the clock synchronous serial interface.
Input the command after inputting the PUP command.
If the protection code of the flash memory area is not 0x69 and the protection codes (PRT7 to PRT0) entered in the second
byte match the protection code set when creating sound data, the flash memory access mode is entered. After that, the flash
memory can be accessed using the clock synchronous serial interface.
If the protection code set when creating sound data is 0x69, the flash memory does not change to flash memory access mode
even if the code matches.
To cancel the flash memory access mode, insert a reset (RESETB = "L") and conduct initialization or turn off the power
supply.
Do not enter this command because this command is ignored when this command is entered from the I2C interface.
For the protection codes of the flash memory area, refer to the "Speech LSI Utility Setting Items".
For the timing of the FDIRECT command, refer to the "FDIRECT command timing" in the timing chart.
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WDTCL command
・ Command
0
0
0
1
0
1
0
0
The WDTCL command clears the watchdog timer counter (WDT counter). This command can be input regardless of the
NCR signal status.
For information about the operation of the watchdog timer, refer to the "Misoperation detection and failure detection
functions (Watchdog timer overflow detection)" in the "Function description".
For the timing of WDTCL command, refer to the "WDTCL command timing" in the timing chart.
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PDWN command
・ Command
0
0
1
0
0
0
0
0
The PDWN command is used to shift from the command standby state to the power-down state. The various settings are
initialized, so the initial settings are required after power-up. It is invalid when the BUSYB signals of any channels are "L".
After inputting the PDWN command, oscillation stops following the elapse of the command processing time (tPD) .
The states of the analog output pins during power-down are shown below.
Analog output pin
Condition
DGND
DGND
DGND
HiZ
VDDL
VDDR
SG
SPM
SPP
LOUT
SPGND
DGND
For the power-down timing by PDWN command, refer to the "Power-Down timing" in the timing chart.
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FADR command
・ Command
0
0
1
1
F9
F3
F8
F2
C1
F1
C0
F0
1st byte
2nd byte
F7
F6
F5
F4
The FADR command sets the channels and phrases to be played. This command can be input when the NCR signal of the
corresponding channel is "H" level.
Playback is started by the START command after the playback phrases of each channel are specified.
The phrases (F9-F0) to be played back are specified when creating sound data. Set the phrase specified when creating.
This command can only set up to 0 to 1023 phrases. To specify 1024 phrases or more, use FADR2 command.
The channel settings are as follows:
C1
C0
Description
0
0
1
1
0
1
0
1
Channel 0
Channel 1
Channel 2
Channel 3
For the timing of the FADR command, refer to the "Setting playback phrases using FADR command" in the timing chart.
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PLAY command
・ Command
0
1
0
0
F9
F3
F8
F2
C1
F1
C0
F0
1st byte
2nd byte
F7
F6
F5
F4
The PLAY command is played by specifying channels and phrases. This command can be input when the NCR signal of the
corresponding channel is "H" level.
The phrases (F9-F0) to be played back are specified when creating sound data. Set the phrase specified when creating.
This command can only set up to 0 to 1023 phrases. To specify 1024 phrases or more, use PLAY2 command.
The channel settings are as follows:
C1
C0
Description
0
0
1
1
0
1
0
1
Channel 0
Channel 1
Channel 2
Channel 3
For the playback start timing by the PLAY command, refer to the "Playback start timing by PLAY command" in the timing
chart.
For the timing of continuous playback, refer to the "Continuous playback timing by PLAY command" in the timing chart.
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START command
・ Command
0
1
0
1
CH3
CH2
CH1
CH0
1st byte
The START command starts playing back the specified channels. Specify the phrase to be played by the FADR command
prior to entering the START command. Setting the CH0 to CH3 bit to 1 plays back the corresponding channel. This
command can be input when the NCR signal of the corresponding channel is "H" level.
The channel settings are as follows:
Channeled
Description
CH0
CH1
CH2
CH3
When this bit is set to 1, channel 0 is played back.
When this bit is set to 1, channel 1 is played back.
When this bit is set to 1, channel 2 is played back.
When this bit is set to 1, channel 3 is played back.
Be sure to specify one of the channels for the channel setting (CH0-CH3).
Do not input it to "0" (all “0”) with specifying nothing. If it is input with specifying nothing (all "0"), the command is
ignored.
For the playback start timing by the START command, refer to the "Playback start timing by START command" in the
timing chart.
For the timing of continuous playback, refer to the "Continuous playback timing by START command" in the timing chart.
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STOP command
・ Command
0
1
1
0
CH3
CH2
CH1
CH0
1st byte
The STOP command stops playing back the specified channel. Setting the CH0 to CH3 bit to "1" stops playback of the
corresponding channel. When the corresponding channel stops playing back, the NCR and BUSYB signals become "H".
The STOP command can be input regardless of the status of the NCR during playback operation. However, following the
elapse of CBUSYB "L" level output time 3 (tCB3), input the next command after confirming that the BUSYB signal
becomes "H".
If the BUSYB signal does not become "H", enter the STOP command again.
Refer to the "Playback stop flow" in the command flowchart for more information.
The channel settings are as follows:
Channeled
Description
CH0
CH1
CH2
CH3
Setting this bit to 1 stops channel 0.
Setting this bit to 1 stops channel 1.
Setting this bit to 1 stops channel 2.
Setting this bit to 1 stops channel 3.
Be sure to specify one of the channels for the channel setting (CH0-CH3).
Do not input it to "0" (all “0”) with specifying nothing. If it is input with specifying nothing (all "0"), the command is ignored.
For the timing of the STOP command, refer to the "STOP command (when the FAD bit is "L")" and "STOP command (when
the FAD bit is "H")" in the timing chart.
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MUON command
・ Command
0
1
1
1
CH3 CH2 CH1 CH0
M3 M2 M1 M0
1st byte
2nd byte
M7
M6
M5
M4
The MUON command inserts silence between two phrases to be played. This command can be inputted when the NCR
signal of the corresponding channel is "H" level.
Repeated playing back (the SLOOP command) of the MUON command is not possible.
The silence duration (tmu) is specified by the M7-M0 bits and can be set from 20ms to 1,024ms in 252 steps at 4ms intervals.
The equation for setting the silence duration (tmu) is as follows.
However, set the silence setting (M7-M0) to 04h or more (tmu≥20ms).
tmu=(27×(M7)+26×(M6)+25×(M5)+24×(M4)+23×(M3)+22×(M2)+21×(M1)+20×(M0)+1)×4ms
The channel settings are as follows:
Channeled
Description
CH0
CH1
CH2
CH3
Setting this bit to 1 inserts silence into channel 0.
Setting this bit to 1 inserts silence into channel 1.
Setting this bit to 1 inserts silence into channel 2.
Setting this bit to 1 inserts silence into channel 3.
Be sure to specify one of the channels for the channel setting (CH0-CH3).
Do not input it to "0" (all “0”) with specifying nothing. If it is input with specifying nothing (all "0"), the command is
ignored.
For the timing of the MUON command, refer to the "Playback start timing by MUON command" in the timing chart.
For the timing of continuous playback, refer to the "Continuous playback timing by MUON command" in the timing chart.
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SLOOP command
・ Command
1
0
0
0
CH3
CH2
CH1
CH0
1st byte
The SLOOP command sets the repeat playback of the specified channel. Setting the CH0 to CH3 bit to 1 repeatedly plays
back the corresponding channel. This command can be input when the NCR signal of the corresponding channel is "H" level.
When repeat playback is set, playback is repeatedly performed until the repeat playback setting is canceled by the CLOOP
command or playback is stopped by the STOP command. Also, if the phrase has been edited, the edited phrase is played
repeatedly.
The channel settings are as follows:
Channeled
Description
CH0
CH1
CH2
CH3
Setting this bit to 1 repeats playback on channel 0.
Setting this bit to 1 repeats playback on channel 1.
Setting this bit to 1 repeats playback on channel 2.
Setting this bit to 1 repeats playback on channel 3.
Be sure to specify one of the channels for the channel setting (CH0-CH3).
Do not input it to "0" (all “0”) with specifying nothing. If it is input with specifying nothing (all "0"), the command is
ignored.
For the timing of the SLOOP command, refer to the "Repeat playback setting/release timing by SLOOP/CLOOP command"
in the timing chart.
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CLOOP command
・ Command
1
0
0
1
CH3
CH2
CH1
CH0
1st byte
The CLOOP command releases repeat playback of the specified channel. This command can be input regardless of the NCR
signal status.
Setting the CH0 to CH3 bit to "1" cancels repeat playback of the corresponding channel. When repeat playback is released,
the NCR signal becomes "H" level.
The channel settings are as follows:
Channeled
Description
CH0
CH1
CH2
CH3
Setting this bit to 1 cancels repeat playback on channel 0.
Setting this bit to 1 cancels repeat playback on channel 1.
Setting this bit to 1 cancels repeat playback on channel 2.
Setting this bit to 1 cancels repeat playback on channel 3.
Be sure to specify one of the channels for the channel setting (CH0-CH3).
Do not input it to "0" (all “0”) with specifying nothing. If it is input with specifying nothing (all "0"), the command is ignored.
For the timing of the CLOOP command, refer to the "Repeat playback setting/release timing by SLOOP/CLOOP command"
in the timing chart.
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CVOL command
・ Command
1
0
0
1
0
CH3 CH2 CH1 CH0
1st byte
2nd byte
CV1 CV0 CV6 CV5 CV4 CV3 CV2
The CVOL command sets the playback volume of the specified channel. This command can be input regardless of the NCR
signal status.
Setting the CH0 to CH3 bit to 1 sets the volume of the corresponding channel.
The volume can be set at 128 levels.
The setting values are initialized when a reset is inserted (RESETB = "L") and PDWN command is input.
The CV1 and CV0 of the second bytes of the CVOL command are located at the top of the CV6 to CV2.
CV1,CV0,
CV6-CV2
CV1,CV0,
CV6-CV2
CV1,CV0,
CV6-CV2
CV1,CV0,
CV6-CV2
Description
Description
-2.59dB
Description
-6.31dB
Description
-12.93dB
0.00dB
(initial value)
00
08
10
18
20
40
60
01
21
41
61
02
22
42
62
03
23
43
63
04
24
44
64
05
25
45
65
06
26
46
66
07
27
47
67
28
48
68
09
29
49
69
0A
2A
4A
6A
0B
2B
4B
6B
0C
2C
4C
6C
0D
2D
4D
6D
0E
2E
4E
6E
0F
2F
4F
6F
30
50
70
11
31
51
71
12
32
52
72
13
33
53
73
14
34
54
74
15
35
55
75
16
36
56
76
17
37
57
77
38
58
78
19
39
59
79
1A
3A
5A
7A
1B
3B
5B
7B
1C
3C
5C
7C
1D
3D
5D
7D
1E
3E
5E
7E
1F
3F
5F
7F
-0.07dB
-0.14dB
-0.21dB
-0.28dB
-0.36dB
-0.43dB
-0.50dB
-0.58dB
-0.65dB
-0.73dB
-0.81dB
-0.88dB
-0.96dB
-1.04dB
-1.12dB
-1.20dB
-1.28dB
-1.36dB
-1.44dB
-1.53dB
-1.61dB
-1.70dB
-1.78dB
-1.87dB
-1.96dB
-2.04dB
-2.13dB
-2.22dB
-2.31dB
-2.41dB
-2.50dB
-2.69dB
-2.78dB
-2.88dB
-2.98dB
-3.08dB
-3.18dB
-3.28dB
-3.38dB
-3.49dB
-3.59dB
-3.70dB
-3.81dB
-3.92dB
-4.03dB
-4.14dB
-4.25dB
-4.37dB
-4.48dB
-4.60dB
-4.72dB
-4.84dB
-4.97dB
-5.09dB
-5.22dB
-5.35dB
-5.48dB
-5.61dB
-5.74dB
-5.88dB
-6.02dB
-6.16dB
-6.45dB
-6.60dB
-6.75dB
-6.90dB
-7.06dB
-7.22dB
-7.38dB
-7.55dB
-7.72dB
-7.89dB
-8.06dB
-8.24dB
-8.43dB
-8.61dB
-8.80dB
-9.00dB
-9.20dB
-9.40dB
-9.61dB
-9.83dB
-10.05dB
-10.27dB
-10.50dB
-10.74dB
-10.99dB
-11.24dB
-11.50dB
-11.77dB
-12.04dB
-12.33dB
-12.62dB
-13.24dB
-13.57dB
-13.91dB
-14.26dB
-14.63dB
-15.02dB
-15.42dB
-15.85dB
-16.29dB
-16.76dB
-17.26dB
-17.79dB
-18.35dB
-18.95dB
-19.59dB
-20.28dB
-21.04dB
-21.87dB
-22.78dB
-23.81dB
-24.97dB
-26.31dB
-27.89dB
-29.83dB
-32.33dB
-35.85dB
-41.87dB
-44.37dB
-47.89dB
-53.91dB
OFF
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The volume can also be set at 32 levels by fixing the CV1 and CV0 bits to "0".
CV6-CV2
00
Description
CV6-CV2
10
Description
0.00dB (initial value)
-0.28dB
-0.58dB
-0.88dB
-1.20dB
-1.53dB
-1.87dB
-2.22dB
-2.59dB
-2.98dB
-3.38dB
-3.81dB
-4.25dB
-4.72dB
-5.22dB
-5.74dB
-6.31dB
-6.90dB
-7.55dB
-8.24dB
-9.00dB
01
02
03
04
05
06
07
08
11
12
13
14
15
16
17
18
-9.83dB
-10.74dB
-11.77dB
-12.93dB
-14.26dB
-15.85dB
-17.79dB
-20.28dB
-23.81dB
-29.83dB
-44.37dB
09
19
0A
0B
0C
0D
0E
0F
1A
1B
1C
1D
1E
1F
The channel settings are as follows:
Channeled
Description
CH0
CH1
CH2
CH3
Setting this bit to 1 set the volume of channel 0.
Setting this bit to 1 set the volume of channel 1.
Setting this bit to 1 set the volume of channel 2.
Setting this bit to 1 set the volume of channel 3.
Be sure to specify one of the channels for the channel setting (CH0-CH3). When multiple channels are specified, the volume
of the specified channels is set.
Do not input it to "0" (all “0”) with specifying nothing. If it is input with specifying nothing (all "0"), the command is ignored.
For timing of the CVOL command, refer to the "Change volume timing by CVOL command" in the timing chart.
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RDSTAT command
・ Command
1
0
1
1
0
0
0
0
1st byte
The RDSTAT command reads the internal operating states. This command can be input regardless of the NCR signal status.
When reading the status of the second byte after command input, set the SI pin to "L".
The internal operating states read in the second byte are as follows:
2nd byte
D7
D6
D5
D4
D3
D2
D1
D0
Output data
BUSYB3
BUSYB2
BUSYB1
BUSYB0
NCR3
NCR2
NCR1
NCR0
The NCR signal outputs "L" during command processing and playback standby, and outputs "H" in other states.
The BUSYB signal outputs "L" during command processing and playback sound, and outputs "H" in other states.
D7 to D0
BUSYB3
BUSYB2
BUSYB1
BUSYB0
NCR3
Description
BUSYB outputs of channel 3
BUSYB outputs of channel 2
BUSYB outputs of channel 1
BUSYB outputs of channel 0
NCR output of channel 3
NCR output of channel 2
NCR output of channel 1
NCR output of channel 0
NCR2
NCR1
NCR0
For the timing of the RDSTAT command, refer to the "RDSTAT command timing" in the timing chart.
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RDVER command
・ Command
1
0
1
1
0
1
0
0
1st byte
The RDVER command read the sound ROM information. This command can be input regardless of the NCR signal status.
When reading the sound ROM information in the second byte after command input, set the SI pin to "L".
The sound ROM information read in the second byte is as follows:
2nd byte
D7
D6
D5
D4
D3
D2
D1
D0
Output data
VER7
VER6
VER5
VER4
VER3
VER2
VER1
VER0
Sound ROM information can be set by using dedicated tool (Speech LSI Utility) when creating sound data.
For the timing of the RDVER command, refer to the "RDVER command timing" in the timing chart.
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RDERR command
・ Command
1
0
1
1
1
0
0
ERSEL
1st byte
The RDERR command read misoperation detection and failure detection status. This command can be input regardless of
the NCR signal status. When reading error information in the second byte after command input, set the SI pin to "L".
If the outputs of misoperation detection and failure detection are selected by OUTSTAT command, and the read data is all
"L" even though STATUS1 or STATUS2 pin is "H", the read data cannot be read normally. Be sure to read it again.
The data to be read differs depending on the ERSEL bit. When an error occurs, use this command to check the error
information corresponding to various misoperation detection and failure detection status set by the SAFE command.
The error information read in the second byte when ERSEL = "0" is as follows.
2nd byte
D7
D6
D5
D4
D3
D2
D1
D0
Output data
OSCERR
RSTERR
WDTERR
ROMERR
SPDERR
TSDERR
DCDERR
WCMERR
The error information read in the second byte when ERSEL = "1" is as follows.
2nd byte
D7
D6
D5
D4
D3
0
D2
0
D1
0
D0
Output data
MIXERR
SAIINERR
LRCKERR
BCKERR
WVDIFERR
Misoperation detection and failure detection status are as follows.
Error signal
WCMERR
Description
This bit is set to "1" when an error of the command is detected.
This bit is set to "1" when the disconnection of the speaker connected to the SPP and SPM pins is
detected.
DCDERR
TSDERR
SPDERR
This bit is set to "1" when the LSI temperature becomes 130°C or higher.
This bit is set to "1" when the SPP pin and the SPM pin are short-circuited, or when the SPP pin or
the SPM pin is short-circuited to GND.
ROMERR
WDTERR
This bit is set to 1 when an error is detected in the flash memory.
This bit is set to "1" when the first overflow of the watchdog timer counter occurs.
This bit is set to "1" when the second overflow of the watchdog timer counter occurs.
Alternatively, this bit is set to "1" when the RST counter, which starts operation by any of the error
detections, overflows.
RSTERR
OSCERR
WVDIFERR
BCKERR
This bit is set to "1" when the clock input from the crystal resonator or ceramic resonator is stopped.
This bit is set to "1" when an abnormality in the playback sound is detected.
This bit is set to "1" when the disconnection/short circuit of the BCLK is detected.
This bit is set to "1" when the disconnection/short circuit of the LRCLK is detected.
This bit is set to "1" when the disconnection or short circuit of SAI_IN is detected.
This bit is set to "1" when an error in the mixing number is detected.
LRCKERR
SAIINERR
MIXERR
For details on misoperation detection and failure detection, refer to the "Misoperation detection and failure detection
functions" in the "Function description".
For the timing of the RDERR command, refer to the "RDERR command timing" in the timing chart.
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OUTSTAT command
・ Command
1
0
1
0
0
0
0
0
0
1st byte
2nd byte
PORT STA1 STA0
CH3
CH2
CH1
CH0
The OUTSTAT command selects the internal operating states output to the STATUS1 pin and STATUS2 pin.
This command can be input regardless of the NCR signal status.
PORT
Description
STATUS1 Pin setting
STATUS2 Pin setting
0
1
If the STATUS2 pin is set after the STATUS1 pin is set, the STATUS1 pin setting is retained.
In the initial setting, the NCR of channel 0 is selected for the STATUS1 pin, and the BUSYB of channel 0 is selected for the
STATUS2 pin.
STA1
STA0
Description
0
0
1
1
0
1
0
1
BUSYB
NCR
Misoperation detection and failure detection
Channeled
Description
CH0
CH1
CH2
CH3
Setting this bit to 1 selects channel 0.
Setting this bit to 1 selects channel 1.
Setting this bit to 1 selects channel 2.
Setting this bit to 1 selects channel 3.
Channel settings are enabled when BUSYB or NCR is specified in the STA1/STA0. Multiple channels can also be set.
The relations between the STATUS1 pin and the STA1/STA0/CH3/CH2/CH1/CH0 are shown below.
CH3 / CH2 / CH1 / CH0
STA1/STA0
BUSYB0
BUSYB1
BUSYB2
00
01
10/11
STATUS1 pin
BUSYB3
NCR0
NCR1
NCR2
NCR3
WCMERR
DCDERR
TSDERR
SPDERR
ROMERR
WDTERR
RSTERR
OSCERR
WVDIFERR
BCKERR
LRCKERR
SAIINERR
MIXERR
For the timing of the OUTSTAT command, refer to the "OUTSTAT command timing" in the timing chart.
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FADR2 command
・ Command
1
0
1
0
0
0
0
1
0
0
1st byte
2nd byte
3rd byte
C1
F5
C0
F4
F11 F10
F3 F2
F9
F1
F8
F0
F7
F6
The FADR2 command sets the channels and phrases to be played. This command can be input when the NCR signal of the
corresponding channel is "H" level.
Playback is started by the START command after the playback phrases of the channels are specified.
The phrases (F11-F0) to be played back are specified when creating sound data. Set the phrase specified when creating.
The channel settings are as follows:
C1
C0
Description
0
0
1
1
0
1
0
1
Channel 0
Channel 1
Channel 2
Channel 3
When the number of phrases to be played is 1024 or less, the channels and phrases can be specified by FADR command.
For the timing of the FADR2 command, refer to the "Setting timing of playback phrases by FADR2 command" in the timing
chart.
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PLAY2 command
・ Command
1
0
1
0
0
0
1
0
0
0
1st byte
2nd byte
3rd byte
C1
F5
C0
F4
F11 F10
F3 F2
F9
F1
F8
F0
F7
F6
The PLAY2 command is played by specifying channels and phrases. This command can be input when the NCR signal of the
corresponding channel is "H" level.
The phrases (F11-F0) to be played back are specified when creating sound data. Set the phrase specified when creating.
The channel settings are as follows:
C1
C0
Description
0
0
1
1
0
1
0
1
Channel 0
Channel 1
Channel 2
Channel 3
When the number of phrases to be played is 1024 or less, the channels and phrases can be specified by PLAY command.
For the playback start timing by the PLAY2 command, refer to the "Playback start timing by PLAY2 command" in the
timing chart.
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SAFE command
・ Command
1
1
0
1
0
SPDEN
0
0
TSDEN
0
0
DCDEN
0
ERSEL
WCMEN
WVDIFEN
1st byte
2nd byte
2nd byte
When ERSEL = "0"
When ERSEL = "1"
OSCEN
MIXEN
RSTEN
WDTEN
ROMEN
BCKEN
SAIINEN LRCKEN
The SAFE command is used to set the operation of the misoperation detection function and the failure detection function.
The initial value is the operation stop state ("0"). When this bit is set to "1", operation starts.
Select the function to be set in the ERSEL. If ERSEL is set to "1" after setting ERSEL to "0", the function set with ERSEL =
"0" is retained. The functions to be set when ERSEL = "0" are as follows.
Error setting
WCMEN
DCDEN
Description
Set the command error detection.
Set the disconnection detection of the speakers connected to the SPP and SPM pins.
TSDEN
Set the LSI temperature error detection.
SPDEN
Set the detection of short circuit between the SPP pin and the SPM pin.
Set error detection of flash memory.
ROMEN
WDTEN*1
RSTEN*1
Operate the watchdog timer and set overflow detection.
Operate the RST counter and set overflow detection, when any error is detected.
Enable the error output for the stop detection of clock input from a crystal resonator or ceramic
resonator.
OSCEN
*1 Do not set WDTEN and RSTEN to "1" at the same time. If these bits are set to "1" at the same time, only the RSTEN bit
is set to "1".
The functions to be set when ERSEL = "1" are as follows.
Error setting
WVDIFEN
BCKEN
Description
Set the playback sound error detection.
Set the BCLK disconnection/short detection.
Set the LRCLK disconnection/short detection.
Set the SAI_IN disconnection/short detection.
Set error detection of mixing number.
LRCKEN
SAIINEN
MIXEN
For details on misoperation detection and failure detection, refer to the "Misoperation detection and failure detection
functions" in the function description.
For the timing of the SAFE command, refer to the "SAFE command timing" in the timing chart.
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ERRCL command
・ Command
1
1
1
1
1
1
1
1
The ERRCL command is a command that clears error bits that can be read by the RDERR command. The ERRCL command
clears all error bits irrespective of the ERSEL bit of the RDERR command. This command can be input regardless of the
NCR signal status.
However, if the error continues, the error bit remains in the error status even if the ERRCL command is entered.
For the timing of the ERRCL command, refer to the "ERRCL command timing" in the timing chart.
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PAN command
・ Command
1
1
1
1
0
0
C1
L1
C0
L0
1st byte
2nd byte
R3
R2
R1
R0
L3
L2
The PAN command sets the volume of the Lch/Rch during serial audio interface (SAI) operation. This command can be
input regardless of the NCR signal status.
Set the volume during playback or before starting playback. The initial value is 0dB for both channels.
The Fade function can change the volume step by step.
The channel settings are as follows:
C1
C0
Description
0
0
1
1
0
1
0
1
Channel 0
Channel 1
Channel 2
Channel 3
The volume settings are as follows:
R3/L3
R2/L2
R1/L1
R0/L0
Description
0 dB (initial value)
-0.58dB
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-1.20dB
-1.87dB
-2.59dB
-3.38dB
-4.25dB
-5.22dB
-6.31dB
-7.55dB
-9.00dB
-10.74dB
-12.93dB
-15.85dB
-20.28dB
OFF
For the fade function, refer to the "FADE command".
For adjusting the Lch/Rch volume using FADE command, refer to the "Volume Settings" in the function description.
For the PAN command input timing, refer to the "Change volume timing by PAN command" in the timing chart.
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SAICH command
・ Command
1
0
1
1
0
0
0
0
0
1
1st byte
2nd byte
LC1
LC0
LEN
RC1
RC0
REN
The SAICH command sets the operation of the serial audio interface (SAI) and the channels on the Lch and Rch sides. Set
these bits when channels other than SAIs are not playing back (BUSYBn is "1").
LEN and REN set the operation of the Lch side and the Rch side.
LEN
Description
0
1
Stops the operation of the serial audio interface (SAI) on the Lch side (initial
Starts the operation of the serial audio interface (SAI) on the Lch side.
REN
Description
0
1
Stops the operation of the serial audio interface (SAI) on the Rch side (initial
Starts the operation of the serial audio interface (SAI) on the Rch side.
LC1 to LC0 and RC1 to RC0 specify the playback channels of the Lch and Rch sides.
RC1
RC0
Description
0
0
1
1
0
1
0
1
Specify Rch-side channel 0 (CH0).
Specify Rch-side channel 1 (CH1).
Specify Rch-side channel 2 (CH2).
Specify Rch-side channel 3 (CH3).
LC1
LC0
Description
0
0
1
1
0
1
0
1
Specify Lch-side channel 0 (CH0).
Specify Lch-side channel 1 (CH1).
Specify Lch-side channel 2 (CH2).
Specify Lch-side channel 3 (CH3).
The LEN and REN bits cannot be set to "1" when the channels specified by LC1 to LC0 and RC1 to RC0 are playing back in
a mode other than SAI (BUSYBn = "L").
If you want to set LEN="0" and REN="1" with LEN="1" and REN="0", set LEN="0" and REN="1" after setting
LEN=REN="0".
When LEN and REN are set to "1" with the same channel specified by LC1 to LC0 and RC1 to RC0, only the Lch operates.
Start the LRCLK/BCLK input after entering the SAICON command.
Subsequently, enter the MUON command and then the SAICH command.
After entering the MUON command, enter the SAICH command at least 10ms prior to the end of the silence period set by the
MUON command.
Use a channel that is not played back by SAICH as the playback channel set by MUON commands. To mix with ROM
playback, use a channel for ROM playback. When ROM playback is started within the silence time set by the MUON
commands, resulting in continuous playback, ROM playback is started after the set silence time elapses.
For the timing of inputting the SAICH command, refer to the "SAICH command timing" in the timing chart.
When LRCLK is faster by 5% or more, SAICH is initialized. For LRCLK failure detection, refer to the "Function
description" section.
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SAICON command
・ Command
1
1
1
0
0
0
0
1
1
0
1st byte
2nd byte
FS3
FS2
FS1
FS0
INEN
OUTEN
The SAICON command enable/disable input/output from the serial audio interface (SAI) pins.
Set this bit when the Lch-side serial audio interface (SAI) operation of the SAICH command is stopped (LEN="0") and the
Rch-side serial audio interface (SAI) operation is stopped (REN="0"). If either LEN or REN is set to "1", the entered
SAICON command is ignored.
OUTEN
Description
0
1
Stops SAI OUT pin output (initial value)
Start SAI_OUT pin output
INEN
Description
0
1
Invalid SAI IN pin input (initial value)
Valid SAI_IN pin input
The FS3 to FS0 select the sampling frequency used for the serial audio interface (SAI).
FS3
0
FS2
0
FS1
0
FS0
0
Description
8 kHz (initial value)
16kHz
0
0
0
1
0
0
1
0
32kHz
0
0
1
1
Setting prohibited
11.025kHz
0
1
0
0
0
1
0
1
22.05kHz
0
1
1
0
44.1kHz
0
1
1
1
Setting prohibited
12kHz
1
0
0
0
1
0
0
1
24kHz
1
0
1
0
48kHz
1
0
1
1
Setting prohibited
Setting prohibited
Setting prohibited
Setting prohibited
Setting prohibited
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
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The operating status for each setting of OUT_EN and IN_EN is as follows.
Playback sound
Input
Output
IN_EN OUT_EN
Playback operation
SAI_IN
pin
Flash SAI_OUT Line amplifier or
memory
pin
-
speaker amplifier
0
0
0
1
-
-
Playback from flash memory to line amplifier or speaker amplifier.
Output from flash memory pin to SAI_OUT pin.*1
-
Playback from flash memory to line amplifier or speaker amplifier
and SAI_OUT pin.
-
-
Playback from SAI_IN pin to line amplifier or speaker amplifier.
1
1
0
1
-
Playback the mixing of SAI_IN pin and flash memory to line
amplifier or speaker amplifier.
Output from SAI_IN pin to SAI_OUT pin.*1
-
Output the mixing of SAI_IN pin and flash memory to SAI_OUT
pin.*1
Playback from SAI_IN pin to line amplifier or speaker amplifier and
SAI_OUT pin.
-
Playback the mixing of SAI_IN pin and flash memory to line
amplifier or speaker amplifier and SAI_OUT pin.
*1: To output only to the SAI_OUT pin, set DAG1,DAG0 bit of AMODE command to 0 (internal DAC signal input OFF).
AIN
[3]
[3]
MIX
&
LPF
Flash memory
Speaker
amplifier
SPM
SPP
DAC
MIX
[1]
SAI_IN
SAI
[2]
Line
amplifier
SAI_OUT
LOUT
[1] : Controlled by IN_EN
[2] : Controlled by OUT_EN
[3] : Controlled by AMODE command
For the timing of inputting the SAICON command, refer to the "SAICON command timing" in the timing chart.
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ML22Q53X
SAITCON command
・ Command
1
1
0
1
0
0
0
0
0
1
1
1st byte
2nd byte
BWO
MSBO
ISSCKO
DLYO
WSLO
The SAITCON command sets the serial audio interface (SAI) transmission format.
Use the same format as that of SAIRCON command.
Set this bit when the Lch-side serial audio interface (SAI) operation of the SAICH command is stopped (LEN="0") and the
Rch-side serial audio interface (SAI) operation is stopped (REN="0"). If either LEN or REN is set to "1", the entered
SAITCON command is ignored.
WSLO specifies the LRCLK polarities when transmitting.
WSLO
Description
L channel is transmitted when LRCLK is "L" level,
R channel is transmitted when LRCLK is "H" level (initial value)
0
L channel is transmitted when LRCLK is "H" level,
R channel is transmitted when LRCLK is "L" level
1
DLYO specifies whether transmit data has a 1-clock delay or not.
DLYO
Description
0
1
Serial data delay (initial value)
No serial data delay
ISSCKO specifies the BCLK pin as 32fs or 64fs.
ISSCKO
Description
0
1
32 fs (initial value)
64 fs
MSBO specifies MSB first or LSB first in the transmit data.
MSBO
Description
0
1
MSB first (initial value)
LSB first
BWO specifies the bit width for transmission.
BWO
Description
0
1
16-bit straight PCM (initial value)
8-bit straight PCM
For the transmission format, refer to the "SAI (Serial Audio Interface)" in the function description.
For the timing of inputting the SAITCON command, refer to "SAITCON command timing" in the timing chart.
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SAIRCON command
・ Command
1
1
0
1
0
0
0
1
0
0
1st byte
2nd byte
BWI
MSBI
ISSCKI
AFOI
DLYI
WSLI
The SAIRCON command sets the serial audio interface (SAI) reception format.
Use the same format as that of SAITCON command.
Set this bit when the Lch-side serial audio interface (SAI) operation of the SAICH command is stopped (LEN="0") and the
Rch-side serial audio interface (SAI) operation is stopped (REN="0"). If either LEN or REN is set to "1", the entered
SAIRCON command is ignored.
WSLI specifies the LRCLK polarities for reception.
WSLI
Description
L channel is received when LRCLK is "L" level,
R channel is received when LRCLK is "H" level (initial value)
L channel is received when LRCLK is "H" level,
R channel is received when LRCLK is "L" level
0
1
DLYI specifies whether the received data has a 1-clock delay or not.
DLYI
Description
0
1
Serial data delay (initial value)
No serial data delay
AFOI specifies whether the received data is left-aligned or right-aligned.
AFOI
Description
Description
0
1
Left-justify (initial value)
Right-justify
ISSCKI specifies the BCLK pin as 32fs or 64fs.
ISSCKI
0
1
32 fs (initial value)
64 fs
MSBI specifies MSB first or LSB first in the received data.
MSBI
Description
0
1
MSB first (initial value)
LSB first
BWI specifies the bit width for reception.
BWI
Description
0
1
16-bit straight PCM (initial value)
8-bit straight PCM
For the reception format, refer to the "SAI (Serial Audio Interface)" in the "Function description".
For the timing of inputting the SAIRCON command, refer to the "SAIRCON command timing" in the timing chart.
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ML22Q53X
SAIMOD command
・ Command
1
0
1
0
1
0
0
0
0
1
0
0
0
1
0
1st byte
2nd byte
BSWP
The SAIMOD command sets the mode of the serial audio interface (SAI).
Set this bit when the Lch-side serial audio interface (SAI) operation of the SAICH command is stopped (LEN="0") and the
Rch-side serial audio interface (SAI) operation is stopped (REN="0"). If either LEN or REN is set to "1", the entered
SAIMOD command is ignored.
BSWP sets byte-swapping of the order of the data to be transmitted and the data to be received.
BSWP
Description
0
1
No byte-swap (16-bit data order: 0bit-7 bit, 8bit-15 bit) (initial value)
With byte swap (16-bit data order: 8bit-15 bit, 0bit-7 bit)
For the timing of inputting the SAIMOD command, refer to the "SAIMOD command timing" in the timing chart.
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Command flowchart
● 1-byte command input flow(Applies to PUP, WDTCL, PDWN, START, STOP, SLOOP, CLOOP, and ERRCL commands.)
Start
CBUSYB
"H"?
No
No
Yes
Command input
CBUSYB
"H"?
Yes
End
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ML22Q53X
● 2-byte command input flow (Applies to AMODE, AVOL, FADE, FDIRECT, FADR, PLAY, MUON, CVOL, OUTSTAT,
SAFE, PAN, and SAICH, SAICON, SAITCON, SAIRCON, SAIMOD commands.)
Start
CBUSYB
No
No
"H"?
Yes
1st byte command input
CBUSYB
"H"?
Yes
2nd byte command input
CBUSYB
"H"?
No
Yes
End
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ML22Q53X
● 3-byte command input flow(Applies to FADR2, PLAY2 and playback sound error detection command group)
Start
CBUSYB
"H"?
No
No
Yes
1st byte command input
CBUSYB
"H"?
Yes
2nd byte command input
CBUSYB
"H"?
No
Yes
3rd byte command input
CBUSYB
"H"?
No
Yes
End
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FEDL22Q53X-06
ML22Q53X
● Read flow (Applies to RDSTAT, RDVER, RDERR commands)
Start
1st byte command input
CBUSYB
"H"?
No
Yes
Read status (SI="L")
End
● Read flow (Applies to playback sound error detection command group)
Start
1st byte command input
CBUSYB
"H"?
No
Yes
2nd byte command input
CBUSYB
"H"?
No
Yes
Read status (SI="L")
End
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ML22Q53X
● Power-on flow
Power on, RESETB "L"
Wait 10us
No
Yes
RESETB "H"
Power-down state
● MCU command interface flash memory access migration/cancel
Power-down state
PUP command
FDIRECT command
ChipErase
Wait 5s(typ)*
StatusRead
Program 256byte units
Wait 0.4ms(typ)*
StatusRead
Flash memory
access
No
Write end?
*:Wait times are checked by StautsRead
Yes
RESETB “L”
Power-down state
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ML22Q53X
● Analog power-up flow
Power-down state
PUP command
※ When enabling the detection of
speaker disconnection and short
circuit
SAFE Command
Within 10ms
AMODE Command
Analog power-up state
● Playback start flow
Analog power-up state
No
Playback end
Yes
※ Check that the BUSYB of all channels is 1.
(Check with RDSTAT commands or STATUS1/2 pins.)
Single-channel playback
Multi-channel playback
PLAY Command
FADR Command
START Command
Playback start
Playback start
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ML22Q53X
● Playback stop flow
During playback
STOP Command
tCB3 Wait
RDSTAT Command
CBUSYB
"H"?
No
No
Yes
Read status (SI="L")
BUSYB
"H"?
Yes
End
● Continuous playback flow
PLAY/START/MUON
Command
During playback
Within 10 ms
PLAY/START/MUON Commands
Start continuous playback
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ML22Q53X
● Loop playback start flow
PLAY/START Command
During playback
Within 10 ms
SLOOP command
Start loop playback
● Loop playback stop flow
During loop playback
Stop after phrase ends
Forced stop
CLOOP command
Stop Loop playback
STOP Command
Stop Loop playback
● Power-down flow
Power-up state
PDWN Command
Power-down state
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ML22Q53X
● Detailed flow of "Power-up → Playback → Power-down"
Power-down state
CBUSYB
A
No
No
"H"?
Yes
2nd byte of PLAY
Command
PUP command
CBUSYB
"H"?
No
CBUSYB
"H"?
Yes
Yes
RDSTAT Command
1st byte of SAFE command
CBUSYB
"H"?
CBUSYB
"H"?
No
No
No
Yes
Yes
Read status (SI="L")
2nd byte of SAFE
Command
BUSYB
"H"?
CBUSYB
"H"?
No
No
Yes
Yes
1st byte of AMODE
command
1st byte of AMODE
command
CBUSYB
"H"?
CBUSYB
"H"?
No
No
No
Yes
Yes
2nd byte of AMODE
Command
2nd byte of AMODE
Command
CBUSYB
"H"?
No
CBUSYB
"H"?
Yes
Yes
PDWN Command
1st byte of PLAY command
CBUSYB
"H"?
No
CBUSYB
"H"?
Yes
Yes
Power-down state
A
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ML22Q53X
● Processing flow for speaker short detection
SPDERR occur
Check STATUS1, 2 pins "H"
RDERR Command
CBUSYB
"H"?
No
Yes
Read status (SI="L")
※ Confirm that the SPDERR bit is "H".
Playback end
Yes
STOP Command
No
1st byte of AMODE
command
CBUSYB
"H"?
No
Yes
CBUSYB
"H"?
RDSTAT Command
No
Yes
2nd byte of AMODE
Command
CBUSYB
"H"?
※ Speaker Mode Power-Down Setting
No
No
Yes
CBUSYB
"H"?
Read status (SI="L")
No
Yes
ERRCL Command
※ Clearing the ERR bit/ STATUS1,2 pins
BUSYB
"H"?
Yes
CBUSYB
"H"?
Yes
No
Command wait state
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● 1-byte command input flow in two-times input mode
Start
Selects the output of misoperation detection and failure detection
to the STATUS1 or STATUS2 pin by OUTSTAT command.
First command input
Second command input
First ERRCL command input
Second ERRCL command
input
STATUS1, 2 pins
"L"?
No
No
Yes
STATUS1, 2 pins
No
No
"L"?
Yes
CBUSYB
"H"?
CBUSYB
"H"?
Yes
End
Yes
First command input
(inputting again)
Second command input
(inputting again)
STATUS1, 2 pins
"L"?
No
No
Yes
CBUSYB
"H"?
Yes
End
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● 2-byte command input flow in two-times input mode
Selects the output of misoperation detection and failure detection
to the STATUS1 or STATUS2 pin by OUTSTAT command.
Start
First command input
(1Byte)
First ERRCL command input
Second command input
(1Byte)
Second ERRCL command input
STATUS1, 2 pins
"L"?
No
No
Yes
STATUS1, 2 pins
"L"?
No
No
Yes
CBUSYB
"H"?
CBUSYB
"H"?
Yes
Yes
First command input
(inputting again)
Second command input
(inputting again)
STATUS1, 2 pins
"L"?
No
No
Yes
CBUSYB
"H"?
Yes
First command input
(2Byte)
First ERRCL command input
Second command input
(2Byte)
Second ERRCL command input
STATUS1, 2 pins
"L"?
No
No
STATUS1, 2 pins
"L"?
Yes
No
No
Yes
CBUSYB
"H"?
CBUSYB
"H"?
Yes
Yes
End
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● 3-byte command input flow in two-times input mode
Selects the output of misoperation detection and failure detection
to the STATUS1 or STATUS2 pin by OUTSTAT command.
Start
First command input
(1Byte)
First ERRCL command input
Second command input
(1Byte)
Second ERRCL command input
STATUS1, 2 pins
STATUS1, 2 pins
"L"?
"L"?
No
No
No
No
Yes
Yes
CBUSYB
"H"?
CBUSYB
"H"?
Yes
Yes
First command input
(inputting again)
Second command input
(inputting again)
STATUS1, 2 pins
"L"?
No
No
Yes
CBUSYB
"H"?
Yes
First command input
(2Byte)
Second command input
(2Byte)
First ERRCL command input
STATUS1, 2 pins
"L"?
Second ERRCL command input
No
No
Yes
STATUS1, 2 pins
"L"?
No
No
CBUSYB
"H"?
Yes
Yes
First command input
(3Byte)
CBUSYB
"H"?
Second command input
(3Byte)
Yes
STATUS1, 2 pins
"L"?
No
No
Yes
CBUSYB
"H"?
Yes
End
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● Read flow in two-times input mode (Applies to RDSTAT and RDVER commands)
Selects the output of misoperation detection and failure detection
to the STATUS1 or STATUS2 pin by OUTSTAT command.
Start
First command input
First ERRCL command input
Second command input
Second ERRCL command input
STATUS1, 2 pins
"L"?
No
No
Yes
STATUS1, 2 pins
"L"?
No
No
Yes
CBUSYB
"H"?
CBUSYB
"H"?
Yes
Yes
First read
First command input
(inputting again)
Second read
Second command input
(inputting again)
End
STATUS1, 2 pins
"L"?
No
No
Yes
CBUSYB
"H"?
Yes
First read
Second read
End
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● Read flow in two-times input mode (Applies to RDERR command)
Start
First command input
Second command input
CBUSYB
"H"?
No
Yes
First read
Second read
Read data
All "L"?
Yes
No
End
When the OUTSTAT command is used to select the misoperation detection and failure detection outputs and the STATUS1 or
STATUS2 pin is "H", if all the read data is "L", the data cannot be read normally. Accordingly, read the data again.
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● Read flow in the two-times input mode (applicable to the playback sound error detection command group)
Start
First command input
(1Byte)
First ERRCL command input
Second command input
(1Byte)
Second ERRCL command input
STATUS1, 2 pins
"L"?
Yes
No
No
STATUS1, 2 pins
"L"?
No
No
Yes
CBUSYB
"H"?
CBUSYB
"H"?
Yes
Yes
First command input
(inputting again)
Second command input
(inputting again)
STATUS1, 2 pins
"L"?
No
No
Yes
CBUSYB
"H"?
Yes
First command input
(2Byte)
First ERRCL command input
Second command input
(2Byte)
Second ERRCL command input
STATUS1, 2 pins
"L"?
No
No
STATUS1, 2 pins
"L"?
Yes
No
No
Yes
CBUSYB
"H"?
CBUSYB
"H"?
Yes
First read
Yes
Second read
End
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● SAI playback start flow
Power-up state
A
Analog power-up
※ Refer to the analog power-up flow.
SAICON command
Starting LRCLK/BCLK input
MUON Command
No
Playback end
Yes
※ Check that the BUSYB of all channels is 1
(Confirm by RDSTAT Command
or STATUS1/2 pins)
※SAICH commands are entered
10ms before MUON ends.
SAICH Command
CVOL Command
※ Set to MUTE
CVOL Command
PAN command
SAIMOD command
※ Cancel MUTE
Start SAI data input
No
SAI reception
Playback sound
data in Flash
memory
No
Yes
SAIRCON Command
Yes
PLAY
No
SAI
transmission
Yes
During playback
SAITCON Command
A
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● SAI playback stop flow
During playback
No
Playback end
※ Check that CH other than SAI is BUSYBn = "1".
(Check with RDSTAT command or STATUS1/2 pins.)
Yes
No
FADE=1
Yes
FADE Command
※ Set FADE = 1
CVOL Command
MUON Command
SAICH Command
SAICON Command
※ Set to MUTE
※ Enter the SAICH command at least 10ms prior to the
end of the silence period set by the MUON command.
End
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■ Peripheral circuit
● Handling of SG Pin
The SG pin is the signal ground for the built-in speaker amplifier. Connect a capacitor between this pin and the SPGND to
prevent noises.
Pin
SG
Symbol
C9
Recommended Constant
0.1μF±20%
● Handling of VDDL Pin
The VDDL pin is a power supply for the internal circuits. Connect a capacitor across the DGND to prevent noises and power
supply fluctuations. Please place it near the LSI on the user board.
Pin
Symbol
C8
Recommended Constant
1μF±20%
VDDL
● Handling of VDDR Pin
The VDDR pin is a power supply for the internal circuits. Connect a capacitor across the DGND to prevent noises and power
supply fluctuations. Please place it near the LSI on the user board.
When using the DVDD power supply voltage of 2.7V to 3.6V, connect to the DVDD power supply.
Pin
Symbol
C11
Recommended Constant
1μF±20%
VDDR
● Power wiring
The power supply of this LSI is divided into the following three power supplies.
・ Digital power supply (DVDD), digital GND (DGND)
・ Speaker amplifier power supply (SPVDD, SPOVDD), Speaker amplifier GND (SPGND, SPOGND)
・ Power supply for flash memory interface (IOVDD
)
These power supplies can be used independently. However, use it in the condition of SPVDD=SPOVDD≥DVDD
.
When using the same power supply, branch it from the root of the power supply for wiring.
● Bypass capacitor
To improve noise-resistance, place the bypass capacitor close to the LSI on the user board, and shorten the wiring as short as
possible without passing through the via.
Pin
SPVDD, SPOVDD
SPVDD, SPOVDD
DVDD
Symbol
C3
Recommended Constant
3.3μF±20%
C4
0.1μF±20%
C5
3.3μF±20%
C6
0.1μF±20%
DVDD
C7
1μF±20%
IOVDD
● Coupling capacitor
Insert when analog input from AIN pin.
Insert when using LOUT and SPP pins as line amplifier output.
Pin
Symbol
Recommended Constant
AIN
LOUT/SPP
C10
C12
0.1μF±20%
0.1μF±20%
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■ Application Circuit
● Exclusive use of clock synchronous serial interface and I2C interface. (DVDD=2. 7V to 3. 6V)
The VDDR handling differs from the case where DVDD=3.3V to 5.5V.
The power supply for the IRCSB, IRSCK, IRSO, IRSI and IRON pins is IOVDD
If the crystal unit has a built-in capacitor, C1 and C2 are not needed.
.
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● Exclusive use of clock synchronous serial interface and I2C interface. (DVDD=3. 3V to 5. 5V)
The VDDR handling differs from the case where DVDD=2.7V to 3.6V.
The power supply for the IRCSB, IRSCK, IRSO, IRSI and IRON pins is IOVDD.
If the crystal unit has a built-in capacitor, C1 and C2 are not needed.
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■ Recommended ceramic resonator
Recommended ceramic resonators are shown below.
● MURATA Corporation
Frequency [Hz]
4M
Product Name
Built-in load capacity [pF]
39
CSTCR4M00G55B-R0
CSTCR4M09G55B-R0
4.096M
■ RC4MHz characteristic
RC4MHz characteristic is as follows.
4.31(+5%)
max
4.22(+3%)
4.096
min
3.97 (-3%)
3.89 (-5%)
-40
0
40
70
105
Operating temperature [OC]
This graph is for reference only and does not guarantee the electrical characteristic.
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■ Limitation on the operation time (Playback operating time)
This LSI operating temperature is 105OC (max). But the average ambient temperature at 1W playback (8ohm drive) for 10
years in the reliability design is Ta=65OC. (max (the package heat resistance θja=32.1[OC/W]))
When this LSI operates 1W playback (8ohm drive) consecutively, the product life changes by the package temperature rise
by the consumption. This limitation does not matter in the state that a speaker amplifier does not play.
The factors to decide the operation time (playback operating time) are the average ambient temperature (Ta), playback Watts
(at the speaker drive mode), the soldering area ratio, and so on. In addition, the limitation on the operation time changes by
the heat designs of the board.
■ Package Heat Resistance Value (Reference Value) (θja)
The following table is the package heat resistance value θja (reference value).
This value changes the condition of the board (size, layer number, and so on).
Board
θja
Ψjc
Ψjb
Condition
JEDEC 4 layers *1
Air cooling condition:No wind
(0m/s)
32.1[OC/W] 0.70[OC/W] 12.2[OC/W]
38.3[OC/W] 0.74[OC/W] 13.0[OC/W]
(W/L/t=76.2/114.5/1.6(mm))
JEDEC 2 layers *2
(W/L/t=76.2/114.5/1.6(mm))
the soldering area ratio*3:100%
*1 : The wiring density : 1st layer(Top) 60% / 2nd layer 100% / 3rd layer 100% / 4th layer(Bottom) 60%.
*2 : The wiring density : 1st layer(Top) 60% / 2nd layer(Bottom) 100%.
*3 : The soldering area ratio is the ratio that the heat sink area of this LSI and a land pattern on the board are soldered. 100%
mean that the heat sink area of this LSI is completely soldered to the land pattern on the board. About the land pattern on the
board, be sure to refer to the next clause (Package Dimensions).
Ta
Tc
The definition of each temperature is shown below.
Tj
Tb
Mounting board
Take measures to dissipate heat on the mounting board so that the maximum junction temperature does not exceed 125 OC.
1mm
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■ Package Dimensions
● ML22Q53X-NNN/ML22Q53X-xxxTB
Notes for heat sink type Package
This LSI adopts a heat sink type package to raise a radiation of heat characteristic. Be sure to design the land pattern corresponding
to the heat sink area of the LSI on a board, and solder each other. The heat sink area of the LSI solder open or GND on the board.
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Notes for Mounting the Surface Mount Type Package
The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore,
before you perform reflow mounting, contact a ROHM sales office for the product name, package name, pin number, package
code and desired mounting conditions (reflow method, temperature and times).
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■ Differences from Existing Speech Synthesis LSIs (ML22Q553/ML22594)
Parameter
ML22Q553
ML22594
ML22Q53X
Clock synchronous
serial
Clock synchronous serial
I2C (2 channels)
MCU command interface
←
←
←
(1 channel)
Serial Audio Interface (SAI)
Clock frequency
-
Yes
4.096MHz
(crystal oscillation
circuit/built-in RC oscillation)
4.096MHz
(Built-in crystal
oscillation circuit)
532: 2Mbits (flash memory)
533: 4Mbits (flash memory)
535: 16Mbits (flash memory)
4Mbits
(flash memory)
Built
External
Flash memory rewrite function
6Mbits(mask rom)
Memory capacity
-
Up to 128Mbits
-
-
Flash memory interface
MCU command interface
(clock synchronous serial)
HQ-ADPCM
4bit ADPCM2
8-bit non-linear PCM
8bit straight PCM
16-bit straight PCM
6.4/12.8/25.6
JTAG interface
HQ-ADPCM
Speech synthesis
algorithm
8-bit non-linear PCM
8bit straight PCM
16-bit straight PCM
6.4/12.8/25.6
←
8.0/16.0/32.0
8.0/16.0/32.0
10.7/21.3
11.025/22.05/44.1
12.0/24.0/48.0
Sampling frequency
(kHz)
←
←
←
12.0/24.0/48.0
4 channels
Sound function
Simultaneous
sounding function
(Mixing-function)
Maximum number
of phrases
Edit ROM function
Silence insertion
function
←
1024
4096
←
Yes
20ms to 1024ms
(4ms step)
Yes
←
←
←
Repeat function
←
←
←
Yes
Playback sound and SAI mixing functions
-
FIR type interpolation
filter
Voltage type 16-bit
1. 0W@8Ω
(SPVDD=5V)
32 levels
Low-pass filter
←
←
←
←
←
←
D/A converter
Speaker amplifier (Class AB)
Volume
adjustment
function
Digital
Analog
Fade function
←
←
←
←
128 levels
16 levels
Yes
50 levels
-
External analog input
Yes
←
Clock error
detection
-
-
←
←
Yes
Yes
Playback sound
error detection
Power supply
voltage detection
Thermal detection
Speaker pin ground
fault detection *1
Yes
Yes
Yes
←
←
←
-
Failure
detection
functions
←
←
Speaker pin short
detection *1
Speaker
disconnection
detection
Yes
-
←
←
←
Yes
DVDD=2.7 to 5.5V
SPVDD=SPOVDD≥DVDD
IOVDD=2.7V to 5.5V
DVDD=SPVDD=4.5 to 5.5V
IOVDD=2.7V to 5.5V
DVDD=SPVDD=4.5 to 5.5V
Power-supply voltage
Operating temperature
Package
-40 to 105OC
30-pin SSOP
←
←
←
48-pin TQFP
*1 The ground fault detection and short-circuit detection functions can be used when the SPVDD is 4.5V or higher.
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■ Speech LSI Utility Setting Items
Set the following items on the Speech LSI Utility.
Item
Description
Set any 8-bit data.
・0x69: Flash memory cannot be accessed by the
FDIRECT command.
・Other than 0x69: Accessing the flash memory is
enabled when the protection unlock data entered by the
FDIRECT command matches the data.
Protection code for flash memory
access
Select master clock(Source clock oscillation).
・RC (RC oscillation)
・Xtal (Crystal or ceramic resonator)
Master clock selection
Master clock frequency
Set the master clock frequency to FOSC
.
・4.096 : 4.096MHz setting
・4.000 : 4.000MHz setting
Select the number of phrases from the following.
・4096
・3072
・2048
・1024
Number of phrases used
Set any 8-bit data.
Read by RDVER command.
Sound ROM information
Output format selection.
Class D amplifier output format
・Half-wave mode
Full wave mode is not supported.
Select the processing to be performed when an overflow
occurs.
・Hold current state
・Transition to the state after PUP command input
WDT counter, RST counter
WDTERR or RSTERR
processing at overflow
Select the overflow time from the following.
・125ms
・500ms
・2s
WDT counter, RST counter
WDTERR or RSTERR
overflow time
・4s
Refer to the Speech LSI Utility User's Manual for more information.
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■ Check lists
This check list has notes to frequently overlooked or misunderstood hardware features of the LSI. Check each note listed up
chapter by chapter while coding the program or evaluating it using the LSI.
■Feature
[ ] *1 Mixing with SAI is limited by the sampling frequency. Refer to the "Function description".
[ ] *2 Handle VDDR pin in two different ways depending on the voltage range 2.7-3.6V or 3.3-5.5V. Refer to the
"Application Circuit".
[ ] *3 The operating time of the speaker amplifier may be limited depending on the average ambient temperature (Ta)
used.
■Pin Description
[ ] (SCL pin) When using an I2C, be sure to insert a pull-up resistor between DVDD pin.
[ ] (SCL pin) Accessing with clock synchronous serial interface at the same time is prohibited.
[ ] (SDA pin) When using an I2C, be sure to insert a pull-up resistor between DVDD pin.
[ ] (SDA pin) Accessing with clock synchronous serial interface at the same time is prohibited.
[ ] (CSB pin) Accessing with I2C slave interface at the same time is prohibited.
[ ] (SCK pin) Accessing with I2C slave interface at the same time is prohibited.
[ ] (SI pin) Accessing with I2C slave interface at the same time is prohibited.
[ ] (SO pin) Accessing with I2C slave interface at the same time is prohibited.
[ ] (IRON pin) Set this bit to "L" during playback operation using flash memory.
[ ] (IRON pin) Set this bit to "H" for onboard rewriting.
[ ] (IOVDD pin) Connect to DVDD pin even when not using serial flash memory interface.
[ ] (IOVDD pin) Connect a bypass capacitor between this pin and the DGND pin.
[ ] (VDDR pin) Connect a capacitor between this pin and DGND pin as close as possible.
[ ] (VDDR pin) Connect this pin to the DVDD pin when DVDD = 2.7 to 3.6V.
[ ] (XTB pin) When using a resonator, connect it as close as possible.
[ ] (XTB pin) Leave it open when not in use.
[ ] (XT pin) To use an external clock, input from this pin. Delete the capacitor when a crystal or ceramic resonator is
connected.
[ ] (XT pin) When using a resonator, connect it as close as possible.
[ ] (XT pin) Leave it open when not in use.
[ ] (DVDD pin) Connect a bypass capacitor between this pin and the DGND pin.
[ ] (VDDL pin) Connect a capacitor between this pin and DGND pin as close as possible.
[ ] (SG pin) Connect a capacitor between this pin and SPGND pin.
[ ] (SPVDD pin) Connect a bypass capacitor between this pin and the SPGND pin.
[ ] (SPOVDD pin) Set it at the same potential as the SPVDD
.
[ ] (SPOGND pin) Set it at the same potential as the SPGND.
[ ] (RESETB pin) At power-on, input an "L" level to this pin. After the power supply voltage stabilizes, set this pin to an
"H" level.
[ ] (TEST0 pin) Fix to the DGND.
[ ] (CBUSYB pin) Be sure to input a command with this pin at an "H" level.
[ ] (N.C. pin) Unused pin. Leave open.
■Termination of Unused Pins
[ ] Confirm the recommended termination of unused pins in this chapter.
■Electrical characteristics
●Recommended operating conditions
[ ] *1 Be sure to SPVDD=SPOVDD>=DVDD
.
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■Function description
●I2C interface (Slave)
[ ] When I2C is used, be sure to insert a pull-up resistor between SCL and SDA pins and DVDD pin.
◆ Command flow when reading data
[ ] The data to be read is updated by inputting RDSTAT/RDERR/RDVER command. Be sure to enter the
RDSTAT/RDERR/RDVER command before reading the internal status.
●SAI(Serial Audio Interface)
[ ] To use SAI, use AMODE commands to place the SAI into the analog power-up status.
●Mixing function
◆ Restrictions when using Serial Audio Interface(SAI)
[ ] When the serial audio interface (SAI) is used, there are some limitations to the maximum number of mixing and
playable channels depending on the sampling frequency.
[ ] When mixing at the sampling frequencies of 8.0/16.0/32.0kHz with using Serial Audio Interface(SAI), HQ-ADPCM
cannot be used.
◆ Waveform clamp precautions for mixing
[ ] If the clamp is known to be generated in advance, adjust the volume of each channel by CVOL and PAN commands.
◆ Different sampling frequency mixing algorithm
[ ] It is not possible to perform channel mixing by a different sampling frequency group.Note that when channel synthesis
is performed on a sampling frequency group other than the selected sampling frequency group, playback will be faster
or slower.
●Misoperation detection and failure detection functions
◆ SPP pin and SPM pin short detection
[ ] After inputting SAFE command, start the analog power-up operation by AMODE command within 10ms.
◆ Flash memory error detection
[ ] If the error bit (ROMERR) is set to "1" after the PUP command and before the PLAY command or START command
starts playback, this LSI may have error at the time of start. In such cases, initialize this LSI by moving the LSI to the
power-down mode by resetting the LSI by the RESETB pin or by using PDWN command.
◆ Detects the stop of clock input from a crystal resonator or ceramic resonator
[ ] If the RDERR command (first byte) is inputted before the crystal or ceramic resonator stops and switches to RC
oscillation (about 500μs), the CBUSYB pin will remain "L". Therefore, read the command after the CBUSYB pin
becomes "H".
[ ] When the crystal resonator or the ceramic resonator stops and switches to RC oscillation, playback may become
abnormal. Therefore, after confirming that the error bit (OSCERR) is "1", enter STOP command to stop playback.
◆ Detects disconnection/short circuit of LRCLK
[ ] *5 The unit does not recover even if a normal LRCLK is input after stopping playback. Enter MUON command
→SAICH command after inputting a normal LRCLK.
◆ Detects disconnection/short circuit of SAI_IN
[ ] When OUTEN is set to "1" and INEN is set to "0" by the SAICON command, the SAI_IN input is disabled. Therefore,
set SAIINEN to "0".
◆ Mixing number error detection
[ ] When using the serial audio interface (SAI), the sampling frequency limits the maximum number of mixings and
playable channels.
■Timing chart
●Common
◆ Power-on timing
[ ] Start up in the order of DVDD, SPVDD and IOVDD or DVDD, IOVDD and SPVDD.
[ ] Be sure to input "L" to the RESETB pin before inputting the first command after power-on.
[ ] Be sure to enter "L" at the RESETB pin when the DVDD is below the (recommended) operating voltage range.
◆ Power-off timing
[ ] Shut down in the order of IOVDD, SPVDD, and DVDD or SPVDD, IOVDD, and DVDD.
[ ] Shut down each power supply after changing to the power down status with PDWN commands.
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●Clock synchronous serial
◆ Change volume timing by AVOL command
[ ] Speaker amplifier volume setting by AVOL commands is valid only when Class AB speaker amplifier is used.
When a Class D speaker amplifier is used, the setting value is ignored and +0.0dB is selected.
◆ Continuous playback timing by PLAY command
[ ] When making continuous playbacks, input the PLAY command for the next phrases within the specified time period
(tcm) after the NCR of the corresponding channel changes to "H" level.
[ ] When the playback is not continuous, input the PLAY command for the next phrases after confirming the playback is
completed by RDSTAT command and etc.
◆ Continuous playback timing by START command
[ ] When making continuous playbacks, send the START command for the next phrases within the specified time period
(tcm) after the NCR of the corresponding channel changes to "H" level.
[ ] When the playback is not continuous, input the START command for the next phrases after confirming the playback is
completed by RDSTAT command, etc.
◆ Continuous playback timing by MUON command
[ ] When making continuous playbacks, input the MUON/PLAY/START command for the next phrases within 10ms
(tcm) after the NCR of the corresponding channel changes to "H" level.When the playback is not continuous, input
the MUON/PLAY/START command for the next phrases after confirming the playback is completed by RDSTAT
command and etc.
◆ Repeat playback setting/release timing by SLOOP/CLOOP command
[ ] The SLOOP command is valid only during playback. After the PLAY command is input, input the SLOOP command
within the specified period (tcm) after the NCR of the corresponding channel becomes "H" level.
●I2C Interface (Slave)
◆ Change volume timing by AVOL command
[ ] Speaker amplifier volume setting by AVOL commands is valid only when Class AB speaker amplifier is used.
When a Class D speaker amplifier is used, the setting value is ignored and +0.0dB is selected.
◆Continuous playback timing by PLAY command
[ ] When making continuous playbacks, input the PLAY command for the next phrases within the specified time period
(tcm) after the NCR of the corresponding channel changes to "H" level.
[ ] When the playback is not continuous, input the PLAY command for the next phrases after confirming the playback is
completed by RDSTAT command and etc.
◆ Continuous playback timing by START command
[ ] When making continuous playbacks, send the START command for the next phrases within the specified time period
(tcm) after the NCR of the corresponding channel changes to "H" level.
[ ] When the playback is not continuous, input the START command for the next phrases after confirming the playback is
completed by RDSTAT command, etc.
◆ Continuous playback timing by MUON command
[ ] When making continuous playbacks, input the MUON/PLAY/START command for the next phrases within 10ms
(tcm) after the NCR of the corresponding channel changes to "H" level.When the playback is not continuous, input
the MUON/PLAY/START command for the next phrases after confirming the playback is completed by RDSTAT
command and etc.
◆ Repeat playback setting/release timing by SLOOP/CLOOP command
[ ] The SLOOP command is valid only during playback. After the PLAY command is input, input the SLOOP command
within the specified period (tcm) after the NCR of the corresponding channel becomes "H" level.
■Command
●Command list
[ ] Do not enter command that is not described in this manual. Enter the command with the CBUSYB "H".
●Description of Command Functions
◆ PUP command
[ ] Even if two-times input modes are used for the I2C interface, one-time input is used for the slave address input. If the
slave address matches, ACK is returned. If the slave address does not match, NACK is returned. The command is
input two-times.
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◆ AMODE command
[ ] To perform power-down under a setting condition that differs from the power-up condition of the analog unit, set the
AMODE command to set the power-down condition again.
[ ] To power up the analog part, set the CVOL command to 00h (initial value) and then enter the AMODE command.
[ ] When using analog mixing from the AIN pin, set DAMP = "0" (Class AB amplifier is used). In this LSI, select DAMP
= "0" (Class AB amplifier is used).
[ ] Input the sound signals to the AIN pin after CBUSYB pin becomes "H" by the AMODE command.
[ ] When using a Class D amplifier with speaker amplifier outputs, set it to the power-up state (AEN1/AEN0= "01") or the
power-down state (AEN1/AEN0= "00"). If DAMP = "1" is selected, do not set AEN1= "1".
◆ AVOL command
[ ] AV5-AV2=1h and 2h are prohibited.
◆ FDIRECT command
[ ] The FDIRECT command controls accesses to the flash memory using the clock synchronous serial interface.Input the
command after inputting the PUP command.
[ ] Do not enter this command because this command is ignored when this command is entered from the I2C interface.
[ ] To cancel the flash memory access mode, insert a reset (RESETB = "L") and conduct initialization or turn off the
power supply.
◆ START command
[ ] Be sure to specify one of the channels for the channel setting (CH0-CH3). Do not input it to "0" (all “0”) with
specifying nothing. If it is input with specifying nothing (all "0"), the command is ignored.
◆ STOP command
[ ] The STOP command can be input regardless of the status of the NCR during playback operation. However, following
the elapse of CBUSYB "L" level output time 3 (tCB3), input the next command after confirming that the BUSYB
signal becomes "H". If the BUSYB signal does not become "H", enter the STOP command again.
[ ] Be sure to specify one of the channels for the channel setting (CH0-CH3). Do not input it to "0" (all “0”) with
specifying nothing. If it is input with specifying nothing (all "0"), the command is ignored.
◆ MUON command
[ ] Set the silence setting (M7-M0) to 04h or more (tmu>=20ms).
[ ] Be sure to specify one of the channels for the channel setting (CH0-CH3). Do not input it to "0" (all “0”) with
specifying nothing. If it is input with specifying nothing (all "0"), the command is ignored.
◆ SLOOP command
[ ] Be sure to specify one of the channels for the channel setting (CH0-CH3). Do not input it to "0" (all “0”) with
specifying nothing. If it is input with specifying nothing (all "0"), the command is ignored.
◆ CLOOP command
[ ] Be sure to specify one of the channels for the channel setting (CH0-CH3).Do not input it to "0" (all “0”) with
specifying nothing. If it is input with specifying nothing (all "0"), the command is ignored.
◆ CVOL command
[ ] Be sure to specify one of the channels for the channel setting (CH0-CH3). When multiple channels are specified, the
volume of the specified channels is set. Do not input it to "0" (all “0”) with specifying nothing. If it is input with
specifying nothing (all "0"), the command is ignored.
◆ RDSTAT commnad
[ ] When reading the status of the second byte after command input, set the SI pin to "L".
◆ RDVER command
[ ] When reading the status of the second byte after command input, set the SI pin to "L".
◆ RDERR command
[ ] When reading the status of the second byte after command input, set the SI pin to "L".
[ ] If the outputs of misoperation detection and failure detection are selected by OUTSTAT command, and the read data is
all "L" even though STATUS1 or STATUS2 pin is "H", the read data cannot be read normally. Be sure to read it
again.
◆ SAFE command
[ ] The initial value is the operation stop state ("0"). When this bit is set to "1", operation starts.
[ ] *1 Do not set WDTEN and RSTEN to "1" at the same time. If these bits are set to "1" at the same time, only the RSTEN
bit is set to "1".
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◆ SAICH command
[ ] Set these bits when channels other than SAIs are not playing back (BUSYBn is "1").
[ ] If you want to set LEN="0" and REN="1" with LEN="1" and REN="0", set LEN="0" and REN="1" after setting
LEN=REN="0".
[ ] Start the LRCLK/BCLK input after entering the SAICON command.Subsequently, enter the MUON command and
then the SAICH command.
[ ] After entering the MUON command, enter the SAICH command at least 10ms prior to the end of the silence period set
by the MUON command.
[ ] Use a channel that is not played back by SAICH as the playback channel set by MUON commands. To mix with ROM
playback, use a channel for ROM playback.
◆ SAICON command
[ ] Set this bit when the Lch-side serial audio interface (SAI) operation of the SAICH command is stopped (LEN="0") and
the Rch-side serial audio interface (SAI) operation is stopped (REN="0"). If either LEN or REN is set to "1", the
entered SAICON command is ignored.
◆ SAITCON command
[ ] Use the same format as that of SAIRCON command. Set this bit when the Lch-side serial audio interface (SAI)
operation of the SAICH command is stopped (LEN="0") and the Rch-side serial audio interface (SAI) operation is
stopped (REN="0"). If either LEN or REN is set to "1", the entered SAITCON command is ignored.
◆ SAIRCON command
[ ] Use the same format as that of SAITCON command. Set this bit when the Lch-side serial audio interface (SAI)
operation of the SAICH command is stopped (LEN="0") and the Rch-side serial audio interface (SAI) operation is
stopped (REN="0"). If either LEN or REN is set to "1", the entered SAIRCON command is ignored.
◆ SAIMOD command
[ ] Set this bit when the Lch-side serial audio interface (SAI) operation of the SAICH command is stopped (LEN="0") and
the Rch-side serial audio interface (SAI) operation is stopped (REN="0"). If either LEN or REN is set to "1", the
entered SAIMOD command is ignored.
■Peripheral circuit
●Handling of SG Pin／●Handling of VDDL Pin／●Handling of VDDR Pin／●Power wiring／●Bypass capacitor／●Coupling
capacitor
[ ] Confirm the recommended values and precautions in this chapter.
■Package Dimensions
[ ] Confirm “Notes for heat sink type Package” and “Notes for Mounting the Surface Mount Type Package” in this
chapter.
■Speech LSI Utility Setting Items
[ ] Confirm setting items of “Speech LSI Utility” in this chapter.
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■ Revision history
Page
Previous
edition
Document No.
Date
Description
Current
edition
FEDL22Q53X-01
FEDL22Q53X-02
Apr 24, 2020
Jun 23, 2020
-
-
Formal 1st edition.
Added “DVDD，SPVDD/SPOVDD and IOVDD can be set
independently. (SPVDD=SPOVDD≥DVDD)” to the description
of power-supply voltage.
2
2
4
4
21
21
Changed description of SCL pin to “be sure to insert a
pull-up resistor between DVDD pin.”
172
173
172
173
Added “*3” to the standard value of IDDO and IDDS of DC
characteristics.
Added “Accessing with I2C slave interface at the same time
is prohibited.” to Clock Synchronous Serail Interface.
12
20
12
20
Added “Accessing with clock synchronous serial interface at
the same time is prohibited.” to Clock Synchronous Serail
Interface.
21
21
24
27
24
27
Added description to SAI(Serial Audio Interface).
Added definition of compression rate.
Changed description of command error detection.
(Not a change in product specifications.)
34
38
34
38
Changed description of watchdog timer overflow detection.
(Not a change in product specifications.)
Changed description of RST counter overflow detection.
(Not a change in product specifications.)
40
44
46
40
44
46
Added description of mixing number error detection.
Added a method to return from flash memory access mode
to normal mode.
Changed description of DAMP bit of AMODE command.
(Not a change in product specifications.)
108
109
108
109
Changed description of POP bit of AMODE command.
(Not a change in product specifications.)
Changed description of table of AEN1, AEN0 and POP bit,
of AMODE command.
109
131
109
131
(Not a change in product specifications.)
Changed description of OSCEN bit of SAFE command.
(Not a change in product specifications.)
Added attention of voltage setting of SPVDD/SPOVDD and
DVDD for power wiring.
163
163
166
163
163
166
Added C12 to the coupling capacitor.
Changed notation of recommended ceramic resonator.
(Not a recommended product change.)
FEDL22Q53X-03
Oct 1,2020
Change current consumption IDDO value during playback
operation
12
12
(Before change)
(After change)
Max 55mA
Typ 25mA,Max 45mA
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Page
Previous
edition
Document No.
Date
Description
Current
edition
FEDL22Q53X-03
Oct 1,2020
When AMODE command is input CBUSYB “L” level output
time tPUPA2 value change
14
14
14
14
14
(Before change)
(After change)
min 72ms,typ 74ms,max 76ms
min 71ms,typ 73ms,max 75ms
When AMODE command is input CBUSYB “L” level output
time tPUPA3 value change
14
14
14
(Before change)
(After change)
min 32ms,typ 34ms,max 36ms
min 31ms,typ 33ms,max 35ms
When AMODE command is input CBUSYB “L” level output
time tPDA1 value change
(Before change)
(After change)
min 106ms,typ 108ms,max 110ms
min 100ms,typ 102ms,max 104ms
When AMODE command is input CBUSYB “L” level output
time tPDA2 value change
(Before change)
(After change)
min 143ms,typ 145ms,max 147ms
min 142ms,typ 144ms,max 146ms
When AMODE command is input CBUSYB “L” level output
time tPDA3 value change
14
14
(Before change)
(After change)
min 103ms,typ 105ms,max 107ms
min 102ms,typ 104ms,max 106ms
Added WVDIFEDATH and WVDIFEDATL to the command
list
105
105
140
141
160
161
162
162
-
-
-
-
-
-
SCMODE command description deleted
WVDIFTH command description deleted
Deleted playback sound error detection start flow
Deleted AIN disconnection detection mode setting flow
Deleted AIN disconnection detection mode stop flow
Deleted Playback sound error detection stop flow
FEDL22Q53X-04
Jan 5,2021
Added IRCSB, IRSCK, IRSO, IRSI to the Termination of
Unused Pins
6
7
LOUT eauivalent circuit power supply change
9
10
(Before change)
(After change)
SPOVDD
SPVDD
Added LSB data hold time from SCK tDOH to the AC
Characteristics (Clock Synchronous Serial Interface).
15
20
51
16
21
52
Changed Clock Synchronous Serial Interface timing wave
form.
Changed Clock Synchronous Serial Interface timing wave
form.
Changed description of power down timming with POP
noise noise suppression.
108
109
(Not a change in product specifications.)
159
160
160
161
Changed Application Circuit.
Changed Application Circuit.
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Page
Previous
edition
Document No.
Date
Description
Current
edition
FEDL22Q53X-05
Jul 28,2021
Classification F I/O Equivalent Circuit change
9
9
9
(Before change)
(After change)
Input/Output
Output
Classification G I/O Equivalent Circuit change
9
(Before change)
(After change)
Input/Output
Input
Classification H I/O Equivalent Circuit change
9
9
(Before change)
(After change)
Input/Output
Output
17
17
AC characteristics I2C interface First mode Wording deleted
Change the timing chart when the OSCEN bit of the SAFE
command continues to be “1”
(Before change)
stopped, the STATUSn pin and OSCERR maintain “L”.
(After change) After ERRCL, when oscillation is
stopped, the STATUSn pin and OSCERR become “H”.
After ERRCL, when oscillation is
43
43
160,161
160,161 Added explanation about capacitors for crystal oscillators
IRSCK terminal processing has been changed.
FEDL22Q53X-06
Jun 29,2022
(Before change)
(After change)
Open
GND
160,161
164
160,161 IRSO terminal processing has been changed.
(Before change)
(After change)
GND
Open
(Not a change in product specifications.)
Replaced package dimensions(QSL-69515) with Revision
2.
164
175/176
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Notes
1) The information contained herein is subject to change without notice.
2) When using LAPIS Technology Products, refer to the latest product information (data sheets, user’s manuals, application
notes, etc.), and ensure that usage conditions (absolute maximum ratings, recommended operating conditions, etc.) are within
the ranges specified. LAPIS Technology disclaims any and all liability for any malfunctions, failure or accident arising out of
or in connection with the use of LAPIS Technology Products outside of such usage conditions specified ranges, or without
observing precautions. Even if it is used within such usage conditions specified ranges, semiconductors can break down and
malfunction due to various factors. Therefore, in order to prevent personal injury, fire or the other damage from break down or
malfunction of LAPIS Technology Products, please take safety at your own risk measures such as complying with the
derating characteristics, implementing redundant and fire prevention designs, and utilizing backups and fail-safe procedures.
You are responsible for evaluating the safety of the final products or systems manufactured by you.
3) Descriptions of circuits, software and other related information in this document are provided only to illustrate the standard
operation of semiconductor products and application examples. You are fully responsible for the incorporation or any other
use of the circuits, software, and information in the design of your product or system. And the peripheral conditions must be
taken into account when designing circuits for mass production. LAPIS Technology disclaims any and all liability for any
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LAPIS Technology disclaims any and all liability for any losses and damages incurred by you or third parties arising by using
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Copyright 2020 – 2022 LAPIS Technology Co., Ltd.
2-4-8 Shinyokohama, Kouhoku-ku, Yokohama 222-8575, Japan
https://www.lapis-tech.com/en/
176/176
相关型号：
ML22Q533
ML2253x系列是内置串行音频接口的车载级4通道混合语音合成LSI，可提供Flash存储器内置型和外置型两种类型的产品。产品采用实现高音质的HQ-ADPCM、16位D/A转换器和低通滤波器，并内置用来直接驱动扬声器的1.0W单声道扬声器放大器。另外，还配备了车载应用所需的故障检测功能，可以检测LSI内部的异常以及LSI与扬声器之间连接线的异常。语音输出所需的功能已经全部集成于1枚芯片中，因此仅需增加本LSI，即可轻松实现语音功能。
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