KS0076B [SAMSUNG]

16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD; 16COM / 40SEG驱动器和控制器的点阵LCD
KS0076B
型号: KS0076B
厂家: SAMSUNG    SAMSUNG
描述:

16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
16COM / 40SEG驱动器和控制器的点阵LCD

驱动器 控制器 CD
文件: 总17页 (文件大小:271K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
INTRODUCTION  
80 QFP  
The KS0076B is a dot matrix LCD driver & controller LSl  
which is fabricated by low power CMOS technology.  
FUNCTION  
· Character type dot matrix LCD driver & controller  
· Internal driver: 16 common and 40 segment signal output.  
· Display character format; 5 x 7 dot + cursor,  
5 x 10 dots + cursor  
· Easy Interface with a 4-bit or 8-bit MPU  
· Display character pattern:  
5 x 7 dots format: 192 kinds, 5 x 10 dots format: 32 kinds  
· The special character pattern can be programma-  
ble by character generator RAM directly.  
· A customer character pattern can be programmable  
by mask option.(KS0076B-00 : Standard type)  
· Automatic power on reset function.  
· It can drive a maximum 80 characters by using  
the KS0065B or KS0063 externally.  
· It is possible to read both Character Generator and  
Display Data RAM from MPU.  
FEATURES  
· Wave form: M signal B type  
· Internal Memory  
- Character Generator ROM: 8320bits  
- Character Generator RAM: 512 bits  
- Display Data RAM: 80 x 8bits for 80 digits.  
· Power supply Voltage; +5V±10%  
· Supply voltage for display : 0V(V5)  
· CMOS process  
· 1/8 duty, 1/11 duty or 1/16 duty: selectable  
(1/8 duty; 5x7 dots format 1 line, 1/11 duty; 5x10 dots format 1 line,  
1/16 duty: 5x7 dots format 2 line)  
· 80 QFP or bare chip available .  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
BLOCK DIAGRAM  
Power  
supply  
for  
V1  
V2  
V3  
V4  
V5  
Parallel/serial  
Data conversion  
Circuit  
LCD  
5
Drive  
5
Charater  
Generator  
ROM  
Character  
Generator  
RAM  
Cursor  
Blink  
Busy  
Flag  
Control  
Circuit  
( CG ROM )  
8320 bits  
( CG RAM )  
512 bits  
DB0 ~ DB3  
DB4 ~ DB7  
8
8
segment  
signal  
Data  
8
Register  
( DR )  
40 - bit  
Shift  
40 - bit  
Latch  
Segment  
Signal  
40  
40  
40  
Input  
( S1 - S40  
)
7
Output  
Buffer  
Display  
Register  
Circuit  
Driver  
7
Data RAM  
( DD RAM )  
80¡¿8 bits  
R/W  
RS  
8
8
E
Instruction  
Register  
( IR )  
Instruction  
Decoder  
( ID )  
D
7
Address  
Counter  
( AC )  
common  
signal  
( C1 - C16  
16 - bit  
Shift  
16  
Common  
Signal  
16  
7
)
Register  
Driver  
Timing  
CLK1  
CLK2  
OSC1  
OSC2  
Generation  
Circuit  
M
VDD  
GND  
Fig. 1. KS0076B functional block diagram.  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
PIN CONFIGURATION  
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41  
65  
66  
67  
68  
69  
70  
71  
S38  
S37  
S36  
S35  
S34  
S33  
S32  
40  
39  
38  
DB1  
DB0  
E
37 R/W  
RS  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
D
M
S31 72  
S30 73  
S29 74  
S28 75  
VDD  
CLK2  
CLK1  
V5  
KS0076B  
S27  
S26  
S25  
S24  
S23  
76  
77  
78  
79  
80  
V4  
V3  
V2  
V1  
OSC2  
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24  
Fig. 2. 80 QFP Top View  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
PIN DESCRIPTION  
PIN (NO)  
VDD(33)  
VSS(GND) (23)  
V1-V5 (26-30)  
S1-S40  
INPUT/OUTPUT  
NAME  
Operating Voltage  
DESCRIPTION  
for logical circuit (5V±10%)  
0V (GND)  
INTERFACE  
Power  
supply  
Power  
Output  
Output  
Supply Voltage Bias voltage level fro LCD driving  
Segment output Segment signal output for LCD driving  
LCD  
LCD  
(22-1, 80-63)  
C1-C16  
Common output Common signal output for LCD driving  
(47-62)  
OSC1, OSC2  
(24, 25)  
Intput (OSC1)  
Output (OSC2)  
Oscillator  
Both pin connected to Rf resistor or  
ceramic resonator for internal oscillator  
circuit. In case of external frequency  
use only, the frequency is input to  
OSC1 terminal.  
Resistor or  
Ceramic  
Resonator  
CLK1 (31)  
CLK2 (32)  
M (34)  
Output  
Data latch Cock Clock output terminal for the serially  
transfered data to be latched to the driver.  
KS0065B  
or  
KS0063  
Data shift clock  
Clock output terminal used when D terminal  
data output shifts the inside of the driver.  
The alternating signal to convert LCD drive  
waveform to AC  
Alternated  
signal for LCD  
driver output  
Display data  
interface  
D (35)  
Character pattern data, which is cor-  
responding to each common signal, is  
supplied to driver serially.  
High  
Low  
Selection  
Non selection  
E (38)  
R/W (37)  
Intput  
Enable  
Read/Write  
Start enable signal to read or write the data  
R/W signal input is used to select the  
read/write  
mode  
MPU  
MPU  
MPU  
High  
Low  
Read mode  
Write Mode  
RS (36)  
Register select  
Register selection input  
High  
Data register  
(for read and write)  
Low  
Instruction register (for write),  
Busy flag, address counter  
(for read)  
DB0-DB7  
(39-46)  
Input / Output  
Data interface  
Used for data transfer between the MPU and  
KS0076B. These terminals are for data bus  
with bidirectional three-state. Initial 4 bit  
(DB0-DB3) are not used during 4-bit operation  
(DB7 can be used as a busy flag)  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
Internal logic of input/output terminal  
Logic diagram  
Applicable pin  
Input/output  
Input  
No  
Pull  
up  
VDD  
E
with  
pull  
up  
VDD  
VDD  
RS, R/W  
VDD  
Output  
CLK1, CLK2  
M,D  
VDD  
Input  
VDD  
DB0 - DB7  
Output  
VDD  
Enable  
Data  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
MAXIMUM ABSOLUTE LIMIT(Ta=25°C)  
Characteristic  
Operating Voltage  
Driver Supply Voltage  
Input Voltage  
Power Dissipation  
Operating Temperature  
Storage Temperature  
Symbol  
Value  
-0.3~+7.0  
-0.3~VDD+0.3  
-0.3 ~ VDD +0.3  
500  
Unit  
V
V
VDD  
VLCD  
VIN  
PD  
TOPR  
TSTG  
V
mW  
°C  
°C  
-20~+75  
-55~+125  
* Voltage greater than above may damage to the circuit (V ³ V1³ V2³ V3³ V4³ V5)  
DD  
ELECTRICAL CHARACTERISTICS  
DC Characteristics(VDD= +5V±10%, VSS=0V, Ta=-20°C ~+75°C)  
Characteristic  
Symbo  
Test condition  
Min Typ  
Max  
5.5  
Unit  
Applicable Pin  
l
Operating Voltage  
OperatingCurrent(*1)  
VDD  
IDD1  
-
4.5  
-
-
V
mA  
Ceramic resonator  
0.55  
0.8  
fosc=250KHz  
IDD2  
Resistor oscilation  
-
0.35  
0.6  
external clock operation  
fosc=270KHz  
Input Voltage 1  
Input Voltage 2  
Output Voltage 1  
Output Voltage 2  
Voltage Drop (*2)  
High  
Low  
High  
Low  
High  
Low  
High  
Low  
VIH1  
VIL1  
VIH2  
VIL2  
VOH1  
VOL1  
VOH2  
VOL2  
VdCOM  
VdSEG  
ILKG  
IIL  
fEC  
duty  
tR  
tF  
-
-
-
-
2.2  
-0.3  
VDD-1.0  
-0.2  
2.4  
-
0.9VDD  
-
-
-
-
-
-
-
-
-
-
-
VDD  
0.6  
VDD  
1.0  
-
0.4  
-
0.1VDD  
1
E, OB0-DB7,  
R/W, RS  
OSC1  
IOH=-0.205mA  
IOL=1.2mA  
IO=-40mA  
IO=40mA  
DB0-DB7  
V
CLK1, CLK2, M  
D
C1-C16  
S1-S40  
COM  
SEG  
IO=±0.1mA  
-
-
-
1
1
Input Leakage Current  
Input Low Current  
VIN=0 or VDD  
VDD=5V (test pull up R)  
-1  
-50  
125  
45  
-
E
mA  
-125  
250  
50  
-
-250  
350  
55  
0.2  
0.2  
350  
255  
RS,R/W,DB0-DB7  
OSC1  
Frequency(*3)  
Duty  
Rise Time  
Fall Time  
KHz  
%
ms  
ms  
KHz  
External Clock  
-
-
-
Internal Clock Frequency(*3)  
Ceramic Resinator Oscillation  
Frquency(*3)  
fOSC1  
fOSC2  
190  
245  
270  
250  
OSC1, OSC2  
V1 ~ V5  
Rf=91KW±2%  
-
LCD Driving Voltage(*4)  
VLCD1 VDD-V5  
VLCD2  
1/5 bias  
1/4 bias  
4.6  
3.0  
-
-
VDD  
VDD  
V
Note: *1) Applies to the current value flown in terminal VDD when power is input as follows; VDD=5V, GND=0V, V1 = 3.75V,  
V2 = 2.5V, V3 = 2.5V, V4 = 1.25V and V5 = 0V.  
*2) Applied to the voltage drop occuring from terminals VDD, V1, V4 and V5 to each common terminal (C1-C16)  
when 0.1mA is flown in or out to and from all COM and SEG terminals, and also to voltage drop occuring from  
terminals VDD, V2, V3 and V5 to each SEG terminal S1-S40. When the output level is at VDD, V1 or V2 level,  
0.1 mA is flown out, while 0.1 mA flow in when the output level is at V3, V4, or V5 level. This occurs when 5V  
is input to VDD, V1 and V3 or to V2, V4, and V5 respectively.  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
*3) Oscillator circuit  
Resistor circuit  
External clock cirucit  
*4) Input the voltage listed in the table below to V -V5  
1
Duty  
Bias  
1/8, 1/11  
1/4  
1/16  
1/5  
Power  
V1  
V2  
V3  
V4  
V5  
VDD - VLCD/4  
VDD - VLCD/2  
VDD - VLCD/2  
VDD - 3VLCD/4  
VDD - VLCD  
VDD - VLCD/5  
VDD - 2VLCD/5  
VDD - 3VLCD/5  
VDD - 4VLCD/5  
VDD - VLCD  
*VLCD is the LCD driving voltage, refer to the initial set of the instruction code.  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
AC Characteristics(VDD=5V±10%, VSS=0V Ta=-20 ~ +75°C)  
(1) Write mode (Writing data from Micom to KS0076B)  
Characteristic  
E Cycle Time  
Symbol  
Min  
500  
-
Typ  
Max  
Unit  
ns  
Test pin  
tc  
tR  
-
-
-
-
-
-
-
-
25  
25  
-
E
E Rise Time  
ns  
E
E
E Fall Time  
tF  
-
ns  
E Pulse Width ( High, Low)  
R/W And RS Set-Up Time  
R/W And RS Hold Time  
Data Set-Up Time  
Data Hold Time  
tw  
220  
40  
10  
60  
ns  
E
tSU1  
tH  
-
ns  
R/W, RS  
R/W, RS  
DB0 ~ DB7  
-
ns  
tSU2  
-
ns  
tH2  
10  
-
-
ns  
DB0 ~ DB7  
VIH1  
VIH1  
VIL1  
RS  
VIL1  
tH1  
tSU1  
R/W  
VIL1  
VIL1  
tw  
tH1  
VIH1  
VIL1  
VIH1  
VIL1  
E
VIL1  
tH2  
tF  
tSU2  
tR  
VIH1  
VIL1  
VIH1  
VIL1  
DB0 - DB7  
Valid Data  
tc  
(2) Read mode (Reading data from KS0076B to Micom)  
Characteristic  
E Cycle Time  
Symbol  
Min  
500  
-
Typ  
Max  
Unit  
Test pin  
tc  
tR  
-
-
-
-
-
-
-
-
-
25  
25  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
E
E
E Rise Time  
E Fall Time  
tF  
-
E
E Pulse Width ( High, Low)  
R/W And RS Set-Up Time  
R/W And RS Hold Time  
Data Output Delay Time  
Data Hold Time  
tw  
220  
40  
10  
-
E
tSU  
tH  
-
R/W, RS  
R/W, RS  
DB0 ~ DB7  
DB0 ~ DB7  
-
tD  
120  
-
tDH  
20  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
VIH1  
V IH1  
V IL1  
tSU  
R S  
V IL1  
tH  
R / W  
V IL1  
tw  
tF  
tH  
V IH1  
E
V IL1  
V IL1  
V IL1  
tR  
tDH  
tD  
V IH1  
V IL1  
VIH1  
VIL1  
D B0 - DB7  
Valid Data  
tc  
(3) Interface mode with KS0065B, KS0063  
Characteristic  
Clock Pulse Width High  
Clock Pluse Width Low  
Data Set-Up Time  
Data Hold Time  
Symbol  
tWCKH  
tWCKL  
tSU  
tDH  
tCSU  
Min  
800  
800  
300  
300  
Typ  
Max  
-
-
-
-
-
Unit  
Test pin  
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
CLK  
CLK  
D
D
CLK  
M
Clock Set-Up Time  
M Delay Time  
500  
tDM  
-1000  
1000  
0 . 9 V D D  
0 . 9 V D D  
C L K 1  
C L K 2  
tW C K H  
tC S U  
0 . 9 V D D  
tW C K H  
0 . 9 V D D  
0 . 1 V D D  
0 . 1 V D D  
0 . 1 V D D  
tC S U  
tW C K L  
0 . 9 V D D  
0 . 1 V D D  
0 . 9 V D D  
0 . 1 V D D  
D
tS U  
tD H  
M
0 . 9 V D D  
tD M  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
CONTROL and DISPLAY COMMAND  
Excution  
time  
Command  
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0  
Remark  
(fosc=250KHz)  
DISPLAY CLEAR  
RETURN HOME  
ENTRY MODE  
SET  
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
H
X
1.64ms  
1.64ms  
40ms  
cursor move to first digit  
·I/D; set cursor move direction  
I/D SH  
H
Increase  
I/D  
Decrease  
L
·SH: Specifies shift of display  
H
display is shifted  
SH  
display is not  
shifted  
L
DISPLAY  
ON/OFF  
L
L
L
L
L
L
H
D
C
B
40ms  
·Display  
H
Display on  
Display off  
D
·Cursor  
C
L
H
L
Cursor on  
Cursor off  
·Blinking  
H
Blinking on  
Blinking off  
B
L
SHIFT  
L
L
L
L
L
L
L
L
L
H
S/C R/L  
X
X
X
X
40ms  
40ms  
Display shift  
Cursor move  
H
L
SC  
H
L
Right shift  
Left shift  
R/L  
SET  
FUNCTION  
H
DL  
N
F
8 bits interface  
4 bits interface  
H
L
DL  
N
H
L
2 line display  
1 line display  
H
L
5x10 dots  
5x7 dots  
F
Table 1.  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
CONTROL and DISPLAY COMMAN(Dcontinued)  
Excution  
time  
Command  
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0  
Remark  
(fosc=250KHz)  
SET CG RAM  
ADDRESS  
SET DD RAM  
ADDRESS  
READ BUSY  
FLAG &  
L
L
L
L
L
L
H
H
CG RAM Data is sent and  
received after this setting  
DD RAM Data is sent and  
recevied after this setting  
CG RAM address  
(corresponds to cursor address)  
DD RAM address  
40ms  
40ms  
0ms  
H
BF  
Address Counter used for  
Both DD & CG RAM address  
Busy  
H
L
BF  
ADDRESS  
Ready  
- Reads BF indication  
internal operating is being  
performed.  
- reads address counter  
contents  
WRITE DATA  
READ DATA  
X: dont care  
H
H
L
H
Write data into DD or CGRAM  
Read data from DD or CGRAM  
46ms  
46ms  
Read Data  
Write Data  
Table 1  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
APPLICATION INFORMATION ACCORDING TO LCD PANEL  
1) LCD Panel:8 characterx1 line character format;5x7 dots + 1 cursor line(1/4 bias, 1/8 duty)  
C1  
C8  
S1  
KS0076B  
S40  
2) LCD Panel: 8 characterx1 line character format; 5x10 dots + 1 cursor line (1/4 bias, 1/11 duty)  
C1  
C11  
KS0076B  
S1  
S40  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
3) LCD Panel : 8 character x 2 line character format; 5 x 7 dots + 1 cursor line (1/5 bias, 1/16 duty)  
C 1  
C 8  
C 9  
C 16  
KS0076B  
S 1  
S 40  
4) LCD Panel : 16 character x 1 line Character format;5x7 dots + 1 cursor line (1/5 bias, 1/16 duty)  
C1  
C8  
S1  
KS0076B  
S40  
C9  
C16  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
5) LCD Panel : 4character x 2 line character ; 5x 7 dots + 1 cursor line (1/4 bias, 1/8 duty)  
S1  
S20  
C 1  
C 8  
KS0076B  
S21  
S40  
BIAS VOLTAGE  
DIVIDE CIRCUIT  
KS0076B  
KS0076B  
VDD  
V1 V2  
V3 V4  
V5  
VDD  
VDD ( + 5V )  
V1 V2  
V3 V4  
V
5
VDD ( +5V )  
R
R
R
R
R
R
R
R
R
GND  
-5V or GND  
GND  
-5V or GND  
( 1/4 bias, 1/8 or 1/11 duty )  
( 1/5 bias, 1/16 duty )  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
APPLICATION CIRCUIT  
To MPU  
KS0065B  
KS0065B  
KS0065B  
VLCD ( 1/5 bias )  
When KS0065B is externally connected to the KS0076B, you can increase the number of display digits up to 80 characters.  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
PAD DIAGRAM  
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64  
KS0076B  
63  
1
2
62  
61  
60  
59  
58  
3
4
5
6
7
57  
56  
8
9
55  
Y
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
54  
53  
X
(0,0)  
52  
51  
50  
49  
48  
47  
CHIP SIZE : 3630 ¡ ¿4450  
PAD SIZE : 100¡ ¿100  
UNIT  
: ¥ì m  
46  
45  
44  
43  
42  
41  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
* KS0076BMarking : easy to find the PAD No.1  
KS0076B  
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD  
PAD LOCATION  
UNIT (mm)  
PAD  
PAD  
PAD  
PAD  
PAD  
PAD  
COORDINATE  
COORDINATE  
COORDINATE  
NUMBER  
Y
Y
717.5  
X
X
1630  
X
-1630  
Y
NUMBER NAME  
NUMBER NAME  
NAME  
1
S22  
S21  
S20  
S19  
S18  
S17  
S16  
S15  
S14  
S13  
S12  
S11  
S10  
S9  
1816.5  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
V3  
V4  
-673.5 -1911.5  
-489.5 -1911.5  
-305.5 -1911.5  
-121.5 -1911.5  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
C9  
2
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
-1630  
1676.5  
1536.5  
1396.5  
1256.5  
1116.5  
976.5  
1630  
1630  
857.5  
997.5  
1166  
1306  
1446  
1586  
1276  
1918  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
2040  
C10  
C11  
C12  
C13  
C14  
C15  
C16  
S40  
S39  
S38  
S37  
S36  
S35  
S34  
S33  
S32  
S31  
S30  
S29  
S28  
S27  
S26  
S25  
S24  
S23  
3
V5  
4
CLK1  
CLK2  
VDD  
M
1630  
5
62.5  
-1911.5  
-1911.5  
-1911.5  
-1911.5  
-1911.5  
-1911.5  
1630  
6
240.5  
409.5  
593.5  
777.5  
961.5  
1630  
7
1630  
8
836.5  
D
1630  
9
696.5  
RS  
1630  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
556.5  
R/W  
E
1104.5  
964.5  
824.5  
684.5  
544.5  
404.5  
264.5  
124.5  
-15.5  
416.5  
1145.5 -1911.5  
1329.5 -1911.5  
1513.5 -1911.5  
276.5  
DB0  
DB1  
DB2  
DB3  
DB4  
DB5  
DB6  
DB7  
C1  
136.5  
-3.5  
1501.5  
1501.5  
1501.5  
1501.5  
1501.5  
1501.5  
1630  
-1573  
-1389  
-1205  
-1021  
-837  
-653  
-452  
-312  
-172  
-32  
S8  
-143.5  
-283.5  
-423.5  
-563.5  
-703.5  
-843.5  
-983.5  
-1123.5  
-1722.5  
-1911.5  
-1911.5  
-1911.5  
-1911.5  
S7  
S6  
S5  
S4  
-155.5  
-295.5  
-435.5  
-575.5  
-715.5  
-855.5  
-995.5  
-1135.5  
S3  
S2  
C2  
1630  
S1  
C3  
1630  
GND  
C4  
1630  
OSC1 -1401.5  
OSC2 -1217.5  
C5  
1630  
108  
C6  
1630  
248  
V1  
V2  
-1041.5  
-857.5  
C7  
1630  
388  
C8  
1630  
528  
Standard Character Pattern (KS0076B-00)  

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