S3C9004 [SAMSUNG]

SAM87RI family of 8-bit single-chip CMOS microcontrollers; SAM87RI家族的8位单芯片CMOS微控制器
S3C9004
型号: S3C9004
厂家: SAMSUNG    SAMSUNG
描述:

SAM87RI family of 8-bit single-chip CMOS microcontrollers
SAM87RI家族的8位单芯片CMOS微控制器

微控制器
文件: 总26页 (文件大小:163K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
S3C9004/P9004/C9014/P9014  
PRODUCT OVERVIEW  
1
PRODUCT OVERVIEW  
SAM87RI PRODUCT FAMILY  
Samsung's SAM87RI family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide  
range of integrated peripherals, and various mask-programmable ROM sizes.  
A dual address/data bus architecture and a large number of bit- or nibble-configurable I/O ports provide a flexible  
programming environment for applications with varied memory and I/O requirements. Timer/counters with  
selectable operating modes are included to support real-time operations. Many SAM87RI microcontrollers have  
an external interface that provides access to external memory and other peripheral devices.  
S3C9004/P9004/C9014/P9014 MICROCONTROLLER  
The S3C9004/P9004/C9014/P9014 single-chip 8-bit microcontroller is fabricated using an advanced CMOS  
process. It is built around the powerful SAM87RI CPU core.  
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register  
space, the size of the internal register file was logically expanded. The S3C9004/P9004/C9014/P9014 has 4 K  
bytes of program memory on-chip.  
Using the SAM87RI design approach, the following peripherals were integrated with the SAM87RI core:  
— Five configurable I/O ports (32 pins)  
— 12 bit-programmable pins for external interrupts  
— 8-bit timer/counter with three operating modes  
The S3C9004/P9004/C9014/P9014 is a versatile microcontroller that can be used in a wide range of general  
purpose applications. It is especially suitable for use as a keyboard controller and is available in a 40-pin DIP and  
a 44-pin QFP package.  
OTP  
The S3C9004/C9014 microcontroller is also available in OTP (One Time Programmable) version,  
S3P9004/P9014. S3P9004/P9014 microcontroller has an on-chip 8-Kbyte one-time-programmable EPROM  
instead of masked ROM. The S3P9004/P9014 is comparable to S3C9004/C9014, both in function and in pin  
configuration.  
1-1  
PRODUCT OVERVIEW  
S3C9004/P9004/C9014/P9014  
FEATURES  
CPU  
General I/O  
Five ports (32 pins total)  
SAM87RI CPU core  
Three bit-programmable ports (20 pins total)  
Memory  
Two bit-programmable ports with external  
interrupts (12 pins total)  
4-Kbyte internal program memory (ROM)  
208-byte internal register file  
8-Kbyte external program memory  
8-Kbyte external data memory  
Timer/Counter  
One 8-bit basic timer for watchdog function and  
programmable oscillation stabilization interval  
generation function  
Instruction Set  
One 8-bit timer/counter with PWM mode  
41 instructions  
Operating Temperature Range  
IDLE and STOP instructions added for power-  
down modes  
°
°
– 40 C to + 85 C  
Instruction Execution Time  
1.5 ms at 4 MHz fOSC  
Operating Voltage Range  
4.5 V to 5.5 V for S3C9004/P9004  
2.7 V to 5.5 V for S3C9014/P9014  
Interrupts  
14 interrupt sources with one vector, Each  
source has its pending bit  
Package Types  
40-pin DIP  
One level, one vector interrupt structure  
Oscillation Circuit Options  
4 MHz RC oscillator with on chip capacitor for  
S3C9004/P9004 ( –10% RC accuracy at VDD  
±
5% and Ta = 0°C–70°C, using 1% external  
precision resistor)  
RC oscillator for S3C9004/P9004  
Crystal/ceramic oscillator for S3C9014/P9014  
1-2  
S3C9004/P9004/C9014/P9014  
PRODUCT OVERVIEW  
BLOCK DIAGRAM  
P0.0-P0.4/A8-A12,  
P1.0-P1.7/  
AD0-AD7  
P2.0-P2.7/INT,  
, R/  
P0.5-P0.7  
,
W DM  
AS, DS  
PORT  
PORT  
PORT  
EA (TEST)  
RESET  
V
V
V
DD  
DD  
SS1  
SAM87RI BUS  
V
SS1  
X
P3.0  
P3.1  
P3.2  
P3.3/CLO  
IN  
I/O PORT AND  
INTERRUPT CONTROL  
MAIN  
OSC  
PORT  
PORT  
XOUT  
Basic  
Timer  
P4.0/INT  
P4.1/INT/T0CLK  
P4.2/INT  
SAM87RI CPU  
Timer 0  
P4.3/INT/T0OUT  
208-BYTE  
4-KB ROM  
REGISTER  
FILE  
Figure 1-1. Block Diagram  
1-3  
PRODUCT OVERVIEW  
S3C9004/P9004/C9014/P9014  
PIN ASSIGNMENTS  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
P3.1  
P3.0  
INT/P4.0  
1
P3.2  
2
P3.3/CLO  
T0CLK/INT/P4.1  
INT/P4.2  
3
V
4
DD  
T0OUT/INT/P4.3  
5
P0.0/A8  
P0.1/A9  
P0.2/A10  
P0.3/A11  
P0.4/A12  
P0.5  
/INT/P2.0  
6
AS  
/INT/P2.1  
7
DS  
R/ /INT/P2.4  
8
W
/INT/P2.3  
9
DM  
INT/P2.4  
INT/P2.5  
INT/P2.6  
INT/P2.7  
NC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
P0.6  
P0.7  
X
OUT  
X
IN  
V
SS1  
RESET  
V
SS2  
40-DIP  
(Top View)  
AD7/P1.7  
AD6/P1.6  
AD5/P1.5  
AD4/P1.4  
AD3/P1.3  
EA  
P1.0/AD0  
P1.1/AD1  
P1.2/AD2  
Figure 1-2. Pin Assignment Diagram (40-Pin DIP Package)  
1-4  
S3C9004/P9004/C9014/P9014  
PRODUCT OVERVIEW  
PIN DESCRIPTIONS  
Table 1-1. S3C9004/P9004/C9014/P9014 Pin Descriptions  
Pin  
Names  
Pin  
Type  
Pin  
Description  
Circuit  
Number  
Pin  
Numbers  
Share  
Pins  
P0.0-P0.7  
P1.0-P1.7  
P2.0-P2.7  
I/O  
I/O  
I/O  
Bit-programmable I/O port for Schmitt trigger  
input or open-drain output. Port0 can also be  
configured as external interface address lines A8-  
A12.  
C
C
D
36-29  
23-16  
6-13  
A8-A12  
Bit-programmable I/O port for Schmitt trigger  
input, push-pull, or open-drain output. Port1 can  
alternatively be used as external interface  
address/data lines AD0-AD7.  
AD0-AD7  
Bit-programmable I/O port for Schmitt trigger  
input or push-pull output. Port2 can be  
individually configured as external interrupt  
inputs. Especially, P2.0-2.3 can be configured for  
external bus control signal.  
INT, AS,  
DS, R/W,  
DM  
P3.0-P3.3  
P4.0-P4.3  
I/O  
I/O  
Same general characteristics as Port1. Port3 are  
designed for to drive LED directly. P3.3 can be  
used to system clock output (CLO) port.  
C
D
1, 40-38  
2-5  
P3.3/CLO  
Bit-programmable I/O port. Input mode or n-  
channel open-drain output mode is software  
assignable. Port4 can be individually configured  
as external interrupt inputs. Pull-up resistors are  
also software assignable. Especially, P4.1 can be  
used T0CLK input and P4.3 also T0OUT for  
Timer 0.  
INT,  
T0CLK,  
T0OUT  
XIN, XOUT  
System clock input and output pin (for RC  
oscillator, crystal/ceramic oscillator, or external  
clock source)  
27, 28  
INT  
I
I
External interrupt for bit-programmable port2 and  
port4 pins when set to input mode.  
2-13  
26  
PORT2/  
PORT4  
A
RESET  
RESET signal input pin. Schmitt trigger input with  
internal pull-up resistor.  
EA  
I
External Memory Access (EA) pin with 2 modes:  
0V = Normal Operation Mode  
B
24  
5V = ROMLESS Operation Mode  
(Must be connected to VSS during normal  
operation mode)  
Power input pin  
V
37  
DD  
VSS1  
V
SS2  
Vss1 is a ground power for CPU core.  
15, 25  
,
Vss2 is a ground power for I/O and OSC block  
NC  
No connection  
14  
(This pin would be better connecting to VSS  
)
1-5  
PRODUCT OVERVIEW  
S3C9004/P9004/C9014/P9014  
PIN CIRCUITS  
Table 1-2. Pin Circuit Assignments for the S3C9004/P9004/C9014/P9014  
Circuit Number  
Circuit Type  
S3C9004/P9004/C9014/P9014 Assignments  
A
I
RESET signal input  
EA input  
B
C
D
I
I/O  
I/O  
Ports 0, 1, and 3  
Ports 2 and 4  
VDD  
IN  
PULL-UP  
RESISTOR  
0 V = Internal ROM Access  
Noise  
Filter  
5 V = External ROM Access  
IN  
Figure 1-4. Pin Circuit Type B (EA)  
Figure 1-3. Pin Circuit Type A (RESET)  
VDD  
OUTPUT  
DATA  
OPEN  
DRAIN  
I/O  
OUTPUT  
DISABLE  
VSS  
D0  
INPUT  
DATA  
MUX  
D1  
MODE  
INPUT DATA  
D0  
D1  
OUTPUT  
INPUT  
Figure 1-5. Pin Circuit Type C (Ports 0, 1, and 3)  
1-6  
S3C9004/P9004/C9014/P9014  
PRODUCT OVERVIEW  
VDD  
PULL-UP  
RESISTOR  
PULL-UP  
ENABLE  
VDD  
OUTPUT  
DATA  
OPEN  
DRAIN  
I/O  
OUTPUT  
DISABLE  
VSS  
D0  
D1  
INPUT  
DATA  
MUX  
MODE  
INPUT DATA  
OUTPUT  
INPUT  
D0  
D1  
Figure 1-6. Pin Circuit Type D (Ports 2 and 4)  
1-7  
PRODUCT OVERVIEW  
S3C9004/P9004/C9014/P9014  
APPLICATION CIRCUIT  
5V  
5V  
VDD  
0
1
2
3
EA  
15  
S3C9004  
S3P9004  
X
IN  
ROSC  
0
1
2
3
XOUT  
RESET  
CLK  
DATA  
H
7
O
S
T
KEYBOARD  
MATRIX  
VSS1  
VSS2  
Figure 1-7. Keyboard Control Application Circuit Diagram  
1-8  
S3C9004/P9004/C9014/P9014  
ELECTRICAL DATA  
12 ELECTRICAL DATA  
OVERVIEW  
In this section, the following S3C9004/P9004/C9014/P9014 electrical characteristics are presented in tables and  
graphs:  
— Absolute maximum ratings  
— D.C. electrical characteristics  
— I/O capacitance  
— A.C. electrical characteristics  
— Input timing for RESET  
— Input timing for external interrupts (ports 2 and 4, RESET, and EA)  
— Oscillator characteristics  
— Oscillation stabilization time  
— Clock timing measurement points at X  
IN  
— Data retention supply voltage in Stop mode  
— Stop mode release timing when initiated by a reset  
— Stop mode release timing when initiated by an external interrupt  
— External Memory timing characteristics (8 MHz)  
— External Memory Read and Write timing  
— Characteristic curves  
12-1  
ELECTRICAL DATA  
S3C9004/P9004/C9014/P9014  
Table 12-1. Absolute Maximum Ratings  
°
(TA = 25 C)  
Parameter  
Supply Voltage  
Input Voltage  
Output Voltage  
Symbol  
Conditions  
Rating  
Unit  
V
VDD  
– 0.3 to + 6.5  
– 0.3 to VDD + 0.3  
VIN  
VO  
All input ports  
V
– 0.3 to VDD + 0.3  
All output ports  
V
IOH  
Output Current  
High  
One I/O pin active  
All I/O pins active  
One I/O pin active  
Total pin current for ports 3  
Total pin current for ports 0, 1, 2, 4  
– 18  
– 60  
mA  
IOL  
Output Current  
Low  
+ 25  
mA  
+ 100  
+ 100  
TA  
°
C
Operating  
– 40 to + 85  
Temperature  
TSTG  
°
C
Storage  
– 65 to + 150  
Temperature  
Table 12-2. D.C. Electrical Characteristics  
(TA = – 40 C to + 85 C, VDD = 4.5 V to 5.5 V (1)  
)
°
°
Parameter  
Input High  
Symbol  
Conditions  
Min  
Typ  
Max  
Unit  
VIH1  
All inputs except VIH2  
0.8 VDD  
VDD  
V
Voltage  
VIH2  
VIL1  
VIL2  
VOH  
XIN  
VDD – 0.5  
VDD – 1.0  
VDD  
0.2 VDD  
0.4  
All inputs except VIL2  
XIN  
Input Low Voltage  
V
V
IOH = – 200 µA  
Output High  
Voltage  
All outputs except P4.1,  
P4.3, and port0  
VOL  
IOL  
IOL = 2 mA  
Output Low  
Voltage  
8
15  
0.4  
23  
3
V
All outputs except port3  
VOL= 3 V  
Output Low  
Current  
mA  
µA  
Port3 only  
ILIH1  
VIN = VDD  
Input High  
Leakage Current  
All inputs except ILIH2, P4.0  
and P4.1  
ILIH2  
VIN = VDD  
XIN, XOUT  
20  
12-2  
S3C9004/P9004/C9014/P9014  
ELECTRICAL DATA  
Table 12-2. D.C. Electrical Characteristics (Continued)  
(TA = – 40 C to + 85 C, VDD = 4.5 V to 5.5 V (1)  
°
°
)
Parameter  
Input Low  
Symbol  
Conditions  
Min  
Typ  
Max  
Unit  
ILIL1  
VIN = 0 V  
– 3  
µA  
Leakage Current  
All inputs except ILIL2, P4.0 and  
P4.1  
ILIL2  
VIN = 0 V  
– 20  
XOUT  
X
IN  
,
ILOH  
ILOL  
VOUT = VDD  
All outputs  
Output High  
Leakage Current  
3
µA  
µA  
VOUT = 0 V  
Output Low  
– 3  
Leakage Current  
All outputs  
RL1  
RL2  
RL3  
VIN = 0 V; Port 2 only  
Pull-up Resistors  
30  
1.8  
50  
60  
2.8  
90  
90  
4.0  
150  
KW  
VIN = 0 V; Port 4 only  
VIN = 0 V; RESET only  
Supply Current (2)  
IDD1  
Normal operation mode  
4 MHz CPU clock  
4.5  
10  
mA  
IDD2  
IDD3  
Idle mode; 4 MHz oscillator  
Stop mode  
0.9  
0.5  
3
5
mA  
µA  
NOTES:  
1. The operating voltage range of S3C9014/P9014 is from 2.7 V to 5.5 V according to oscillation frequency.  
2. Supply current does not include current drawn through internal pull-up resistors or external output current loads.  
12-3  
S3C9004/P9004/C9014/P9014  
ELECTRICAL DATA  
Table 12-3. Input/Output Capacitance  
(TA = – 40 C to + 85 C, VDD = 0 V)  
°
°
Parameter  
Input  
Capacitance  
Symbol  
Conditions  
Min  
Typ  
Max  
Unit  
CIN  
f = 1 MHz; unmeasured pins  
are connected to VSS  
10  
pF  
COUT  
CIO  
Output  
Capacitance  
I/O Capacitance  
Table 12-4. A.C. Electrical Characteristics  
°
°
(TA = – 40 C to + 85 C, VDD = 4.5 V to 5.5 V)  
Parameter  
Symbol  
Conditions  
P2 and P4  
Min  
Typ  
Max  
Unit  
tINTH, tINTL  
Interrupt Input  
200  
ns  
High, Low Width  
tRSL  
1,000  
RESET Input  
RESET  
Low Width  
t
RSL  
RESET  
0.2 V  
DD  
Figure 12-1. Input Timing for RESET  
12-5  
ELECTRICAL DATA  
S3C9004/P9004/C9014/P9014  
t
t
INTH  
INTL  
0.8 V  
DD  
0.2V  
DD  
Figure 12-2. Input Timing Measurement Points for Port 2, Port 4, and RESET  
Table 12-5. Oscillator Characteristics  
°
°
(TA = – 40 C + 85 C, VDD = 4.5 V to 5.5 V)  
Oscillator  
Clock Circuit  
Test Condition  
Min  
Typ  
Max  
Unit  
VDD = 4.75 to 5.25 V  
RC Oscillator (with  
Internal Capacitor;  
for S3C9004/P9004)  
4
MHz  
X
IN  
°
°
TA = 0 C + 70 C  
R
Tolerance: ± 10% (note)  
X
OUT  
Crystal/Ceramic  
Oscillator  
(for S3C9014/P9014)  
Crystal/Ceramic  
oscillation frequency  
1.0  
8.0  
X
IN  
C1  
C2  
X
OUT  
NOTE: The S3C9004/P9004 provides an internal capacitor to accommodate an RC oscillator configuration. A 1%  
precision resistor must be used to achieve an oscillation frequency with an acceptable tolerance.  
12-6  
S3C9004/P9004/C9014/P9014  
ELECTRICAL DATA  
CPU CLOCK  
8 MHz  
6 MHz  
4 MHz  
3 MHz  
2 MHz  
1 MHz  
1
2
2.7 3 3.5  
4
5
5.5  
6
7
SUPPLY VOLTAGE (V)  
Figure 12-3. Operating Voltage Range (S3C9014/P9014)  
12-7  
S3C9004/P9004/C9014/P9014  
ELECTRICAL DATA  
Table 12-6. Oscillation Stabilization Time  
(TA = – 40 C + 85 C, VDD = 4.5 V to 5.5 V)  
°
°
Oscillator  
Main Crystal  
Main Ceramic  
Test Condition  
Min  
Typ  
Max  
Unit  
fOSC = 4 MHz  
10  
ms  
(Oscillation stabilization occurs when VDD is equal to  
the minimum oscillator voltage range.)  
216  
fOSC  
/
t
stop mode release time by a reset  
Oscillator  
Stabilization Wait  
Time  
WAIT  
(note)  
t
stop mode release time by an interrupt  
WAIT  
NOTE: The oscillator stabilization wait time, t  
, is determined by the setting in the basic timer control register, BTCON.  
WAIT  
1 / f  
OSC  
t
t
XH  
XL  
X
IN  
V
– 0.5 V  
DD  
0.4 V  
Figure 12-4. Clock Timing Measurement Points at XIN  
Table 12-7. Data Retention Supply Voltage in Stop Mode  
°
°
(TA = – 40 C + 85 C)  
Parameter  
Symbol  
Conditions  
Stop mode  
Min  
Typ  
Max  
Unit  
VDDDR  
Data Retention  
Supply Voltage  
2.0  
6
V
IDDDR  
Stop mode; VDDDR = 2.0 V  
Data Retention  
Supply Current  
5
µA  
12-9  
ELECTRICAL DATA  
S3C9004/P9004/C9014/P9014  
INTERNAL RESET  
OPERATION  
IDLE MODE  
(BASIC TIMER  
ACTIVE)  
STOP MODE  
DATA RETENTION  
MODE  
V
DD  
NORMAL  
OPERATING  
MODE  
V
DDDR  
EXECUTION OF  
STOP INSTRUCTION  
RESET  
0.8 V  
DD  
0.2 V  
DD  
t
WAIT  
Figure 12-5. Stop Mode Release Timing When Initiated by a Reset  
IDLE MODE  
(BASIC TIMER  
ACTIVE)  
STOP MODE  
DATA RETENTION  
MODE  
V
DD  
NORMAL  
OPERATING  
MODE  
V
DDDR  
EXECUTION OF  
STOP INSTRUCTION  
EXTERNAL  
INTERRUPT  
0.8 V  
DD  
0.2 V  
t
DD  
WAIT  
Figure 12-6. Stop Mode Release Timing When Initiated by an External Interrupt  
12-10  
S3C9004/P9004/C9014/P9014  
ELECTRICAL DATA  
Table 12-8. External Memory Timing Characteristics (4 MHz)  
°
°
(TA = – 40 C to + 85 C, VDD = 4.5 V to 5.5 V)  
Number Symbol  
Parameter  
Normal Timing (ns)  
Min  
Max  
tdA (AS)  
1
10  
Address valid to AS delay  
AS to address float delay  
AS to read data required valid  
AS Low width  
tdAS (A)  
2
35  
140  
tdAS (DR)  
twAS  
3
4
88  
0
tdA (DS)  
5
Address float to DS ¯  
twDS (read)  
twDS (write)  
tdDS (DR)  
thDS (DR)  
tdDS (A)  
6a  
6b  
7
314  
164  
DS (read) Low width  
DS (write) Low width  
80  
DS ¯ to read data required valid  
Read data to DS hold time  
DS to address active delay  
DS to AS ¯ delay  
8
0
9
20  
30  
10  
20  
20  
tdDS (AS)  
tdDO (DS)  
tdRW (AS)  
tdDS (DW)  
10  
11  
12  
13  
Write data valid to DS (write) ¯ delay  
R/W valid to AS delay  
DS to write data not valid delay  
NOTES:  
1. All times are in nano seconds (ns) and assume an 4 MHz input frequency.  
2. Wait states add 100 ns to the time of numbers 3, 6a, 6b, and 7.  
12-11  
ELECTRICAL DATA  
S3C9004/P9004/C9014/P9014  
R/  
(P2.2)  
W
12  
PORT0  
(P2.3)  
A8 A12,  
DM  
-
DM  
3
9
PORT1  
A0 A7  
D0 D7 OUT  
D0 D7  
IN OUT  
-
-
-
1
4
2
11  
10  
(P2.0)  
(P2.1)  
AS  
5
8
7
DS  
6
13  
Figure 12-7. External Memory Read and Write Timing  
(See Table 12-8 for a description of each timing point.)  
12-12  
S3C9004/P9004/C9014/P9014  
CHARACTERISTIC CURVES  
ELECTRICAL DATA  
NOTE  
The characteristic values shown in the following graphs are based on actual test measurements. They do  
not, however, represent guaranteed operating values.  
(T = 25 C)  
A
7
6
f
f
= 10 MHz  
= 8 MHz  
OSC  
OSC  
5
4
3
2
f
= 5 MHz  
OSC  
I
DD1  
(mA)  
f
f
= 2 MHz  
= 1 MHz  
OSC  
OSC  
1
0
2.5  
3.0  
3.5  
4.0  
(V)  
4.5  
5.0  
5.5  
6.0  
V
DD  
Figure 12-8. IDD1 vs. VDD  
12-13  
ELECTRICAL DATA  
S3C9004/P9004/C9014/P9014  
(T = 25 C)  
A
f
f
f
f
= 10 MHz  
= 5,8 MHz  
= 1 MHz  
= 2 MHz  
OSC  
OSC  
OSC  
OSC  
1400  
1200  
1000  
800  
I
DD2  
( A)  
m
600  
400  
200  
0
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
V
(V)  
DD  
Figure 12-9. IDD2 vs. VDD  
12-14  
S3C9004/P9004/C9014/P9014  
ELECTRICAL DATA  
(T = 25 C)  
A
750  
700  
650  
600  
550  
500  
450  
400  
0
I
DD3  
(nA)  
f
= 5 MHz  
OSC  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
V
(V)  
DD  
Figure 12-10. IDD3 vs. VDD  
6
5
4
3
2
1
VOH (V)  
V
DD  
= 4.5V  
V
DD  
= 5.0V  
V
DD  
= 5.5V  
0
-1  
0
1
2
3
4
5
6
7
8
9
10  
11  
12  
IOH (mA)  
Figure 12-11. IOH vs. VOH  
12-15  
ELECTRICAL DATA  
S3C9004/P9004/C9014/P9014  
7
6
5
4
3
2
1
VOL (V)  
V
DD  
= 4.5V  
V
DD  
= 5.0V  
V
DD  
= 5.5V  
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17  
IOL (mA)  
Figure 12-12. VOL vs. IOL (Port 0, 1, 2, and 4)  
7
6
5
4
3
2
1
VOL (V)  
V
DD  
= 4.5V  
V
= 5.0V  
DD  
V
= 5.5V  
DD  
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17  
IOL (mA)  
Figure 12-13. VOL vs. IOL (Port 3)  
12-16  
S3C9004/P9004/C9014/P9014  
MECHANICAL DATA  
13 MECHANICAL DATA  
OVERVIEW  
The S3C9004/P9004/C9014/P9014 is currently available in a 40-pin DIP package.  
#40  
#21  
°
0-15  
40-DIP-600B  
#1  
#20  
52.82 MAX  
52.42  
± 0.2  
0.46  
1.27  
± 0.1  
± 0.1  
2.54  
(2.00)  
: Dimensions are in millimeters.  
NOTE  
Figure 13-1. 40-Pin DIP Package Mechanical Data (40-DIP-600B)  
13-1  
MECHANICAL DATA  
S3C9004/P9004/C9014/P9014  
NOTES  
13-2  

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