S3C9414XX-AM [SAMSUNG]

Microcontroller, 8-Bit, MROM, 10MHz, CMOS, PDIP24, 0.300 INCH, SDIP-24;
S3C9414XX-AM
型号: S3C9414XX-AM
厂家: SAMSUNG    SAMSUNG
描述:

Microcontroller, 8-Bit, MROM, 10MHz, CMOS, PDIP24, 0.300 INCH, SDIP-24

微控制器
文件: 总32页 (文件大小:245K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
S3C9404/P9404/C9414/P9414  
PRODUCT OVERVIEW  
1
PRODUCT OVERVIEW  
SAM87RI PRODUCT FAMILY  
Samsung's SAM87Ri family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide  
range of integrated peripherals, and various mask-programmable ROM sizes.  
A address/data bus architecture and a large number of bit-configurable I/O ports provide a flexible programming  
environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating  
modes are included to support real-time operations.  
S3C9404/C9414 MICROCONTROLLER  
The S3C9404/C9414 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is built  
around the powerful SAM87Ri CPU core. The S3C9404/C9414 is a versatile microcontroller, with its A/D  
converter and a zero-crossing detection capability it can be used in a wide range of general purpose applications.  
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register  
space, the size of the internal register file was logically expanded. The S3C9404/C9414 has 4-Kbytes of program  
memory on-chip (ROM) and 208-bytes of general purpose register area RAM.  
Using the SAM87Ri design approach, the following peripherals were integrated with the SAM87Ri core:  
— Four configurable I/O ports (S3C9404: 22 pins, S3C9414: 16 pins)  
— Six interrupt sources with one vector and one interrupt level  
— Two 8-bit timer/counter with various operating modes  
— Analog to digital converter (S3C9404: 8-bit, 8-channel, S3C9414: 10-bit, 5-channel)  
— One zero cross detection module  
The S3C9404/C9414 microcontroller is ideal for use in a wide range of electronic applications requiring simple  
timer/counter, PWM, ADC, ZCD and capture functions. S3C9404 is available in a 30-pin SDIP and a 32-pin SOP  
package. S3C9414 is available in a 24-pin SDIP and a 24-pin SOP package.  
OTP  
The S3P9404/P9414 is an OTP (one time programmable) version of the S3C9404/C9414 microcontroller. The  
S3P9404/P9414 has on-chip 4-Kbyte one-time programmable EEPROM instead of masked ROM. The  
S3P9404/P9414 is fully compatible with the S3C9404/C9414, in function, in D.C. electrical characteristics and in  
pin configuration.  
1-1  
PRODUCT OVERVIEW  
S3C9404/P9404/C9414/P9414  
FEATURES  
CPU  
Timer/Counter  
·
SAM87Ri CPU core  
·
·
One 8-bit basic timer for watchdog function  
One 8-bit timer/counter with three operating  
modes (10-bit PWM 1ch)  
Memory  
·
·
4-Kbyte internal program memory (ROM)  
208-byte general purpose register area (RAM)  
·
One 8-bit timer/counter for the zero-crossing  
detection circuit  
Zero-Crossing Detection Circuit  
Instruction Set  
·
Zero-crossing detection circuit that generates a  
digital signal in synchronism with an AC signal  
input  
·
·
41 instructions  
IDLE and STOP instructions added for  
power-down modes.  
Buzzer Frequency Range  
200 Hz to 20 kHz signal can be generated  
Instruction Execution Time  
600 ns at 10 MHz f (minimum)  
·
·
OSC  
Operating Temperature Range  
Interrupts  
° °  
– 40 C to + 85 C  
·
·
6 interrupt sources with one vector and one level  
interrupt structure  
Operating Voltage Range  
2.7 V to 5.5 V  
·
Oscillation Frequency  
·
·
·
1 MHz to 10 MHz external crystal oscillator  
Maximum 10 MHz CPU clock  
4 MHz RC oscillator  
OTP Interface Protocol Spec  
Serial OTP  
·
Package Types  
General I/O  
·
·
30-pin SDIP, 32-pin SOP for S3C9404/P9404  
24-pin SDIP, 24-pin SOP for S3C9414/P9414  
·
Four I/O ports (22 pins for S3C9404,  
16 pins for S3C9414)  
·
Bit programmable ports  
A/D Converter  
·
·
·
Eight analog input pins  
8-bit conversion resolution (S3C9404)  
10-bit conversion resolution (S3C9414)  
1-2  
S3C9404/P9404/C9414/P9414  
PRODUCT OVERVIEW  
BLOCK DIAGRAM  
P1.0-P1.3  
P0.0-P0.7  
PORT 0  
/ZCD,BUZ,T0,CLO  
PORT 1  
BASIC  
TIMER  
X
IN  
OSC  
X
OUT  
I/O PORT I/O and  
P2.0-P2.3  
INTERRUPT CONTROL  
/INT0-INT1  
/ADC6-ADC7  
PORT 2  
PORT 3  
T0(PWM)  
TIMER 0  
TIMER 1  
ADC  
P1.1/BUZ  
SAM87RI CPU  
P3.0-P3.5  
/ADC0-ADC5  
ADC0  
-ADC7  
P1.0/  
ZCD  
ZCD  
208-BYTE  
REGISTER FILE  
4-KB ROM  
Figure 1-1. Block Diagram  
1-3  
PRODUCT OVERVIEW  
S3C9404/P9404/C9414/P9414  
PIN ASSIGNMENTS  
V
X
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
V
DD  
1
2
3
4
5
6
7
8
SS  
IN  
P0.2  
X
P0.3  
P0.4  
P0.5  
P0.6  
P0.7  
P1.0 / ZCD  
P1.1 / BUZ  
P1.2 / T0(PWM)  
P1.3 / CLO  
P2.0 / INT0  
P2.1 / INT1  
P2.2 / ADC6  
P2.3 / ADC7  
OUT  
TEST  
P0.1  
P0.0  
RESET  
P3.5/ADC5  
S3C9404  
30-SDIP  
(Top View)  
P3.4/ADC4  
P3.3/ADC3  
P3.2/ADC2  
P3.1/ADC1  
P3.0/ADC0  
9
10  
11  
12  
13  
14  
15  
AV  
AV  
ref  
SS  
Figure 1-2. Pin Assignment Diagram (30-Pin SDIP Package)  
V
X
SS  
IN  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
V
DD  
P0.2  
X
OUT  
TEST  
P0.1  
P0.0  
P0.3  
P0.4  
P0.5  
P0.6  
P0.7  
NC  
P1.0 / ZCD  
P1.1 / BUZ  
P1.2 / T0(PWM)  
P1.3 / CLO  
P2.0 / INT0  
P2.1 / INT1  
P2.2 / ADC6  
P2.3 / ADC7  
S3C9404  
32-SOP  
(Top View)  
RESET  
NC  
P3.5/ADC5  
P3.4/ADC4  
P3.3/ADC3  
P3.2/ADC2  
P3.1/ADC1  
P3.0/ADC0  
9
10  
11  
12  
13  
14  
15  
16  
AV  
AV  
SS  
ref  
Figure 1-3. Pin Assignment Diagram (32-Pin SOP Package)  
1-4  
S3C9404/P9404/C9414/P9414  
PRODUCT OVERVIEW  
V
P0.2  
P0.3  
P0.4  
P0.5  
P0.6  
P1.0 / ZCD  
P1.1 / BUZ  
P1.2 / T0(PWM)  
P2.0 / INT0  
V
X
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
1
2
3
4
5
6
7
8
DD  
SS  
IN  
X
OUT  
TEST  
P0.1  
P0.0  
S3C9414  
24-SDIP  
(Top View)  
RESET  
P3.4/ADC4  
P3.3/ADC3  
P3.2/ADC2  
P3.1/ADC1  
P3.0/ADC0  
9
10  
11  
12  
AV  
AV  
SS  
ref  
Figure 1-4. Pin Assignment Diagram (24-Pin SDIP Package)  
V
X
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
V
DD  
SS  
IN  
P0.2  
X
P0.3  
P0.4  
P0.5  
P0.6  
P1.0 / ZCD  
P1.1 / BUZ  
P1.2 / T0(PWM)  
P2.0 / INT0  
OUT  
TEST  
P0.1  
P0.0  
KS86C4104  
24-SOP  
(Top View)  
RESET  
P3.4/ADC4  
P3.3/ADC3  
P3.2/ADC2  
P3.1/ADC1  
P3.0/ADC0  
9
10  
11  
12  
AV  
AV  
ref  
SS  
Figure 1-5. Pin Assignment Diagram (24-Pin SOP Package)  
1-5  
PRODUCT OVERVIEW  
S3C9404/P9404/C9414/P9414  
PIN DESCRIPTIONS  
Table 1-1. S3C9404/C9414 Pin Descriptions  
Pin  
Names  
Pin  
Type  
Pin  
Description  
Circuit  
Type  
Share  
Pins  
P0.0-P0.7  
I/O  
E-2  
Bit-programmable I/O port for normal input or  
push-pull, open-drain output. Pull-up resistors are  
assignable by software.  
P1.0-P1.3  
I/O  
F
D
D
D
ZCD  
BUZ  
T0(PWM)  
CLO  
Bit-programmable I/O port for Schmitt trigger  
input or push-pull output. Pull-up resistors are  
assignable by software. Port 1 pins can also be  
used as alternative functions.  
P2.0-P2.3  
P3.0-P3.5  
I/O  
I/O  
E
E-1  
INT0–INT1  
ADC6–ADC7  
Bit-programmable I/O port for Schmitt trigger  
input or push-pull, open drain output. Pull up  
resistors are assignable by software. Port 2 can  
also be used as external interrupt, A/D input.  
F
ADC0–ADC5  
Bit-programmable I/O port for Schmitt trigger  
input or push-pull output. Pull-up resistors are  
assignable by software. Port 3 pins can also be  
used as A/D converter input.  
X , X  
IN OUT  
Crystal/ceramic, or RC oscillator signal for system  
clock.  
INT0–INT1  
I
I
E
B
P2.0–P2.1  
External interrupt input.  
RESET  
System RESET signal input pin.  
TEST  
I
Test signal input pin (for factory use only: must be  
connected to VSS  
)
V
V
I
Voltage input pin and ground  
DD, SS  
AVREF, AV  
ZCD  
A/D converter reference voltage input and ground  
Zero crossing detector input  
SS  
F
D
P1.0  
P1.1  
BUZ  
O
200 Hz–20 kHz frequency output for buzzer  
sound  
T0  
I/O  
O
I
D
D
P1.2  
P1.3  
Timer 0 capture input or 10-bit PWM output  
System clock output port  
CLO  
ADC0–ADC7  
F
E-1  
P3.0–P3.5  
P2.2–P2.3  
A/D converter input  
NOTE: Port 0.7, P1.3, P2.1–P2.3 and P3.5 is not available in S3C9414/P4104 .  
1-6  
S3C9404/P9404/C9414/P9414  
PRODUCT OVERVIEW  
PIN CIRCUITS  
V
DD  
VDD  
P-CHANNEL  
P-CHANNEL  
DATA  
OUT  
IN  
N-CHANNEL  
N-CHANNEL  
OUTPUT  
DISABLE  
Figure 1-6. Pin Circuit Type A  
Figure 1-8. Pin Circuit Type C  
V
DD  
PULL-UP  
RESISTOR  
V
DD  
PULL-UP  
RESISTOR  
RESISTOR  
ENABLE  
P-CHANNEL  
IN/OUT  
DATA  
CIRCUIT  
TYPE C  
OUTPUT  
DISABLE  
IN  
DATA  
Figure 1-9. Pin Circuit Type D  
Figure 1-7. Pin Circuit Type B  
1-7  
PRODUCT OVERVIEW  
S3C9404/P9404/C9414/P9414  
V
V
DD  
DD  
V
V
DD  
DD  
PULL-UP  
RESISTOR  
PULL-UP  
RESISTOR  
PNE  
PNE  
PULL-UP  
ENABLE  
PULL-UP  
P-CH  
P-CH  
ENABLE  
DATA  
IN/OUT  
DATA  
IN/OUT  
N-CH  
N-CH  
OUTPUT  
DISABLE  
OUTPUT  
DISABLE  
INPUT  
INPUT  
Figure 1-10. Pin Circuit Type E  
Figure 1-10. Pin Circuit Type E-2  
V
DD  
V
DD  
V
DD  
PULL-UP  
RESISTOR  
PULL-UP  
PNE  
RESISTOR  
PULL-UP  
ENABLE  
PULL-UP  
ENABLE  
P-CH  
N-CH  
V
DD  
DATA  
DATA  
CIRCUIT  
TYPE C  
IN/OUT  
IN/OUT  
OUTPUT  
DISABLE  
OUTPUT  
DISABLE  
DIGITAL  
INPUT  
DIGITAL INPUT  
ANALOG INPUT  
ANALOG  
INPUT  
Figure 1-11. Pin Circuit Type E-1  
Figure 1-12. Pin Circuit Type F  
1-8  
S3C9404/P9404/C9414/P9414  
ELECTRICAL DATA  
13 ELECTRICAL DATA  
OVERVIEW  
In this section, the following S3C9404/C9414 electrical characteristics are presented in tables and graphs:  
— Absolute maximum ratings  
— D.C. electrical characteristics  
— A.C. electrical characteristics  
— Oscillator characteristics  
— Oscillation stabilization time  
— Operating Voltage Range  
— Schmitt trigger input characteristics  
— Data retention supply voltage in Stop mode  
— Stop mode release timing when initiated by a RESET  
— A/D converter electrical characteristics  
— Zero-crossing detector  
— Zero Crossing Waveform Diagram  
13-1  
ELECTRICAL DATA  
S3C9404/P9404/C9414/P9414  
Table 13-1. Absolute Maximum Ratings  
°
(TA = 25 C)  
Parameter  
Supply voltage  
Input voltage  
Symbol  
Conditions  
Rating  
Unit  
V
VDD  
– 0.3 to + 6.5  
VI  
VO  
IOH  
– 0.3 to VDD + 0.3  
– 0.3 to VDD + 0.3  
All input ports  
All output ports  
One I/O pin active  
V
Output voltage  
Output current  
V
– 18  
mA  
high  
All I/O pins active  
One I/O pin active  
– 60  
+ 30  
IOL  
Output current  
mA  
low  
Total pin current for ports 1, 2, 3  
+ 100  
Total pin current for ports 0  
+ 200  
TA  
°
C
Operating  
– 40 to + 85  
temperature  
TSTG  
°
C
Storage  
– 65 to + 150  
temperature  
Table 13-2. DC Electrical Characteristics  
°
°
(TA = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V)  
Parameter  
Input high  
Symbol  
Conditions  
VDD= 2.7 to 5.5 V  
Min  
Typ  
Max  
Unit  
VIH1  
0.8 VDD  
VDD  
Ports 1,2,3, and  
V
voltage  
RESET  
VIH2  
VIH3  
0.7 VDD  
VDD –0.1  
Port 0  
XIN and XOUT  
VIL1  
VDD= 2.7 to 5.5 V  
0.2 VDD  
Input low  
voltage  
Ports 1,2,3, and  
V
RESET  
VIL2  
VIL3  
0.3 VDD  
Port 0  
XIN and XOUT  
0.1  
VOH  
VOL1  
VOL2  
IOH = – 1 mA  
ports 0, 1, 2, 3  
IOL = 15 mA  
port 0  
VDD= 4.5 to 5.5 V  
VDD= 4.5 to 5.5 V  
VDD= 4.5 to 5.5 V  
VDD – 1.0  
Output high  
voltage  
V
V
Output low  
voltage  
0.4  
0.4  
2.0  
2.0  
IOL = 4 mA  
port 1,2,3  
13-2  
S3C9404/P9404/C9414/P9414  
ELECTRICAL DATA  
Table 13-2. DC Electrical Characteristics (Continued)  
(TA = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V)  
°
°
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
Unit  
ILIH1  
All inputs except ILIH2 VIN = VDD  
Input high leakage  
current  
1
µA  
ILIH2  
ILIL1  
XIN, XOUT  
VIN = VDD  
VIN = 0 V  
20  
Input low leakage  
current  
All inputs except  
– 1  
µA  
ILIL2 and RESET  
ILIL2  
ILOH  
XIN, XOUT  
All outputs  
VIN = 0 V  
– 20  
2
VOUT = VDD  
Output high  
leakage current  
µA  
µA  
kW  
ILOL  
RP  
VOUT = 0 V  
VDD = 5 V  
Output low  
leakage current  
All outputs  
– 2  
70  
VIN = 0 V  
Pull-up resistors  
Supply current  
30  
47  
Ports 0–3 and  
VDD = 3 V  
30  
280  
7.5  
350  
15  
RESET  
IDD1  
Run mode  
mA  
VDD = 5 V ± 10%  
10 MHz CPU clock  
8 MHz CPU clock  
3
2
6
5
VDD = 3 V ± 10%  
VDD = 5 V ± 10%  
IDD2  
Idle mode  
10 MHz CPU clock  
8 MHz CPU clock  
Stop mode  
0.7  
0.1  
2.5  
5
VDD = 3 V ± 10%  
VDD = 5 V ± 10%  
VDD = 3 V ± 10%  
IDD3  
µA  
NOTE: D.C. electrical values for Supply current (I  
to I  
) do not include current drawn through internal pull-up  
DD3  
DD1  
resisters, output port drive current, ZCD and ADC.  
13-3  
ELECTRICAL DATA  
S3C9404/P9404/C9414/P9414  
Table 13-3. AC Electrical Characteristics  
°
°
(TA = –20 C to + 85 C, VDD = 2.7 V to 5.5 V)  
Parameter  
Symbol  
tINTH  
tINTL  
Conditions  
Min  
Typ  
Max  
Unit  
,
Interrupt input  
high, low width  
200  
ns  
Port 2  
VDD = 5V ± 10%  
tRSL  
1
µs  
RESET input  
low width  
Input  
VDD = 5V ± 10%  
ZCD noise filter  
1 t  
CPU  
t
t
NF1H  
NF1L  
t
t
RSL  
NF2  
0.8 V  
DD  
0.2 V  
DD  
:
The unit t  
means one CPU clock period.  
NOTE  
CPU  
Figure 13-1. Input Timing Measurement Points  
13-4  
S3C9404/P9404/C9414/P9414  
ELECTRICAL DATA  
Table 13-4. Oscillator Characteristics  
°
°
(T = – 40 C to + 85 C)  
A
Oscillator  
Clock Circuit  
Test Condition  
VDD = 4.5 to 5.5 V  
Min  
Typ  
Max  
Unit  
Main crystal or  
ceramic  
1
1
10  
8
MHz  
X
IN  
VDD = 2.7 to 4.5 V  
C1  
C2  
X
OUT  
External clock  
1
1
10  
8
VDD = 4.5 to 5.5 V  
VDD = 2.7 to 4.5 V  
X
X
IN  
OUT  
VDD = 4.75 to 5.25 V  
R = 8.2K  
RC oscillator  
4
X
X
IN  
(P1.3/  
CLO)  
R
OUT  
Table 13-5. Oscillation Stabilization Time  
(T = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V)  
°
°
A
Oscillator  
Main crystal  
Main ceramic  
Test Condition  
Min  
Typ  
Max  
Unit  
fOSC > 1.0 MHz  
20  
10  
ms  
Oscillation stabilization occurs when VDD is equal  
to the minimum oscillator voltage range.  
XIN input high and low width (tXH, tXL)  
External clock  
(main system)  
25  
500  
ns  
tWAIT when released by a reset (1)  
16  
/fOSC  
Oscillator  
stabilization  
ms  
2
tWAIT when released by an interrupt (2)  
wait time  
NOTES:  
1.  
f
is the oscillator frequency.  
OSC  
t
2. The duration of the oscillator stabilization wait time,  
settings in the basic timer control register, BTCON.  
, when it is released by an interrupt is determined by the  
WAIT  
13-5  
ELECTRICAL DATA  
S3C9404/P9404/C9414/P9414  
CPU CLOCK  
10 MHz  
8 MHz  
4 MHz  
3 MHz  
2 MHz  
1 MHz  
1
2
2.7 3  
4
5
5.5  
6
7
SUPPLY VOLTAGE (V)  
Figure 13-2. Operating Voltage Range  
V
out  
V
DD  
A = 0.2 V  
B = 0.4 V  
DD  
DD  
C = 0.6 V  
D = 0.8 V  
DD  
DD  
V
SS  
V
in  
A
B
C
D
0.3 V  
0.7 V  
DD  
DD  
Figure 13-3. Schmitt Trigger Input Characteristics Diagram  
13-6  
S3C9404/P9404/C9414/P9414  
ELECTRICAL DATA  
Table 13-6. Data Retention Supply Voltage in Stop Mode  
(T = – 40 C to + 85 C, VDD = 2.7 V to 5.5V)  
°
°
A
Parameter  
Symbol  
Conditions  
Stop mode  
Min  
Typ  
Max  
Unit  
VDDDR  
Data retention  
supply voltage  
2.0  
5.5  
V
IDDDR  
Stop mode; VDDDR = 2.0 V  
Data retention  
supply current  
0.1  
5
µA  
NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.  
INTERNAL  
IDLE MODE  
RESET  
(BASIC TIMER  
ACTIVE)  
STOP MODE  
DATA RETENTION  
VDD  
MODE  
NORMAL  
OPERATING  
MODE  
VDDDR  
EXECUTION OF  
STOP  
RESET  
0.8 V  
DD  
0.2 VDD  
tWAIT  
tWAIT is the same as 4096 x 16 x 1/f  
NOTE:  
OSC  
Figure 13-4. Stop Mode Release Timing When Initiated by a RESET  
13-7  
ELECTRICAL DATA  
S3C9404/P9404/C9414/P9414  
Table 13-7. A/D Converter Electrical Characteristics (S3C9404)  
°
°
(T = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V, VSS = 0 V)  
S3C9404: 8-bit ADC  
A
Parameter  
Symbol  
Test Conditions  
VDD = 5.12 V  
Min  
Typ  
Max  
Unit  
Total accuracy  
LSB  
± 2  
Integral linearity  
error  
ILE  
CPU clock = 10 MHz  
AVREF = 5.12 V  
± 1.5  
AVSS = 0 V  
Differential  
linearity error  
DLE  
EOT  
EOB  
tCON  
VIAN  
– 1  
– 1  
± 1  
± 2  
Offset error of  
top  
Offset error of  
bottom  
± 2  
Conversion  
time(1)  
fcpu = 10 MHz  
5
AVSS  
2
ms  
V
AVREF  
Analog input  
voltage  
RAN  
Analog input  
impedance  
MW  
V
AVREF  
AVSS  
IADIN  
VDD  
VSS + 0.3  
10  
ADC reference  
voltage  
2.5  
VSS  
ADC reference  
ground  
V
AVREF = VDD = 5 V  
Analog input  
current  
mA  
conversion time = 5 ms  
IADC  
AVREF = VDD = 5 V  
ADC block  
current (2)  
1
3
mA  
nA  
conversion time = 5 ms  
AVREF = VDD = 3 V  
0.5  
100  
1.5  
500  
conversion time = 5 ms  
AVREF = VDD = 5 V  
Power down mode  
NOTES:  
1. “Conversion time” is the time required from the moment a conversion operation starts until it ends.  
2. is operating current during A/D conversion.  
I
ADC  
13-8  
S3C9404/P9404/C9414/P9414  
ELECTRICAL DATA  
Table 13-8. A/D Converter Electrical Characteristics (S3C9414)  
°
°
(T = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V, VSS = 0 V)  
S3C9414: 10-bit ADC  
A
Parameter  
Resolution  
Symbol  
Test Conditions  
Min  
Typ  
10  
Max  
Unit  
bit  
VDD = 5.12 V  
Total accuracy  
LSB  
± 3  
Integral linearity  
error  
ILE  
CPU clock = 10 MHz  
AVREF = 5.12 V  
± 2  
AVSS = 0 V  
Differential  
linearity error  
DLE  
EOT  
EOB  
tCON  
± 1  
± 0.5  
± 1  
± 3  
± 2  
Offset error of  
top  
Offset error of  
bottom  
Conversion time  
(1)  
10-bit conversion  
20  
ms  
(3)  
50 x 4/ fOSC  
VIAN  
AVSS  
2
AVREF  
Analog input  
voltage  
V
MW  
V
RAN  
Analog input  
impedance  
AVREF  
VDD  
Analog  
2.5  
reference  
voltage  
AVSS  
IADIN  
VSS  
VSS + 0.3  
10  
Analog ground  
V
AVREF = VDD = 5 V  
Analog input  
current  
mA  
conversion time = 20 ms  
IADC  
AVREF = VDD = 5 V  
Analog block  
current (2)  
1
3
mA  
mA  
nA  
conversion time = 20 ms  
AVREF = VDD = 3 V  
0.5  
100  
1.5  
500  
conversion time = 20 ms  
AVREF = VDD = 5 V  
when power down mode  
NOTES:  
1. "Conversion time" is the time required from the moment a conversion operation starts until it ends.  
2.  
I
is operating current during A/D conversion.  
ADC  
OSC  
3.  
f
is the main oscillator clock.  
13-9  
ELECTRICAL DATA  
S3C9404/P9404/C9414/P9414  
Table 13-9. Zero Crossing Detector  
°
°
(T = – 40 C to + 85 C, VDD = 4.5 V to 5.5 V, VSS = 0 V)  
A
Parameter  
Symbol  
Test Conditions  
AC connection  
c = 0.1 mF  
Min  
Typ  
Max  
Unit  
VZC  
Zero-crossing  
detection input  
voltage  
1.0  
3.0  
Vp-p  
Zero-crossing  
detection accuracy  
mV  
Hz  
± 150  
VAZC  
fZC = 60 Hz  
(sine wave)  
VDD = 5 V  
fOSC = 10 MHz  
Zero-crossing  
detection input  
frequency  
40  
200  
fZC  
1/f  
ZC  
V
V
AC Input  
AZC  
AZ(P-P)  
ZCINT  
Figure 13-5. Zero Crossing Waveform Diagram  
13-10  
S3C9404/P9404/C9414/P9414  
ELECTRICAL DATA  
70  
60  
50  
40  
V
= 5.5 V  
DD  
V
V
= 5.0 V  
= 4.5 V  
DD  
DD  
I
(mA)  
OL  
30  
20  
10  
0
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
(V)  
3.5  
4.0  
4.5  
5.0  
5.5  
V
L
O
Figure 13-6. IOL vs. VOL (P0, TA = 25 °C)  
13-11  
ELECTRICAL DATA  
S3C9404/P9404/C9414/P9414  
50  
40  
30  
20  
10  
0
V
= 5.5 V  
DD  
V
= 5.0 V  
DD  
I
(mA)  
OL  
V
= 4.5 V  
DD  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
(V)  
3.5  
4.0  
4.5  
5.0  
5.5  
V
L
O
Figure 13-7. IOL vs. VOL (P1–P3, TA = 25 °C)  
13-12  
S3C9404/P9404/C9414/P9414  
ELECTRICAL DATA  
36  
32  
-
-
28  
24  
20  
16  
12  
-
-
-
-
-
I
OH  
(mA)  
V
= 5.5 V  
DD  
V
= 5.0 V  
DD  
8
4
-
-
V
= 4.5 V  
DD  
0
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
(V)  
3.5  
4.0  
4.5  
5.0  
5.5  
V
OH  
Figure 13-8. IOH vs. VOH (P0, TA = 25 °C)  
13-13  
ELECTRICAL DATA  
S3C9404/P9404/C9414/P9414  
24  
20  
16  
12  
-
-
-
-
I
OH  
(mA)  
V
= 5.5 V  
DD  
8
4
-
-
V
= 5.0 V  
DD  
V
= 4.5 V  
4.0  
DD  
0
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
(V)  
3.5  
4.5  
5.0  
5.5  
V
OH  
Figure 13-9. IOH vs. VOH (P1–P3, TA = 25 °C)  
13-14  
S3C9404/P9404/C9414/P9414  
MECHANICAL DATA  
14 MECHANICAL DATA  
OVERVIEW  
The S3C9404/C9414 is available in a 30-pin SDIP package (Samsung: 30-SDIP-400) and a 32-pin SOP package  
(32-SOP-450A), a 24-pin SDIP package (24-SDIP-300) and a 24-pin SOP package (24-SOP-375). Package  
dimensions are shown in Figures 14-1, 14-2, 14-3, and 14-4.  
#30  
#16  
0-15  
°
30-SDIP-400  
#1  
#15  
27.88 MAX  
27.48 ± 0.2  
0.56 ± 0.1  
1.12 ± 0.1  
1.778  
(1.30)  
NOTE: Dimensions are in millimeters.  
Figure 14-1. 30-Pin SDIP Package Dimensions  
14-1  
MECHANICAL DATA  
S3C9404/P9404/C9414/P9414  
0~8°  
#32  
#17  
32-SOP-450A  
#1  
#16  
+0.10  
- 0.05  
0.20  
± 0.2  
19.90  
0.10 MAX  
1.27  
(0.43)  
0.40 ± 0.1  
NOTE: Dimensions are in millimeters.  
Figure 14-2. 32-SOP-450A Package Dimensions  
14-2  
S3C9404/P9404/C9414/P9414  
MECHANICAL DATA  
#24  
#13  
0-15  
°
24-SDIP-300  
23.35 MAX  
#1  
#12  
22.95  
± 0.2  
0.46  
0.89  
± 0.1  
± 0.1  
(1.69)  
1.778  
NOTE: Dimensions are in millimeters.  
Figure 14-3. 24-SDIP-300 Package Dimensions  
14-3  
MECHANICAL DATA  
S3C9404/P9404/C9414/P9414  
0-8°  
#24  
#13  
24-SOP-375  
#1  
#12  
+0.10  
- 0.05  
0.15  
15.74 MAX  
± 0.2  
15.34  
0.10 MAX  
1.27  
(0.69)  
0.38 ± 0.1  
NOTE: Dimensions are in millimeters.  
Figure 14-4. 24-SOP-375 Package Dimensions  
14-4  
S3C9404/P9404/C9414/P9414  
S3P9404/P9414 OTP  
15 S3P9404/P9414 OTP  
OVERVIEW  
The S3P9404/P9414 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the  
S3C9404/C9414 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed  
by serial data format.  
The S3P9404/P9414 is fully compatible with the S3C9404/C9414 , both in function and in pin configuration.  
Because of its simple programming requirements, the S3P9404/P9414 is ideal for use as an evaluation chip for  
the S3C9404/C9414 .  
/V  
X
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
V
DD/  
V
V
DD  
1
2
3
4
5
6
7
8
SS  
IN  
SS  
P0.2/  
P0.3/  
P0.4  
P0.5  
P0.6  
P0.7  
SCLK  
SDAT  
X
OUT  
/TEST  
P0.1  
V
PP  
P0.0  
S3P9404  
30-SDIP  
(Top View)  
RESET/RESET  
P3.5/ADC5  
P1.0/ZCD  
P1.1/BUZ  
P3.4/ADC4  
P3.3/ADC3  
P3.2/ADC2  
P3.1/ADC1  
P3.0/ADC0  
9
P1.2/T0(PWM)  
P1.3/CLO  
P2.0/INT0  
P2.1/INT1  
P2.2/ADC6  
P2.3/ADC7  
10  
11  
12  
13  
14  
15  
AV  
AV  
ref  
SS  
:
The bolds indicate an OTP pin name.  
NOTE  
Figure 15-1. Pin Assignment Diagram (30-Pin SDIP Package)  
15-1  
S3P9404/P9414 OTP  
S3C9404/P9404/C9414/P9414  
/V  
X
V
SS  
IN  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
V
DD/  
SS  
V
DD  
P0.2/  
P0.3/  
P0.4  
P0.5  
P0.6  
P0.7  
NC  
SCLK  
SDAT  
X
OUT  
/TEST  
P0.1  
V
PP  
S3P9404  
32-SOP  
(Top View)  
P0.0  
RESET/RESET  
NC  
P3.5/ADC5  
P3.4/ADC4  
P3.3/ADC3  
P3.2/ADC2  
P3.1/ADC1  
P3.0/ADC0  
9
P1.0/ZCD  
P1.1/BUZ  
P1.2/T0(PWM)  
P1.3/CLO  
P2.0/INT0  
P2.1/INT1  
10  
11  
12  
13  
14  
15  
16  
AV  
AV  
SS  
ref  
P2.2/ADC6  
P2.3/ADC7  
:
The bolds indicate an OTP pin name.  
NOTE  
Figure 15-2. Pin Assignment Diagram (32-Pin SOP Package)  
15-2  
S3C9404/P9404/C9414/P9414  
S3P9404/P9414 OTP  
/V  
X
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
V
DD/  
V
V
DD  
SCLK  
SDAT  
1
2
3
4
5
6
7
8
SS  
IN  
SS  
P0.2/  
P0.3/  
P0.4  
P0.5  
P0.6  
X
OUT  
/TEST  
P0.1  
V
PP  
S3P9414  
24-SDIP  
(Top View)  
P0.0  
P1.0/ZCD  
P1.1/BUZ  
P1.2/T0(PWM)  
P2.0/INT0  
RESET/RESET  
P3.4/ADC4  
P3.3/ADC3  
P3.2/ADC2  
P3.1/ADC1  
P3.0/ADC0  
9
10  
11  
12  
AV  
AV  
SS  
ref  
:
The bolds indicate an OTP pin name.  
NOTE  
Figure 15-3. Pin Assignment Diagram (24-Pin SDIP Package)  
15-3  
S3P9404/P9414 OTP  
S3C9404/P9404/C9414/P9414  
/V  
X
V
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
V
DD/  
V
SS  
IN  
SS  
DD  
P0.2/  
P0.3/  
P0.4  
P0.5  
P0.6  
SCLK  
SDAT  
X
OUT  
/TEST  
P0.1  
V
PP  
S3P9414  
24-SOP  
(Top View)  
P0.0  
P1.0/ZCD  
P1.1/BUZ  
P1.2/T0(PWM)  
P2.0/INT0  
RESET/RESET  
P3.4/ADC4  
P3.3/ADC3  
P3.2/ADC2  
P3.1/ADC1  
P3.0/ADC0  
9
10  
11  
12  
AV  
AV  
ref  
SS  
:
The bolds indicate an OTP pin name.  
NOTE  
Figure 15-4. Pin Assignment Diagram (24-Pin SOP Package)  
15-4  
S3C9404/P9404/C9414/P9414  
S3P9404/P9414 OTP  
Table 15-1. Descriptions of Pins Used to Read/Write the EPROM  
Main Chip  
Pin Name  
During Programming  
I/O  
Pin Name  
Pin No.  
Function  
P0.3  
SDAT  
S3P9404: 28 (30)  
S3P9414: 22 (22)  
I/O  
Serial data pin (output when reading, Input  
when writing) Input and push-pull output  
port can be assigned  
P0.2  
SCLK  
S3P9404: 29 (31)  
S3P9414: 23 (23)  
I/O  
I
Serial clock pin (input only pin)  
VPP (TEST)  
TEST  
4
Power supply pin for EPROM cell writing  
(indicates that OTP enters into the writing mode).  
When 12.5 V is applied, OTP is in writing mode  
and when 5 V is applied, OTP is in reading  
mode. (Option)  
7
I
I
Chip Initialization  
RESET  
RESET  
VDD/VSS  
VDD/VSS  
S3P9404: 30 (32) / 1  
S3P9414: 24 (24) / 1  
Logic power supply pin.  
NOTE: ( ) means the SOP OTP pin number.  
Table 15-2. Comparison of S3P9404/P9414and S3C9404/C9414 Features  
Characteristic  
S3P9404/P9414  
4-Kbyte EPROM  
2.7 V to 5.5 V  
S3C9404/C9414  
Program Memory  
4-Kbyte mask ROM  
2.7 V to 5.5 V  
Operating Voltage (V  
)
DD  
V
DD  
= 5 V, V (TEST) = 12.5 V  
PP  
OTP Programming Mode  
Pin Configuration  
30 SDIP/32 SOP/24 SDIP/24 SOP  
EPROM Programmability  
User Program 1 time  
Programmed at the factory  
OPERATING MODE CHARACTERISTICS  
When 12.5 V is supplied to the V  
PP  
(TEST) pin of the S3P9404/P9414, the EPROM programming mode is  
entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins  
listed in Table 15-3 below.  
Table 15-3. Operating Mode Selection Criteria  
V
DD  
R/W  
MODE  
VPP  
(TEST)  
ADDRESS  
(A15-A0)  
REG/MEM  
5 V  
5 V  
0
0
0
1
0000H  
0000H  
0000H  
0E3FH  
1
0
1
0
EPROM read  
EPROM program  
EPROM verify  
12.5 V  
12.5 V  
12.5 V  
EPROM read protection  
NOTE: "0" means Low level; "1" means High level.  
15-5  
S3P9404/P9414 OTP  
S3C9404/P9404/C9414/P9414  
NOTES  
15-6  

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