STR-L6452

更新时间:2024-09-18 15:09:53
品牌:SANKEN
描述:Switching Controller

STR-L6452 概述

Switching Controller 开关式稳压器或控制器

STR-L6452 规格参数

生命周期:Active包装说明:,
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.77
模拟集成电路 - 其他类型:SWITCHING CONTROLLERBase Number Matches:1

STR-L6452 数据手册

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STR-L6400 APPLICATION NOTE  
Ver. 1.4  
STR-L6400 Series  
Application Note (Ver. 1.4)  
Sanken Electric Co., Ltd.  
http://www.sanken-ele.co.jp  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.1  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
/ / / / / / / / / / / / / / / / / Index / / / / / / / / / / / / / / / /  
1. General Descriptions ·························································································3  
2. Features and Production Lineup ·····································································3  
3. Functional Block Diagram and Terminal List ················································4  
4. Package Information ·························································································5  
5. Electrical Characteristics ··················································································68  
6. Typical Application Circuit ··············································································9  
7. Functional Descriptions ····················································································1026  
7.1 VCC (No.6) Terminal ···················································································1012  
7.2 ADJ (No.10) Terminal ················································································1316  
7.3 FB (No.7) Terminal ·····················································································1719  
7.4 BD (No.8) Terminal ····················································································2022  
7.5 OCP (No.9) Terminal and Bottom-skip Operation ·································2324  
7.6 Standby Operation ······················································································25  
7.7 Maximum ON Time Limitation Function ················································25  
7.8 Phase Compensation ···················································································26  
8. Design Notes ·······································································································2728  
/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / /  
!WARNING!  
Sanken reserves the right to make changes without further notice to any products herein in the interest of improvements  
in the performance, reliability, or manufacturability of its products.  
Before placing order, Sanken advises its customers to obtain the latest version of the relevant information to verify that the  
information being relied upon is current.  
Application and operation examples described in this application note are provided for a supplementary purpose only.  
Conditions in actual use and variations in additional parts are not considered.  
When using the products herein, the applicability and suitability of such products for the intended purpose or object shall be  
reviewed at the user’s responsibility.  
Application and operation examples described in this application note are given for reference only and Sanken assumes no  
responsibility for any infringement of industrial property rights, intellectual property rights or any other rights of Sanken, or any  
third party which may result from its use.  
Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of  
semiconductor products at a certain rate is inevitable.  
Users of Sanken products are requested to take, at their own risk, preventative measures including safety design of the  
equipment or systems against any possible injury, death, fires or damages to society due to device failure or malfunction.  
This publication shall not be reproduced in whole or in part without prior written approval form Sanken.  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.2  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
1. General Descriptions  
The STR-L6400 series devices comprise an integrated MOSFET and a multifunction controller chip for  
quasi-resonant switching power supply applications.  
In normal operation, the quasi-resonant operation mode coupled with the bottom-skip functions achieves high  
efficiency and low noise. In standby operation, the burst operation mode ensures lower power consumption.  
The controller circuit is common in the STR-Y6400 series, using the compact 7-pin full mold package  
(TO220F-7L: Sanken designation: FMS207). The STR-L6400 series are using the SIP 10-pin type (Sanken  
designation: STA-10), providing enough clearance and creepage isolation between high voltage terminals and  
low voltage terminals. These switchers also provide various protection features that allow power supply designs  
that are highly reliable and simplewith fewer peripheral components.  
2. Features and Production Lineup  
z SIP-10pin package  
z Built-in Startup circuit (eliminates startup losses and results in low power consumption)  
z Multi-mode control enables the high efficiency operation across the full load range  
z Automatic Standby mode (improves efficiency by burst-oscillation at light loads,  
Input wattage Pin < 0.1 W at zero output load condition)  
z Bottom-skip mode reduces the switching loss under medium to light loads  
z Built-in soft start function reduces the stress applied to power MOSFET during transitions  
z Built-in Leading Edge Blanking (LEB) function  
z Built-in protection functions for Overcurrent (OCP), Overvoltage (OVP), Overload (OLP), Thermal  
shutdown (TSD) protection and maximum ON time limitation  
z Two-chip structure: a MOSFET and a control IC (the MOSFET has an avalanche energy guarantee)  
The production lineup for the STR-L6400 series provides the options shown in the following table.  
MOSFET  
RDS(ON)  
DSS(MIN)[V] (MAX)[]  
Vin AC  
[V]  
Pout [W]  
(Note 1,2)  
Product No.  
V
100  
220  
100  
220  
22  
30  
15  
25  
STR-L6452  
STR-L6472  
650  
850  
3.4  
6.5  
Note 1: The maximum output power is derived from thermal specifications. The actual output power may be  
available around 120 – 140% of the above values, respectively, but will be limited by ON duty setting  
on transformer design or lower output voltage.  
Note 2: The condition of the maximum output power is “without heat sink”.  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.3  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
3. Functional Block Diagram and Terminal List  
The devices share a common basic electrical configuration, as shown in the functional block diagram in fig.3.  
The assignments of terminals in the packages also is common throughout the series, allowing easier design reuse.  
The terminal assignments are shown in the Terminal List table in tab.3.  
D/Startup  
6
1
Startup  
1-3  
Vcc  
UVLO  
Reg/Iconst  
DRV  
5
7
S/GND  
FB  
Latch  
OSC  
Logic  
FB/STB  
OCP  
9
8
OCP  
BD  
ADJ  
10  
BD  
ADJ/SS  
Fig.3 STR-L6400 Series Functional Block Diagram  
Terminal List Table  
Terminal  
Symbol  
Name  
Descriptions  
No.  
1 - 3  
5
6
D/Startup  
S/GND  
VCC  
Drain / Start-up Terminal  
Source / Ground Terminal  
Power Supply Terminal  
MOSFET Drain / Start-up current input  
MOSFET Source / Ground  
Input of power supply for control circuit  
Constant voltage control signal input /  
Standby control input / OLP signal input  
7
FB  
Feedback Terminal  
Bottom Detection /  
OCP Compensation for AC Input  
Voltage Terminal  
QR signal input /  
Overcurrent compensation input  
8
BD  
OCP pulse input /  
Bottom-skip signal input  
Soft start control /  
9
OCP  
ADJ  
OCP Input Terminal  
10  
Adjustment Terminal  
Bottom-skip delay time control /  
Remote ON/OFF signal input  
Tab.3 STR-L6400 Series Terminal List table  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.4  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
4. Package Information  
SIP-10 pin type (Sanken designation: STA-10)  
No.4 terminal is removed to provide greater clearance and creepage isolation for the high voltage input (No.1-3)  
and No.3 terminal is cut.  
The package dimensions and branding are shown below, and this lead framing number is LF437.  
Dimensions in mm  
a. Type Number  
Material of terminal: Cu  
b. Lot Number : YMDD  
Treatment of terminal : Ni plating + solder dip  
Weight: Approx. 2.8g  
Y is the last digit of the year of manufacture  
M is the month( 1 to 9, O,N,D)  
DD is the 2-digit date  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.5  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
5. Electrical Characteristics (Example: STR-L6472 )  
The following tables provide electrical characteristics for the STR-L6400 series.  
The STR-L6472 is used as an example.  
Both absolute maximum ratings and operating characteristics are provided.  
Certain details vary among the individual devices.  
5.1 Absolute Maximum Ratings, valid at Ta = 25°C  
Parameter  
Terminal  
15  
Symbol  
IDpeak  
IDMAX  
EAS  
ILpeak  
VCC  
Rating  
4.2  
Unit  
A
Note  
Single pulse  
1
Drain Current  
1
Maximum Switching Current  
15  
4.2  
40  
1.9  
32  
A
mJ  
A
Ta=-30+125℃  
Single pulse  
VDD=99V, L=20mH  
1
Avalanche Energy  
15  
Supply Voltage for Control Circuit  
Startup Terminal Voltage  
65  
15  
105  
75  
85  
85  
95  
V
VSTARTUP -1.0VDSS  
V
ADJ Terminal Sink Current  
FB Terminal Sink Current  
BD Terminal Sink Current  
BD Terminal Source Current  
OCP Terminal Voltage  
IADJ  
IFB  
3.0  
8.0  
mA  
mA  
mA  
IBDIN  
IBDOUT  
VOCP  
2.0  
-2.0  
mA  
V
-1.5+2.0  
With infinite  
heat sink  
14.7  
W
1
Power Dissipation in MOSFET  
15  
PD1  
2.0  
0.8  
W
W
Without heat sink  
Power Dissipation in Control Circuit  
Internal Frame Temperature  
in Operation  
PD2  
TF  
-30+125  
Top  
Tstg  
Tch  
-30+125  
-40+125  
+150  
Operating Ambient Temperature  
Storage Temperature  
Channel Temperature  
1 Refer to individual device datasheet for details; value differs among devices.  
Current characteristics are defined based on IC as Sink:+, Source:.  
5. 2 Electrical Characteristics in MOSFET, valid at Ta = 25°C  
Rating  
MIN TYP MAX  
Parameter  
Terminal Symbol  
Unit  
Note  
1
Drain-source Voltage  
Drain Leakage Current  
ON Resistance  
1 – 5  
1 – 5  
1 – 5  
1 – 5  
VDSS  
IDSS  
RDS(ON)  
tf  
850  
2.4  
V
µA  
300  
6.5  
200  
1
1
Switching Time  
nS  
1
Thermal Resistance  
θch-F  
3.1 /Channel to internal frame  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.6  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
5.3 Control Circuit Electrical Characteristics,  
valid at Ta = 25°C, VCC=20V, unless otherwise specified (or noted).  
Rating  
MIN TYP MAX  
Parameter  
Terminal Symbol  
Unit  
Power Supply Start-up Operation  
Operation Start Voltage  
65  
65  
65  
65  
15  
65  
65  
15  
105  
105  
105  
VCC(ON)  
VCC(OFF)  
ICC(ON)  
14.4  
9.0  
16.2  
10.0  
3.5  
18.4  
11.3  
5.5  
V
V
Operation Stop Voltage  
Circuit Current in Operation  
Circuit Current in Non-operation  
Start-up Circuit Operation Voltage  
Start-up Current  
mA  
µA  
V
ICC(OFF)  
10  
50  
VSTART(ON)  
55  
82  
100  
-0.5  
ICC(STARTUP) -2.4  
-1.4  
mA  
Start-up Current after OLP Operation  
Oscillation Frequency  
ICC(STARTOLP) -1.10 -0.50 -0.15 mA  
fOSC  
17.5  
2.0  
21.0  
2.3  
25.0  
2.6  
kHz  
V
Soft Start Operation Stop Voltage  
Soft Start Operation Charge Current  
Power-off Threshold Voltage  
VADJ(SS)  
IADJ(SS)  
-148  
8.2  
-110  
9.4  
-71  
µA  
V
VADJ(OFF)  
10.8  
Normal Operation  
Bottom-skip Operation Threshold Voltage 1  
Bottom-skip Operation Threshold Voltage 2  
Bottom-skip Operation Threshold Voltage 3  
Bottom-skip Operation Start Voltage  
Bottom-skip State Detection Bias Current  
BD Terminal Upper Clamp Voltage  
BD Terminal Lower Clamp Voltage  
QR Operation Threshold Voltage 1  
QR Operation Threshold Voltage 2  
Maximum Feedback Current  
95  
95  
95  
105  
105  
85  
85  
85  
85  
75  
VOCP(BS1) -0.720 -0.668 -0.605  
VOCP(BS2) -0.485 -0.435 -0.381  
VOCP(BS3) -0.205 -0.145 -0.085  
V
V
V
VADJ(BS)  
IADJ(BS)  
3.8  
-27  
4.3  
-20  
4.8  
-13  
V
µA  
V
VBD(HC)  
VBD(LC)  
VBD(TH1)  
VBD(TH2)  
IFB(MAX)  
6.3  
-0.075  
0.31  
0.15  
-225  
V
0.12  
0.01  
-315  
0.60  
0.32  
-135  
V
V
µA  
Standby Operation  
Standby State Detection Voltage  
Standby State Start Voltage  
75  
105  
75  
15  
VFB(STBIN)  
VADJ(STB)  
VFB(STBOP)  
TONL(MIN)  
1.40  
5.7  
1.63  
6.2  
1.85  
6.8  
V
V
Standby Operation Threshold Voltage  
0.80  
0.98  
1.00  
1.62  
1.25  
2.19  
V
Minimum TON period (Normal Operation)  
Minimum TON period  
(Input Compensation Operation)  
µS  
15  
TONH(MIN)  
0.54  
0.98  
1.40  
µS  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.7  
STR-L6400 APPLICATION NOTE  
Parameter  
Ver. 1.4  
Rating  
MIN TYP MAX  
Terminal  
Symbol  
Unit  
Protection Operation  
Maximum TON period  
15  
15  
TON(MAX)  
TON(LEB)  
31  
-
36  
41  
-
µS  
nS  
Leading Edge Blanking Time  
354  
Over Current Detection Threshold Voltage  
(Normal Operation)  
Over Current Detection Threshold Voltage  
(Input Compensation Operation)  
OCP* Terminal Source Current  
95  
95  
VOCP(H)  
VOCP(L)  
-0.975 -0.930 -0.875  
-0.904 -0.780 -0.656  
V
V
95  
85  
85  
75  
75  
75  
75  
65  
65  
IOCP(O)  
IBD(TH1)  
IBD(TH2)  
IFB(OLP)  
-260  
-575  
-565  
-27  
-130  
-500  
-450  
-20  
-40  
-425  
-375  
-13  
µA  
µA  
µA  
µA  
V
Input Compensation Detection Threshold Current 1  
Input Compensation Detection Threshold Current 2  
OLP* Bias Current  
OLP* Auto-restart Threshold Voltage  
OLP* Latch-off Bias Current  
VFB(OLPAUTO) 6.3  
IFB(OLPLa.OFF) -1.5  
VFB(OLPLa.OFF) 8.6  
6.7  
7.3  
-1.0  
9.6  
-0.5  
10.2  
31.0  
8.9  
mA  
V
OLP* Latch-off Threshold Voltage  
OVP* Operation Voltage  
VCC(OVP)  
26.0  
6.2  
28.5  
7.5  
V
2
Latch Circuit Release Voltage  
FB Terminal Maximum Voltage  
in Feedback Operation  
VCC(La.OFF)  
V
75  
VFB(MAX)  
Tj(TSD)  
4.90  
135  
5.45  
6.00  
V
Thermal Shut-down Temperature  
2 Latch circuit is activated by OLP, OVP and TSD functions.  
QR : Quasi-resonant, OCP : Overcurrent Protection, OVP : Overvoltage Protection,  
OLP : Overload Protection  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.8  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
6. Typical Application Circuit  
The PCB traces from the D/ST terminals (No.1-2 ), shall be as wide as possible, in order to enhance thermal  
dissipation.  
L
L2  
OUT  
AC  
Input  
D2  
R5  
PC1  
R7  
R8  
R9  
N
C1  
P
R10  
C8  
STR-L6400  
C9  
C7  
S
R2  
D1  
C2  
Z2  
1~3  
D/Startup  
Z1  
6
D
VCC  
8
BD  
R3  
(RBD  
)
GND  
Cont.FB  
7
C10  
(C  
V
)
10  
ADJ  
R4  
OCP  
9
S/GND  
5
T1  
C3 C4 C5 C6 PC1  
R1  
(ROCP  
)
C11  
Fig.6 STR-L6400 typical application circuit  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.9  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7. Functional Descriptions  
7.1 VCC (No. 6) Terminal  
VCC is the power supply terminal for control circuit.  
7. 1. 1 Start-up Circuit  
The startup circuit is connected to the drain terminals, D/Startup  
(No.1-3). During the start-up process, the constant current  
(ICC(STARTUP) = –1.4 mA typical) charges C2 at VCC terminal  
(see fig.7-1), and when the startup voltage level (VCC(ON) = 16.2  
V typical) is reached, the device starts switching operation.  
Hence, the C2 value decides the duration of the startup period,  
according to the following formula:  
C1  
P
1~3  
R2  
D1  
6
D/Startup  
VCC  
STR-L6400  
S/GND  
C2  
D
OCP  
5
9
tSTART = C2× (VCC(ON) – VCC(INIT)) / ICC(STARTUP) --- (1)  
where tSTART is the startup period, in s, and VCC(INIT) is the initial  
voltage on VCC terminal, in V. C2 shall be 10 to 47 µF,  
if it is a general power supply application.  
R1  
T1  
Fig.7-1 VCC peripheral circuit  
After switching operation begins, the startup circuit turns off  
automatically, to zero its current consumption.  
CC  
I
3.5mA  
(TYP)  
Fig.7-2 shows the relationship of VCC and ICC.  
When VCC terminal voltage reaches VCC(ON) , the device starts  
normal operation and ICC increases. While the device is in  
operation, if VCC terminal voltage decreases to the shutdown  
voltage level (VCC(OFF) = 10.0V typical), the undervoltage  
lockout (UVLO) circuit stops device operation, and the device  
reverts to the state before startup.  
10μA  
(TYP)  
CC  
V
10.0V  
(TYP)  
16.2V  
(TYP)  
Fig.7-2 Relationship of VCC and ICC at  
startup and shutdown  
As shown in fig.7-3, when the start-up fails because VCC  
terminal voltage drops below VCC(OFF) = 10.0V (TYP), it will  
be necessary for C2 to use a larger capacitance. As a larger  
capacitance causes a longer start-up time, it is necessary to  
examine about the problems on actual operations.  
CC  
V
Conrol circuit operation start  
Operation success  
16.2V  
(TYP)  
10.0V  
(TYP)  
Start-up failure  
time  
7. 1. 2 Auxiliary Winding  
After the device starts normal operation, the voltage from  
auxiliary winding (D in fig.7-1) becomes a power source to the  
device. The auxiliary winding voltage needs to be adjusted to  
approximately 18V, taking into account the turns ratio of  
Fig.7-3 VCC behavior at startup  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.10  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
auxiliary winding D, so that VCC terminal voltage becomes:  
VCC(OFF) = 11.3V(max) < VCC < VCC(OVP) = 26.0 V(min) --- (2)  
within the limits for input and output deviation.  
And the bottom point of VCC terminal voltage is recommended 12.5V or higher.  
In actual power supply circuits, there are cases in which VCC voltage fluctuates in direct proportion to the output  
of the SMPS (see fig.7-4). This happens because the circuit current of STR-L6400 series is small, and C2 is  
charged to a peak by the transient surge voltage that is generated at the moment MOSFET turns off.  
To alleviate C2 peak charging, lowering the influence on auxiliary winding D of the surge voltage from the  
primary winding shall be accomplished. It is effective to add some value R2, of several ohms to several tenths of  
an ohm, in series with D1 (see fig.7-1). The optimal value of R2 shall be determined using a transformer  
matching the application, because the proportion of VCC voltage versus the transformer output voltage differs  
according to transformer structural design.  
The proportion of change between VCC voltage and the SMPS output voltage becomes worse if:  
the coupling between the primary winding and the secondary winding of transformer get worse, and/or  
the coupling between the auxiliary winding D and the stabilizing output winding (a winding of the circuit that  
controls a constant voltage) gets worse.  
Considering the above, extra attention is required for the winding location of auxiliary winding D. Fig.7-5 and  
7-6 diagram alternative designs for the location of auxiliary winding D.  
Fig.7-4 Effect of R2 (see fig.7-1) on the proportion of  
VCC versus the SMPS output current  
Fig.7-5 Auxiliary winding D  
remote from primary winding Px  
Fig.7-6 Auxiliary winding D  
within a stabilizing output winding, S1  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.11  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7. 1. 3 Over Voltage Protection  
When more than OVP threshold voltage of VCC(OVP) = 28.5 V (TYP) occurs between VCC terminal and GND  
terminal, the OVP function starts operation. It shuts down the device with latch mode.  
The OVP function can detect overvoltage on the transformer secondary output, because the normal VCC power  
supply voltage, from the auxiliary winding of transformer, is in proportion to the output voltage.  
This provides protection in cases such as a circuit open on the secondary side.  
The secondary side output voltage that initiates OVP operation can be calculated approximately from the  
following formula:  
VOUT ( normal )[V ]  
--- (3)  
Vout(OVP) [V ]≒  
× 28.5[V] (TYP )  
VCC ( normal )[V ]  
7. 1. 4 Latch Operation  
The fault latch function prevents the device from normal switching while OVP, OLP, TSD protection functions  
are in operation.  
Fig.7-7 shows the transition diagram in OVP operation. When the device switching stops after a protection state  
is latched, the VCC terminal voltage falls once to VCC(OFF) = 10.0V (TYP). After that, VCC terminal repeats the  
charge and discharge between VCC(ON) = 16.2V (TYP) and VCC(OFF) = 10.0V (TYP) and prevents VCC voltage  
excess increase.  
Releasing the latch is done by dropping VCC voltage below VCC(La.Off) = 7.5V (TYP) (Latch Circuit Release Voltage),  
which is normally done by shutting off AC input.  
AC off  
(Input electrolytic capacitor, C1, voltage falls)  
OVP operation  
28.5V  
(TYP)  
Keeping latch operation  
16.2V  
(TYP)  
Available to re-start  
10.0V  
(TYP)  
Latch circuit release voltage  
time  
Fig.7-7 Transition diagram in OVP operation  
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Page.12  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7.2 ADJ (No.10) Terminal  
ADJ terminal has 5 functions as below.  
Soft start function  
Delay time setting for QR mode switching  
Delay time setting for auto standby switching  
Disabling bottom-skip function / Auto standby function  
External ON /OFF control  
7.2.1 Soft Start Function  
The built-in soft start function reduces the voltage and current stresses to MOSFET and secondary diode, during  
the start-up period. Fig.7-8 shows the peripheral circuit for ADJ terminal and the waveforms of MOSFET drain  
current ID and ADJ terminal voltage VADJ  
.
C3 between ADJ terminal and GND terminals is charged with IADJ(SS) = 110µA (TYP) (Soft Start Operation  
Charge Current). The tON period of MOSFET is limited depending on the ADJ terminal voltage. The soft start  
operation continues until the ADJ terminal voltage reaches VADJ(SS) = 2.3V(TYP) (Soft Start Operation Stop  
Voltage). For reference, in case that C3 is 0.22µF, the soft start period is about 4.6ms (TYP).  
VADJ  
Soft start  
period  
VADJ(SSCP)= 2.9V(TYP)  
|
STR-L6400  
VADJ(SS)= 2.3V(TYP)  
Charged with 110uA  
ADJ  
10  
110uA  
C3  
S/GND  
5
time  
ID  
OCP limit  
time  
Fig.7-8 ADJ terminal peripheral circuit / Soft start operation at start-up  
VADJ(SSCP) is 2.9V (TYP) on the steady state condition.  
7.2.2 Delay Time Setting for QR Mode Switching  
STR-L6400 series has the delay time setting for the transit between QR and Bottom-skip mode, between  
1 bottom-skip and 2 bottom-skip mode. Therefore, the operation in the same mode is available corresponding for  
frequent dynamic load changes, and the reduction of audible noise from transformer is achieved with this  
function. The delay time setting is adjusted using the charge time for soft start capacitor, C3, connected to ADJ  
terminal as shown in fig.7-8.  
Under the load change, only when OCP terminal voltage reaches VOCP(BSX) (Bottom-skip Operation Threshold  
Voltage) and continues for a delay time, the operation mode is switched.  
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Page.13  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
In case the load condition returns to the previous condition within a delay time, the operation mode is not  
switched.  
As VOCP(BSX) has hysteresis, the same mode is maintained with the hysteresis unless a load change exceeds  
hysteresis.  
V
ADJ  
Charged with 20uA  
The point detected  
VADJ(BS)= 4.3V(TYP)  
V
OCP(BSX)  
V
ADJ(SSCP)= 2.9V(TYP)  
STR-L6400  
ADJ  
10  
20uA  
C3  
Delay time  
S/GND  
The fixed delay time in which C3 is  
charged with 20uA from 2.9V to 4.3V.  
5
time  
1 bottom-skip operation  
QR operation  
The operation mode continues in the same mode  
when VOCP(BSX)  
detection is cancelled during the fixed delay time.  
Fig.7-9 Transition diagram under dynamic load change / ADJ terminal peripheral circuit  
When C3 is 0.22μF, the delay time is about 15.4mS.  
7.2.3 Delay Time Setting for Auto Standby Switching  
STR-L6400 series has the delay time setting for auto standby switching. It is also implemented in the same  
manner of the delay time setting for QR mode switching in 7.2.2.  
Fig.7-10 shows the transition diagram for the switching to auto standby operation.  
ADJ  
V
Charged with 110uA  
ADJ(STB)= 6.2V(TYP)  
V
Delay time  
STR-L6400  
ADJ  
time  
time  
10  
110uA  
C3  
FB  
V
S/GND  
5
VFB(STBIN)=1.63V(TYP)  
V
FB(STBOP)  
=1.00V(TYP)  
2 bottom-skip operation  
Standby operation  
Fig.7-10 Transition diagram for the switching to auto standby operation  
In case C3 is 0.22μF, the delay time is about 6.6mS.  
When the load condition changes lighter from low load condition, the feedback current to FB terminal from the  
photo-coupler is increasing, and the FB terminal voltage is decreasing. If FB terminal voltage falls below  
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Page.14  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
VFB(STBIN) = 1.63V (TYP) (Standby State Detection Voltage), C3 connected to ADJ terminal starts to be charged  
with IADJ(SS) = 110µA (TYP) (Soft Start Operation Charging Current). When the ADJ terminal voltage reaches  
VADJ(STB) = 6.2V (TYP) (Standby State Start Voltage), the device becomes ready to enter into the burst operation  
mode. If the load becomes heavier again during the delay time and the FB terminal voltage exceeds VFB(STB)  
=
1.63V (TYP), the device returns to the bottom-skip operation or the QR operation according to the load  
conditions, without switching to the burst operation mode.  
When the FB terminal voltage continues decreasing and falls below VFB(STBOP) = 1.0V (TYP) (Standby Operation  
Threshold Voltage), the burst operation mode starts. In addition, when the TON period reaches TONL(MIN)* /  
TONH(MIN)* = 1.62µS / 0.98µS (TYP) (Minimum TON period (Normal Operation) / (Minimum TON period (Input  
Compensation Operation), the feedback current is increasing higher. Therefore, the minimum TON period works  
for the trigger to enter to standby mode.  
The burst operation mode cycle varies on the feedback current according to the load conditions.  
TONL(MIN)* / TONH(MIN)*: Actual Ton period to standby mode depends on input compensation: refer to 7.4.2.  
7.2.4 Disabling Bottom-skip Function / Auto Standby Function  
The bottom-skip function and the auto standby function are disabled by connecting external components to  
ADJ terminal.  
Fig.7-11 shows the circuit example for disabling both functions, and fig.7-12 shows only for disabling the auto  
standby function.  
110uA  
20uA  
10  
STR-L6400  
STR-L6400  
ADJ  
ADJ  
10  
D3  
C3  
R10  
C3  
S/GND  
5
S/GND  
5
A zener diode of Vz= 5.6V  
A resistor of around 100kΩ  
Fig.7-11 Circuit disabling both functions  
of bottom-skip and auto standby  
Fig.7-12 Circuit disabling only auto standby  
function  
Disabling Bottom-skip Function  
During bottom-skip operation, the ADJ terminal charges C3 with IADJ(BS) = 20µA (TYP) (Bottom-skip State  
Detection Bias Current). By connecting a resistor, R10, in parallel with C3 and limiting the terminal voltage  
increase, the bottom-skip function is disabled. As shown in fig.7-11, by connecting R10 of around 100K, the  
bottom-skip function is disabled because ADJ terminal voltage is limited at 2V (= 20µA × 100k), which is  
lower than VADJ(BS) = 3.8V (MIN) (Bottom-skip Operation Start Voltage).  
Disabling Auto Standby Function  
To start the burst operation mode, the ADJ terminal voltage shall reach higher than VADJ(STB) = 6.2V (TYP).  
However, by connecting a zener diode of VZ = 5.6V, D3, in parallel with C3, the auto standby function is  
disabled because ADJ terminal voltage is limited under VADJ(STB) = 6.2V (TYP). In this case, the voltage  
difference between VZ = 5.6V and VADJ(BS) = 4.3V (TYP) is not enough. It is necessary to take care of the zener  
voltage accuracy and select the proper zener diode rank.  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.15  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7.2.5 External ON / OFF Control  
The ADJ terminal has the remote ON / OFF control function by applying the external signal. By increasing ADJ  
terminal voltage to VADJ(OFF) = 9.4V (TYP) (Power-off Threshold Voltage) and over, the device is stopped (OFF).  
Fig.7-13 shows the typical circuit example, the external power supply (1216V) provides ADJ terminal with  
more than VADJ(OFF) through R11 (10k – 30K) and a photo-coupler when the photo-coupler turns on by the  
external signal. And also by continuing to apply the higher voltage than VADJ(OFF), the device holds OFF state.  
In this example, if the ON state is activated from the OFF state by turning off the photo-coupler, the operation  
always starts from discharging the soft start capacitor. As a result, when the ON signal is applied, the ON state  
begins after the soft start period.  
External power supply  
For example, 12~16V  
V
ADJ  
R11  
For example,  
10k~33kΩ  
VADJ(OFF) = 9.4V(TYP)  
VADJ(SSCP)= 2.9V(TYP)  
PC2  
time  
ON  
STR-L6400  
ON  
OFF  
ADJ  
10  
I
D
C3  
S/GND  
5
time  
Fig.7-13 Typical circuit for external ON / OFF control  
On the circuit design like the above, as the maximum rating of ADJ terminal sink current is = 3.0mA (MAX), the  
R11 value shall be calculated using the external power supply voltage and ADJ terminal current(below 3mA).  
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Page.16  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7.3 FB (No. 7) Terminal  
FB terminal has 3 functions:  
Output voltage control  
Overload protection (OLP)  
Burst operation control for standby mode Refer 7.6 Standby Operation  
7.3.1 Constant Output Voltage Control  
The constant output voltage control is achieved by connecting a photo-coupler to FB terminal and sinking the  
feedback current. Fig.7-14 shows the peripheral circuit of FB terminal. As the maximum feedback current,  
IFB(MAX), is –315µA (MIN), the forward current of photo-coupler on secondary side shall be set in consideration  
of aging degradation of CTR(Current Transfer Ratio) and others.  
phase compensation  
Normal setting (OLP: Latch shutdown)  
STR-L6400  
FB  
7
PC1  
R4  
S/GND  
5
C5  
C6  
CR for OLP latch delay timing setting  
Vz=8.2V  
Option 1 (OLP: Auto restart)  
phase compensation  
STR-L6400  
FB  
7
PC1  
R4  
C5  
S/GND  
5
C6  
D4  
CR for OLP latch delay timing setting  
220kΩ  
Option 2 (OLP: Disabling both functions)  
phase compensation  
STR-L6400  
FB  
7
PC1  
S/GND  
5
R12  
C6  
Fig.7-14 FB terminal peripheral circuit / OLP operation mode selection  
As for the values of resistance (R4) and capacitance (C5) for latch delay, generally, around 47kand  
4.7µF-10µF are recommended, respectively. The OLP function shall not activate on transient condition  
(power on and power off), but activate on overload condition. The delay time for OLP shall be adjusted by  
C5 value when it is shorter.  
The capacitance (C6) for phase compensation shall be adjusted in the range of 470pF to 0.022µF. (Refer to  
7.8, for the detail.)  
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Page.17  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7.3.2 Overload Protection (OLP) Function  
Fig.7-15 shows the transition diagram in OLP operation. When the secondary output is in overload and the  
overcurrent protection function is activated on primary side, the output voltage decreases. As a result, the  
secondary error amplifies is cut-off and the feedback current from the photo-coupler is eliminated. At this time,  
the FB terminal is charged with IFB(OLP) = 20µA (TYP) (OLP Bias Current) during the latch delay time. If the  
FB terminal voltage reaches VFB(OLPAUTO) = 6.7V (TYP) (OLP Auto-restart Threshold Voltage), the OLP  
function starts and the oscillation stops. During this period, the VCC terminal voltage decreases. However, after  
the FB terminal voltage reaches VFB(OLPAUTO) = 6.7V (TYP), the internal bias is switched to IFB(OLPLa.OFF)  
=
1.0mA(TYP) (OLP Latch-off Bias Current). As a result, the FB terminal voltage rapidly reaches VFB(OLPLa.OFF)  
= 9.6V (TYP) (OLP Latch-off Threshold Voltage) and the device enters into the latch mode, before VCC  
terminal voltage falls below VCC(OFF) = 10.0V (TYP) (Operation Stop Voltage). The typical circuit of this  
operation is shown in the normal setting (OLP: Latch Shutdown) in fig.7-14.  
Latch shutdown  
VFB  
9.6V(TYP)  
VFB(OLPLa.OFF)  
Charged with -1.0mA(TYP)  
in VFB  
> 6.7V(TYP)  
VFB(OLPAUTO)  
ΔV  
Charged with  
-20μA(TYP)  
tdly  
VFB(MAX)  
time  
Fig.7-15 Transition diagram in OLP operation  
There is the relative relation between VFB(OLPAUTO) and VFB(MAX), and the difference voltage, ΔV, between them  
is around 1V verified by design.  
The tdly charged with 20μA can be calculated approximately from the following formula:  
1V × C5  
--- (4)  
tdly ≒  
20uA  
7.3.2-1 Overload Protection (OLP) Function with Auto-restart  
The transition diagram of OLP function with auto-restart is shown in fig.7-16. The circuit in "Option 1" in  
fig.7-14 is for this function with auto-restart. A zener diode of VZ = 8.2V, D4, is placed between FB terminal and  
GND terminal, limiting FB terminal voltage not to reach VFB(OLPLa.OFF) = 9.6V (TYP).  
As a result, the intermittent operation starts under the overload condition.  
When the overload condition is released, the auto-restart is available. As shown in fig.7-16, after the FB terminal  
voltage reaches VFB(OLPAUTO) = 6.7V (TYP), the oscillation stops. Then the VCC terminal voltage decreases and  
the auto-restart operation starts. In this operation, as the start-up current decreases to ICC(STARTOLP) = 0.5mA  
(TYP) (Start-up Current after OLP Operation), the oscillation stop period is extended and the heat generation at  
switching elements is reduced.  
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Page.18  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
As ICC decreases to ICC(STARTOLP)  
the OFF period is extended.  
,
time  
Reduce the start-up current to ICC(STARTOLP)  
Fig.7-16 Transition diagram in auto-restart operation  
7.3.2-2 Disabling OLP Function  
The circuit in "Option 2" in fig.7-14 is for disabling OLP function. When R12 (220Kor lower ) is placed  
between FB terminal and GND terminal, IFB(OLP) = 20µA (TYP) (OLP Bias Current) flows through R12, and  
the FB terminal voltage does not reach VFB(OLPAUTO) = 6.7V (TYP). Then the OLP functions (both of the latch  
operation and the auto-restart operation) are disabled.  
When the OLP function is disabled, the output characteristics shall be constant power.  
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Page.19  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7.4 BD (No 8) Terminal  
BD terminal has two separated functions.  
Turn-on timing determination by flyback voltage (plus voltage) of auxiliary winding  
Input compensation by forward voltage (minus voltage) of auxiliary winding  
7. 4. 1 Bottom-on Timing (QR Signal)  
The bottom-on function* is maintained, not only in the QR mode, but else in the bottom-skip mode.  
Bottom-on Function*: To reduce the switching losses at MOSFET turn-on, by turning-on at each bottom  
point of VDS waveform of MOSFET.  
Fig.7-17 shows the peripheral circuit for BD terminal and auxiliary winding voltage. After limiting the current of plus  
side (fly-back side) waveform generated on auxiliary winding by R3(RBD), the plus side voltage is input to BD  
terminal.  
T1  
D1  
R2  
Flyback voltage  
R3  
C2  
D
)
(
BD  
R
Plus side  
O V  
Forward voltage  
8
Minus side  
BD  
STR-L6400  
S/GND  
ON  
T
5
Waveform of auxiliary winding  
Fig.7-17 BD terminal peripheral circuit and auxiliary winding voltage  
By clamping BD terminal voltage internally, the voltage shown in fig.7-18 (example: QR mode under heavy  
load) is input to BD terminal. During this voltage is input, MOSFET TOFF period continues. After that, the BD  
terminal voltage falls.  
When the falling is detected at VBD(TH2) = 0.15V (TYP) (Quasi-resonant Operation Threshold Voltage 2),  
MOSFET is turned-on. After the detection of the falling, the BD terminal threshold voltage is set to VBD(TH1)  
0.31V (TYP) (Quasi-resonant Operation Threshold Voltage 1), to prevent malfunctions.  
=
Unfavorable waveform  
Normal waveform  
= 6.3V(TYP)  
= 0.31V(TYP)  
V
BD(HC)  
= 6.3V(TYP)  
BD(HC)  
V
V
V
BD(TH1)  
= 0.31V(TYP)  
= 0.15V(TYP)  
VBD(TH1)  
= 0.15V(TYP)  
BD(TH2)  
BD(TH2)  
0V  
V
0V  
BD terminal  
blanking time 1.0uS(TYP)  
Fig.7-19 BD terminal voltage  
using a poor coupling transformer  
Fig.7-18 BD terminal voltage in QR operation  
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Page.20  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
Fig.7-19 shows the BD terminal waveform using a transformer with poor coupling. For example, if the turn ratio  
(P/S) of primary and secondary winding is large (such as in the low-voltage and high current output  
specifications), a surge voltage may be generated on BD terminal voltage through auxiliary winding at MOSFET  
turning-off.  
As BD terminal blanking time (1.0μS(TYP)) is implemented, the QR signal is not detected during this time.  
If the surge is applied beyond the blanking time, the MOSFET may be switched with high frequency by the  
detection of ringing voltage as the QR signal. In this case, the MOSFET loss shall be excessive. If the channel  
temperature exceeds the maximum rating, the MOSFET destruction is caused. When the high frequency  
operation occurs, it is necessary to examine the pattern layout (between BD terminal and GND terminal),  
the transformer design (structure of primary – secondary windings and position of auxiliary winding),  
the snubber circuit adjustment, the probe position of oscilloscope and others.  
Due to the inherent delay at BD terminal, if R3(RBD) value is too large, the turn-on timing shall be delayed as  
shown in fig.7-20.  
As R3(RBD) value is relating to the input compensation of overcurrent protection (OCP) and the input  
compensation of standby, R3(RBD) value shall be adjusted on actual operations referring the following 7.4.2.  
Turn-on timing is delayed  
VDS  
VDS  
Bottom point  
Bottom point  
ID  
ID  
The turn-on timing is delayed from the bottom  
point of VDS waveform due to a large RBD  
The ideal “bottom-on”: the turn-on timing is  
at the bottom point of VDS waveform.  
.
Fig.7-20 Waveform Examples at Bottom Point with / without Delay  
7. 4. 2 OCP Input Compensation / Standby Input Compensation by R3(RBD  
)
The switching between VOCP(H) / VOCP(L) (Over Current Detection Threshold Voltage), between TONH(MIN)  
/
TONL(MIN) (Minimum TON period) (threshold for standby operation) is achieved by detecting the current which is  
determined by forward voltage of auxiliary winding and R3(RBD).  
The switching is done using the same detection threshold value of IBD(TH1) = 500µA (TYP) (Input  
Compensation Detection Threshold Current 1).  
7.4.2-1 OCP Input Compensation  
When the QR mode converter is used in a universal input voltage range, the peak drain current varies because  
the operating frequency and the input voltage vary (The drain peak current decreases in the higher input voltage  
range.)  
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Page.21  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
As the value of OCP detection resistor, R1 (ROCP), is fixed, the above influence causes that the OCP operation  
point shifts to the more overload side in the higher input voltage range. Comparing with the OCP operation point,  
which is adjusted under the condition of the minimum input voltage of AC100V range and the maximum load,  
the operation point in AC230V range shall shift around double. To suppress this phenomenon, the OCP threshold  
voltage is possible to be switched, by sinking the current more than 500µA (TYP) from BD terminal through R3  
(RBD) during the TON period, using the forward (minus) voltage of auxiliary winding shown in fig.7-17.  
The OCP threshold voltage is switched as shown below:  
VOCP(H): 0.930V (TYP)  
VOCP(L): 0.780V (TYP)  
when the current through RBD is below 500µA (TYP) during TON period  
when the current through RBD is above 500µA (TYP) during TON period  
On usual R3(RBD) design, the OCP operation point shall be VOCP(H) in AC100V input range, and VOCP(L)  
in AC230V input range.  
[Reference Example]  
In case of: AC85V - AC264V universal input, 15V / 20W output QR mode converter  
Transformer winding: Np: 110T (Lp = 3.34mH), NS (15V): 9T  
Auxiliary winding D: 10T (equivalent to 18V)  
For input compensation around AC160V, the forward voltage is;  
160 2 ×  
(
10T /110 T = 20.57V  
)
To flow 500µA at 20.57V,  
R3(RBD)= 20.57V / 500µA= 41.14k39kshall be selected in the E12 / E24 series (Although the  
impedance between BD terminal and GND terminal gives influence actually, the approximate value shall be  
calculated.)  
The maximum absolute rating of BD terminal is ±2mA. When R3(RBD) is 39kΩ, the current at the minus  
side on the auxiliary winding voltage in fig.7-17 is 870µA at maximum input voltage, and the current at the  
plus side is 300µA because of 18V output (auxiliary winding voltage ) and 6.3V (BD terminal clamp voltage).  
Both of them are confirmed to be within the above range.  
7.4.2-2 Standby Input Compensation  
As described in 7.2.3, the minimum TON period works for the trigger to enter to standby mode.  
For universal input operation, the TON period at entering to standby shall be largely different depending on the  
input conditions. Even if the auto standby is achieved in AC230V input range, the auto standby shall not  
achieved due to the wider TON period in AC100V input range, under the same load conditions.  
In order to prevent this phenomenon, the minimum TON period compensation for entering to standby is  
implemented.  
For universal input design, it is recommended the compensation shall be effective around AC140 – AC160V.  
Under the load condition to change the mode like standby 2 bottom-skip, the TON period shall be detected to  
be the following width, in addition to the conditions described in 7.2.3.  
TONL(MIN): 1.62µs when the current through RBD is below 500µA (TYP) during TON period  
--- AC100V input range  
TONH(MIN): 0.98µs when the current through RBD is above 500µA (TYP) during TON period  
--- AC230V input range  
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Page.22  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7. 5 OCP (No. 9) Terminal and Bottom-skip Operation  
7.5.1 Connection of OCP Terminal  
The Overcurrent Protection (OCP) circuit detects each drain peak current level (on a pulse-by-pulse basis) of  
MOSFET with a OCP detection resistor, R1 (ROCP), and limits the output power of the power supply.  
The external circuit is shown in fig.7-21.  
At the OCP detection, the leading edge blanking (LEB) function works. During TON(LEB) = 354ns (TYP)  
(Leading Edge Blanking Time), the OCP detection is disabled preventing the unstable oscillations.  
When coupling capacitance of transformer, drain voltage at MOSFET turning-on, resonance capacitor are higher  
or the bottom detection is improper, the surge current at MOSFET turning-on may occur like the right side in  
fig.7-22. If the surge voltage of turn-on portion, which is beyond TON(LEB) = 354ns (TYP), reaches the OCP  
terminal voltage (the control value) determined by FB terminal voltage, the oscillation may be unstable.  
When this phenomena occurs, an external filter with a resistor and a capacitor shown on the lower side in  
fig.7-21 is recommended. In case of a larger filter resistor, the overcurrent may vary largely, due to the influence  
of IOCP(O) = 130µA (TYP) (OCP Terminal Source Current) and longer response time. Considering the above,  
the recommended values are approximately 100and 220pF, respectively.  
Generally, a filter circuit is unnecessary,  
STR-L6400  
because of the implemented LEB.  
S/GND  
5
OCP  
9
R1  
A filter circuit is recommended in case LEB does not work properly due  
to a higher surge current at turn-on.  
STR-L6400  
S/GND  
5
OCP  
9
around 220pF  
around 100Ω  
R1  
Fig.7-21 Typical examples for OCP terminal peripheral circuit  
VOCP  
VOCP  
Surge voltage on R1(ROCP)generated by  
surge current at turn-on  
TON(LEB)  
In case of small influence of surge  
voltage at turn-on  
In case of large influence of surge  
voltage at turn-on  
Fig.7-22 Waveforms of OCP Terminal Voltage  
Page.23  
Copy Right: SANKEN ELECTRIC CO., LTD.  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7.5.2 Bottom-skip Operation  
The bottom-skip operation with multi-mode control is available.  
The function is to switch between QR operation (under heavy load) and bottom-skip operation (under middle or  
light load) according to the secondary load condition by detecting the drain current (actually OCP terminal  
voltage).  
Fig.7-23 and 7-24 show the transition diagrams from no load to heavy load, from heavy load to no load,  
respectively. The multi-mode control changes the modes like standby mode 2-bottom-skip mode ⇔  
1-Bottom-skip mode QR mode.  
In actual operations, there are delay time settings for rapid load changes described in 7.2.2 and 7.2.3. However,  
fig.7-23 and 7-24 are shown just the conceptual diagrams, and such delays are omitted.  
VOCP(BS2)  
-0.435V  
VOCP(BS1)  
-0.668V  
VOCP(L)  
-0.78V  
Standby  
No load  
2 Skip  
1 Skip  
QR  
Heavy load  
Fig.7-23 Transition diagram from no load to heavy load  
VFB(STBOP) = 1V,  
TON = TONL(MIN) or TONH(MIN)  
VOCP(BS2)  
-0.435V  
VOCP(BS3)  
-0.145V  
VOCP(L)  
-0.78V  
1 Skip  
2 Skip  
QR  
Standby  
Heavy load  
No load  
Fig.7-24 Transition diagram from heavy load to no load  
As the hysteresis is implemented for each mode  
switching of the increasing / decreasing load transitions,  
the oscillation is stable near the switching thresholds  
and the mode switching is achieved stably.  
Fig.7-25 shows the switching hysteresis for each mode  
switching.  
Fig.7-25 Hysteresis for each mode switching  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.24  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7.6 Standby Operation  
FB Terminal Voltage during Standby  
As described in 7.2.3, the conditions for entering to standby mode are:  
zWhen the ADJ terminal voltage reaches VADJ(STB) = 6.2V (TYP) (Standby State Start Voltage), the device  
becomes ready to enter into the burst operation.  
zWhen the FB terminal voltage falls below VFB(STBOP) = 1.0V (TYP) (Standby Operation Threshold Voltage),  
the burst operation mode starts.  
Under light load condition, when the TON period reaches TONL(MIN)/ TONH(MIN) = 1.62µS / 0.98µS (TYP)  
(Minimum TON period (Normal Operation) / (Minimum TON period (Input Compensation Operation),  
the feedback current is increasing higher. Therefore, the minimum TON period works for the trigger to enter to  
standby mode.  
As described in 7.4.2-2, when the input compensation is effective, the minimum TON period shall be  
automatically switched; TONL(MIN) = 1.64µS (TYP) in AC100V input range or 0.98µS (TYP) in AC230V input  
range.  
Fig.7-26 shows the standby operation. During the standby operation, the burst operation mode repeats between  
oscillation-stop mode and 2-bottom-skip mode.  
In the burst operation mode, the energy supply from auxiliary winding synchronizes with the energy supply to  
the output. As a result, the ripple may be generated on VCC terminal voltage due to burst operation. If the VCC  
terminal voltage falls below VCC(OFF) = 11.3V (MAX) (Operation Stop Voltage), some adjustments, such as  
increasing the C2 value between VCC terminal and S /GND terminal, are necessary to stabilize the VCC terminal  
voltage.  
VCC  
UVLO: VCC(OFF)= 11.3V(MAX)  
time  
Non-oscillation  
period  
Non-oscillation  
period  
ID  
Oscillation period →  
Oscillation period →  
time  
Fig.7-26 Waveform in Standby Operation  
7.7 Maximum ON Time Limitation Function  
During low input voltage or the transition operation  
such as power supply ON/OFF, the maximum TON  
period is limited to be TON(MAX) = 36µsec (TYP)  
(Maximum TON period) (refer to fig.7-27).  
Maximum On time  
ID  
VDS  
On the power supply design, the confirmation about  
MOSFET TON period is necessary, under the condition  
with minimum input voltage and maximum load  
condition.  
time  
Fig.7-27 Maximum TON period confirmation  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.25  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
7.8 Phase Compensation  
Fig.7-28 shows the circuit diagram for the secondary error amplifier, using a general shunt regulator. As for  
the phase compensation capacitor, C8, the capacitance shall be adjusted in the range of 0.047 – 0.47µF, and  
finally determined on actual operations.  
In case the load specification is not general, the phase compensation on secondary error amplifier is not  
enough due to the larger ripples on rectifier capacitor, or the operation is not stable due to the noises to FB  
terminal, it is recommended to place a capacitor, C6, between FB terminal and GND terminal shown in  
fig.7-29. As for C6, the capacitance shall be adjusted in the range of 470pF to 0.022µF and finally determined  
on actual operations.  
L2  
PC1  
T1  
OUTPUT  
C9  
phase compensation  
R5  
D2  
STR-L6400  
R8  
R9  
FB  
7
PC1  
R4  
C5  
R7  
S/GND  
5
C8  
S
C6  
C7  
R10  
Z2  
CR for OLP latch delay timing setting  
Normal setting (OLP: Latch shutdown)  
GND  
Fig.7-28 Peripheral circuit  
around secondary shunt regulator  
Fig.7-29 FB terminal peripheral circuit  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.26  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
8. Design Notes  
8. 1 External Components  
Please take care to use properly rated, including derating as necessary, and proper type of components.  
Input and output electrolytic capacitors. Apply proper derating against ripple current, voltage, and temperature rise.  
Use of high ripple current and low impedance types, designed for switch mode power supplies, is recommended.  
Transformer. Apply proper derating against core temperature rise from core loss and copper loss.  
Current sensing resistor R1 (ROCP). A high frequency switching current flows to R1 (ROCP), and may cause poor  
operation if a high inductance resistor is used. Choose a low inductance and surge-proof type.  
8. 2 Component Layout and Trace Design  
PCB circuit trace design and component layout affect proper  
functioning during operation, EMI noise, and power dissipation.  
Therefore, where high frequency current traces form a loop, as in  
fig.8-1, wide, short patterns and small circuit loops are important.  
In addition, local GND and earth ground traces affect radiated  
EMI noise, thus the same measures should be taken into account.  
Switching mode power supplies consist of current traces of high  
Fig.8-1 High frequency current loops  
(hatched areas)  
frequency and high voltage, thus trace design and component  
layouts should be done to comply with all safety guidelines.  
Furthermore, in the case where a MOSFET is being used as the  
switching device, take into account the positive thermal  
coefficient of RDS(on) when preparing a thermal design.  
(1) S/GND terminal to R1 (ROCP) to C1 to T1 [winding P] to D/ST terminal Trace Layout  
This is the main circuit containing the switching current, and thus it should be as wide and as short as possible.  
In case the distance between C1 and the device is lengthy, an isolation capacitor near the device or the  
transformer is recommended.  
The capacitors may be either electrolytic or film type capacitors, 0.1 µF, in the range considered maximum  
input voltage.  
(2) S/GND terminal to C2 to T1 [winding D] to R2 to D1 to C2 to VCC terminal Trace Layout  
This circuit also needs to be as wide and short as possible. In case the distance between C2 and the device is  
not short, placing a 0.1 µF / 50 V film capacitor between VCC and S/OCP terminals is recommended.  
(3) R1 (ROCP) Trace Layout  
Place R1 (ROCP) as close as possible to S/GND terminal. There should be a single connection (A in fig.8-2)  
between the power pattern and the control circuit pattern, and a single connection (B in fig.8-2) between the  
power pattern and the OCP terminal pattern close to R1 (ROCP), in order to reduce the common impedance of  
the pattern and to avoid interference from the switching current to the control circuit.  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.27  
STR-L6400 APPLICATION NOTE  
Ver. 1.4  
D2  
C1  
P
STR-L6400  
C7  
S
R2  
D1  
C2  
1~3  
D/Startup  
Z1  
6
D
VCC  
8
BD  
T1  
BD  
R3(R )  
Cont.FB  
7
C10  
V
)
(C  
10  
ADJ  
R4  
Power  
OCP  
9
S/GND  
5
Control  
A
R1  
OCP  
(R  
)
C3 C4 C5 C6 PC1  
B
C11  
Fig.8-2 External component layout  
Copy Right: SANKEN ELECTRIC CO., LTD.  
Page.28  

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