LA75503V_07 [SANYO]
For PAL TV/VCR Adjustment Free VIF/SIF Signal Processing IC; 对于PAL TV / VCR调整免费VIF / SIF信号处理IC
| 型号： | LA75503V_07 |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | For PAL TV/VCR Adjustment Free VIF/SIF Signal Processing IC |
| 文件： | 总15页 (文件大小：517K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : EN6804A
Monolithic Linear IC
For PAL TV/VCR Adjustment Free
LA75503V
VIF/SIF Signal Processing IC
Overview
The LA75503V is an adjustment free VIF/SIF signal processing IC for PAL TV/VCR. It supports 38MHz, 38.9MHz, and
39.5MHz as the IF frequencies, as well as PAL sound multi-system (M/N, B/G, I, D/K), and contains an on-chip sound
carrier trap and sound carrier BPF. To adjust the VCO circuit, AFT circuit, and sound filter, 4MHz external crystal or
4MHz external signal is needed.
Features
• Internal VCO adjustment free circuit eliminating need for VCO coil adjustments.
• Internal sound carrier BPF and sound carrier trap enable easy configuration of PAL sound multi-system at low cost.
• Considerably reduces the number of required peripheral parts.
• Use of digital AFT eliminates problem of AFT tolerance.
• Package: SSOP30 (275 mil)
Functions
• VIF amplifier
• Equalizer amplifier
• VCO adjustment free PLL detection circuit
• Digital AFT circuit
• RF AGC
• Internal sound carrier BPF
• Internal sound carrier trap
• PLL-FM detector
• Buzz canceller
• Reference oscillation circuit
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
's products or
equipment.
N1407 MS B8-5611 / 41301RM (OT) No.6804-1/15
LA75503V
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
max
Conditions
Ratings
Unit
V
Maximum supply voltage
Circuit voltage
V
7
CC
V16
V
V
V
V
CC
V18
I30
CC
-1
Circuit current
mA
mA
mA
mA
mW
°C
I17
+0.5
-10
I6
I4
-3
Allowable power dissipation
Operating temperature
Storage temperature
Pd max
Topr
Tstg
Ta ≤ 75°C *
550
-20 to 70
-55 to +150
°C
* Mounted on a printed circuit board: 65mm ¯ 72mm ¯ 1.6mm, paper phenol.
Operating Conditions at Ta = 25°C
Parameter
Recommended supply voltage
Operating voltage range
Symbol
Conditions
Ratings
Unit
V
V
5
CC
V
op
4.5 to 5.5
V
CC
Electrical Characteristics at Ta = 25°C, V
= 5.0V, fp = 38.9MHz
CC
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
73.6
VIF Block
Circuit current
I17
V14H
V14L
Vi
64.0
9
mA
V
Maximum RF AGC voltage
Minimum RF AGC voltage
Input sensitivity
Collector load 30kΩ VC2 = 9 V
8.5
0.3
39
0.7
45
V
33
58
dBµV
dB
dBµV
V
AGC range
GR
Maximum allowable input
No-signal video output voltage
Synchronizing signal tip voltage
Video output level
Vi max
V4
92
97
3.6
1.3
2.0
52
3.3
1.0
1.7
48
3.9
1.6
2.3
V4tip
V
V
Vp-p
dB
dB
%
O
Video signal-to-noise ratio
C-S beating
S/N
IC-S
DG
B/G
P/S = 10dB
Vin = 80dBµ
26
32
38
10
10
Differential gain
3
Differential phase
DP
2
deg
V
Black noise threshold voltage
Black noise clamp voltage
VIF input resistance
V
0.7
1.8
2.5
3
BTH
V
V
BCL
Ri
Ci
3.0
6
kΩ
pF
V
VIF input capacitance
Maximum AFT voltage
Maximum AFT voltage
AFT tolerance 1
V13H
V13L
dfa1
dfa2
dfa3
Sf
4.3
0
4.7
0.2
±35
±35
±35
80
5.0
0.7
±70
±70
±70
V
f = 38.9MHz
f = 38.0MHz
f = 39.5MHz
kHz
kHz
kHz
AFT tolerance 2
AFT tolerance 3
AFT detection sensitivity
AFT dead zone
R
= 100kΩ // 100kΩ
40
120 mV/kHz
L
fda
fpu
fpl
30
60
kHz
MHz
MHz
NHz
MHz
APC pull-in range (U)
APC pull-in range (L)
VCO maximum frequency range (U)
VCO maximum frequency range (L)
VCO control sensitivity
1.5
1.5
1.5
1.5
2.0
2.0
2.0
2.0
2.0
4.0
dfu
dfl
β
8.0 kHz/mV
Continued on next page.
No.6804-2/15
LA75503V
Continued from preceding page.
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
N trap1 (4.75MHz)
NT1
NT2
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
wrt 1MHz
-30
-19
-27
-20
-27
-25
-15
-25
10
-35
dB
dB
dB
dB
dB
dB
dB
dB
ns
ns
ns
ns
ns
ns
ns
ns
N trap2 (5.25MHz)
-24
-32
-25
-32
-30
-20
-30
40
BG trap1 (5.75MHz)
BT1
BG trap2 (6.1MHz)
BT2
BG trap3 (5.85MHz)
BT3
I trap1 (6.25MHz)
IT1
I trap2 (6.8MHz)
IT2
DK trap1 (6.75MHz)
DT1
Group delay 1 NTSC (3.0MHz)
Group delay 1-1 NTSC (3.5MHz)
Group delay 2 BG (4MHz)
Group delay 2-1 BG (4.4MHz)
Group delay 3 I (4MHz)
Group delay 3-1 I (4.4MHz)
Group delay 4 DK (4MHz)
Group delay 4-1 DK (4.4MHz)
1st SIF Block
NGD1
NGD1-1
BGD2
BGD2-1
IGD3
IGD3-1
DGD4
DGD4-1
70
70
120
60
170
90
30
100
0
150
30
200
60
30
0
60
90
15
30
0
30
60
Conversion gain
Vg
So
fp = 5.5MHz, Vi = 500µV
Vi = 10mV
26
32
100
106
5.0
3
38
dB
mVrms
dBµV
kΩ
SIF carrier output level
First SIF maximum input
First SIF input resistance
First SIF input capacitance
SIF Block
Si max
Ris
so ±2dB
6.0
6
Cis
pF
Limiting sensitivity
Vi(lim)
fp = 5.5MHz, ∆F = ±30kHz at 400Hz
46
560
50
52
700
60
58
dBµV
mVrms
dB
FM detector output voltage
AM rejection ratio
V
(FM)
850
O
AMR
THD
AM = 30% at 400Hz
Total harmonic distortion
FM detector output S/N
BPF 3dB bandwidth
fp = 5.5MHz, ∆F = ±30kHz
0.3
60
1.0
%
S/N(FM)
BW
55
dB
±100
-3
kHz
dB
PAL de-emphasis
Pdeem
Ndeem
GD
fm = 3kHz
fm = 2kHz
NTSC de-emphasis
-3
dB
PAL/NT audio voltage gain difference
Others
6
dB
4MHz level (during external input)
SIF system SW threshold voltage
IF system SW threshold resistance
Split/inter SW
X4MIN
V10, V11
V12
Terminated
86
dBµ
V
1.4
0.5
270
kΩ
V
V16
No.6804-3/15
LA75503V
Package Dimensions
unit : mm (typ)
3191B
9.75
30
16
1
15
0.65
0.22
0.15
(0.33)
SANYO : SSOP30(275mil)
Pin Assignment
SIF INPUT
FM FILTER
NC
1
2
3
4
5
6
7
8
9
30 FM DET OUT
29 FM NOISE FILTER
28 RF AGC VR
1st SIF OUT
NC
27 SIF PLL FILTER
26 NC
VIDEO DET OUT
EQ FILTER
SIF AGC FILTER
APC FILTER
25 FILTER CONTROL CAPACITOR
24 VIF INPUT
23 VIF INPUT
22 GND
FLL FILTER 10
VCO COIL 11
21 V
CC
20 1st SIF INPUT
19 NC
VCO COIL 12
SYSTEM SW [A] 13
SYSTEM SW [B] 14
REF OSC 15
18 IF AGC FILTER
17 RF AGC OUT
16 AFT OUT
Top view
No.6804-4/15
LA75503V
Block Diagram and Test Circuit 1
No.6804-5/15
LA75503V
Test circuit 2
Input Impedance Measuring Circuit (VIF, First SIF input impedance)
Impedance analyzer
VIF INPUT
1st SIF INPUT
V
CC
+
100µF
15kΩ
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
LA75503V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Top View
System Switching
• SIF system switch
The SIF system is switched by setting pins A (pin 13) and B (pin 14) to GND or OPEN.
A
B
B/G
I
D/K
M/N
FM DET LEVEL
De-emphasis
75µs
GND
GND
OPEN
OPEN
GND
OPEN
GND
OPEN
{
6dB
0dB
0dB
0dB
{
50µs
{
50µs
{
50µs
Note: "{" indicates that the system is selected.
• IF system switch
38.9MHz is selected as the IF frequency by leaving pin 15 (crystal oscillation) open. 38MHz is selected by adding
220kΩ between pin 15 and GND. This device can also select 39.5MHz operation by adding a 220kΩ resistor between
pin 15 and V
.
CC
• Split/inter carrier switch
Inter carrier is selected by setting the first SIF input (pin 20) to GND.
Sound Trap
The trapping point of the sound trap is set approximately 250kHz above the SIF center frequency of each mode to
improve the video S/N. Therefore, design using split specifications is preferable.
No.6804-6/15
LA75503V
Pin Function
Pin No.
Pin name
Pin function
Equivalent circuit
1
Inputs the SIF signal from the first SIF output.
Set the input level to 90dBµV or lower because of
the dynamic range of the internal filter.
SIF INPUT
2
This is the FM feedback filter pin. It is composed
of a C and R filters.
FM FILTER
1µF is normally used as the capacitance.
If the capacitance is a low value, the audio output
level is small at low frequencies.
Moreover, the audio output level can be made
smaller by increasing the resistance connected in
series.
Use a resistance of 3kΩ or higher.
3
4
NC
Not connected.
This is the first SIF output.
1st SIF OUT
In case of inter carrier, the chroma carrier is bigger
than split carrier applications, so that it is
recommended to connect a filter externally.
Filter example
5
NC
Not connected.
Continued on next page.
No.6804-7/15
LA75503V
Continued from preceding page.
Pin No.
Pin name
VIDEO-OUT
EQ-OUT
Pin function
Equivalent circuit
6
7
Pin 6 is the video output pin.
The EQ amplifier can be thought of as shown
below.
Therefore, the peak gain of the EQ amplifier is
determined by Av = 1 + R/Z.
However, note that the LA75503V being an IC
with V
CC
= 5V, setting too large an amplitude
causes distortion in the VCC side. Use so that the
white level is 4V or less.
8
SIF AGC FILTER
Pin 8 is the SIF AGC filter pin.
Use this pin with a capacitance between 0.01µF
and 0.1µF.
9
APC FILTER
FLL FILTER
Pin 9 is the PLL detector APC filter pin.
Normally the following are used:
10
R = 330Ω
C1 = 0.47µF to 1µF
C2 = 100pF
C1 = 1µF is effective for the over-modulation
characteristics.
When the PLL is locked, the signal passes via the
path marked A in the figure, and when PLL is
unlocked and in weak signal, the signal passes via
the path marked B in the figure. The PLL loop gain
can thus be switched in this manner.
Pin 10 is a VCO automatic control FLL filter pin.
Since it operates always on a small current, using
a larger capacitance results in a slower response.
Normally, a capacitance between 0.47µF and 1
µF is used.
Time
constant switch
Output
Moreover, the control range for this pin is between
about 3V to 4.7V. Since this range is determined
when adjusting the VCO tank circuit, set the
design
Output
center of L and C of VCO so that the voltage of pin
10 is 3.6 V.
Continued on next page.
No.6804-8/15
LA75503V
Continued from preceding page.
Pin No.
11
Pin name
Pin function
Equivalent circuit
VCO COIL
This is the VCO tank circuit for the PLL detector.
Use a tuning capacitance of 24pF.
12
Use L and C specifications that are accurate to
±2%. Also, design the L and C values so that the
voltage of pin 10 is 3.6V when PLL is locked while
using the IF center frequency.
13
14
SYSTEM SW [A]
SYSTEM SW [B]
This is the system switch pin.
The transistor turns ON when the pin voltage from
the circuit becomes approx. 1.4V.
15
REF OSC
This pin can be used both as the crystal resonator
pin and IF switch.
The 38MHz mode is selected by inserting 220kΩ
between pin 15 and GND, the 38.9MHz mode by
leaving the pin open, and the 39.5MHz mode by
inserting 220kΩ between pin 15 and V
.
CC
4MHz input is possible from this pin.
In the case of 4MHz external input, input 86dBµ
Continued on next page.
No.6804-9/15
LA75503V
Continued from preceding page.
Pin No.
16
Pin name
AFT OUT
Pin function
Equivalent circuit
Pin 16 is the AFT output pin.
Use external resistors of 47kΩ and a filter
capacitance 0.1µF.
The AFT circuit generates the AFT voltage by
comparing the signal obtained by dividing the
4MHz reference frequency with the signal
obtained by dividing VCO.
Since it uses a digital phase comparator, a dead
zone exists in the AFT center.
waveform
17
RF AGC OUT
Pin 17 is the RF AGC output.
RF AGC max is determined by R1 and R2.
RF AGC min is determined by R3 and R4.
Capacitor C1 prevents oscillation and capacitor
C2 is the RF AGC filter.
Normally 30kΩ is used for R1, but if the tuner's F/E
transistor is GaAS, the gate's impedance is lower,
so use approx. 10kΩ.
Comparator
18
IF AGC FILTER
Pin 18 is the IF AGC filter pin.
Normally, 0.01µF to 0.02 µF polyester film
capacitor is used.
Determine the impedance based on H-SAG and
AGC speed.
19
NC
Not connected.
Continued on next page.
No.6804-10/15
LA75503V
Continued from preceding page.
Pin No.
20
Pin name
Pin function
Equivalent circuit
1st SIF INPUT
Pin 20 can be used both as the First SIF IN and
inter/split switch pins.
In the case of inter carrier, connect pin 20 to GND.
When a sound saw filter is added, the matching
loss can be decreased by inserting L to neutralize
the IC input capacitance and saw filter output
capacitance.
21
22
V
Connect the decoupling capacitor as close as
possible.
CC
GND
23
24
VIF INPUT
Pins 23 and 24 are VIF input pins.
To reduce the loss of signal through a saw filter,
input resistors are set to 2kΩ.
VIF amplifier has three capacitive coupling
amplifiers, direct connection from a saw filter is
available.
Continued on next page.
No.6804-11/15
LA75503V
Continued from preceding page.
Pin No.
25
Pin name
FILTER CONTROL
CAPACITOR
Pin function
Equivalent circuit
Internal filters (i.e. sound carrier BPF and sound
carrier trap) are tuned using the capacitor
connected to pin 25.
A value between 0.47µF and 1µF is considered
desirable taking video S/N, and AM and PM noise
into consideration.
26
27
NC
Not connected.
SIF PLL FILTER
Pin 27 is the SIF PLL filter pin.
Normally use the following values.
R: 3kΩ
C1: 0.01µF
C2: 1000pF
Small R value
Large R value
A large R value (6kΩ or lower) results in high-pass
FM detection output noise. A smaller R value
results in low-pass noise.
Continued on next page.
No.6804-12/15
LA75503V
Continued from preceding page.
Pin No.
28
Pin name
Pin function
Equivalent circuit
RF AGC VR
Pin 28 is the RF AGC VR pin.
When this pin is connected to GND, no signal is
appeared on pin 6 and pin 30.
output
29
FM FILTER
Pin 29 is the FM filter pin.
Use a capacitance between 0.01µF and 1µF.
30
FM DET OUT
Pin 30 is the FM output pin.
The built-in differential amplifier determines and
switches the de-emphasis resistance value.
PAL: 5kΩ ¯ 0.01µF
NT: 7.5kΩ ¯0.01µF
No.6804-13/15
LA75503V
Application Circuit Example
System Switch
A B
0 0
0 1
1 0
1 1
I
BG
GAIN
6 dB
0 dB
0 dB
0 dB
DK MN
1: OPEN
0: GND
No.6804-14/15
LA75503V
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of November, 2007. Specifications and information herein are subject
to change without notice.
PS No.6804-15/15
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