LB11868V [SANYO]
Monolithic Digital IC For Fan Motor Variable Speed Single-phase Full-wave Pre-driver; 单片数字IC，用于风扇电机变频调速单相全波预驱动器
| 型号： | LB11868V |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | Monolithic Digital IC For Fan Motor Variable Speed Single-phase Full-wave Pre-driver |
| 文件： | 总11页 (文件大小：262K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA1915A
Monolithic Digital IC
For Fan Motor
LB11868V
Variable Speed Single-phase
Full-wave Pre-driver
Overview
LB11868V is a single-phase bipolar driving motor pre-driver with the variable speed function compatible with external
PWM signal. With a few external parts, a highly-efficient and highly-silent variable drive fan motor with low power
consumption can be achieved. This product is best suited for driving of the server requiring large air flow and large current
and the fan motor of consumer appliances.
Features
• Single-phase full-wave driving pre-driver
• Variable speed control possible with external PWM input
• Current limiting circuit incorporated
• Reactive current cut circuit incorporated
• Minimum speed setting pin
• Soft start setting pin
• Start setting pin of on time
• Pch-FET kickback absorption setting pin
• Lock protection and automatic reset circuits incorporated
• FG (rotational speed detection) output, RD (lock detection) output
• Thermal shutdown circuit incorporated
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
's products or
equipment.
51311 SY/11911 SY 20101217-S00010 No.A1915-1/11
LB11868V
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
max
Conditions
Ratings
Unit
V
V
pin maximum supply voltage
V
18
30
18
30
10
CC
CC
N max
OUTN pin maximum current
I
mA
V
OUT
OUTN pin output withstand voltage
OUTP pin maximum Sink current
V
I
N max
OUT
P max
mA
mA
OUT
Maximum inflow current at OUTP
pin OFF
I
P off max
DUTY8% under
OUT
OUTP pin output withstand voltage
V
P max
*1
19
V
V
OUT
VTH/RMI pins withstand voltage
S-S pin withstand voltage
VVTH/VRMI max
7
V
max
max
7
V
S-S
OTS pin withstand voltage
KBSET pin withstand voltage
FG/RD pin withstand voltage
FG/RD pin maximum Sink current
REG pin maximum output current
HB pin maximum output current
Allowable power dissipation
Operating temperature
V
7
V
OTS
V
max
max
max
7
19
V
KBSET
V
V
FG/RD
I
10
mA
mA
mA
mW
°C
°C
FG/RD
I
max
max
10
REG
I
10
HB
Pd max
Topr
with specified substrate *2
*3
800
-30 to 95
-55 to 150
Storage temperature
Tstg
*1 The direct input from the power supply is improper. There must be resistance between OUTP and the power side power supply.
*2 Specified substrate: 114.3mm×76.1mm×1.6mm, glass epoxy board.
*3 Tj max=150°C must not be exceeded.
Recommended Operating Conditions at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
V
Supply voltage
V
CC
CC
4.0 to 16
0 to 4.0
V
VTH/RMI input voltage range
Hall input voltage range
TH/RMI
V
V
ICM
0.2 to 1.8
V
Electrical Characteristics at Ta = 25°C, V
= 12V
CC
Ratings
typ
Parameter
Circuit current
Symbol
Conditions
Unit
min
max
10.5
9.0
I
I
1
2
During drive
During lock protection
7.5
6.0
9.0
mA
mA
V
CC
7.6
3.80
1.24
215
2.50
0.80
24
CC
REG voltage
V
I
I
= 5mA
3.65
1.14
195
2.35
0.65
19
3.95
1.34
235
2.65
0.95
29
REG
REG
= 5mA
HB
HB voltage
V
V
HB
Current limiting voltage
CPWM pin “H” level voltage
CPWM pin “L” level voltage
CPWM pin charge current
CPWM pin discharge current
CPWM Oscillation frequency
CT pin “H” level voltage
CT pin “L” level voltage
CT pin charge current
V
mV
V
LIM
V
H
L
CPWM
V
V
CPWM
I
I
1
2
V
V
= 0.5V
μA
μA
kHz
V
CPWM
CPWM
CPWM
= 2.8V
19.5
24.5
32
29.5
CPWM
FPWM
C = 220PF
V
H
L
2.35
0.65
1.6
2.50
0.80
2.0
2.65
0.95
2.4
CT
V
V
CT
I
1
V
V
I
= 0.5V
= 2.8V
μA
μA
times
μA
μA
μA
V
CT
CT
CT pin discharge current
CT pin charge/discharge ratio
S-S pin discharge current
OTS pin charge current
OTS pin discharge current
OTS pin threshold voltage
OUTN output H-level voltage
I
2
0.16
8
0.20
10
0.24
12
CT
CT
R
1/I
2
CT
CT CT
I
V
V
V
= 1V
0.35
0.65
50
0.45
0.85
58
0.55
1.05
66
S-S
S-S
I
I
1
=0.5V
=0.5V
OTS
OTS
OTS
OTS
2
V
1.2
1.3
1.4
OTS
V
NH
I
= 1mA
V
V
-0.9
V
V
-1.0
V
O
O
CC
CC
I
= 10mA
-1.9
CC
-2.1
V
O
CC
Continued on next page.
No.A1915-2/11
LB11868V
Continued from preceding page.
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
1.05
OUTN output L-level voltage
OUTP output L-level voltage
Hall input sensitivity
V
NL
PL
IO = 10mA
IO = 10mA
0.9
V
V
O
V
0.4
0.55
O
V
IN+, IN- differential voltage
(including offset and hysteresis)
±10
±20
mV
HN
L/
FG/RD output L-level voltage
FG/RD pin leakage current
VTH/RMI pin bias current
V
L
I
= 5mA
= 19V
0.2
0.3
10
V
FG RD
FG/RD
I
L/
L
V
μA
μA
FG RD
FG/RD
I
/I
CPWM = 2V, V
= 1V
0.3
VTH RMI
TH/RMI
Truth table
(1) Drive lock CPWM=H VTH, RMI, S-S=L
-
+
FG
L
IN
IN
CT
OUT1P
L
OUT1N
OUT2P
OFF
L
OUT2N
RD
L
Mode
H
L
L
H
L
L
H
L
H
L
OUT1 → 2 drive
OUT2 → 1 drive
L
OFF
L
OFF
OFF
OFF
L
H
L
OFF
OFF
H
L
OFF
OFF
H
Lock protection
OFF
H
H
(2) Speed control CT, S-S=L
-
+
OTS
VTH, RMI
CPWM
IN
IN
OUT1P
L
OUT1N
OUT2P
OFF
L
OUT2N
Mode
H
L
L
H
L
L
H
L
H
L
H
L
L
L
OUT1 → 2 drive
OUT2 → 1 drive
L
H
OFF
OFF
OFF
OFF
OFF
L
H
L
OFF
OFF
OFF
OFF
H
H
L
L
Regeneration mode
Standby mode
H
L
H
L
H
L
H
H
L
For VTH, RMI, and S-S pins, refer to the timing chart.
Pin Assignment
OUT2P
OUT2N
1
2
3
4
5
6
7
8
9
20 OUT1P
19 OUT1N
18 SGND
17 REG
16 S-S
V
CC
SENSE
RMI
VTH
15 KBSET
14 CT
CPWM
OTS
+
13 IN
12 HB
FG
-
11 IN
RD 10
Top View
No.A1915-3/11
LB11868V
Package Dimensions
unit : mm (typ)
3360
Pd max -- Ta
1
0.8
0.6
0.4
0.2
5.2
Mounted on a specified board:
114.3 76.1 1.6mm3, glass epoxy
×
×
20
1 2
0.5
0.22
0.15
0.35
(0.35)
0
-30
0
30
60
9095
120
Ambient temperature, Ta -- C
SANYO : SSOP20J(225mil)
Block Diagram
No.A1915-4/11
LB11868V
Application Circuit Example
*2
*16
*17
1
2
3
4
*1
V
CC
*3
*10
*11
REG
FG
RD
*13
*8
S-S
RMI
OUT1P
OUT1N
SENSE
1
2
*15
*7
*9
KBSET
3
4
OUT2N
OUT2P
VTH
HB
*4
*5
+
-
H
IN
IN
SGND
PWM-IN
CPWM CT
OTS
*14
*6
*12
220pF
*1. Power stabilization capacitor
For the power stabilization capacitor on the signal side, use the capacitance of 1μF or more.
Connect V and SGND with a thick and shortest pattern.
CC
*2. Power stabilization capacitor on the power side
For the power stabilization capacitor on the power side, use the capacitance of 1μF or more.
Connect the power supply on the power side and GND with a thick and shortest pattern.
When the IC is used for a fan with a high current level, insert a zener diode between the power supply on the power
side and GND.
*3. REG pin
3.8V constant-voltage output pin. For the REG oscillation prevention and stabilization, use a capacitor with
capacitance of 1µF or more. Connect the REG pin and SGND with a thick and shortest pattern.
*4. HB pin
Used for Hall device bias purposes.
+
-
*5. IN , IN pins
Hall signal input pin.
Wiring should be short to prevent carrying of noise.
If noise is carried, insert the capacitor between IN and IN pins.
+
-
The Hall input circuit functions as a comparator with hysteresis (15mV).
This also has a soft switch section with ±30mV (input signal differential voltage).
It is also recommended that the Hall input level is minimum 100mV (p-p).
No.A1915-5/11
LB11868V
*6. CPWM pin
Pin to connect the capacitor for generation of the PWM basic frequency
The use of CP = 220pF causes oscillation at f = 30kHz (typical), which is the basic frequency of PWM.
As this is used also for the current limiting canceling signal, ON-time start function and Soft start function, be sure to
connect the capacitor even when the speed control is not made.
*7. RMI pin
Minimum speed setting pin.
Perform pull-up with REG when this pin is not to be used.
If the IC power supply is likely to be turned OFF first when the pin is used with external power supply, be sure to
insert the current limiting resistor to prevent inflow of large current. (The same applies to the VTH pin.)
*8. VTH pin
Speed control pin.
Connect this pin to GND when it is not used (at full speed).
For the control method, refer to the timing chart.
For control with pulse input, insert the current limiting resistor and use the pin with the frequency of 20kHz to 100kHz
(20kHz to 50kHz recommended).
*9. SENSE pin
Current limiting detection pin.
When the pin voltage exceeds VLIM, the current is limited and the operation enters the lower regeneration mode.
Connect this pin to GND when it is not to be used.
*10. FG pin
Rotational speed detection pin.
Open collector output that can detect rotational speeds by the FG output in response to the phase switching signal.
Keep this pin open when it is not to be used.
It is recommended that a current-limiting resistor with a resistance of 1kΩ or more be inserted in order to protect the
pin during unplugging and plugging the connector or when mistakes are made in connection.
*11. RD pin
Lock detection pin
In open collector output, L upon rotation and H when locked (using pull-up resistance).
Keep this pin open when it is not to be used.
*12. CT pin
Pin to connect the lock detection capacitor.
The constant-current charge and discharge circuits incorporated cause locking when the pin voltage becomes VCTH
and unlocking when it is VCTL.
Connect the pin to GND when it is not to be used (locking not necessary).
*13. S-S pin
Pin to connect the soft-start setting capacitor.
Connect the capacitor between REG and S-S pin.
This pin enables setting of the soft start time according to the capacity of the capacitor.
See the timing char.
Connect the pin to GND when it is not to be used.
*14. OTS pin
Pin to connect the ON-time start setting capacitor.
A constant-current charging circuit and a discharging circuit based on the control duty ratio are incorporated, and
when the pin voltage exceeds VOTS, the CT pin is discharged and the S-S pin is charged.
Connect the pin to GND when it is not to be used (when the lowest speed setting is used).
No.A1915-6/11
LB11868V
*15. KBSET pin
Pch kickback absorption circuit setting pin.
Open: The kickback absorption circuit is activated at a VCC voltage of 7.4V (typ) or above.
Pull-down to GND: Always OFF
Pull-up to REG: Always ON (but when the IC power is OFF, the kickback absorption circuit is OFF)
If the Pch load is to be reduced due to the large fan current, short the KBSET pin to GND, and use a zener diode
between the power supply on the power side and GND.
Kickback absorption circuit ON: At OUTPOFF, the OUTP voltage is clamped at VCC + 0.85V (at room temperature
and inflow current 5mA (typ)).
Kickback absorption circuit OFF: At OUTPOFF, the OUTP voltage is clamped at 18V or so (at room temperature and
inflow current 5mA (typ)) in order to protect the pin.
At OUTPOFF, the maximum inflow current must not be exceeded.
*16. Pch FET
If the Pch kickback absorption circuit is activated and a zener diode between the power supply and GND is not used,
the kickback during phase switching is absorbed by Pch.
Since the circuit is activated with a high voltage difference between the drain and source, select a FET with
sufficiently high capability.
*17. Nch FET
If the Nch gate voltage fluctuates significantly due to the effects of switching, insert a capacitor between the gate and
GND.
Since an Nch diode is used during coil current regeneration, select a FET with sufficiently high capability.
No.A1915-7/11
LB11868V
Control timing chart (Speed control)
VTH voltage
VCPWMH
RMI voltage
CPWM
VCPWML
Standby mode
GND
Minimum speed
setting rotation
Low speed
PWM control speed variable
High speed
Full speed
FG
100%
ONDUTY
0%
(1) Minimum speed setting (standby) mode
The low-speed fan rotation occurs at the minimum speed set with the RMI pin.
When the minimum speed is not set (RMI pin pulled up to REG), the motor stops.
If the VHT voltage rises when the lowest speed is not set (RMI pin is pulled up to REG), the fan stops running, and if
the OTS pin capacitor is used, the standby mode is established.
Details of the standby mode are given in the section “Control timing chart (ON-time start, Lock protection).
(2) Low speed⇔high speed
PMW control is made by comparing the CPWM oscillation voltage (VCPWML⇔VCPEMH) and VTH voltage.
The drive mode is established when the VTH voltage is low.
Both upper and lower output FET are turned ON when the VTH voltage is low.
When the VTH voltage is high, Pch is turned off, and the coil current is regenerated inside the lower FET. Therefore,
as the VTH voltage decreases, the output ON-DUTY increases, causing an increase in the coil current and raising the
motor rotation speed.
The upper output Pch is turned OFF when the VTH voltage is high, regenerating the coil current in the lower TR.
Therefore, as the VTH voltage decreases, the output ON-DUTY increases, causing increase in the coil current, raising
the motor rotation speed.
The rotational speed can be monitored using the FG output.
(3) Full speed mode
The full speed mode becomes effective when the VTH voltage is VCPWML or less. (Set VTH = GND when the
speed control is not to be made.)
No.A1915-8/11
LB11868V
Control timing chart (Soft start)
(1)At VTH < RMI voltage
S-S voltage
VCPWMH
RMI voltage
VTH voltage
CPWM
VCPWML
GND
Lock protection
Soft start section
VTH set speed
100%
ONDUTY
0%
T
(2) At VTH > RMI voltage
S-S voltage
VTH voltage
RMI voltage
VCPWMH
CPWM
VCPWML
GND
Lock protection
Soft
RMI set speed
start
section
100%
ONDUTY
0%
T
Adjust the S-S pin voltage gradient by means of the capacitance of the capacitor between the S-S pin and REG..
Recommended capacitor: 0.1μ to 1μF
No.A1915-9/11
LB11868V
Control timing chart (ON-time start, Lock protection)
(1) When a stop signal based on the VTH voltage has been input during normal rotation
RMI voltage
VCPWMH
CPWM
VTH voltage
VCPWML
S-S voltage
GND
OTS
VOTS
VCTH
GND
CT
GND
FG
RD
When the output duty ratio based on the VTH/RMI input drops to below 1% or so, the OTS voltage rises, and when it
reaches VOTS, the standby mode is established, the CT pin discharges, and the S-S pin is charged. In the standby mode,
if the drive mode has been established again by the VTH/RMI input, the rotation is started immediately with soft start.
The CT pin discharges at the same time as the switching of FG. For details on lock protection, refer to (2).
(2) When a stop signal based on the VTH voltage has been input while the fan is constrained
RMI voltage
S-S voltage
VCPWMH
CPWM
VCPWML
VTH voltage
GND
Fan restraint
OTS
VOTS
GND
VCTH
CT
VCTL
GND
FG
RD
When the fan is constrained, the CT pin voltage rises, and when it reaches VCTH, the lock protection mode is
established, and OUTP is set to OFF and RD is set to OFF.
When the lock protection mode is established, the CT pin discharges, and when VCTL is reached, restart (soft start) is
initiated. When rotation is started and the FG signal is switched, RD is set to low.
Note: RD is also set to low when the standby mode is established when locked.
PS No.A1915-10/11
LB11868V
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of May, 2011 Specifications and information herein are subject
to change without notice.
PS No.A1915-11/11
相关型号：
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