LC863356C_技术文档

Ordering number : ENA0116A

LC863364C,LC863356C

LC863348C,LC863340C

LC863332C,LC863328C

LC863324C,LC863320C

LC863316C

CMOS IC

64K/56K/48K/40K/32K/28K/24K/20K/16K-byte ROM,

CGROM16K-byte

on-chip 640/512-byte RAM and 352×9-bit OSD RAM

8-bit 1-chip Microcontroller

Overview

The LC863364C/56C/48C/40C/32C/28C/24C/20C/16C are 8-bit single chip microcontrollers with the following on-chip

functional blocks:

• CPU : Operable at a minimum bus cycle time of 0.424µs

• On-chip ROM capacity

Program ROM : 64K/56K/48K/40K/32K/28K/24K/20K/16K bytes

CGROM : 16K bytes

• On-chip RAM capacity : 640/512 bytes

• OSD RAM : 352×9 bits

• Five channels×8-bit AD Converter

• Three channels×7-bit PWM

• Two 16-bit timer/counters, 14-bit base timer

• 8-bit synchronous serial interface circuit

• IIC-bus compliant serial interface circuit (Multi-master type)

• ROM correction function

• 15-source 9-vectored interrupt system

• Integrated system clock generator and display clock generator

X’tal oscillator (32.768kHz) for PLL reference is used for TV control

All of the above functions are fabricated on a single chip.

Note : This product includes the IIC bus interface circuit. If you intend to use the IIC bus interface, please notify us of this in

advance of our receiving your program ROM code order.

Purchase of SANYO IIC components conveys a license under the Philips IIC Patents Rights to use these components in

an IIC system, provided that the system conforms to the IIC Standard Specification as defined by Philips.

Trademarks

IIC is a trademark of Philips Corporation.

Any and all SANYO Semiconductor products described or contained herein do not have specifications

that can handle applications that require extremely high levels of reliability, such as life-support systems,

aircraft's control systems, or other applications whose failure can be reasonably expected to result in

serious physical and/or material damage. Consult with your SANYO Semiconductor representative

nearest you before usingany SANYO Semiconductor products described or contained herein in such

applications.

SANYO Semiconductor assumes no responsibility for equipment failures that result from using products

at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition

ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor

products described or contained herein.

Ver.1.00

83006 / 52506HKIM No.A0116-1/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Features

Read-Only Memory (ROM) :

65536×8 bits / 57344×8 bits / 49152×8 bits /

40960×8 bits / 32768×8 bits / 28672×8 bits /

24576×8 bits / 20480×8 bits / 16384×8 bits for program

16128×8 bits for CGROM

Random Access Memory (RAM) : 512×8 bits (working area) : LC863364C/56C/48C/40C

384×8 bits (working area) : LC863332C/28C/24C/20C/16C

128×8 bits (working or ROM correction function)

352×9 bits (for CRT display)

OSD Functions

• Screen display : 36 characters×16 lines (by software)

• RAM

Display area : 36 words×8 lines

Control area : 8 words×8 lines

• Characters

: 352 words (9 bits per word)

Up to 252 kinds of 16×32 dot character fonts (4 characters including 1 test character are not programmable)

Each font can be divided into two parts and used as two fonts: a 16×17 dot and 8×9 dot character font

• Various character attributes

Character colors

: 16colors

Character background colors : 16colors

Fringe / shadow colors

Full screen colors

Rounding

: 16colors

Underline

Italic character (slanting)

• Attribute can be changed without spacing

• Vertical display start line number can be set for each row independently (Rows can be overlapped)

• Horizontal display start position can be set for each row independently

• Horizontal pitch (9 to 16 dots)*1 and vertical pitch (1 to 32 dots) can be set for each row independently

• Different display modes can be set for each row independently

Caption • Text mode / OSD mode 1 / OSD mode 2 (Quarter size) / Simplified graphic mode

• Ten character sizes *1

Horez. × Vert. = (1×1), (1×2), (2×2), (2×4), (0.5×0.5)

(1.5×1), (1.5×2), (3×2), (3×4), (0.75×0.5)

• Shuttering and scrolling on each row

• Simplified Graphic Display

Note *1: range depends on display mode : refer to the manual for details.

Bus Cycle Time / Instruction-Cycle Time

Bus Cycle Time

Instruction Cycle Time

System Clock Oscillation

Oscillation Frequency

14.156MHz

Voltage

0.424µs

0.848µs

Internal VCO

(Ref : X’tal 32.768kHz)

Internal RC

4.5V to 5.5V

7.5µs

15.0µs

800kHz

4.5V to 5.5V

183.1µs

366.2µs

Crystal

32.768kHz

No.A0116-2/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Ports

• Input / Output Ports

Data direction programmable in nibble units

: 5 ports (28 terminals)

: 1 port (8 terminals)

(If the N-ch open drain output is selected by option, the corresponding port data can be read in output mode.)

Data direction programmable for each bit individually : 4 ports (20 terminals)

• Input port

: 1 port (1 terminal)

AD Converter

• 5 channels×8-bit AD converters

Serial Interfaces

• IIC-bus compliant serial interface (Multi-master type)

Consists of a single built-in circuit with two I/O channels. The two data lines and two clock lines can be connected

internally.

• Synchronous 8-bit serial interface

PWM Output

• 3 channels×7-bit PWM

Timer

• Timer 0 : 16-bit timer/counter

With 2-bit prescaler + 8-bit programmable prescaler

Mode 0 : Two 8-bit timers with a programmable prescaler

Mode 1 : 8-bit timer with a programmable prescaler + 8-bit counter

Mode 2 : 16-bit timer with a programmable prescaler

Mode 3 : 16-bit counter

The resolution of timer is 1 tCYC.

• Timer 1 : 16-bit timer/PWM

Mode 0 : Two 8-bit timers

Mode 1 : 8-bit timer + 8-bit PWM

Mode 2 : 16-bit timer

Mode 3 : Variable bit PWM (9 to 16 bits)

In mode0/1, the resolution of Timer1/PWM is 1 tCYC

In mode2/3, the resolution is selectable by program; tCYC or 1/2 tCYC

• Base timer

Generate every 500ms overflow for a clock application

(using 32.768kHz crystal oscillation for the base timer clock)

Generate every 976µs, 3.9ms, 15.6ms, 62.5ms overflow

(using 32.768kHz crystal oscillation for the base timer clock)

Clock for the base timer is selectable from 32.768kHz crystal oscillation, system clock or programmable prescaler

output of Timer 0

Remote Control Receiver Circuit (connected to the P73/INT3/T0IN terminal)

• Noise rejection function

• Polarity switching

Watchdog Timer

External RC circuit is required

Interrupt or system reset is activated when the timer overflows

ROM Correction Function

Max 128 bytes / 2 addresses

No.A0116-3/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Interrupts

• 15 sources 9 vectored interrupts

1. External Interrupt INT0

2. External Interrupt INT1

3. External Interrupt INT2, Timer/counter T0L (Lower 8 bits)

4. External Interrupt INT3, base timer

5. Timer/counter T0H (Upper 8 bits)

6. Timer T1H,T1L

7. SIO0

8. Vertical synchronous signal interrupt ( ), horizontal line ( ), AD

VS HS

9. IIC, Port 0

• Interrupt priority control

Three interrupt priorities are supported (low, high and highest) and multi-level nesting is possible. Low or high

priority can be assigned to the interrupts from 3 to 9 listed above. For the external interrupt INT0 and INT1, low or

highest priority can be set.

Sub-routine Stack Level

• A maximum of 128 levels (stack is built in the internal RAM)

Multiplication/division Instruction

• 16 bits×8 bits (7 instruction cycle times)

• 16 bits÷8 bits (7 instruction cycle times)

3 Oscillation Circuits

• Built-in RC oscillation circuit used for the system clock

• Built-in VCO circuit used for the system clock and OSD

• X’tal oscillation circuit used for base timer, system clock and PLL reference

Standby Function

• HALT mode

The HALT mode is used to reduce the power dissipation. In this operation mode, the program execution is stopped.

This mode can be released by the interrupt request or the system reset.

• HOLD mode

The HOLD mode is used to stop the oscillations; RC (internal), VCO, and X’tal oscillations. This mode can be

released by the following conditions.

- Pull the reset terminal (RES) to low level.

- Feed the selected level to either P70/INT0 or P71/INT1.

- Input the interrupt condition to Port 0.

Package

• DIP42S (Lead-free type)

• QIP48E (Lead-free type)

Development Tools

• Flash EEPROM: LC86F3364A

• Evaluation chip: LC863096

• Emulator:

EVA86000 (main) + ECB863200* or ECB863200A (evaluation chip board)

+ POD863300 (pod: DIP42S) or POD863301 (pod: QIP48E)

* This product is no longer available

No.A0116-4/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Package Dimensions

unit : mm

3025C

37.7

42

22

1

21

0.95

0.48

1.78

SANYO : DIP42S(600mil)

(1.05)

Package Dimensions

unit : mm

3156A

17.2

14.0

25

36

24

37

48

13

1

12

0.35

0.15

1.0

(1.5)

SANYO : QIP48E(14X14)

No.A0116-5/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Pin Assignments

P10/SO0

P11/SI0

1

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

P07

2

P06

P12/SCK0

P13/PWM1

P14/PWM2

P15/PWM3

P16

3

P05

4

P04

5

P03

6

P02

LC863364C/

LC863356C/

LC863348C/

LC863340C/

LC863332C/

LC863328C/

LC863324C/

LC863320C/

LC863316C

7

P01

P17/PWM

8

P00

V

9

P73/INT3/T0IN

SS

XT1

XT2

10

11

12

13

14

15

16

17

18

19

20

21

P72/INT2/T0IN

P71/INT1

V

P70/INT0

DD

P84/AN4

P63/SCLK1

P85/AN5

P86/AN6

P87/AN7

P62/SDA1

P61/SCLK0

DIP42S

P60/SDA0

I

RES

FILT

BL

B

P83/AN3

G

R

VS

HS

Top view

P15/PWM3

1

36

35

34

33

32

31

30

29

28

27

26

25

P02

P16

2

P01

P00

NC

LC863364C/

LC863356C/

LC863348C/

LC863340C/

LC863332C/

LC863328C/

LC863324C/

LC863320C/

LC863316C

P17/PWM

3

V

4

SS

XT1

XT2

5

P73/INT3/T0IN

P72/INT2/T0IN

P71/INT1

6

V

7

DD

NC

P84/AN4

P85/AN5

P86/AN6

P87/AN7

8

P70/INT0

9

P63/SCLK1

P62/SDA1

10

11

12

P61/SCLK0

P60/SDA0

QIP48E

Top view

No.A0116-6/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

System Block Diagram

Interrupt Control

Standby Control

IR

PLA

ROM

X’tal

RC

VCO

PC

PLL

IIC

ROM Correct Control

ACC

B Register

C Register

SIO0

XRAM

Timer 0

Bus Interface

Timer 1

Port 1

Port 6

ALU

Base Timer

ADC

Port 7

Port 8

PSW

RAR

RAM

INT0-3

Noise Rejection Filter

PWM

CGROM

OSD

Control

Circuit

Stack Pointer

Port 0

VRAM

Watch Dog Timer

No.A0116-7/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Pin Description

Pin Description Table

Terminal

Function Description

Negative power supply

Option

I/O

V

-

SS

XT1

XT2

Input terminal for crystal oscillator

Output terminal for crystal oscillator

Positive power supply

I

O

-

V

DD

RES

FILT

VS

HS

R

Reset terminal

I

Filter terminal for PLL

O

I

Vertical synchronization signal input terminal

Horizontal synchronization signal input terminal

Red (R) output terminal of RGB image output

Green (G) output terminal of RGB image output

Blue (B) output terminal of RGB image output

Intensity ( I ) output terminal of RGB image output

I

O

G

B

I

BL

Fast blanking control signal

O

Switch TV image signal and OSD image signal

Port 0

I/O

•8-bit input/output port,

Input/output can be specified in nibble unit

•Other functions

Pull-up resistor

provided/not provided

Output Format

P00 to P07

HOLD release input

CMOS/Nch-OD

Interrupt input

Port 1

I/O

•8-bit input/output port

Output Format

CMOS/Nch-OD

Input/output can be specified in a bit

•Other functions

P10 to P17

P10

P11

P12

P13

P14

P15

P17

SIO0 data output

SIO0 data input/bus input/output

SIO0 clock input/output

PWM1 output

PWM2 output

PWM3 output

Timer1 (PWM) output

Port 6

I/O

•4-bit input/output port

Input/output can be specified for each bit

•Other functions

P60 to P63

P60

P61

P62

P63

IIC0 data I/O

IIC0 clock output

IIC1 data I/O

IIC1 clock output

Continued on next page.

No.A0116-8/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Continued from preceding page.

Terminal

Port 7

I/O

Function Description

Option

•4-bit input/output port

Input or output can be specified for each bit

•Other functions

P70

P71 to P73

P70

INT0 input/HOLD release input/

Nch-Tr. output for watchdog timer

INT1 input/HOLD release input

INT2 input/Timer 0 event input

INT3 input (noise rejection filter connected)/

Timer 0 event input

P71

P72

P73

Interrupt receiver format, vector addresses

Rising/

Rising

Falling

H level

L level

Vector

Falling

disable

enable

INT0

INT1

INT2

INT3

enable

disable

enable

disable

03H

0BH

13H

1BH

Port 8

I

•1-bit input port

4-bit input/output port

P83

Input or output can be specified for each bit

•Other function

P84 to P87

I/O

AD converter input port (5 lines)

Unused terminal

NC

-

Leave open

• Output form and existence of pull-up resistor for all ports can be specified for each bit.

• Programmable pull-up resistor is always connected regardless of port option, CMOS or N-ch open drain output in

port 1.

Port status in reset

Terminal

I/O

Pull-up resistor status at selecting pull-up option

Pull-up resistor OFF, ON after reset release

Programmable pull-up resistor OFF

Port 0

Port 1

I

No.A0116-9/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Absolute Maximum Ratings at Ta = 25°C, V = 0V

SS

Ratings

typ

Parameter

Symbol

Pins

Conditions

unit

V

[V]

DD

min

-0.3

max

+6.5

Maximum supply

voltage

V

max

V

DD

Input voltage

V (1)

RES , HS , VS , P83

R, G, B, I, BL, FILT

-0.3

V

+0.3

I

DD

V

Output voltage

V

(1)

O

DD

Input/output voltage

Ports 0, 1, 6, 7,

84 to 87

IO

-0.3

-4

V

+0.3

DD

High

Peak

IOPH(1)

IOPH(2)

Ports 0, 1, 7, 84 to 87

•CMOS output

•For each pin.

•CMOS output

•For each pin.

Total of all pins.

level

output

current

output

current

R, G, B, I, BL

-5

Total

ΣIOAH(1)

ΣIOAH(2)

ΣIOAH(3)

Ports 0, 1

-20

-10

-15

output

current

Ports 7, 84 to 87

R, G, B, I, BL

Ports 0, 1, 6, 84 to 87

Port 7

Total of all pins.

For each pin.

mA

Low

Peak

IOPL(1)

IOPL(2)

IOPL(3)

20

15

level

output

current

For each pin.

output

current

R, G, B, I, BL

Ports 0, 1

For each pin.

5

Total

ΣIOAL(1)

ΣIOAL(2)

ΣIOAL(3)

Total of all pins.

Ta=-10 to +70ºC

40

output

current

Ports 6, 7, 84 to 87

R, G, B, I, BL

DIP42S

40

15

Maximum power

dissipation

Pd max

715

385

mW

ºC

QIP48E

Operating

temperature

range

Topr

-10

-55

+70

Storage

Tstg

temperature

range

+125

No.A0116-10/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Recommended Operating Range at Ta = -10°C to +70°C, V = 0V

SS

Ratings

typ

Parameter

Symbol

Pins

Conditions

unit

V

[V]

DD

min

4.5

max

Operating

V

(1)

(2)

V

0.844

µ

s ≤ tCYC ≤ 0.852µs

5.5

DD

supply voltage

range

V

4µs ≤ tCYC ≤ 400µs

DD

4.5

Hold voltage

VHD

RAMs and the registers

data are kept in HOLD

mode.

2.0

DD

5.5

DD

High level input

voltage

V

(1)

Port 0 (Schumitt)

Output disable

4.5 to 5.5

0.6V

V

IH

(2)

•Ports 1,6 (Schumitt)

•Port 7 (Schumitt)

port input/interrupt

• HS , VS , RES (Schumitt)

Port 70

Output disable

IH

0.75V

DD

V

(3)

(4)

Output disable

IH

4.5 to 5.5

V

-0.5

V

DD

Watchdog timer input

•Port 8

IH

4.5 to 5.5

0.7V

DD

V

DD

port input

Low level input

voltage

V

(1)

(2)

Port 0 (Schumitt)

Output disable

V

0.2V

IL

SS

•Ports 1,6 (Schumitt)

•Port 7 (Schumitt)

port input/interrupt

• HS , VS , RES (Schumitt)

Port 70

4.5 to 5.5

V

0.25V

SS

DD

V

(3)

(4)

Output disable

IL

4.5 to 5.5

V

0.6V

0.3V

SS

DD

Watchdog timer input

Port 8

SS

port input

Operation

cycle time

tCYC(1)

tCYC(2)

•All functions

0.844

0.848

0.852

30

operating

•AD converter

operating

µs

4.5 to 5.5

•OSD is not

operating

tCYC(3)

FmRC

•OSD and AD converter

are not operating

Internal RC oscillation

4.5 to 5.5

0.844

0.4

400

3.0

Oscillation

frequency

range

0.8

MHz

No.A0116-11/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Electrical Characteristics at Ta = -10°C to +70°C, V = 0V

SS

Ratings

typ

Parameter

Symbol

Pins

Conditions

unit

V

[V]

DD

min

max

High level input

current

I

(1)

Ports 0, 1, 6, 7, 8

•Output disable

IH

•Pull-up MOS Tr. OFF

•V =V

4.5 to 5.5

1

IN DD

(including the off-leak

current of the output Tr.)

I

(2)

IH

• RES

•V =V

IN DD

1

• HS , VS

µA

Low level input

current

(1)

Ports 0, 1, 6, 7, 8

•Output disable

IL

•Pull-up MOS Tr. OFF

•V =V

IN SS

-1

(including the off-leak

current of the output Tr.)

I

(2)

• RES

V

=V

IN SS

IL

4.5 to 5.5

-1

• HS , VS

High level

V

(1)

•CMOS output of

ports 0, 1, 71 to 73,

84 to 87

I

=-1.0mA

OH

output voltage

V

DD

V

(2)

R, G, B, I, BL

I

=-0.1mA

OH

4.5 to 5.5

V

-0.5

OH

DD

Low level output

voltage

(1)

(2)

(3)

Ports 0, 1, 71 to 73,

84 to 87

=10mA

=1.6mA

=3.0mA

OL

1.5

0.4

V

Ports 0, 1, 71 to 73,

84 to 87

I

4.5 to 5.5

•R, G, B, I, BL

•Port 6

V

(4)

(5)

Port 6

I

=6.0mA

=1mA

4.5 to 5.5

0.6

0.4

OL

Port 70

Pull-up MOS

Tr. resistance

Bus terminal

short circuit

resistance

Rpu

Ports 0, 1, 7, 84 to 87

V

=0.9V

OH

DD

4.5 to 5.5

13

38

80

k

Ω

RBS

•P60 to P62

•P61 to P63

4.5 to 5.5

130

300

Ω

(SCL0 to SCL1,

SDA0 to SDA1)

Hysteresis

VHYS

CP

•Ports 0, 1, 6, 7

• RES

Output disable

voltage

4.5 to 5.5

0.1V

V

DD

10

• HS , VS

All pins

Pin capacitance

•f=1MHz

•Every other terminals are

pF

connected to V

•Ta=25ºC

.

SS

No.A0116-12/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Serial Input/Output Characteristics at Ta = -10°C to +70°C, V = 0V

SS

Ratings

Parameter

Symbol

Pins

Conditions

unit

V

[V]

DD

min

typ

max

Cycle

tCKCY(1)

•SCK0

Refer to figure 4.

2

1

2

•SCLK0

Low Level

pulse width

High Level

pulse width

Cycle

tCKL(1)

tCKH(1)

tCKCY(2)

tCKL(2)

tCKH(2)

tICK

4.5 to 5.5

tCYC

•SCK0

•Use pull-up

•SCLK0

resistor (1kΩ)

when Nch open-

drain output.

Low Level

pulse width

1/2tCKCY

•Refer to figure 4.

High Level

pulse width

Data set up time

SI0

•Data set-up to

SCK0.

0.1

•Data hold from

SCK0.

Data hold time

tCKI

•Refer to figure 4.

µs

Output delay time

tCKO(1)

SO0

•Data hold from

SCK0.

(Using external clock)

4.5 to 5.5

7/12tCYC +0.2

1/3tCYC +0.2

•Use pull-up

resistor (1kΩ)

Output delay time

tCKO(2)

when Nch open-

drain output.

(Using internal clock)

•Refer to figure 4.

IIC Input/Output Conditions at Ta = -10°C to +70°C, V = 0V

SS

Standard

High speed

min

Parameter

Symbol

unit

kHz

min

max

100

max

400

SCL Frequency

fSCL

tBUF

0

4.7

4.0

4.7

4.0

4.7

0

1.3

0.6

1.3

0.6

0

BUS free time between stop - start

HOLD time of start, restart condition

L time of SCL

-

µs

tHD;STA

tLOW

-

H time of SCL

tHIGH

tSU;STA

tHD;DAT

tSU;DAT

tR

-

Set-up time of restart condition

HOLD time of SDA

0.9

-

Set-up time of SDA

250

-

100

ns

Rising time of SDA, SCL

Falling time of SDA, SCL

Set-up time of stop condition

1000

300

-

20+0.1Cb

0.6

300

-

tF

-

tSU;STO

4.0

µs

Refer to figure 9

Note 1: Cb: Total capacitance of all BUS (unit : pF)

No.A0116-13/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Pulse Input Conditions at Ta = -10°C to +70°C, V = 0V

SS

Ratings

typ

Parameter

Symbol

Pins

Conditions

unit

V

[V]

DD

min

max

High/low level

pulse width

tPIH(1)

tPIL(1)

tPIH(2)

tPIL(2)

•INT0, INT1

•INT2/T0IN

INT3/T0IN

•Interrupt acceptable

•Timer0-countable

•Interrupt acceptable

•Timer0-countable

4.5 to 5.5

1

(1tCYC is selected for noise

rejection clock.)

4.5 to 5.5

2

tCYC

tPIH(3)

tPIL(3)

INT3/T0IN

•Interrupt acceptable

•Timer0-countable

(16tCYC is selected for

noise rejection clock.)

INT3/T0IN

4.5 to 5.5

32

tPIH(4)

tPIL(4)

•Interrupt acceptable

•Timer0-countable

(64tCYC is selected for

noise rejection clock.)

RES

4.5 to 5.5

128

200

tPIL(5)

Reset acceptable

tPIH(6)

tPIL(6)

HS , VS

•Display position controllable

•The active edge of

HS and VS must be apart

at least 1tCYC.

µ

s

4.5 to 5.5

8

•Refer to figure 6.

Rising/falling

time

tTHL

tTLH

HS

Refer to figure 6.

500

ns

AD Converter Characteristics at Ta = -10°C to +70°C, V = 0V

SS

Ratings

typ

Parameter

Symbol

Pins

Conditions

unit

V

[V]

DD

min

max

±1.5

Resolution

N

8

bit

Absolute

ET

(Note 3)

LSB

precision

Conversion time

tCAD

ADCR2=0 (Note 4)

ADCR2=1 (Note 4)

16

32

tCYC

V

4.5 to 5.5

Analog input

voltage range

Analog port

input current

VAIN

AN3 to AN7

V

SS

-1

DD

IAINH

IAINL

VAIN=V

DD

1

µA

VAIN=V

SS

Note 3: Absolute precision does not include quantizing error (1/2LSB).

Note 4: Conversion time is the time till the complete digital conversion value for analog input value is set to a register

after the instruction to start conversion is sent.

No.A0116-14/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Sample Current Dissipation Characteristics at Ta = -10°C to +70°C, V = 0V

SS

The sample current dissipation characteristics is the measurement result of Sanyo provided evaluation board when the

recommended circuit parameters shown in the sample oscillation circuit characteristics are used externally.

The currents through the output transistors and the pull-up MOS transistors are ignored.

Ratings

Parameter

Symbol

Pins

Conditions

unit

V

[V]

DD

min

typ

max

Current dissipation

during basic

operation

IDDOP(1)

V

•FmX’tal=32.768kHz

X’tal oscillation

DD

•System clock : VCO

•VCO for OSD operating

•Internal RC oscillation stops

•HALT mode

4.5 to 5.5

8

3

21

mA

(Note 5)

Current dissipation

in HALT mode

(Note 5)

IDDHALT(1)

IDDHALT(2)

IDDHALT(3)

IDDHOLD

DD

•FmX’tal=32.768kHz

X’tal oscillation

4.5 to 5.5

9

mA

•System clock : VCO

•VCO for OSD stops

•Internal RC oscillation stops

•HALT mode

V

•FmX’tal=32.768kHz

X’tal oscillation

4.5 to 5.5

300

1000

•VCO for system stops

•VCO for OSD stops

•System clock : Internal RC

•HALT mode

µA

•FmX’tal=32.768kHz

X’tal oscillation

4.5 to 5.5

45

200

20

•VCO for system stops

•VCO for OSD stops

•System clock : X’tal

•HOLD mode

Current dissipation

in HOLD mode

(Note 5)

•All oscillation stops.

0.05

µA

Note 5: The currents through the output transistors and the pull-up MOS transistors are ignored.

No.A0116-15/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Recommended Oscillation Circuit and Sample Characteristics

The sample oscillation circuit characteristics in the table below is based on the following conditions:

Recommended circuit parameters are verified by an oscillator manufacturer using a Sanyo provided oscillation

evaluation board.

Sample characteristics are the result of the evaluation with the recommended circuit parameters connected externally.

Recommended oscillation circuit and sample characteristics (Ta = -10°C to +70°C)

Oscillation

Operating

supply

Recommended circuit parameters

Notes

stabilizing time

Frequency

32.768kHz

Manufacturer

Oscillator

C-002RX

voltage range

C1

C2

Rf

Rd

typ

max

1.5s

SEIKO EPSON

18pF

OPEN

390k

Ω

4.5 to 5.5V

1.0s

Notes: The oscillation stabilizing time period is the time until the VCO oscillation for the internal system becomes

stable after the following conditions. (Refer to Figure 2.)

1. The V

2. The HOLD mode is released.

becomes higher than the minimum operating voltage after the power is supplied.

DD

The sample oscillation circuit characteristics may differ applications. For further assistance, please contact with

oscillator manufacturer with the following notes in your mind.

• Since the oscillation frequency precision is affected by wiring capacity of the application board, etc., adjust the

oscillation frequency on the production board.

• The above oscillation frequency and the operating supply voltage range are based on the operating temperature of

-10°C to +70°C. For the use with the temperature outside of the range herein, or in the applications requiring high

reliability such as car products, please consult with oscillator manufacturer.

• When using the oscillator which is not shown in the sample oscillation circuit characteristics, please consult with

Sanyo sales personnel.

Since the oscillation circuit characteristics are affected by the noise or wiring capacity because the circuit is designed

with low gain in order to reduce the power dissipation, refer to the following notices.

• The distance between the clock I/O terminal (XT1 terminal XT2 terminal) and external parts should be as short as

possible.

• The capacitors’ V should be allocated close to the microcontroller’s GND terminal and be away from other GND.

SS

• The signal lines with rapid state changes or with large current should be allocated away from the oscillation circuit.

XT1

XT2

Rf

Rd

C1

C2

X’tal

Figure 1 Recommended Oscillation Circuit

No.A0116-16/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

V

DD

Power supply

limit

0V

Reset time

RES

Internal RC

resonator

oscillation

XT1,XT2

tmsVCO

VCO for system

Operation mode

stable

Unfixed

Reset

Instruction execution mode

Reset Time and Oscillation Stabilizing Time

HOLD release

Valid

Internal RC

resonator

oscillation

XT1, XT2

VCO for system

Operation mode

tmsVCO

stable

HOLD

Instruction execution mode

HOLD Release Signal and Oscillation Stabilizing Time

Figure 2 Oscillation Stabilizing Time

No.A0116-17/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

V

DD

Note: Determine the C value to

, R

generate more than 200µs reset time.

RES RES

R

RES

C

RES

Figure 3 Reset Circuit

0.5V

DD

AC Timing Measurement Point

V

DD

tCKCY

tCKL

tCKH

SCK0

SI0

1kΩ

tCKI

tICK

tCKO

50pF

SO0

SB0

Timing

Figure 4 Serial Input / Output Test Condition

Test load

No.A0116-18/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

tPIL (1)-(5)

tPIH (1)-(4)

Figure 5 Pulse Input Timing Condition - 1

tPIL(6)

HS

VS

0.75V

DD

0.25V

DD

tTLH

tPIL(6)

more than ±1tCYC

Figure 6 Pulse Input Timing Condition - 2

LC863364C

10kΩ

HS

C536

HS

Figure 7 Recommended Interface Circuit

No.A0116-19/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

100Ω

FILT

+

-

Figure 8 FILT Recommended Circuit

Note: Place FILT parts on board as close to the microcontroller as possible.

P

S

Sr

SDA

SCL

tBUF

tsp

tHD;STA

tR

tF

tHD;STA

tLOW

tHIGH

tSU;DAT

tSU;STA

tSU;STO

tHD;DAT

S : start condition

P : stop condition

Sr : restart condition

tsp : spike suppression

Standard mode : not exist

High speed mode : less than 50ns

Figure 9 IIC Timing

No.A0116-20/21

LC863364C/56C/48C/40C/32C/28C/24C/20C/16C

Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the

performance, characteristics, and functions of the described products in the independent state, and are

not guarantees of the performance, characteristics, and functions of the described products as mounted

in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an

independent device, the customer should always evaluate and test devices mounted in the customer's

products or equipment.

SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any

and all semiconductor products fail with some probability. It is possible that these probabilistic failures

could give rise to accidents or events that could endanger human lives, that could give rise to smoke or

fire, or that could cause damage to other property. When designing equipment, adopt safety measures

so that these kinds of accidents or events cannot occur. Such measures include but are not limited to

protective circuits and error prevention circuits for safe design, redundant design, and structural design.

In the event that any or all SANYO Semiconductor products (including technical data,services) described

or contained herein are controlled under any of applicable local export control laws and regulations, such

products must not be exported without obtaining the export license from the authorities concerned in

accordance with the above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or

mechanical, including photocopying and recording, or any information storage or retrieval system, or

otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd.

Any and all information described or contained herein are subject to change without notice due to

product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"

for the SANYO Semiconductor product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not

guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and

reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual

property rights or other rights of third parties.

This catalog provides information as of May, 2006. Specifications and information herein are subject

to change without notice.

No.A0116-21/21

PS


型号：	LC863356C
厂家：	SANYO SEMICON DEVICE
描述：	8-bit 1-chip Microcontroller 8位单芯片微控制器微控制器外围集成电路光电二极管时钟
文件：	总21页 (文件大小：155K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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