LC866416 [SANYO]
8-Bit Single Chip Microcontroller with the UVEPROM; 8位单片机与UVEPROM
| 型号： | LC866416 |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | 8-Bit Single Chip Microcontroller with the UVEPROM |
| 文件： | 总22页 (文件大小：636K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENN*6746
CMOS IC
LC86E6449
8-Bit Single Chip Microcontroller
with the UVEPROM
Preliminary
Overview
The LC86E6449 is a CMOS 8-bit single chip microcontroller with UVEPROM for the LC866400 series.
This microcontroller has the function and the pin description of the LC866400 series mask ROM version, and 48K-byte
EPROM. The program data is rewritable. It is suitable to develop the program.
Features
(1) Option switching by EPROM data
The option function of the LC866400 series can be specified by the EPROM data.
LC86E6449 can be checked the function of the trial pieces using the mass production board.
(2) Internal one-time EPROM capacity : 49408 bytes
(3) Internal RAM capacity
:
1152 bytes
Used EPROM or RAM capacity are equal ROM or RAM capacity of mask ROM version which applies LC86E6449.
Mask ROM version
LC866448
LC866444
LC866440
LC866436
LC866432
LC866428
LC866424
LC866420
LC866416
LC866412
LC866408
EPROM capacity
49152 bytes
45056 bytes
40960 bytes
36864 bytes
32768 bytes
28672 bytes
24576 bytes
20480 bytes
16384 bytes
12288 bytes
8192 bytes
RAM capacity
1152 bytes
1152 bytes
1152 bytes
1152 bytes
768 bytes
768 bytes
768 bytes
640 bytes
640 bytes
512 bytes
512 bytes
Ver.1.04
73196
91400 RM (IM) SK No.6746-1/22
LC86E6449
(4) Operating supply voltage
(5) Instruction cycle time
(6) Operating temperature
: 4.5V to 6.0V
: 1.0µs to 366µs
: +10°C to +40°C
(7) The pin compatible with the LC866400 series mask ROM devices
(8) Applicable mask ROM version
(9) Operating temperature
: LC866448/LC866444/LC866440/LC866436//LC866432/LC866428
/LC866424/LC866420/LC866416/LC866412/LC866408
: QFC80E (with window)
Notice for use
LC86E6449 is provided for the first release and small shipping of the LC866400 series.
At using, take notice of the followings.
(1) A point of difference LC86E6449 and LC866400 series
Item
LC86E6449
LC866448/44/40/36/32/28/24/20/16/12/08
Operation after reset
releasing
The option is specified until 3ms after The program is executed from 00H of the
going to a ‘H’ level to the reset terminal program counter immediately after going to
by dgrees. The program is executed a ‘H’ level to reset terminal.
from 00H of the program counter.
Pull-down resistor of
the following pins
•S0/T0 – S6/T6
Pull-down resistor
provided/not provided
Pull-down resistor
provided/not provided
Not provided
Provided (fixed)
Provided (fixed)
Not provided
4.5V to 6.0V
Specified by the option
Provided (fixed)
•S7/T7 – S15/T15
•S16 – S27
Specified by the option
Specified by the option
2.5V to 6.0V
•S28 – S37
Operating supply
Voltage range (VDD)
Operating temperature
range (Topg)
°C
+10 to +40
°C
°C °C
-30 to +70
“L” level hold Tr. of the
high voltage withstand input Refer to ‘electrical characteristics’ on the semiconductor news.
terminal
Power dissipation
LC86E6449 uses 256 bytes that is addressed on FF00H to FFFFH in the program memory as the option configuration data
area. This option configuration cannot execute all options which LC866400 series have. Next tables show the options
that correspond and not correspond to LC86E6449.
No.6746-2/22
LC86E6449
• A kind of the option corresponding of the LC86E6449
A kind of option
Pins, Circuits
Port 0
Contents of the option
Input/output form of
Input/output ports
1. N-channel open drain output
2. CMOS output
*1
*2
1. Pull-up MOS Tr. proveded
2. Pull-up MOS Tr. not provided
Port 1
Port 3
Port 7
1. Input
: Programmable pull-up MOS Tr.
Output : N-channel open drain
2. Input
1. Input
: Programmable pull-up MOS Tr.
*1
Output : CMOS
: No Programmable pull-up MOS Tr.
Output : N-channel open drain
2. Input
: Programmable pull-up MOS Tr.
*1
*1
Output : CMOS
Pull-up MOS Tr. of input ports
*1) Specified in a bit
1. No Pull-up MOS Tr.
2. Pull-up MOS Tr.
*2) Specified in nibble unit. The port of N-channel open drain output does not have the Pull-up MOS Tr..
• A kind of the option not corresponding of the LC86E6449
A kind of option
Pins, Circuits
LC86E6449
LC866448/44/40/36/32/28/24/20/16/12/08
Pull-down resistor of
the high voltage
•S0/T0 to S6/T6
•S16 to S27
Not provided
Provided (fixed)
Not provided
Specified by the option
Specified by the option
Specified by the option
Withstand output terminals
•S28 to S37
(2) Option
The option data is created by the option specified program “SU86K.EXE”. The created option data is linked to the
program area by linkage loader “L86K.EXE”.
No.6746-3/22
LC86E6449
(3) ROM space
LC86E6449 and LC866400 series use 256 bytes that is addressed on 0FF00H to 0FFFFH in the program memory as the
option specified data area. These program memory capacity are 61440 bytes that is addressed on 0000H to BFFFH.
0FFFFH
0FF00H
The option specified
area 256 bytes
The option
specified area
The option
specified area
The option
specified area
The option
specified area
The option
specified area
0EFFFH
0DFFFH
0CFFFH
0BFFFH
0AFFFH
9FFFH
8FFFH
7FFFH
6FFFH
5FFFH
4FFFH
3FFFH
2FFFH
1FFFH
0FFFH
0000H
Program area
48K bytes
Program area
44K bytes
Program area
40K bytes
Program area
36K bytes
Program area
32K bytes
Program area
28K bytes
LC866448
LC866444
LC866440
LC866436
LC866432
LC866428
0FFFFH
0FF00H
The option
specified area
The option
specified area
The option
specified area
The option
specified area
The option
specified area
0EFFFH
0DFFFH
0CFFFH
0BFFFH
0AFFFH
9FFFH
8FFFH
7FFFH
6FFFH
5FFFH
4FFFH
3FFFH
2FFFH
1FFFH
0FFFH
0000H
Program area
24K bytes
Program area
20K bytes
Program area
16K bytes
Program area
12K bytes
Program area
8K bytes
LC866424
LC866420
LC866416
LC866412
LC866408
No.6746-4/22
LC86E6449
How to use
(1) Specification of option
Programming data for EPROM of the LC86E6449 is required.
Debugged evaluation file (EVA file) must be converted to an INTEL-HEX formatted file (HEX file) with file converter
program, EVA2HEX.EXE. The HEX file is used as the programming data for the LC86E6449.
(2) How to program for the EPROM
LC86E6449 can be programmed by the EPROM programmer with attachment ; W86EP6448Q.
• Recommended EPROM programmer
Productor
EEPROM programmer
Advantest
Andou
R4945, R4944, R4943
AF-9704
AVAL
PKW-1100, PKW-3000
MODEL 1890A
Minato electronics
• “27512 (Vpp=12.5V) Intel high speed programming” mode available. The address must be set to “0 to
0FFFFH” and a jumper (DASEC) must be set to ‘OFF’ at programming.
(3) How to use the data security function
“Data security” is the disabled function to read the data of the EPROM.
The following is the process in order to execute the data security.
1. Set ‘ON’ the jumper of attachment.
2. Program again. Then EPROM programmer displays the error. The error means normally activity of the data security.
It is not a trouble of the EPROM programmer or the LSI.
Notes
• Data security is not executed when the data of all address have ‘FFH’ at the sequence 2 above.
• The programming by a sequential operation “BLANK PROGRAM VERIFY” cannot be executed data security at the
sequence 2 above.
• Set to ‘OFF’ the jumper after executing the data security.
1 pin mark
Data security
of LSI
Not data security
1 pin
W86EP6448Q
No.6746-5/22
LC86E6449
(4) How to eliminate
The programming data can be erased by using the EPROM eraser.
(5) Shielding
The UVEPROM (ultraviolet erasable programmable ROM) is in it. Put the seal on the window in use.
Pin Assignment
P00
P01
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
S15/T15
S14/T14
S13/T13
S12/T12
S11/T11
S10/T10
S9/T9
P02
P03
P04
P05
P06
P07
S8/T8
VSS2
S7/T7
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/SO1
P14/SI1/SB1
P15/SCK1
P16/BUZ
S6/T6
S5/T5
S4/T4
S3/T3
S2/T2
S1/T1
S0/T0
SANYO: QFC80E
No.6746-6/22
LC86E6449
System Block Diagram
Interrupt Control
IR
PLA
A15-A0
D7-D0
TA
CE
OE
Stand-by Control
EPROM
Control
DASEC
CF
RC
EPROM(48KB)
PC
X’tal
Base Timer
SIO0
Bus Interface
ACC
Port 1
Port 3
Port 7
Port 8
B Register
C Register
SIO1
Timer 0
Timer 1
ADC
ALU
PSW
RAR
INT0 to 3
Noise Filter
Real Time Service
RAM
Stack Pointer
Port 0
RAM
128 bytes
VFD
Controller
Watchdog Timer
High Voltage Output
No.6746-7/22
LC86E6449
LC86E6449 Pin description
Pin name I/O
Function description
Option
EPROM mode
VSS1,2
VDD1,2
VP
-
-
-
Power pin (-)
Power pin (+)
-
-
-
-
-
*4
Refer to Notes
-
-
Power pin (-) for the VFD output pull-down resist
PORT0
P00 to P07
I/O •8-bit input/output port
•Input for port 0 interrupt
•Input/output in nibble units
•Input for HOLD release
•Pull-up resistor :
Provided/Not provided
•Output form :
CMOS/N-channel open drain
•15V withstand at N-channel open drain
output
PORT1
I/O •8-bit input/output port
•Input/output can be specified in a bit unit
•Other pin functions
•Output form :
Data line
D0 to D7
P10 to P17
CMOS/N-channel open drain
P10 SIO0 data output
P11 SIO0 data input/bus input/output
P12 SIO0 clock input/output
P13 SIO1 data output
P14 SIO1 data input/bus input/output
P15 SIO1 clock input/output
P16 Buzzer output
P17 Timer 1 output (PWM0 output)
I/O •4-bit input/output port
•Input/output can be specified
•15V withstand at N-channel open drain
output
PORT3
•Output form :
-
P30 to P33
CMOS/N-channel open drain
PORT7
•6-bit input port
Pull-up resistor :
EPROM control
signals
•Other functions
Provided/Not provided
(P70,71,72,73)
P70 : INT0 input/HOLD release input/
N-ch Tr. output for watchdog timer
DASEC (*1)
OE (*2)
* P74 ,P75 don’t have pull-up
resistor option.
P70
I/O
I
P71 : INT1 input/HOLD release input
P72 : INT2 input/timer 0 event input
P73 : INT3 input with noise rejection
filter/timer 0 event input
CE
(*3)
P71 to P75
P74 : XT1 terminal for 32.768kHz crystal
oscillation
P75 : XT2 terminal for 32.768kHz crystal
oscillation
•Interrupt received forms, the vector addresses
rising falling rising high low vector
&
level level
falling
INT0 enable enable disable enable enable 03H
INT1 enable enable disable enable enable 0BH
INT2 enable enable enable disable disable 13H
INT3 enable enable enable disable disable 1BH
Continue.
No.6746-8/22
LC86E6449
Pin name I/O
Function description
•8-bit input port
Option
EPROM mode
PORT8
I
-
-
-
P80 to 87
•Other function
AD input port (8 port pins)
Output for VFD display controller
Segment/timing in common
•Output for VFD display controller
Segment/timing with internal pull-down
resistor in common
S0/T0 to
S6/T6 *6
S7/T7 to
S15/T15
*7
O
O
-
-
TA (*5)
S16 to S31 I/O •Output for VFD display controller Segment
-
•Address input
A15 to A0
•EPROM
*8
output
•Other function
S16 : High voltage input port PC0
S17 : High voltage input port PC1
S18 : High voltage input port PC2
S19 : High voltage input port PC3
S20 : High voltage input port PC4
S21 : High voltage input port PC5
S22 : High voltage input port PC6
S23 : High voltage input port PC7
control
signal input
S24 : High voltage input port PD0
S25 : High voltage input port PD1
S26 : High voltage input port PD2
S27 : High voltage input port PD3
S28 : High voltage input port PD4
S29 : High voltage input port PD5
S30 : High voltage input port PD6
S31 : High voltage input port PD7
S32 to S37 I/O •Output for VFD display controller Segment
-
-
*9
•Other function
S32 : High voltage I/O port PE0
S33 : High voltage I/O port PE1
S34 : High voltage I/O port PE2
S35 : High voltage I/O port PE3
S36 : High voltage I/O port PE4
S37 : High voltage I/O port PE5
Reset pin
RES
I
I
-
-
-
-
XT1/ P74
•Input pin for 32.768kHz crystal oscillation
•Other function
XT1 : Input port P74
In case of non use, connect to VDD1.
•Output pin for 32.768kHz crystal oscillation
•Other function
XT2/P75
O
-
-
XT2 : Input port P75
In case of non use, connect to VDD1 at using
as port or unconnect at using as oscillation.
No.6746-9/22
LC86E6449
Pin name I/O
Function description
Option
EPROM mode
CF1
CF2
I
Input pin for the ceramic resonator oscillation
Output pin for the ceramic resonator oscillation
-
-
-
-
O
♦ All of port options except the pull-up resistor option of port 0 can be specified in a bit unit.
*1 Memory select input for data security
*2 Output enable input
*3 Chip enable input
*4 Connect like the following figure to reduce noise into a VDD1 terminal.
*5 TA ! EPROM control signal input
*6 S0/T0 to S6/T6 : not provided the pull-down resistor
*7 S7/T7 to S15/T15 : provided the pull-down resistor (fixed)
*8 S16 to S27 : provided the pull-down resistor (fixed)
*9 S28 to S31 : not provided the pull-down resistor
*10 S32 to S37 : not provided the pull-down resistor
[Notes]
When connecting to the power supply, the power pins must be connected like following figure.
For the LC866448B/44B/40B/36B
LSI
VDD1
Power
Supply
For back-up
VDD2
(VFD power pin)
VSS1
VSS2
For the LC866432A/28A/24A/20A/16A/12A/08A
LSI
VDD1
Power
Supply
For back-up
VDD2
(VFD power pin)
VSS1
VSS2
No.6746-10/22
LC86E6449
1. Absolute Maximum Ratings at VSS1=VSS2=0V and Ta=25°C
Ratings
typ.
Parameter
Symbol
Pins
Conditions
unit
V
VDD[V]
min.
-0.3
-0.3
max.
+7.0
VDD+0.3
VDDMAX
VI(1)
Supply voltage
Input voltage
VDD1, VDD2
•Ports 71,72,73, 74 ,75,8
• RES
VDD1=VDD2
VI(2)
VO(1)
VIO(1)
VP
VDD-45
VDD-45
-0.3
VDD+0.3
VDD+0.3
VDD+0.3
Output voltage
Input/Output
voltage
S0/T0 to S15/T15
•Port 1
•Port 70
•Ports 0, 3 of CMOS
output
VIO(2)
VIO(3)
Ports 0, 3 of open
drain output
S16 to S37
-0.3
15
VDD-45
-10
VDD+0.3
High
level
Peak
output
IOPH(1) Ports 0, 1, 3
•CMOS output
•At each pins
mA
output current
current
IOPH(2) S0/T0 to S15/T15
IOPH(3) S16 to S37
At each pins
At each pins
-30
-15
Total
output
current
ΣIOAH(1) Ports 0,1,3
ΣIOAH(2) S0/T0 to S15/T15
The total of all pins
The total of all pins
The total of all pins
At each pins
-30
-55
-115
Σ
IOAH(3) S16 to S37
Low
level
Peak
output
IOPL(1) Ports 0,1,3
IOPL(2) Port 70
20
15
At each pins
output current
current
Total
Σ
IOAL(1) Port 0
The total of all pins
The total of all pins
40
40
output
current
ΣIOAL(2) Ports 1,3
°
Maximum
power
dissipation
Operating
temperature
range
Pdmax
Topr
QFC80E
Ta=+10 to+40 C
480
+40
mW
+10
-55
°C
Storage
Tstg
+125
temperature
range
No.6746-11/22
LC86E6449
2. Recommended Operating Range at Ta=+10°C to +40°C, VSS1=VSS2=0V
Ratings
typ.
Parameter
Symbol
VDD(1)
Pins
Conditions
µ ≤ CYC
98 s t
unit
V
VDD[V]
min.
4.5
max.
6.0
Operating
Supply
VDD1=VDD2
tCYC≤400µs
voltage
Hold voltage
VHD
VDD1=VDD2
VP
RAMs and the
registers hold voltage
at HOLD mode.
2.0
-35
6.0
Pull-down
Voltage
Input high
voltage
VP
4.5 to 6.0
VDD
VDD
13.5
VIH(1)
VIH(2)
VIH(3)
Port 0 at CMOS
output
Port 0 at open drain Output disable
output
Output disable
4.5 to 6.0 0.33VDD
+1.0
4.5 to 6.0 0.75VDD
0.75VDD
•Port 1
Output disable
4.5 to 6.0
VDD
•Ports 72,73
•Port 3 at CMOS
output
VIH(4)
VIH(5)
Port 3 at open
drain output
•Port 70
Output disable
4.5 to 6.0 0.75VDD
4.5 to 6.0 0.75VDD
13.5
Output N-channel
VDD
Port input/interrupt Tr. OFF
•Port 71
• RES
VIH(6)
VIH(7)
VIH(8)
VIL(1)
VIL(2)
VIL(3)
VIL(4)
Port 70
Watchdog timer
•Port 8
•Ports 74 ,75
S16 to S37
Output N-channel
Tr. OFF
Using as port
4.5 to 6.0 0.9VDD
4.5 to 6.0 0.75VDD
VDD
VDD
Output P-channel
Tr. OFF
Output disable
4.5 to 6.0 0.33VDD
+1.0
VDD
Input low
voltage
Port 0 at CMOS
output option
Port 0 at open
drain output
•Ports 1,3
4.5 to 6.0 VSS
0.2VDD
0.25VDD
0.25VDD
0.25VDD
Output disable
Output disable
Output N-channel
4.5 to 6.0 VSS
4.5 to 6.0 VSS
4.5 to 6.0 VSS
•Ports 72,73
•Port 70
Port input/interrupt Tr. OFF
•Port 71
• RES
VIL(5)
VIL(6)
VIL(7)
tCYC
Port 70
Watchdog timer
•Port 8
•Ports 74 ,75
S16 to S37
Output N-channel
Tr. OFF
Using as port
4.5 to 6.0 VSS
4.5 to 6.0 VSS
0.8VDD
-1.0
0.25VDD
Output P-channel
Tr. OFF
4.5 to 6.0
4.5 to 6.0
4.5 to 6.0
VP
0.2VDD
400
Operation
cycle time
Oscillation
frequency
range
0.98
µs
FmCF(1)
CF1, CF2
CF1, CF2
•6MHz
(ceramic resonator
oscillation)
•Refer to figure 1
•3MHz
6
3
MHz
(Note 1)
FmCF(2)
4.5 to 6.0
(ceramic resonator
oscillation)
•Refer to figure 1
RC oscillation
•32.768kHz
FmRC
FsXtal
4.5 to 6.0
4.5 to 6.0
0.3
0.8
32.768
3.0
XT1, XT2
kHz
(crystal oscillation)
•Refer to figure 2
Continue.
No.6746-12/22
LC86E6449
Ratings
typ.
Parameter
Symbol
Pins
Conditions
unit
ms
VDD[V]
4.5 to 6.0
min.
max.
Oscillation
stabilizing
time period
tmsCF(1)
CF1, CF2
•6MHz
(ceramic resonator
oscillation)
(Note 1)
•Refer to figure 3
•3MHz
(ceramic resonator
tmsCF(2)
tssXtal
CF1, CF2
XT1, XT2
4.5 to 6.0
4.5 to 6.0
oscillation)
•Refer to figure 3
•32.768kHz
s
(crystal oscillation)
•Refer to figure 3
(Note 1) The oscillation constant is shown on table 1 and table 2.
No.6746-13/22
LC86E6449
3. Electrical Characteristics at Ta=+10°C to +40°C, VSS1=VSS2=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
•Output disable
unit
VDD[V]
4.5 to 6.0
min.
max.
5
µ
A
Input high
current
IIH(1) Ports 0,3 at open
drain output
•VIN=13.5V
(including off-leakage
current of output Tr.)
•Output disable
•Pull-up MOS Tr. OFF.
•VIN=VDD
(including off-leakage
current of output Tr.)
VIN=VDD
IIH(2) •Ports 1,3
•Port 0 without
4.5 to 6.0
4.5 to 6.0
1
1
pull-up MOS Tr.
IIH(3) •Ports 70,71,72,73
without pull-up
MOS Tr.
•Port 8
IIH(4)
RES
VIN=VDD
Using as port
4.5 to 6.0
4.5 to 6.0
1
1
IIH(5) Ports 74 ,75
VIN=VDD
IIH(6) S28 to S37
•Output disable
•VIN=VDD
•Output disable
•Pull-up MOS Tr. OFF.
•VIN=VSS
(including off-leakage
current of output Tr.)
VIN=VSS
4.5 to 6.0
4.5 to 6.0
1
Input low
current
IIL(1) •Ports 1,3
•Port 0 without
-1
-1
pull-up MOS Tr.
IIL(2) •Ports 70,71,72,73
without pull-up
MOS Tr.
4.5 to 6.0
•Port 8
IIL(3)
RES
VIN=VSS
Using as port
4.5 to 6.0
4.5 to 6.0
-1
-1
IIL(4) Ports 74 ,75
VIN=VSS
Output high VOH(1) Ports 0,1,3 of
IOH=-1.0mA
IOH=-0.1mA
IOH=-20mA
•IOH=-1.0mA
4.5 to 6.0 VDD-1
4.5 to 6.0 VDD-0.5
4.5 to 6.0 VDD-1.8
4.5 to 6.0 VDD-1
V
voltage
CMOS output
VOH(2)
VOH(3) S0/T0 to S15/T15
VOH(4)
•The current of these each
pins is not over 1mA.
IOH=-5mA
VOH(5) S16 to S37
VOH(6)
4.5 to 6.0 VDD-1.8
4.5 to 6.0 VDD-1
•IOH=-1.0mA
•The current of these each
pins is not over 1mA.
IOL=10mA
IOL=1.6mA
•IOL=1mA
Output low
voltage
VOL(1) Ports 0,1,3
VOL(2)
VOL(3)
4.5 to 6.0
4.5 to 6.0
4.5 to 6.0
1.5
0.4
0.4
•The current of these each
pins is not over 1mA.
IOL=1mA
VOL(4) Port 70
4.5 to 6.0
4.5 to 6.0
0.4
70
Ω
k
Pull-up MOS Rpu
Tr. resistor
•Ports 0,1,3
•Ports 70,71,72,73
VOH=0.9VDD
15
40
Continue.
No.6746-14/22
LC86E6449
Ratings
typ.
Parameter
Symbol
Pins
Conditions
unit
VDD[V]
4.5 to 6.0
min.
-1
max.
Output off-
leakage current
IOFF(1) •S0/T0 to S6/T6
•S28 to S37
•Output P-channel
Tr. OFF
µA
(without pull-down
resistor)
•VOUT=VSS
•Output P-channel
Tr. OFF
IOFF(2)
4.5 to 6.0
4.5 to 6.0
5.0
-30
•VOUT=VDD-40V
Output P-channel
Tr. OFF
‘L’ level hold Tr. Rinpd
of high voltage
S16 to S37
400
100
kΩ
kΩ
withstand input
pull-down
transistor resistor
Rpd
•S7/T7 to S15/T15
•S16 to S27
(without pull-down
resistor)
•Output P-channel
Tr. OFF
•VOUT=3V
•Vp=-30V
60
200
Hysteresis
voltage
VHIS
•Port 1
•Ports 70,71,72,73
• RES
Output disable
4.5 to 6.0
4.5 to 6.0
0.1VDD
10
V
Pin capacitance CP
All pins
•f=1MHz
pF
•VIN=VSS for all
unmeasured terminals.
•Ta=25°C
4. Serial Input/Output Characteristics at Ta=+10°C to +40°C, VSS1=VSS2=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
unit
VDD[V] min.
max.
Cycle
tCKCY(1)
tCKL(1)
SCK0,SCK1 Refer to figure 5
4.5 to 6.0
2
1
tCYC
Low Level
pulse width
High Level
pulse width
Cycle
tCKH(1)
1
2
tCKCY(2)
tCKL(2)
SCK0,SCK1 •Use pull-up
4.5 to 6.0
Ω
resistor (1k
)
Low Level
pulse width
High Level
pulse width
Data set-up time
1/2tCKCY
1/2tCKCY
in the open drain
output.
•Refer to figure 5
tCKH(2)
tICK
•SI0,SI1
•SB0,SB1
•Data set-up to
SCK0,1
4.5 to 6.0 0.1
µs
•Data hold from
SCK0,1
Data hold time
tCKI
0.1
•Refer to figure 5
Output delay time tCKO(1)
(External clock
using for serial
•SO0,SO1
•SB0,SB1
•Use pull-up
resistor (1kΩ) in
the open drain
output.
4.5 to 6.0
7/12
tCYC
+0.2
transfer clock)
•Data hold from
SCK0,1
•Refer to figure 5
Output delay time tCKO(2)
(Internal clock
using for serial
1/3
tCYC
+0.2
transfer clock)
No.6746-15/22
LC86E6449
5. Pulse Input Conditions at Ta=+10°C to +40°C, VSS1=VSS2=0V
Ratings
Parameter
Symbol
Pins
Conditions
unit
VDD[V] min. typ. max.
High/low level tPIH(1) •INT0, INT1
•Interrupt acceptable
•Timer0-countable
•Interrupt acceptable
4.5 to 6.0
1
tCYC
pulse width
tPIL(1) •INT2/T0IN
tPIH(2) INT3/T0IN
4.5 to 6.0
2
tPIL(2) (The noise rejection clock •Timer0-countable
selected to 1/1.)
tPIH(3) INT3/T0IN
•Interrupt acceptable
4.5 to 6.0
32
tPIL(3) (The noise rejection clock •Timer0-countable
selected to 1/16.)
tPIH(4) INT3/T0IN
tPIL(4) (The noise rejection clock •Timer0-countable
selected to 1/64.)
•Interrupt acceptable
4.5 to 6.0 128
4.5 to 6.0 200
tPIL(5) RES
Reset acceptable
µs
6. AD Converter Characteristics at Ta=+10°C to + 40°C, VSS1=VSS2=0V
Ratings
typ.
Parameter
Resolution
Absolute precision
(Note 2)
Symbol
Pins
Conditions
unit
VDD[V]
4.5 to 6.0
4.5 to 6.0
min.
max.
±1.5
N
ET
8
bit
LSB
µ
s
Conversion time
tCAD
AD conversion time = 4.5 to 6.0 15.68
65.28
16 × tCYC
(tCYC=
(tCYC=
µ
µ
(ADCR2=0)
(Note 3)
0.98 s)
4.08 s)
AD conversion time =
31.36
(tCYC=
0.98 µs)
130.56
(tCYC=
4.08µs)
×
32 tCYC
(ADCR2=1)
(Note 3)
Analog input
voltage range
Analog port
input current
VAIN AN0 to AN7
4.5 to 6.0 VSS
VDD
1
V
IAINH
IAINL
VAIN=VDD
VAIN=VSS
4.5 to 6.0
4.5 to 6.0
µA
-1
(Note 2) Absolute precision excepts the quantizing error (±1/2 LSB).
(Note 3) The conversion time means the time from executing the AD conversion instruction to setting the complete digital
conversion value to the register.
No.6746-16/22
LC86E6449
7. Current Dissipation Characteristics at Ta=+10°C to +40°C, VSS1=VSS2=0V
Ratings
typ.
Parameter
Symbol
Pins
Conditions
unit
mA
VDD[V]
4.5 to 6.0
min.
max.
33
Current dissipation
during basic
operation
IDDOP(1)
•FmCF=6MHz
Ceramic resonator
oscillation
14
(Note 4)
•FsXtal=32.768kHz
crystal oscillation
•System clock :
CF oscillation
•Internal RC
oscillation stops
•1/1 divided
IDDOP(2)
•FmCF=3MHz
Ceramic resonator
oscillation
4.5 to 6.0
6
18
•FsXtal=32.768kHz
crystal oscillation
•System clock :
CF oscillation
•Internal RC
oscillation stops
•1/2 divided
IDDOP(3)
IDDOP(4)
•FmCF=0Hz
(The oscillation
stops)
•FsXtal=32.768kHz
crystal oscillation
•System clock :
RC oscillation
•1/2 divided
4.5 to 6.0
4
3
13
10
•FmCF=0Hz
4.5 to 6.0
(The oscillation
stops)
•FsXtal=32.768kHz
crystal oscillation
•System clock :
32.768kHz
•Internal RC
oscillation stops
•1/2 divided
Continue.
No.6746-17/22
LC86E6449
Ratings
typ.
Parameter
Symbol
Pins
Conditions
•HALT mode
•FmCF=6MHz
Ceramic resonator
oscillation
unit
mA
VDD[V]
4.5 to 6.0
min.
max.
14
Current dissipation
in HALT mode
(Note 4)
IDDHALT(1)
5
•FsXtal=32.768kHz
crystal oscillation
•System clock :
CF oscillation
•Internal RC
oscillation stops
•1/1 divided
IDDHALT(2)
•HALT mode
•FmCF=3MHz
Ceramic resonator
oscillation
4.5 to 6.0
2.2
7
•FsXtal=32.768kHz
crystal oscillation
•System clock :
CF oscillation
•Internal RC
oscillation stops
•1/2 divided
IDDHALT(3)
•HALT mode
FmCF=0Hz
4.5 to 6.0
400
1600
µA
(The oscillation
stops)
•FsXtal=32.768kHz
crystal oscillation
•System clock :
RC oscillation
•1/2 divided
IDDHALT(4)
•HALT mode
FmCF=0Hz
4.5 to 6.0
25
100
(The oscillation
stops)
•FsXtal=32.768kHz
crystal oscillation
•System clock :
crystal oscillation
•Internal RC
oscillation stops
•1/2 divided
Current dissipation
in HOLD mode
(Note 4)
IDDHOLD(1)
HOLD mode
4.5 to 6.0
0.05
30
(Note 4) The currents of the output transistors and the pull-up MOS transistors are ignored.
No.6746-18/22
LC86E6449
Table 1. Ceramic resonator oscillation recommended constant (main-clock)
Oscillation type
Maker
Oscillator
C1
C2
6MHz ceramic resonator
oscillation
Murata
on chip
on chip
Kyocera
Murata
3MHz ceramic resonator
oscillation
Kyocera
* Both C1 and C2 must be use K rank (±10%) and SL characteristics.
Table 2. Crystal oscillation guaranteed constant (sub-clock)
Oscillation type
Maker
Oscillator
C3
C4
Rd
32.768kHz crystal oscillation
* Both C3 and C4 must be use J rank (±5%) and CH characteristics.
(Not in need of high precision, use K rank (±10%) and SL characteristics.)
(Notes) • Please place the oscillation-related parts as close to the oscillation pins as possible with the shortest
possible pattern length since the circuit pattern affects the oscillation frequency.
• If you use other oscillators herein, we provide no guarantee for the characteristics.
CF1
CF2
XT1
XT2
Rd
CF
X’tal
C4
C1
C2
C3
Figure 1 Main-clock circuit
Ceramic resonator oscillation
Figure 2 Sub-clock circuit
Crystal oscillation
No.6746-19/22
LC86E6449
VDD
VDD limit
0V
Power supply
RES
Reset time
Internal RC
resonator oscillation
tmsCF
CF1, CF2
XT1, XT2
tssXtal
Instruction
execution
mode
Unfixed
Reset
Instruction execution mode
Operation mode
OCR6=1
<Reset time and oscillation stable time>
Valid
HOLD release signal
Internal RC
resonator oscillation
tmsCF
CF1, CF2
XT1, XT2
tssXtal
HOLD
Instruction execution mode
Operation mode
<HOLD release signal and oscillation stable time>
Figure 3 Oscillation stable time
VDD
RRES
(Note) Fix the value of CRES, RRES that is
sure to reset until 200µs, after Power
supply has been over inferior limit of
supply voltage.
RES
CRES
Figure 4 Reset circuit
No.6746-20/22
LC86E6449
0.5VDD
<AC timing point>
tCKCY
VDD
tCKL
tCKH
SCK0
SCK1
1kΩ
tICK
tCKI
SI0
SI1
tCKO
50pF
SO0, SO1
SB0, SB1
<Timing>
<Test load>
Figure 5 Serial input / output test condition
tPIL
tPIH
Figure 6 Pulse input timing condition
No.6746-21/22
LC86E6449
memo:
No.6746-22/22
PS
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