LC88F58B0A_技术文档

Ordering number : ENA1228

CMOS IC

FROM 128K byte, RAM 4096K byte on-chip

LC88F83B0A

16-bit 1-chip Microcontroller

Overview

The LC88F83B0A is a 16-bit microcontroller, centered around an Xstormy16 CPU, integrates on a single chip a number

of hardware features such as 32-bit program counter, 16 bits × 16 general purpose register, 128K-byte flash ROM

(onboard programmable), 4096-byte RAM, LCD display dedicated RAM, LCD dot matrix driver, on-chip debugging

function, programmable timer, a base timer serving as a time-of-day clock, a synchronous SIO interface with automatic

transmission capability, an asynchronous SIO (UART) interface, a 12-/8-bit resolution 4-channel AD converter, and a

12-source 11-vector interrupt feature.

Features

Flash ROM

• 128K × 8bit (Table data reside in the same space.)

RAM

• 4240 × 8bit

• For data

4096 × 8bit

• For display 72 × 16bit

LCD Display

• 64 segment × 16 common/72 segment × 8 common (1/4 bias)

* This product is licensed from Silicon Storage Technology, Inc. (USA), and manufactured and sold by

SANYO Semiconductor Co., Ltd.

Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to

"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,

communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be

intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace

instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety

equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case

of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee

thereof. If you should intend to use our products for applications outside the standard applications of our

customer who is considering such use and/or outside the scope of our intended standard applications, please

consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our

customer shall be solely responsible for the use.

Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate

the performance, characteristics, and functions of the described products in the independent state, and are not

guarantees of the performance, characteristics, and functions of the described products as mounted in the

customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent

device, the customer should always evaluate and test devices mounted in the customer

's products or

equipment.

Ver.0.7

40611HKIM 20110328-S00003 No.A1228-1/25

LC88F83B0A

Instruction Execution Time (min)

• 31.0μs : 32.768kHz crystal used

• 15.6μs (typ) : Low speed RC oscillation (typ: 64kHz)

• 0.25μs : 4.0MHz ceramic filter oscillation

• 1.00μs (typ) : High speed RC oscillation (typ: 1MHz)

Power Supply Voltage

• 2.3V to 5.5V (Ta =-20 to 75°C) : 32.768kHz crystal used

• 2.3V to 5.5V (Ta =0 to 60°C) : Low speed RC oscillation (typ: 64kHz)

• 2.4V to 5.5V (Ta =-20 to 75°C) : 4.0MHz ceramic filter oscillation

• 2.3V to 5.5V (Ta =0 to 60°C) : High-speed RC oscillation (typ: 1MHz)

• 2.4V to 5.5V (Ta =-20 to 75°C) : When LCD ON

Consumption Current (3.0V):

• 10.5μA (typ)

(Ta=25°C, crystal oscillation 32.768kHz, 1/1 dividing frequency, HALT, LCD: ON)

• 300μA (typ)

(Ta=25°C, crystal oscillation 32.768kHz, CF 4MHz, 1/2 dividing frequency, HALT, LCD: ON)

• 2200μA (typ)

(Ta=25°C, crystal oscillation 32.768kHz, CF 4MHz, 1/2 dividing frequency, continuous operation, LCD: ON)

Ports

• Normal withstand voltage I/O ports

20 (P0n, P1n, P20 to P23)

• LCD (COM8/SEG0 to COM15/SEG7 pins are multiplexed with COMMON and SEGMENT)

LCD drive bias power supply port

Step-up capacitor port

16 common mode

Segment output

4 (V

LCD

1 to V

2 (CUP00, CUP01)

4)

LCD

64 (SEG8 to SEG71)

Common output

16 (COM0 to COM15)

8 common mode

Segment output

Common output

• Oscillation pins

• Reset pin

72 (SEG0 to SEG71)

8 (COM0 to COM7)

4 (XT1, XT2, CF1, CF2)

1 (RESB)

• Test pin

1 (TST)

• LCD port power pins

• Power pins

2 (LCDV 0, LCDV 1)

SS SS

2 (V , V

)

DD SS

LCD

• LCD power supply

• Number of dots

• Contrast

: Capacitor step-up type

: 1024 (64 segments × 16 commons) / 576 (72 segments × 8 commons)

: Adjustable in 16 steps

• LCD frame frequency : Selectable from 4 types

No.A1228-2/25

LC88F83B0A

Timers

• Timer 0: 16-bit timer that supports PWM/toggle outputs

1) With 5-bit prescaler

2) 8-bit PWM × 2/8-bit timer + 8-bit PWM mode selectable

3) Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator

• Timer 1: 16-bit timer with capture registers

1) With 5-bit prescaler

2) May be divided into 2 channels of 8-bit timer

3) Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator

• Timer 3: 16-bit timer that supports PWM/toggle outputs

1) With 8-bit prescaler

2) 8-bit timer × 2ch/8-bit timer + 8-bit PWM mode selectable

3) Clock source selectable from system clock, OSC0, OSC1, and internal RC oscillator

• Timer 4: 16-bit timer that supports toggle outputs

1) Clock source selectable from system clock and prescaler 0

• Timer 5: 16-bit timer that supports toggle outputs

1) Clock source selectable from system clock and prescaler 0

• Base timer

1) Clock may be selected from OSC0 (32.768kHz crystal oscillator) and frequency-divided output of system clock.

2) Interrupts can be generated in 7 timing schemes.

Watchdog Timer

1) Driven by the base timer + internal watchdog timer dedicated counter.

2) Interrupt or reset mode selectable

SIO0: 8-bit synchronous SIO

1) LSB first/MSB first mode selectable

2) It is possible to communicate with 8 bits or less. (1 to 8 bits specifiable in 1-bit units)

3) Built-in 8-bit baudrate generator (transfer clock cycle 4 tCYC to 512 tCYC)

4) Automatic continuous data transmission (9 to 32768 bits specifiable in 1-bit units)

5) Interval function (interval time: 0 to 64 SIOCLKs specifiable in 1 SIOCLK units)

6) Wakeup function

UART2: Asynchronous SIO

1) Full duplex transmission

2) Start bit 1, data bit 8 (LSB first), stop bit 1

3) Parity bit: None/even parity/odd parity

4) Transfer rate: 8 to 4096 tCYC

5) Baudrate source clock: systemclock/OSC0/OSC1

6) Wakeup function

AD converter: 12bit × 4 channels

1) 12-/8-bit resolution selectable

2) Analog input: 4 channels

3) Comparator mode

4) Automatic reference voltage generation

No.A1228-3/25

LC88F83B0A

Interrupts

• 12 sources, 11 vector addresses

1) Provides three levels of multiplex interrupt control. Any interrupt requests of the level equal to or lower than the

current interrupt are not accepted.

2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level

takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector

address takes precedence.

No.

1

Vector Address

08000H

08004H

08008H

08018H

0801CH

08020H

08024H

08028H

0802CH

08030H

Interrupt Source

WATCHDOGTIMER

BASETIMER

TIMER0

2

3

4

SIO0

5

TIMER1

6

UART2

7

TIMER3

8

TIMER4

9

TIMER5

10

ADC

P00 to P05

11

0803CH

SEG71 to SEG64

• The priority level can be specified by three levels.

• Of interrupts of the same level, the one with the smallest vector address takes precedence.

Subroutine Stack Levels

• Max- whole RAM area (Stack is set in RAM)

Oscillation Circuits

• OSC1: For system clock

ceramic oscillation with external CGC, CDC or RC oscillation (external RCR1)

• OSC0: For low-speed system clock, base timer count, for LCD display

32kHz crystal oscillation with external CGX, CDX or RC oscillation (external RCR0)

• Internal oscillation circuit: Internal RC

* Depends on control resister for each oscillator operation and stop.

Initial setting - External oscillation stop, internal RC oscillation operation

No.A1228-4/25

LC88F83B0A

Standby Function

• HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.

1) Oscillation is not halted automatically.

2) Released by a system reset or occurrence of an interrupt.

• HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.

1) OSC1, internal RC and X’tal oscillators automatically stop operation.

2) There are the following methods of resetting the HOLD.

(1) Setting the reset pin to the low level

(2) Having an interrupt source established in the SIO0

(3) Having an interrupt source established in the UART2

(4) Having an interrupt source established in the P00 to P05

(5) Having an interrupt source established in the SEG71 to SEG64

• X’tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except using OSC0.

1) The OSC1 and internal RC oscillators automatically stop operation.

2) The state of OSC0 oscillation established when the X'tal HOLD mode is entered is retained.

3) There are the following methods of resetting the X'tal HOLD mode.

(1) Setting the reset pin to the low level

(2) Having an interrupt source established in the base timer circuit

(3) Having an interrupt source established in the timers 0, 1, 3, 4, 5

(4) Having an interrupt source established in the SIO0

(5) Having an interrupt source established in the UART2

(6) Having an interrupt source established in the P00 to P05

(7) Having an interrupt source established in the SEG71 to SEG64

On-chip debugger

• Supports software debugging with the IC mounted on the target board.

• Supports tracing, realtime monitoring, and breakpoint setting.

• Single-wire communication

Package Form

• TQFP120(14×14): Lead-free type

Development Tools

• On-chip debugger

• Programming boards

: EOCUIF1 + LC88F83B0A

:

Package Dimensions

unit : mm (typ)

3257A

16.0

14.0

120

1

0.15

0.125

0.4

(1.2)

SANYO : TQFP120(14X14)

No.A1228-5/25

LC88F83B0A

Pad Assignment

• Chip size (X × Y)

• Pad size

: 3.40mm × 3.19mm

: 59μm

: 80μm

• Pad pitch

• Chip thickness

: 280μm 20μm

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

ꢀ

30

29

28

27

26

25

24

23

22

21

ꢀ

20

19

18

17

16

15

14

13

12

11

10

9

Y

ꢀ

X

(0, 0)

8

ꢀ

7

6

5

4

3

2

1

ꢀ

Note: Pin numbers assigned to a package differ from pad numbers assigned to a chip.

Numbers in the above figure show the pad numbers of the chip.

No.A1228-6/25

LC88F83B0A

Pad Coordinates Table

Coordinates

Pad No.

Pin Name

Pad No.

Pin Name

X μm

1567.4

1606.99

1567.4

1190

Y μm

X μm

-192

Y μm

1462.4

1335

1255

1175

1095

1015

935

1

P20

-1308

-1228

-1147

-1067

-951.8

-863.6

-775.4

-606.8

-518.6

-430.4

-342.2

-254

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

SEG29

SEG28

SEG27

SEG26

SEG25

SEG24

SEG23

SEG22

SEG21

SEG20

SEG19

SEG18

SEG17

SEG16

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG9

2

P21

-272

3

P22

-352

4

P23

-432

5

SEG71

SEG70

SEG69

SEG68

SEG67

SEG66

SEG65

SEG64

SEG63

SEG62

SEG61

SEG60

SEG59

SEG58

SEG57

SEG56

SEG55

SEG54

SEG53

SEG52

SEG51

SEG50

SEG49

SEG48

SEG47

SEG46

-512

6

-592

7

-672

8

-752

9

-832

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

-912

-992

-1072

-1152

-1232

-1567.4

-

-165.8

-77.6

10.6

98.8

187

275.2

363.4

451.6

573

855

653

SEG8

775

733

-

813

COM15/SEG7

-

-1567.4

-

615

893

-

973

COM14/SEG6

-

-1567.4

-

455

1053

-

1133

COM13/SEG5

-

-1567.4

-

295

1213

-

1293

COM12/SEG4

-

-1567.4

-

135

LCDV

1

1462.4

-

SS

SEG45

SEG44

SEG43

SEG42

SEG41

SEG40

SEG39

SEG38

SEG37

SEG36

SEG35

SEG34

SEG33

SEG32

SEG31

SEG30

1088

COM11/SEG3

-

-1567.4

-

-25

1008

-

928

COM10/SEG2

-

-1567.4

-

-185

-

848

768

COM9/SEG1

-

-1567.4

-

-345

-

688

608

COM8/SEG0

COM7

-1567.4

-505

-585

-665

-745

-825

-905

-985

-1065

-1145

-1240

528

448

COM6

368

COM5

288

COM4

208

COM3

128

COM2

48

COM1

-32

COM0

-112

LCDV

0

SS

Continued on next page.

No.A1228-7/25

LC88F83B0A

Continued from preceding page.

Coordinates

Pad No.

Pin Name

Pad No.

Pin Name

X μm

-1567.4

-1295.45

-1215.45

-1130.8

-1050.8

-965

Y μm

X μm

205

Y μm

95

96

CUP00

CUP01

-1335.8

-1415.8

-1462.4

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

P00

P01

P02

P03

P04

P05

P06

P07

P10

P11

P12

P13

P14

P15

P16

P17

-1462.4

285

97

V

4

3

2

1

365

LCD

98

445

99

525

100

101

102

103

104

105

106

107

108

109

110

605

LCD

TST

685

XT2

XT1

-723

765

-643

845

RESB

-563

925

-383.5

-272.5

-172

1005

1085

1165

1245

1325

1405

V

DD

CF1

CF2

-92

3

V

SS

108

Note:

• Pad coordinates shown in above table are referenced at the center of the IC-chip as an origin.

• There are two pads for each V

and V , and each set of pads needs double-bonding.

DD

SS

Pin Assignment

91

92

93

94

95

96

97

98

60

59

58

57

56

55

54

53

52

51

50

49

48

SEG46

SEG47

SEG48

SEG49

SEG50

SEG51

SEG52

SEG53

SEG54

SEG55

SEG56/SNO15/SGIN15

SEG57/SNO14/SGIN14

SEG58/SNO13/SGIN13

SEG59/SNO12/SGIN12

SEG60/SNO11/SGIN11

SEG61/SNO10/SGIN10

SEG62/SNO9/SGIN9

SEG16

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG8

SEG9

99

100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

COM15/SEG7

COM14/SEG6

COM13/SEG5

COM12/SEG4

COM11/SEG3

COM10/SEG2

COM9/SEG1

COM8/SEG0

COM7

47

LC88F83B0A

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

SEG63/SNO8/SGIN8

SEG64/SNO7/SGIN7/SGINT7

SEG65/SNO6/SGIN6/SGINT6

SEG66/SNO5/SGIN5/SGINT5

SEG67/SNO4/SGIN4/SGINT4

SEG68/SNO3/SGIN3/SGINT3

SEG69/SNO2/SGIN2/SGINT2

SEG70/SNO1/SGIN1/SGINT1/T3IH

SEG71/SNO0/SGIN0/SGINT0/T3IL

P23/AN3

COM6

COM5

COM4

COM3

COM2

COM1

COM0

LCDV

CUP00

CUP01

0

SS

P22/AN2

P21/AN1/T5O

P20/AN0/T4O

Top view

SANYO: TQFP120(14×14) “Lead-free Type”

No.A1228-8/25

LC88F83B0A

Pin No.

Name

Pin No.

31

Name

Pin No.

61

Name

LCDV 1

SS

Pin No.

91

Name

1

2

3

4

5

V

4

P20/AN0/T4O

P21/AN1/T5O

P22/AN2

LCD

V

3

2

1

32

62

SEG45

SEG44

SEG43

SEG42

92

SEG16

SEG15

SEG14

SEG13

33

63

93

34

P23/AN3

64

94

LCD

TST

35

SEG71/SNO0

/SGIN0/SGINT0

/T3IL

65

95

6

36

SEG70/SNO1

/SGIN1/SGINT1

/T3IH

66

SEG41

96

SEG12

7

XT2

XT1

37

38

39

40

41

42

43

44

45

46

47

48

49

50

SEG69/SNO2

/SGIN2/SGINT2

SEG68/SNO3

/SGIN3/SGINT3

SEG67/SNO4

/SGIN4/SGINT4

SEG66/SNO5

/SGIN5/SGINT5

SEG65/SNO6

/SGIN6/SGINT6

SEG64/SNO7

/SGIN7/SGINT7

SEG63/SNO8

/SGIN8

67

68

69

70

71

72

73

74

75

76

77

78

79

80

SEG40

SEG39

SEG38

SEG37

SEG36

SEG35

SEG34

SEG33

SEG32

SEG31

SEG30

SEG29

SEG28

SEG27

97

SEG11

SEG10

8

98

9

RESB

99

SEG9

10

11

12

13

14

15

16

17

18

19

20

V

100

101

102

103

104

105

106

107

108

109

110

SEG8

DD

CF1

CF2

COM15/SEG7

COM14/SEG6

COM13/SEG5

COM12/SEG4

COM11/SEG3

COM10/SEG2

COM9/SEG1

COM8/SEG0

COM7

V

SS

P00/P0LI

P01/P0LI

SEG62/SNO9

/SGIN9

SEG61/SNO10

/SGIN10

P02/P0LI

SEG60/SNO11

/SGIN11

P03/P0LI

SEG59/SNO12

/SGIN12

P04/P0HLI

P05/P0HLI

P06/T0PWML

SEG58/SNO13

/SGIN13

SEG57/SNO14

/SGIN14

SEG56/SNO15

/SGIN15

COM6

21

22

23

24

25

26

27

28

29

30

P07/T0PWMH

P10/SI0O

P11/SI0IO

P12/SI0CLK

P13/T3OL

P14/T3OH

P15

51

52

53

54

55

56

57

58

59

60

SEG55

81

82

83

84

85

86

87

88

89

90

SEG26

SEG25

SEG24

SEG23

SEG22

SEG21

SEG20

SEG19

SEG18

SEG17

111

112

113

114

115

116

117

118

119

120

COM5

COM4

COM3

COM2

COM1

COM0

SEG54

SEG53

SEG52

SEG51

SEG50

SEG49

SEG48

SEG47

SEG46

LCDV

0

SS

P16/U2RX

P17/U2TX

CUP00

CUP01

No.A1228-9/25

LC88F83B0A

System Block Diagram

RESB

TST

Interrupt control

System control

Standby control

X’tal

IR

XT1

XT2

CF1

OSC0

ROM

RC

CF

RC

(128K×8bit)

OSC1

CF2

Internal RC

PC

Base timer

RAM

WD timer

(4K×8bit)

LCD display RAM

PSW

ALU

72×16bit

SEG

0 to 71

LCD segment

driver

72 terminals

SEG

71 to 56

R0 to R15

(I/O 16 terminals)

Common driver

16 terminals

COM

0 to 15

Timer 0

Timer 1

Timer 3

Timer 4

Timer 5

CUP00, 01

LCD power supply

V

1 to 4

LCD

I/O Port

P00 to 07

UART2

SIO0

P10 to 17

P20 to 23

I/O Port

(ADC 4 terminals)

On-chip debugger

No.A1228-10/25

LC88F83B0A

Pin Description

Pin Name

I/O

Description

V

-

+ power supply pin

- power supply pin

DD

V

SS

V

1 to 4

LCD bias power port (capacitor connection port)

LCD power supply pin

LCD

LCDV 0,

SS

LCDV

1

SS

CUP00, 01

-

I

Switching pin for generating LCD driving voltage

Connect capacitor between both ports.

OSC0

XT1

XT2

CF1

CF2

Oscillator circuit for system clock (low speed)

• 32.768kHz crystal oscillator and capacitor for oscillation connection

• XT1: Resistor connection for RC oscillation (RC model)

O

I

OSC1

Oscillator circuit for system clock (high speed)

• Ceramic oscillator and capacitor for oscillator connection

• CF1: Resistance connection for RC oscillator (RC model)

O

I/O

PORT 0

• 8-bit I/O port

P00 to P07

• I/O specifiable in 1-bit units

• Shared pins

P00 to P05 : Interrupt function

P06: Timer 0 PWML output

P07: Timer 0 PWMH output

• 8-bit I/O port

PORT 1

I/O

P10 to P17

• I/O specifiable in 1-bit units

• Shared pins

P10: SIO0 data output

P11: SIO0 data input/Bus I/O

P12: SIO0 Clock I/O

P13: Timer 3 PWML output

P14: Timer 3 PWMH output

P16: UART 2 receive

P17: UART 2 send

PORT 2

I/O

• 4-bit I/O port

P20 to P23

• I/O specifiable in 1-bit units

P20 to P23: AD converter input ports (AN0 to AN3)

• Shared pins

P20: Timer 4 output

P21: Timer 5 output

COM0 to COM7

O

• LCD common output port

COM8/SEG0 to

COM15/SEG7

SEG8 to SEG55

• LCD common output port/segment output port

common output/segment output is switched according to the register.

• LCD segment output port

O

SEG56 to SEG71

I/O

• LCD segment output port

• SEG71 to SEG56: General purpose Nch OD output/General purpose input

SEG71 to SEG56 can switch LCD output, a general-purpose Nch OD output, and a general-purpose input

(every 4 bits).

• SEG71 to SEG64: Interrupt function (every 4 bits)

Selecting sampling frequency for chattering removal (every 4 bits)

Level/edge selection (every 4 bits)

Hi/Low level or rise/fall selection (every 1 bit)

• SEG71 to SEG70: Timer 3 external input

• Input terminal for system initialization

RESB

TST

I

It operates reset by the “LOW” input.

with pull-up resistor

I/O

• TEST pin

• On-chip debugger communication terminal

Used with pull-down or V

SS

*Connect 100kΩ between this pin and V

SS

when on-chip debugger is used.

No.A1228-11/25

LC88F83B0A

Application circuit

LCD panel 64×16/72×8

CUP01

CUP00

C1

P00

P01

P02

P03

P04

P05

P06

P07

I/O

C2

C3

V

LCD

V

LCD

4

3

C4

C5

V

LCD

V

LCD

2

1

LC88F83B0A

P10 (SIO0-OUT)

P11 (SIO0-IN)

P12 (SIO0-CLK)

P13

P14

P15

I/O

2.3V to 5.5V

V

DD

+

P16 (UART2-RX)

P17 (UART2-TX)

UART device

Pulse output

RESB

C

DEN

C

RES

P20

P21

P22

P23

I/O

V

SS

0

1

LCDV

SS

LCDV

On-chip

debugger

TST

R

TST

*1: Crystal oscillation

*2: Internal RC oscillation

*3: Ceramic oscillation

X'tal

CF

C

GC

*3

C

*1

GX

C

DC

C

DX

C

R

CR1

C

R

CR0

CR1

CR0

*4

*5

X'tal

Crystal oscillator

C

Trimmer capacitor

GX

C

Capacitance for X’tal

DX

R

Resistor for low-speed oscillation

*4: RC oscillation specification

CR0

C

Capacitor for low-speed oscillation *4: RC oscillation specification (**1)

0.1μF capacitor is recommended when using XT1/XT2 as a system clock.

Ceramic oscillator

CR0

(**1)

CF

C

Capacitance for CF

GC

C

Capacitance for CF

DC

R

Resistor for high-speed oscillation *5: RC oscillation specification

Capacitor for high-speed oscillation *5: RC oscillation specification

Capacitor

CR1

C

CR1

C1 to C5

C

Electrolytic capacitor

DEN

C

Capacitance for RESB

RES

R

Resister when on-chip debugger is used

TST

No.A1228-12/25

LC88F83B0A

Absolute Maximum Ratings at Ta = 25°C, V = LCDV 0 = LCDV 1 = 0V

SS

Specification

Parameter

Symbol

Pin/Remarks

Conditions

V

[V]

min

typ max

unit

DD

Maximum supply

voltage

V

max

V

DD

-0.3

+6.5

LCD supply

voltage

max

2 to V 4

LCD LCD

LCD

DD

-0.3

LCD maximum

supply voltage

Input voltage

LCD max

SEG0 to SEG71

, V

4

V

DD LCD

-0.3

+6.5

+0.3

COM0 to COM15

RESB, XT1, CF1

V (1)

I

V

DD

Input/output

voltage

V

(1)

PORT 0, 1, 2

SEG71 to SEG56

PORT0, 2

IO

DD

Peak output

current

IOPH(1)

IOPH(2)

IOMH(1)

IOMH(2)

CMOS output selected

Current at each pin

CMOS output selected

Current at each pin

CMOS output selected

Current at each pin

CMOS output selected

Current at each pin

Total of all pins

-5

-14

-3

PORT1

Mean output

current

PORT0, 2

PORT1

(Note 1-1)

-9

Total output

current

ΣIOAH(1)

ΣIOAH(2)

ΣIOAH(3)

IOPL(1)

PORT0, 2

PORT1

22.5

25

Total of all pins

PORT 0, 1, 2

PORT0, 2

PORT1

Total of all pins

47.5

mA

Peak output

current

Current at each pin

13

17

IOPL(2)

Mean output

current

IOML(1)

IOML(2)

PORT0, 2

PORT1

7.5

10.5

35

(Note 1-1)

Total output

current

ΣIOAL(1)

ΣIOAL(2)

ΣIOAL(3)

Pd max

Topg

PORT0, 2

Total of all pins

Ta=-20 to +75°C

PORT1

60

80

PORT 0, 1, 2

TQFP120(14×14)

Allowable power

dissipation

250

75

mW

Operating ambient

temperature

-20

-65

°C

Storage ambient

temperature

Tstg

125

Note 1-1: The mean output current is a mean value measured over 100ms.

Note: We assume that the measurements for the allowable operating ranges and electrical characteristics described in

this document are performed with the chip mounted in a package.

Although this product is shipped in chip form, the characteristic values listed in this document are measured with

this IC mounted on a SANYO-designated package at operating ambient temperature range of -20°C to +70°C.

The specifications of this product in package form or in chip forms are basically identical, however, the

characteristics of the product in chip form may vary depending on the board on which the product is mounted, the

bonding pressure, and the type of mold resin used.

No.A1228-13/25

LC88F83B0A

Allowable Operating Conditions at Ta = -20°C to +75°C, V = LCDV 0 = LCDV 1 = 0V

SS

Ratings

Parameter

Symbol

Conditions

/Remarks

V

[V]

min

typ

max

5.5

unit

DD

Operating

V

(1)

V

0.238μs≤tCYC≤100μs

0.476μs≤tCYC≤100μs

0.909μs≤tCYC≤100μs

2.6

2.4

2.3

DD

supply voltage

(Note2-1)

5.5

LCD drive

voltage

V

(1)

V

2 to V 4

LCD

5.5

Memory

VHD

RAM and register contents

sustained in HOLD mode.

DD

sustaining

supply voltage

High level

input voltage

2.0

DD

5.5

V

(1)

Port 0, 1

Output disabled

Crystal oscillation

0.30V

IH

V

DD

+0.70

V

(2)

RESB

0.75V

IH

DD

Low level

(1)

Port 0, 1

0.10V

IL

V

SS

input voltage

+0.40

V

(2)

RESB

V

0.25V

IL

DD

Oscillating

frequency

range

FOSC0

XT1, XT2

2.3 to 5.5

32.768

Low speed RC oscillation

(Note2-2)

30

80

(Note2-3)

FOSC1

CF1, CF2

Ceramic oscillation

2.4 to 5.5

2.3 to 5.5

400

4200

1100

kHz

High-speed RC oscillation

(Note2-2)

FINTRC

Internal RC oscillation

1000

Note2-1: V

must be held greater than or equal to 2.7V in the flash ROM onboard programming mode.

DD

Note2-2: Ta=0°C to 60°C

Note2-3: The parts value of oscillation circuit is shown in table 1 and table 2.

No.A1228-14/25

LC88F83B0A

Electrical Characteristics at Ta = -20°C to +75°C, V = LCDV 0 = LCDV 1 = 0V

SS

Specification

Parameter

Symbol

Pin/Remarks

Conditions

V

[V]

min

typ

max

unit

DD

High level input

current

I

(1)

PORT 0, 1, 2

Output disabled

Pull-up resister OFF

=V

IH

V

2.7 to 5.5

1

IN DD

(including OFF state leak

current of the output Tr.)

I

(2)

IH

RESB

V

=V

IN DD

Low level input

current

(1)

PORT 0, 1, 2

Output disabled

IL

Pull-up resister OFF

μA

V

=V

-1

IN SS

(including OFF state leak

current of the output Tr.)

Output disabled

I

(2)

(3)

(4)

(5)

PORT 0, 1, 2

RESB

4.5 to 5.5

2.7 to 3.0

4.5 to 5.5

-117

-31

-25

-5.8

-3.7

IL

Pull-up resister ON

V

=V

IN SS

-10.2

(including OFF state leak

current of the output Tr.)

2.7 to 3.0

-6.3

-2.4

High level output

current

I

(1)

(2)

(3)

(4)

CMOS output mode

PORT0, 2

V

(1)=V -1.0V

OH DD

4.5 to 5.5

2.7 to 3.0

4.5 to 5.5

2.7 to 3.0

4.5 to 5.5

2.7 to 3.0

4.5 to 5.5

2.7 to 3.0

4.5 to 5.5

2.7 to 3.0

-3.7

-1.6

-10

OH

CMOS output mode

PORT1

-4.5

Low level output

current

(1)

(2)

(3)

(4)

(5)

(6)

(5)

PORT0, 2

V

(1)=V +1.0V

SS

10

4.4

OL

mA

PORT1

14.5

6.5

SEG71 to SEG56

COM0 to COM15

SEG0 to SEG71

0.5

Common output

current

V

(2)=V 4-0.05V

LCD

-25

-10

OH

2.7 to 5.5

μA

(7)

(2)=V +0.05V

SS

25

10

OL

Segment output

current

(6)

(2)=V 4-0.05V

LCD

OH

(8)

OL

(2)=V +0.05V

OL SS

Hysterisis voltage

Pin capacitance

VHYS(1)

PORT 0, 1, 2

RESB

2.7 to 5.5

0.1V

V

DD

CP

All pins

For pins other than that

under test: V =V

IN SS

f=1MHz

10

pF

Ta=25°C

No.A1228-15/25

LC88F83B0A

LCD Drive Voltage at Ta = -20°C to +75°C, V = LCDV 0 = LCDV 1 = 0V

SS

LCD

SS

LCD

SS

LCD

Special notes: 0.1μF capacitor must be connected to V

1, V

2, V

3, and V

4. (with no panel load)

LCD

Specification

Parameter

Symbol

Pin/Remarks

Conditions

V

[V]

min

typ

max

unit

DD

LCD drive voltage

V

1

V

Contrast “00”

1.030

1.045

1.060

1.075

1.090

1.105

1.120

1.135

1.150

1.165

1.180

1.195

1.210

1.225

1.240

1.255

LCD

DD

1

LCD

Contrast “01”

Contrast “02”

Contrast “03”

Contrast “04”

Contrast “05”

Contrast “06”

Contrast “07”

Contrast “08”

Contrast “09”

Contrast “10”

Contrast “11”

Contrast “12”

Contrast “13”

Contrast “14”

Contrast “15”

Typ

×0.88

×1.10

2.4 to 5.5

V

2

3

4

2×V

1

LCD

3×V

4×V

No.A1228-16/25

LC88F83B0A

Serial I/O Characteristics at Ta = -20°C to +75°C, V = LCDV 0 = LCDV 1 = 0V

SS

1. SIO0 Serial I/O Characteristics (Wake-up function is not in use) (Note 4-1-1)

Specification

Parameter

Frequency

Symbol

tSCK(1)

Pin/Remarks

SCK0(P12)

Conditions

See Fig. 6.

V

[V]

min

typ

max

unit

DD

4

2

Low level

tSCKL(1)

tSCKH(1)

tSCKHA(1)

pulse width

High level

pulse width

Automatic communication

mode

2.3 to 5.5

6

tCYC

See Fig. 6.

tSCKHBSY(1a)

tSCKHBSY(1b)

Automatic communication

mode

23

See Fig. 6.

Excluding Automatic

communication mode

See Fig. 6.

4

Frequency

tSCK(2)

SCK0(P12)

CMOS output selected

See Fig. 6.

Low level

tSCKL(2)

tSCKH(2)

tSCKHA(2)

1/2

pulse width

High level

pulse width

tSCK

Automatic communication

mode

6

2.3 to 5.5

CMOS output selected

See Fig. 6.

tSCKHBSY(2a)

Automatic communication

mode

tCYC

4

23

CMOS output selected

See Fig. 6.

tSCKHBSY(2b)

tsDI(1)

Excluding automatic

communication mode

See Fig. 6.

Data setup time

Data hold time

SI0(P11),

SB0(P11)

Must be specified with respect

to rising edge of SIOCLK.

See Fig. 6.

0.03

2.3 to 5.5

thDI(1)

Output

tdD0(1)

SO0(P10),

SB0(P11)

(Note4-1-2)

delay time

μs

1tCYC

+0.05

2.3 to 5.5

tdDO(2)

1tCYC

+0.05

Note 4-1-1: These specifications are theoretical values. Add margin depending on its use.

Note 4-1-2: Must be specified with respect to falling edge of SIOCLK. Must be specified as the time to the beginning of

output state change in open drain output mode. See Fig.6.

No.A1228-17/25

LC88F83B0A

2. SIO1 Serial I/O Characteristics (Wake-up function is not in use) (Note 4-2-1)

Specification

typ max

Parameter

Frequency

Symbol

tSCK(3)

Pin/Remarks

SCK0(P12)

Conditions

See Fig. 6.

V

[V]

min

unit

DD

2

1

2

Low level

tSCKL(3)

tSCKH(3)

tSCKHBSY(3)

tsDI(2)

pulse width

High level

pulse width

2.3 to 5.5

tCYC

Data setup time

Data hold time

SI0(P11),

SB0(P11)

Must be specified with respect

to rising edge of SIOCLK.

See Fig. 6.

0.03

2.3 to 5.5

thDI(2)

tdD0(3)

μs

Output

SO0(P10),

SB0(P11)

(Note4-2-2)

delay time

1tCYC

+0.05

2.3 to 5.5

Note 4-2-1: These specifications are theoretical values. Add margin depending on its use.

Note 4-2-2: Must be specified with respect to falling edge of SIOCLK. Must be specified as the time to the beginning of

output state change in open drain output mode. See Fig.6.

UART2 Operating Conditions at Ta = -20 to +75°C, V = LCDV 0 = LCDV 1 = 0V

SS

Specification

Parameter

Symbol

Pin/Remarks

Conditions

V

[V]

min

typ

max

4096

unit

DD

Transfer rate

UBR2

URX2(P16),

UTX2(P17)

2.3 to 5.5

8

tCYC

Pulse Input Conditions at Ta = -20 to +75°C, V = LCDV 0 = LCDV 1 = 0V

SS

Specification

Parameter

Symbol

Pin/Remarks

Conditions

V

[V]

min

50

typ max

unit

DD

High/low level

pulse width

tPIL(1)

RESB

Resetting is enabled.

2.3 to 5.5

μs

No.A1228-18/25

LC88F83B0A

AD Converter Characteristics at V = LCDV 0 = LCDV 1 = 0V

SS

<12-bits AD Converter Mode/Ta= -10°C to +75°C>

Specification

typ max

12

Parameter

Symbol

Pin/Remarks

Conditions

V

[V]

min

unit

bit

DD

Resolution

N

AN0(SEG71)

to

2.9 to 5.5

Absolute accuracy

Conversion time

ET

(Note7-1)

16

LSB

AN3(SEG68)

TCAD

See Conversion time calculation

formulas. (Note7-2)

2.9 to 5.5

90

130

μs

Analog input

voltage range

Analog ports input

current

VAIN

V

SS

DD

IAINH

IAINL

VAIN=V

DD

2.9 to 5.5

1

μA

VAIN=V

SS

-1

<8-bits AD Converter Mode/Ta= -10°C to +75°C >

Specification

typ max

Parameter

Symbol

Pin/Remarks

Conditions

V

[V]

min

unit

bit

DD

Resolution

N

AN0(SEG71)

to

2.9 to 5.5

8

Absolute accuracy

Conversion time

ET

(Note7-1)

1.5

75

LSB

AN3(SEG68)

TCAD

See Conversion time calculation

formulas. (Note7-2)

2.9 to 5.5

55

μs

Analog input

voltage range

Analog ports input

current

VAIN

V

SS

DD

IAINH

IAINL

VAIN=V

DD

2.9 to 5.5

1

μA

VAIN=V

SS

-1

12-bits AD Converter Mode: TCAD (Conversion time) = ((52/(Division ratio))+2) × tCYC

8-bits AD Converter Mode: TCAD (Conversion time) = ((32/(Division ratio))+2) × tCYC

External

Operating Supply

System Division

AD Conversion Time (TCAD)[μs]

Cycle Time

tCYC [ns]

AD Division Ratio

(ADDIV)

Oscillator

Voltage Range

Ratio

12-bit AD

8-bit AD

FmCF[MHz]

V

[V]

(SYSDIV)

DD

1/1

1/2

250

500

1/8

1/4

104.5

105.0

64.5

65.0

CF-4

2.9 to 4.0

Note 7-1: The quantization error ( 1/2LSB) must be excluded from the absolute accuracy. The absolute accuracy must

be measured in the microcontroller's state in which no I/O operations occur at the pins adjacent to the analog

input channel.

Note 7-2: The conversion time refers to the period from the time an instruction for starting a conversion process till the

time the conversion results register(s) are loaded with a complete digital conversion value corresponding to

the analog input value.

The conversion time is 2 times the normal-time conversion time when:

• The first AD conversion is performed in the 12-bit AD conversion mode after a system reset.

• The first AD conversion is performed after the AD conversion mode is switched from 8-bit to 12-bit

conversion mode.

No.A1228-19/25

LC88F83B0A

Consumption Current Characteristics at Ta = -20 to +75

°

C, V = LCDV 0 = LCDV 1 = 0V

SS

Specification

Pin/

Parameter

Symbol

Conditions

Remarks

V

[V]

min

typ max

unit

DD

Consumption

current during

normal

IDDOP(1)

V

Crystal oscillation mode

LCD

DD

2.4 to 5.5

2.4 to 3.6

2.3 to 5.5

2.3 to 3.6

70

150

• FOSC0=32.768kHz

Display

ON

• System clock: FOSC0

• Internal RC oscillation stopped

• FOSC1=0Hz (Oscillation stop)

• 1/1frequency division ratio.

[No panel load]

IDDOP(2)

IDDOP(3)

IDDOP(4)

IDDOP(5)

50

70

40

80

120

70

operation

(Note 8-1)

LCD

Display

OFF

Ceramic oscillation mode

• FOSC1=4MHz

2.4 to5.5

2.4 to 3.6

2.3 to 5.5

2.3 to3.6

3000

2200

1900

1200

4100

2900

3000

2000

• System clock: FOSC1

• Internal RC oscillation stopped

• FOSC0=0Hz (Oscillation stop)

• 1/2 frequency division ratio.

Internal RC oscillation mode

• System clock: Internal RC

• Internal RC oscillates

IDDOP(6)

IDDOP(7)

IDDOP(8)

IDDOP(9)

μA

• FOSC0=0Hz (Oscillation stop)

• FOSC1=0Hz (Oscillation stop)

• 1/1 frequency division ratio

High-speed RC oscillation mode

*Ta=0 to 60°C

2.3 to 5.5

2.3 to 3.6

2.3 to 5.5

2.3 to 3.6

1700

1200

110

70

2300

1700

170

• FOSC1=1MHz RCR1=470kΩ

• System clock: FOSC1

IDDOP(10)

• Internal RC oscillation stopped

• FOSC0=0Hz (Oscillation stop)

• 1/1 frequency division ratio.

Low-speed RC oscillation mode

*Ta=0 to 60°C

IDDOP(11)

IDDOP(12)

• FOSC0=64kHz RCR0=910kΩ

• System clock: FOSC0

• Internal RC oscillation stopped

• FOSC1=0Hz (Oscillation stop)

• 1/1 frequency division ratio.

110

Note 8-1: The consumption current value includes none of the currents that flow into the output Tr and internal pull-up

resistors.

Continued on next page.

No.A1228-20/25

LC88F83B0A

Continued from preceding page.

Specification

typ max

Pin/

Parameter

Symbol

Condition

Remarks

V

[V]

min

unit

DD

Consumption

current during

HALT mode

(Note 8-1)

IDDHALT(1)

V

HALT mode

LCD

DD

2.4 to 5.5

2.4 to 3.6

2.3 to 5.5

2.3 to 3.6

32

93

35

59

21

Crystal oscillation mode

• FOSC0=32.768kHz

Display

ON

IDDHALT(2)

IDDHALT(3)

IDDHALT(4)

IDDHALT(5)

15

22

6

• System clock: FOSC0

• Internal RC oscillation stopped

• FOSC1=0Hz (Oscillation stop)

• 1/1frequency division ratio.

[No panel load]

LCD

Display

OFF

HALT mode

Ceramic oscillation mode

• FOSC1=4MHz

2.4 to 5.5

2.4 to 3.6

2.3 to 5.5

2.3 to 3.6

700

300

400

200

1100

500

700

300

• System clock: FOSC1

• Internal RC oscillation stopped

• FOSC0=0Hz (Oscillation stop)

• 1/2 frequency division ratio.

HALT mode

IDDHALT(6)

IDDHALT(7)

IDDHALT(8)

IDDHALT(9)

Internal RC oscillation mode

• System clock: Internal RC

• Internal RC oscillates

• FOSC0=0Hz (Oscillation stop)

• FOSC1=0Hz (Oscillation stop)

• 1/1 frequency division ratio.

HALT mode

μA

High-speed RC oscillation mode

*Ta=0 to 60°C

2.3 to 5.5

2.3 to 3.6

2.3 to 5.5

2.3 to 3.6

200

100

20

400

200

50

• FOSC1=1MHz RCR1=470kΩ

• System clock: FOSC1

• Internal RC oscillation stopped

• FOSC0=0Hz (Oscillation stop)

• 1/1 frequency division ratio.

HALT mode

IDDHALT(10)

IDDHALT(11)

IDDHALT(12)

IDDHOLD(1)

Low-speed RC oscillation mode

*Ta=0 to 60°C

• FOSC0=64kHz RCR0=910kΩ

• System clock: FOSC0

• Internal RC oscillation stopped

• FOSC1=0Hz (Oscillation stop)

• 1/1 frequency division ratio.

HOLD mode

10

30

Consumption

current during

HOLD mode

Consumption

current during

clock HOLD

mode

V

DD

2.3 to 5.5

2.3 to 3.6

12

5

• CF1=V

DD

or OPEN (External clock mode)

IDDHOLD(2)

IDDHOLD(3)

Clock HOLD mode

• CF1=V or OPEN (External clock mode)

DD

2.3 to 5.5

2.3 to 3.6

16

3

55

16

DD

• FmX’tal=32.768kHz crystal oscillation

IDDHOLD(4)

mode

Note 8-1: The consumption current value includes none of the currents that flow into the output Tr and internal pull-up

resistors.

F-ROM Programming Characteristics at Ta = +10

°

C to +55

°

C, V = LCDV 0 = LCDV 1 = 0V

SS SS SS

Specification

Pin/

Parameter

Symbol

Conditions

Remarks

V

[V]

min

typ

max

unit

mA

DD

Onboard

IDDFW(1)

V

The consumption current of the

microcomputer is excluded.

DD

programming

current

2.7 to 5.5

5

10

Programming

time

tFW(1)

tFW(2)

Erasing time: 128 bytes

2.7 to 5.5

20

40

30

60

ms

Programming time: 2 bytes

μs

No.A1228-21/25

LC88F83B0A

Characteristics of a Sample OSC1 System Clock Oscillation Circuit

Given below are the characteristics of a sample OSC1 system clock oscillation circuit that are measured using a

SANYO-designated oscillation characteristics evaluation board and external components with circuit constant values

with which the oscillator vendor confirmed normal and stable oscillation.

Table 1 Characteristics of a Sample OSC1 System Clock Oscillator Circuit with a Ceramic Oscillator

Operating

Voltage

Range

[V]

Oscillation

Circuit Constant

Nominal

Vendor

Name

Oscillator

Name

Stabilization Time

Remarks

Frequency

C1

C2

Rf1

Rd1

typ

max

[ms]

[pF]

[Ω]

[ms]

CSTCR4M00G53-R0

CSTLS4M00G53-B0

CSTCR4M00G53-R0

CSTLS4M00G53-B0

(15)

OPEN

0

2.4 to 5.5

0.1

0.5

4.194MHz

4.000MHz

MURATA

Internal C1,C2

The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after the

following reference timing points: (See Figure 4)

• V

goes above the operating voltage lower limit.

DD

• An instruction for starting the OSC1 clock oscillator circuit is executed.

• Oscillation starts after the microcontroller exits the X'tal HOLD mode with the ENOSC1 bit (OCR0 register, bit 1)

set to 1.

Characteristics of a Sample OSC0 System Clock Oscillator Circuit

Given below are the characteristics of a sample OSC0 system clock oscillation circuit that are measured using a

SANYO-designated oscillation characteristics evaluation board and external components with circuit constant values

with which the oscillator vendor confirmed normal and stable oscillation.

Table 2 Characteristics of a Sample OSC0 System Clock Oscillator Circuit with a CF Oscillator

Operating

Voltage

Range

[V]

Oscillation

Circuit Constant

Nominal

Stabilization Time

Vendor Name

Oscillator Name

Remarks

Frequency

C3

C4

Rf2

Rd2

typ

[s]

max

[s]

[pF]

[Ω]

Applicable

CL value=12.5pF

SMD-type

EPSON

32.768kHz

MC-306

18

OPEN

390k

2.3 to 5.5

1.3

3.0

TOYOCOM

The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after the

instruction for starting the OSC0 clock oscillation circuit is executed. (See Figure 4)

Note: The components that are involved in oscillation should be placed as close to the IC and to one another as possible

because they are vulnerable to the influences of the circuit pattern.

Rf2

Rf1

CF1

CF2

XT1

XT2

Rd1

Rd2

C1

C2

C3

C4

CF

X’tal

Figure 1 CF Oscillator Circuit

Figure 2 XT Oscillator Circuit

0.5V

DD

Figure 3 AC Timing Measurement Point

No.A1228-22/25

LC88F83B0A

V

DD

Power supply

Operating V

lower limit

DD

0V

Reset time

RESB

Internal RC

oscillation

tmsCF

CF1, CF2

XT1, XT2

tmsX’tal

Operating

mode

Unpredictable

Reset

Instruction execution

Reset Time and Oscillation Stabilization Time

HOLD reset signal

absent

HOLD reset signal valid

HOLD reset

signal

Internal RC

oscillation

tmsCF

CF1, CF2

tmsX’tal

XT1, XT2

State

HOLD

HALT

HOLD Reset Signal and Oscillation Stabilization Time

Figure 4 Oscillation Stabilization Time

No.A1228-23/25

LC88F83B0A

V

DD

R

C

Note:

Select C

RES

and R values to assure that at

RES

least 50μs reset time is provided after the V

becomes higher than the minimum operating

voltage.

DD

RESB

RES

Figure 5 Reset Circuit

tSCKHBSY

RUN:

SIOCLK:

DATAIN:

DI0

DI1

DI6

DI7

DI8

DIx

DATAOUT:

DO0

tdDO

DO1

DO6

DO7

DO8

DOx

Data RAM transfer period

(SIO0 only)

tSCK

SIOCLK:

DATAIN:

tSCKL

tSCKH

thDI

tsDI

DATAOUT:

Data RAM transfer period

(SIO0 only)

SIOCLK:

DATAIN:

tSCKL

tSCKHA

thDI

tsDI

DATAOUT:

*: Remarks: DIx and DOx are the final communication bits. X = 0 to 32768

Figure 6 Serial I/O Waveforms

tPIL

tPIH

Figure 7 Pulse Input Timing Signal Waveform

No.A1228-24/25

LC88F83B0A

Note: The oscillation frequency changes with the board pattern and used parts when OSC1 and OSC0 are used as the

RC oscillation. It also greatly depends on the product shape (chip and plastic package) and the board capacitance,

and it is recommended to evaluate the resistor value with an actual product. Use the following characteristics as

only for a reference.

Frequency - Resistor

10

1000

Ta=25°C, typ

7

5

3

2

3

2

1.0

100

7

5

7

5

3

2

3

2

0.1

10

0

200

400

600

800

1000

1200

0

200

400

600

800

1000

1200

Resistor - kΩ

ILC05650

Resistor - kΩ

ILC05651

Figure 8 Characteristics of Resistor v.s. Frequency of OSC1

Figure 9 Characteristics of Resistor v.s. Frequency of OSC0

SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using

products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition

ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.

products described or contained herein.

SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all

semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or

malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise

to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt

safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not

limited to protective circuits and error prevention circuits for safe design, redundant design, and structural

design.

In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are

controlled under any of applicable local export control laws and regulations, such products may require the

export license from the authorities concerned in accordance with the above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or

mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,

without the prior written consent of SANYO Semiconductor Co.,Ltd.

Any and all information described or contained herein are subject to change without notice due to

product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the

SANYO Semiconductor Co.,Ltd. product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed

for volume production.

Upon using the technical information or products described herein, neither warranty nor license shall be granted

with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third

party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's

intellectual property rights which has resulted from the use of the technical information and products mentioned

above.

This catalog provides information as of March, 2011. Specifications and information herein are subject

to change without notice.

No.A1228-25/25

PS


型号：	LC88F58B0A
厂家：	SANYO SEMICON DEVICE
描述：	FROM 128K byte, RAM 4096K byte on-chip 16-bit 1-chip Microcontroller 从128K字节， RAM 4096K字节的片上16位单芯片微控制器微控制器
文件：	总25页 (文件大小：155K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LC88F58B0A [SANYO]

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