S1F75300M0A0 [SEIKO]

0.1A SWITCHING CONTROLLER, 155kHz SWITCHING FREQ-MAX, PDSO20, SSOP1-20;


型号：	S1F75300M0A0
厂家：	SEIKO EPSON CORPORATION
描述：	0.1A SWITCHING CONTROLLER, 155kHz SWITCHING FREQ-MAX, PDSO20, SSOP1-20 开关光电二极管
文件：	总14页 (文件大小：96K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MF302-12

S1F75300 Technical Manual

S1F75300 Series Step-up Switching Regulator With

Built-in Voltage Follower

DESCRIPTION

FEATURES

S1F75300 is a highly efficient and low power consump-

tion step-up switching regulator with built-in voltage

follower developed by using CMOS silicon gate pro-

cessor. (For boosting, the external coil is used.)

The output voltage is adjustable with the 8-bit elec-

tronic volume.

• Boosting efficiency

: 80%

• Low current consumption : Typ.200µA

(without load)

• Output voltage (step-up output)

: 30V Max., adjustable

with the electronic vol-

ume.

This IC is optimum to power supply portions of me-

dium and small liquid crystal panels for which high effi-

ciency is requested.

• Optimum to small and medium liquid crystal panels

Input voltage : 2.7V to 5.5V

Output voltage : to 27V

• Reduction of current consumption at the time of

standby with power-off function

LINE UP

Amplified

output

voltage

Voltage

at VO2 pin

Temperature coefficient Voltage follower

Product

at VO2 pin

duty

S1F75300M0A0

S1F75300M0B0

25V

27V

22V

24V

–0.06%/˚C

1/160

1/240

S1F70000 Series

Technical Manual

EPSON

5–1

S1F75300 Series

BLOCK DIAGRAM

VSW

VO1

VDD

VSS

PWM control

circuit

VSS2

VO2

VREF

ROSC

CLK

DATA

Electronic

volume portion

LATCH

VOL

Figure 1 Block Diagram of S1F75300

5–2

EPSON

S1F70000 Series

Technical Manual

S1F75300 Series

PIN DESCRIPTIONS

Pin No.

Pin name

Description

DATA

CLK

Data input pin for adjusting electronic volume bias

Clock input pin for adjusting electronic volume bias

Data latch input pin for adjusting electronic volume bias

No connection

LATCH

4,9,16

5,8

VSS, VSS2

ROSC

GND pin

External resistance connection pin for adjusting oscillation current

Enable pin.

HIGH : Normal operation, LOW : System operation stop

VSW

External inductance drive pin

Liquid crystal drive voltage pin 4

Liquid crystal drive voltage pin 3

Liquid crystal drive voltage pin 2

Liquid crystal drive voltage pin 1

Liquid crystal drive voltage pin 0

Output voltage pin

VO2

VO1

VOL

VDD

Output voltage monitor pin

Output voltage external adjustment pin

Power supply pin

PIN ASSIGNMENTS

SSOP1-20pin

DATA

CLK

LATCH

VDD

VOL

VO1

VO2

OSC

SS2

Figure 2 Pin Assignments

S1F70000 Series

Technical Manual

EPSON

5–3

S1F75300 Series

FUNCTIONAL DESCRIPTIONS

Switching Regulator Portion

Operation of Basic Boosting Circuit

S1F75300 boosts using clock pulses generated in the PWM control circuit. Figure 3 shows the block diagram for

explaining the principle of operation of the boosting circuit. This circuit stores energy in the inductance L when the

switching transistor (Tr1) is on and can charge the capacitor C with the stored energy by passing it through the diode

D for output when the switching transistor is off.

VO1

VDD

Tr1

PWM

control circuit

VDD

ROSC

VSS/VSS2

Figure 3 Block Diagram of Boosting Circuit

5–4

EPSON

S1F70000 Series

Technical Manual

S1F75300 Series

Reference Voltage Generator, Output Voltage

Setting Stabilizing Circuit

• Reference Voltage Generator, Output Voltage Set-

ting Stabilizing Circuit

The output voltage setting stabilizing circuit outputs the

stabilized voltage VO2 after receiving a boosted volt-

age. The output voltage VO2 can be set to a specified

voltage when the position of Point A on the intermedi-

ate tap of the resistor connected between the pin VO2

and the pin GND as shown in Figure 4 is changed.

The variable resistor in Figure 4 has the function of

electronic volume and can change the output VO2 as the

resistance value is changed as mentioned in Paragraph

5.1.3.

The reference voltage generator is for generating stabi-

lized voltage (reference voltage) not depending on input

voltage necessary for the output voltage setting stabiliz-

ing circuit or the voltage detection circuit.

The reference voltage generator has a built-in tempera-

ture characteristic compensation circuit. For the tem-

perature characteristic, any one temperature character-

istics can be selected out of four temperature character-

istics in the range from –0.18%/°C to –0.06%/°C. (Se-

lection with Mask Option.

VO1

VDD

VREF

VSW

Tr1

ROSC

VSS/VSS2

VOL

Figure 4 Stabilizing Circuit

Note

• Output Voltage External Adjustment Pin (VOL)

The voltage VO2 boosted and stabilized with the output

voltage setting stabilizing circuit can slightly adjust out-

put voltages when an external resistor is connected to

the output voltage external adjustment pin VOL as

shown in Figure 10 in Chapter 7, Example of External

Connection.

In the practical boosting state, a ripple voltage is super-

imposing the output setting voltage set as mentioned

above. Since this ripple voltage is affected by appli-

cable external parts and loading conditions, set the

value of the coil through which the load current passes

and check it before use.

S1F70000 Series

Technical Manual

EPSON

5–5

S1F75300 Series

Electronic Volume Portion

S1F75300 has a built-in 8-bit shift register and a built-in

8-bit latch so that it can vary the voltage VO2 when se-

rial data is input. The 8-bit latch enables to vary the

output voltage VO2. Data taken in the shift register is

taken in the 8-bit latch as a synchronous strobe is input.

The following shows the block diagram and the timing

chart.

DATA : Serial data input pin for setting output volt-

age and bias value.

"Data 1" is input at the High level and "Data

0" is input at the Low level. Data are input to

(LSB) and (MSB) in this order.

CLK

: Clock input to shift register pin

When the clock starts, data at the DATA pin

is taken in the shift register. Data to be taken

in shift one after another for every clock. So,

data input last becomes valid.

LATCH : Latch signal input pin

When latch signal is set to High the content

of the shift register is taken in the 8-bit latch.

DATA

8-bit shift register

CLK

LATCH

8-bit latch

Electronic volume

Figure 5-1 Block Diagram

5–6

EPSON

S1F70000 Series

Technical Manual

S1F75300 Series

DATA

D0 D1 D2 D3 D4 D5 D6 D7

CLOCK

LATCH

Figure 5-2 Timing Chart of 8-bit Latch Portion

Table 1 List of Electronic Volume Set Points

Electronic volume value

····················

127

····················

128

····················

255

S1F70000 Series

Technical Manual

EPSON

5–7

S1F75300 Series

Voltage Follower Portion

The voltage follower portion of S1F75300 enables to adjust bias with the electronic volume as explained in Para-

graph 5.1.3.

Figure 6 shows the block diagram of the voltage follower portion.

After the power is turned on, the resistance between V2 and V3 is set to nR. (The n value is selected optionally.)

When n is 11 and 13 for example, the voltages at V1 to V4 are as follows after the power is turned on:

Table 2 Output Voltage of Voltage Follower

n=11

n=13

(1/160 duty)

(1/240 duty)

13/14•V0

12/14•V0

2/14•V0

1/14•V0

16/17•V0

2/17•V0

1/17•V0

Figure 6 Block Diagram of Voltage Follower

EN Pin

This pin is for boosting action and for stopping and starting the voltage follower portion.

When the EN pin is set to Low level, the internal circuit action stops and the current consumption is restrained.

5–8

EPSON

S1F70000 Series

Technical Manual

S1F75300 Series

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

(VSS = 0V, Ta=25°C)

Rating

Parameter

Symbol

Unit

Remarks

Min.

Max.

VSW pin voltage

VVSW

IVSW

VSS – 0.3

—

VSW pin current

100

Voltage of other pins

Allowable loss

VSS – 0.3

—

130

°C

Operating temperature

Storage temperature

Topr

Tstg

–30

–65

150

Soldering temperature

and time

Tsol

—

260 • 10

˚C • s

At leads

S1F70000 Series

Technical Manual

EPSON

5–9

S1F75300 Series

ELECTRICAL CHARACTERISTICS

Step-up Switching Regulator and Voltage Follower Portion

DC Characteristics

Rating

Parameter

Symbol

Unit

Conditions

Min.

2.7

—

Typ.

—

Max.

5.5

Input voltage

VDD

Amplified output voltage

Current consumption

—

IOPR

—

200

—

µA

VDD = 5.0V

Current consumption at

enable time

IEN

—

µA

Ω

Switching transistor

ON-state resistance

RSWON

Switching transistor

leak current

ISWQ

µA

Input stability

Load stability

∆VO1

—

0.5

—

%/V VO2=27V

VO2=27V, Ivout2=–10mA

—

–0.18

–0.15

–0.10

–0.06

150

—

Output voltage /

∆VO1

/∆Ta

%/°C

temperature coefficient

—

Oscillation frequency

Maximum duty ratio

FCLK

145

155

kHz

FDUTY

—

Resistance between

pins VOL and VSS

RVOL

—

256

kΩ

VO2 output current

Efficiency

IO2

—

Eff

5–10

EPSON

S1F70000 Series

Technical Manual

S1F75300 Series

Conditions

Rating

Typ.

Parameter

Symbol

Unit

Min.

Max.

IOH = 2mA,

V1 = No-load voltage

V1OH

V1OL

V2OH

V2OL

V3OH

V3OL

V4OH

V4OL

V1 + 70mV

—

V1 output current

IOL = –2mA,

V1 = No-load voltage

—

V2 + 50mV

—

V1 – 50mV

—

IOH = 2mA,

V2 = No-load voltage

V2 output current

V3 output current

V4 output current

IOL = –2mA,

V2 = No-load voltage

V2 – 70mV

—

IOH = 2mA,

V3 = No-load voltage

V3 + 70mV

—

IOL = –2mA,

V3 = No-load voltage

V3 – 50mV

—

IOH = 2mA,

V4 = No-load voltage

V4 + 50mV

—

IOL = –2mA,

V4 = No-load voltage

V4 – 70mV

S1F70000 Series

Technical Manual

EPSON

5–11

S1F75300 Series

Electronic Volume

DC Characteristics

Rating

Typ.

—

Parameter

Symbol

Unit

Conditions

Min.

Max.

Output voltage range

Electronic volume resolution

Linearity error

VO2

—

1/256

—

±1/2

—

LSB

High level input voltage

Low level input voltage

VIH

VIL

2.0

—

0.8

AC Characteristics

Rating

Typ.

—

Parameter

Symbol

Unit

Conditions

Min.

Max.

—

CLK cycle

tCLK

tCST

tCHT

tWLTC

tLST

µs

Data setup time

0.5

—

Data hold time

—

Latch pulse width

CLK power off → Latch start

Latch power off → CLK start

—

tLHT

—

Data

CST

CHT

CLK

WLTC

CLK

LST

LHT

Latch

Figure 8 Electronic Volume Portion AC Characteristic Timing Chart

5–12

EPSON

S1F70000 Series

Technical Manual

S1F75300 Series

EXAMPLE OF EXTERNAL CONNECTION

(1) Connection Example 1

Figure 9 shows an example of the basic circuit of S1F75300.

(2) Connection Example 2

Figure 10 shows a connection example for connecting a variable resistor to the VOL pin so as to adjust VO2.

(3) Connection Example 3

Figure 11 shows a connection example for connecting a temperature compensation circuit between pins VO2

and V0 so as to adjust temperature correction of voltage of the voltage follower portion with an external circuit.

Figure 12 shows an example of a temperature compensation circuit.

OSC

2,V3,V

SW/VSS2

Figure 9 Connection Example 1

Figure 10 Connection Example 2

VO1

Temperature

compensation

circuit

Thermistor

VSW

OSC

V1,V2,V3,V4

VOL

SW/VSS2

Figure 11 Connection Example 3

Figure 12 Example of Temperature

Compensation Circuit

S1F70000 Series

Technical Manual

EPSON

5–13

S1F75300 Series

EXAMPLE OF REFERENCE CIRCUIT

The figure below shows an example of connection of this IC and a liquid crystal display panel.

VO1

VDD

VSW

ROSC

VOL

VO2

Liquid crystal

display panel

V1,V2,V3,V4

VSS/VSS2

Figure 14 Example of Reference Circuit

5–14

EPSON

S1F70000 Series

Technical Manual

S1F75300M0A0 [SEIKO]

相关型号：

S1F75300M0B0

S1F75300M1A1000

S1F75300M1B1000

S1F75510

S1F75510M0A0

S1F75520D0A0000

S1F75520D5A0000

S1F75520F0A0000

S1F75520F5A0000

S1F76310M1A0

S1F76310M1B0

S1F76310M1K0