S1F76610M0B0 [SEIKO]
SWITCHED CAPACITOR REGULATOR, 30kHz SWITCHING FREQ-MAX, PDSO14, PLASTIC, SOP5-14;
| 型号： | S1F76610M0B0 |
| 厂家： | 
SEIKO EPSON CORPORATION |
| 描述： | SWITCHED CAPACITOR REGULATOR, 30kHz SWITCHING FREQ-MAX, PDSO14, PLASTIC, SOP5-14 开关 光电二极管 |
| 文件： | 总15页 (文件大小：155K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MF302 12
POWERSUPPLYIC
S1F76610 Technical Manual
S1F76610 Series
S1F76610 Series CMOS DC/DC Converter (Voltage
Doubler / Tripler) & Voltage Regulator
DESCRIPTION
• External shut-down control
The S1F76610 Series is a highly effecient CMOS DC/
DC converter for doubling or tripling an input voltage.
It incorporates an on-chip voltage regulator to ensure
stable output at the specified voltage. The S1F76610
Series offers a choice of three, optional temperature
gradients for applications such as LCD panel power
supplies.
The S1F76610C0B0 is available in 14-pin plastic DIPs,
the S1F76610M0B0, in 14-pin plastic SOPs, and the
S1F76610M2B0 in 16-pin plastic SSOPs.
• 2µA maximum output current when shut-down
• Two-in-series configuration doubles negative output
voltage.
• On-chip RC oscillator
• S1F76610C0B0 ...... Plastic DIP-14 pin
S1F76610M0B0...... Plastic SOP5-14 Pin
S1F76610M2B0...... Plastic SSOP2-16 pin
APPLICATIONS
• Power supplies for LCD panels
• Fixed-voltage power supplies for battery-operated
equipment
FEATURES
• 95% (Typ.) conversion efficiency
• Up to four output voltages, VO, relative to the input
voltage, VI
• Power supplies for pagers, memory cards, calculators
and similar hand-held equipment
• Fixed-voltage power supplies for medical equipment
• Fixed-voltage power supplies for communications
equipment
• On-chip voltage regulator
• 20mA maximum output current at VI = –5V
• Three temperature gradients : –0.1, –0.4 and –0.6%/
°C
• Power supplies for microcomputers
• Uninterruptable power supplies
BLOCK DIAGRAM
V
DD
OSC1
OSC2
CR
oscilator
TC1
Reference
Temperature
gradient
voltge
V
I
generator
selector
TC2
Voltage
multiplier
(1)
CAP1–
CAP1+
P
OFF
CAP2–
CAP2+
RV
Voltage
multiplier
(2)
Voltage regulator
V
REG
V
O
Multiplication
stage
Stabilization
stage
S1F70000 Series
Technical Manual
EPSON
2–1
S1F76610 Series
PIN ASSIGNMENTS
1
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CAP+
CAP–
NC
VDD
CAP+
VDD
OSC1
NC
2
CAP–
OSC1
OSC2
3
CAP2+
CAP2+
CAP2–
TC1
OSC2
4
CAP2–
POFF
P
OFF
5
TC1
RV
RV
6
TC2
V
V
REG
TC2
V
V
REG
7
8
VI
O
V
I
O
S1F76610C0B0/M0B0
S1F76610M2B0
PIN DESCRIPTIONS
S1F76610C0B0/M0B0
Pin name
CAP1+
CAP1–
CAP2+
CAP2–
TC1
Pin No.
Description
1
2
Positive charge-pump connection for ×2 multiplier
Negative charge-pump connection for ×2 multiplier
Positive charge-pump connection for ×3 multiplier
3
4
Negative charge-pump connection for ×3 multiplier or ×2 multiplier output
5
Temperature gradient selects
TC2
6
VI
Negative supply (system ground)
×3 multiplier output
7
VO
8
VREG
RV
Voltage regulator output
9
Voltage regulator output adjust
10
11
12
13
14
POFF
Voltage regulator output ON/OFF control
Resistor connection. Open when using external clock
Resistor connection. Clock input when using external clock
Positive supply (system VCC)
OSC2
OSC1
VDD
2–2
EPSON
S1F70000 Series
Technical Manual
S1F76610 Series
SPECIFICATIONS
Absolute Maximum Ratings
Parameter
Ratings
Codes
Units
Remarks
N = 2: Boosting to a double voltage
N = 3: Boosting to a triple voltage
OSC1, OSC2, POFF
–20/N to VDD + 0.3
V
Input supply voltage
VI – VDD
VI – 0.3 to VDD + 0.3
VO – 0.3 to VDD + 0.3
–20 to VDD + 0.3
VO to VDD + 0.3
Max. 300
V
V
Input terminal voltage
Output voltage
VI – VDD
TC1, TC2, RV
V
VO
Note 3)
Note 3)
VO – VDD
V
VREG
Allowable dissipation
Working temperature
Storage temperature
PD
mW
°C
°C
Topr
Tstg
–40 to +85
Plastic package
At leads
–55 to +150
Soldering temperature
and time
°C • s
Tsol
260 • 10
Notes
1. Using the IC under conditions exceeding the aforementioned absolute maximum ratings may lead to permanent destruction of
the IC. Also, if an IC is operated at the absolute maximum ratings for a longer period of time, its functional reliability may be
substantially deteriorated.
2. All the voltage ratings are based on VDD = 0V.
3. The output terminals (VO,VREG) are meant to output boosted voltage or stabilized boosted voltage. They, therefore, are not the
terminals to apply an external voltage. In case the using specifications unavoidably call for application of an external voltage,
keep such voltage below the voltage ratings given above.
Reconmmended Operating Conditions
VDD = 0V, Ta = –40 to +85˚C unless otherwise noted
Rating
Parameter
Symbol
Conditions
ROSC =1MΩ
Unit
Max.
Min.
Typ.
C3 = 10 µF, CL/C3 ≤ 1/20,
Ta = –20 to +85˚C.
See note 1.
—
—
–1.8
VSTA
V
Oscillator startup voltage
ROSC = 1MΩ
ROSC = 1MΩ
–2.2
—
—
—
—
Oscillator shutdown voltage
Load resistance
VSTP
RL
V
–1.8
RLmin.
See note 2.
Ω
—
—
Output current
IO
fOSC
—
10.0
680
3.3
mA
kHz
kΩ
—
—
—
—
—
20.0
30.0
2,000
—
Clock frequency
CR oscillator network resistance
Capacitance
ROSC
µF
C1, C2, C3
Stabilization voltage sensing resis-
tance
100
kΩ
RRV
1,000
Notes
1. The recommended circuit configuration for low-valtage operation (when VI is between –1.2V and –2.2V) is shown in
the following figure. Note that diode D1 should have a maximum forward voltage of 0.6V with 1.0mA forward current.
2. RL min can be varied depending on the input voltage.
S1F70000 Series
Technical Manual
EPSON
2–3
S1F76610 Series
1
2
3
4
5
6
7
14
13
12
11
10
9
+
+
C1
R
OSC
10µF
1MΩ
C2
10µF
C
L
RL
8
C3
+
22µF
D1
3. RLmin is a function of V1
5
4
3
2
1
V
STA2
STA1
V
Voltage
tripler
Voltage
doubler
0
1
1.5
2
3
4
5
6
Input voltage (V)
Electrical Characteristics
VDD = 0V, V1 = –5V, Ta = –40 to +85°C unless otherwise noted
Rating
Typ.
—
Parameter
Input voltage
Symbol
Conditions
Unit
Min.
–6.0
Max.
–1.8
—
VI
V
V
–18.0
Output voltage
VO
—
RL = ∞, RRV = 1MΩ,
–18.0
—
Regulator voltage
VREG
–2.6
V
VO = –18V
Stabilization circuit operating voltage
Multiplier current
VO
–18.0
—
V
—
–3.2
80
IOPR1
RL = ∞, ROSC = 1MΩ
RL = ∞, RRV = 1MΩ,
VO = –15V
µA
40
Stabilization current
IOPR2
—
12.0
5.0
µA
Quiescent current
Clock frequency
IQ
TC2 = TC1 = VO, RL = ∞
ROSC = 1MΩ
—
µA
—
2.0
fOSC
16.0
20.0
24.0
kHz
2–4
EPSON
S1F70000 Series
Technical Manual
S1F76610 Series
Rating
Symbol
Conditions
IO = 10mA
Parameter
Output impedance
Unit
Min.
—
Typ.
150
Max.
200
—
RO
Ω
Peff
IO = 5mA
Multiplication efficiency
90.0
95.0
%
VO = –18 to –8V,
VREG = –8V, RL = ∞,
Ta = 25˚C
∆VREG
∆VO·VREG
Stabilization output voltage
differential
—
—
—
0.2
5.0
8.0
—
%/V
VO = –15V,
VREG = –8V, Ta = 25˚C,
IO = 0 to 10µA,
∆VREG
∆IO
Stabilization output load differential
—
—
Ω
Ω
TC1 = VDD, TC2 = VO
RSAT = ∆(VREG – VO)/∆IO,
IO = 0 to 10µA,
RV = VDD, Ta = 25˚C
Stabilization output saturation
resistance
RSAT
RC2 = VO, TC1 = VDD,
Ta = 25˚C
–1.0
–1.1
–2.3
–1.7
–1.5
–1.3
TC2 = TC1 = VO,
Ta = 25˚C
Reference voltage
VRV
V
TC2 = VDD, TC1 = VO,
Ta = 25˚C
–0.9
–0.8
–1.1
–0.1
–0.4
–0.6
–0.01
–0.3
–0.5
–0.25
–0.5
–0.7
CT
ILKI
100
See note.
%/˚C
Temperature gradient
POFF, TC1, TC2, OSC1, and RV
input leakage current
—
—
2.0
µA
Note
|VREG (50°C)| – |VREG (0°C)|
CT =
×
50°C – 0°C
|VREG (25°C)|
S1F70000 Series
Technical Manual
EPSON
2–5
S1F76610 Series
Typical Performance Characteristics
1000
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
Ta = 25°C
VI
VI
VI
= –5V
= –3V
= –2V
V
I
I
= –5.0V
= –3.0V
100
10
1
V
V
I
= –2.0V
8
–40
–20
0
20
Ta [°C]
40
60
80
100
10
100
1000
OSC [kΩ]
10000
R
(1) Clock frequency vs. External resistance
(2) Clock frequency vs. Ambient temperature
150
0
Ta = 25°C
Ta = 25°C
VI = –5.0V
f
OSC = 40kHz
100
50
0
–5
–10
–15
f
OSC =
×2 multiplier
20kHz
f
OSC = 10kHz
×3 multiplier
0
10
20
[mA]
30
40
–7
–6
–5
–4
V
–3
[V]
–2
–1
0
I
O
I
(3) Multiplier current vs. Input voltage
(4) Output voltage vs. Output current
2–6
EPSON
S1F70000 Series
Technical Manual
S1F76610 Series
0
–1
–2
–3
–4
–5
–6
0
–5
Ta = 25°C
= –3.0V
Ta = 25°C
= –2.0V
V
I
V
I
×2 multiplier
×2 multiplier
×3 multiplier
×3 multiplier
–10
–15
0
10
20
30
0
1
2
3
4
5
6
7
8
9 10
IO [mA]
IO [mA]
(5) Output voltage vs. Output current
(6) Output voltage vs. Output current
100
100
90
100
60
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
54
48
42
36
30
24
18
12
6
80
Ta = 25°C
= –3.0V
Ta = 25°C
= –5.0V
70
×2 multiplier
Peff
VI
VI
×2 multiplier 60
Peff
50
40
30
20
10
0
×3 multiplier
×3 multiplier
×3 multiplier
II
Peff
×3 multiplier
Peff
II
×2 multiplier
II
×2 multiplier
II
0
0
5
10
15
[mA]
20
25
30
0
10
20
I
30
[mA]
40
50
O
IO
(7) Multiplication efficiency/input current
vs. Output current
(8) Multiplication efficiency/input current
vs. Output current
S1F70000 Series
Technical Manual
EPSON
2–7
S1F76610 Series
500
400
300
200
100
0
100
90
40
36
32
28
24
20
Ta = 25°C
= 6mA
×2 multiplier
I
O
Peff
80
Ta = 25°C
= –2.0V
70
60
50
×3 multiplier
VI
Peff
×3 multiplier
40
30
20
10
16
12
8
×3 multiplier
×2 multiplier
II
×2 multiplier
II
4
0
0
–7
–6
–5
–4
V
–3
[V]
–2
–1
0
0
1
2
3
4
5
6
7
8
9
10
IO [mA]
I
(9) Multiplication efficiency/input current
vs. Output current
(10) Output impedance vs. Input voltage
500
100
Ta = 25°C
IO = 10mA
I
O
= 2mA
= 5mA
400
300
90
80
70
IO
IO = 10mA
200
100
0
×3 multiplier
×2 multiplier
IO = 20mA
60
50
IO = 30mA
Ta = 25°C
= –5.0V
1000
VI
–7
–6
–5
–4
–3
[V]
–2
–1
0
1
10
100
f
OSC [kHz]
V
I
(11) Output impedance vs. Input voltage
(12) Multiplication efficiency vs. Clock frequency
2–8
EPSON
S1F70000 Series
Technical Manual
S1F76610 Series
100
90
–7.850
–7.900
–7.950
–8.000
I
I
O
O
= 0.5mA
= 1.0mA
V
O
= –15V
I
O
= 2.0mA
Ta = 25°C
I
O
= 4.0mA
80
70
Ta = 25°C
= – 3.0V
60
50
V
I
0.0001
0.0010
0.0100
0.1000
1
10
100
1000
IO [V]
fOSC [kHz]
(13) Multiplication efficiency vs. Clock frequency
(14) Output voltage vs. Output current
–2.850
–5.850
V
O
= –6V
V
O
= –9V
Ta = 25°C
Ta = 25°C
–5.900
–5.950
–6.000
–2.900
–2.950
–3.000
0.0001
0.0010
0.0100
0.1000
0.0001
0.0010
0.0100
0.1000
IO [V]
IO [V]
(15) Output voltage vs. Output current
(16) Output voltage vs. Output current
S1F70000 Series
Technical Manual
EPSON
2–9
S1F76610 Series
50
0.30
Ta = 25°C
0.25
VO
= –5V
0.20
0.15
0.10
0.05
0.00
V
V
O
O
= –10V
= –15V
0
CT0
CT1
CT2
–50
0
5
10
15
20
–40 –20
0
20
40
60
80
100
I
O
[mA]
Ta [°C]
(17) Regulator voltage vs. Output current
(18) Regulator output stability ratio vs.
Ambient temperature
Temperature Gradient Control
The S1F7661C0B0 offers a choice of three temperature
gradients which can be used to adjust the voltage regu-
lator output in applications such as power supplies for
driving LCDs.
Temperature
gradient
(%/˚C)
See note 2.
POFF
TC2
TC1
Voltage
regulator
output
CR osciliator
Remarks
See note 1.
ON
ON
ON
ON
1 (VDD)
1 (VDD)
1 (VDD)
1 (VDD)
Low (VO)
Low (VO)
Low (VO)
High (VDD)
Low (VO)
–0.4
–0.1
–0.6
–0.6
ON
ON
High (VDD)
High (VDD)
ON
High (VDD)
OFF
Serial connection
OFF
(high impedance)
OFF
0 (VI)
0 (VI)
0 (VI)
0 (VI)
Low (VO)
Low (VO)
Low (VO)
High (VDD)
Low (VO)
—
—
—
—
OFF
(high impedance)
OFF
OFF
OFF
(high impedance)
High (VDD)
High (VDD)
OFF
(high impedance)
Multiplier
operational
OFF
High (VDD)
Notes
1. The definition of LOW for POFF differs from that for TC1 and TC2.
2. The temperature gradient affects the voltage between VDD and VREG.
2–10
EPSON
S1F70000 Series
Technical Manual
S1F76610 Series
FUNCTIONAL DESCRIPTIONS
CR Oscillator
Voltage Multiplier
The on-chip CR oscillator network frequency is deter-
mined by the external resistor, ROSC, connected be-
tween OSC1 and OSC2. This oscillator can be disabled
in favor of an external clock by leaving OSC2 open and
applying an external clock signal to OSC1.
The voltage multiplier uses the clock signal from the
oscillator to double or triple the input voltage. This re-
quires three external capacitors–two charge-pump ca-
pacitors between CAP1+ and CAP1– and CAP2+ and
CAP2–, respectively, and a smoothing capacitor be-
tween VI and VO.
Oscillator
External clock
OSC1
OSC1
OSC2
V
= 0 V
DD
External clock
signal
R
OSC
1
2
3
4
5
6
7
14
13
12
11
10
9
C1
+
+
OSC2
R
RV
10 µF
R1
R2
100 kΩ
to
R
OSC
1 MΩ
5 V
1 MΩ
C2
Reference Volatge Generator and Voltage
Regulator
The reference voltage generator supplies a reference
voltage to the voltage regulator to control the output.
This voltage can be switched ON and OFF.
10 µF
+C4
10 µF
V
= –8 V
REG
V
= –15 V
O
8
V = –5 V
I
+
C3
10 µF
V
DD
POFF
Control signal
R
RV = 100 kΩ to 1 MΩ
RV
Double voltage potential levels
V
REG
V
CC
(+5V)
GND
(–5V)
V
V
DD = 0 V
= –5 V
I
V
CAP2 – = 2VI = –10 V
Tripled voltage potential levels
VDD = 0 V
VI = –5 V
VO = 3VI = –15 V
S1F70000 Series
Technical Manual
EPSON
2–11
S1F76610 Series
TYPICAL APPLICATIONS
Voltage Tripler with Regulator
Converting a Voltage Tripler to a Voltage
The following figure shows the circuit required to triple
the input voltage, regulate the result and add a tempera-
ture gradient of –0.4%/°C. Note that the high input im-
pedance of RV requires appropriate noise countermea-
sures.
Doubler
To convert this curcuit to a voltage doubler, remove ca-
pacitor C2 and short circuit CAP2– to VO.
VDD = 0 V
VDD = 0 V
14
13
12
11
10
9
1
2
3
4
5
6
7
C1 +
10µF
1
2
3
4
5
6
7
14
13
12
11
10
9
C1
+
+
ROSC
10 µF
1 MΩ
RRV
100 kΩ
to
R1
R2
5 V
C2 +
10µF
ROSC
1 MΩ
5 V
C2
10 µF
1 MΩ
+C4
10 µF
VO = –15 V
8
VREG = –8 V
RRV
VRV
VI = –5 V
+
VO = –15 V
C3
10 µF
8
VI = –5 V
=
+
R1
C3
10 µF
Parallel Connection
Connecting two or more chips in parallel reduces the
output impedance by 1/n, where n is the number of de-
vices used.
quired when any number of devices are connected in
parallel. Also, the voltage regulator in one chip is suffi-
cient to regulate the combined output.
Only the single output smoothing capacitor, C3, is re-
VDD = 0 V
1
2
3
4
5
6
7
14
13
12
11
10
9
1
2
3
4
5
6
7
14
13
12
11
10
9
+
+
+
+
C1
10 µF
C1
10 µF
R
RV
R
1 MΩ
OSC
R
1 MΩ
OSC
100 kΩ
to
C2
10 µF
C2
10 µF
1 MΩ
+
C4
10 µF
5 V
VREG = –10 V
8
8
V
O = –15 V
VI = –5 V
+
C3
10 µF
2–12
EPSON
S1F70000 Series
Technical Manual
S1F76610 Series
Serial Connection
Connecting two or more chips in series obtains a higher
output voltage than can be obtained using a parallel
connection, however, this also raises the output imped-
ance.
<Precautions when connecting loads>
In case of series connections, when connecting loads
between the first stage VDD (or other potential of the
second stage VDD or up) and the second stage VREG as
shown in Fig. 2-13, be cautions about the following
point.
the first stage VDD (or other potential of the second
stage VDD or up) to cause a voltage exceeding the
absolute maximum rating for the second stage VDD at
the VREG terminal, normal operation of the IC may be
hampered. Consequently, When making a series
connection, insert a diode D1 between the second
stage VI and VREG as shown in Fig. 2-13 so that a
voltage exceeding the second stage VDD or up may
not be applied to the VREG terminal.
* When normal output is not occurring at the VREG ter-
minal such as at times of starting up or when turning
the VREG off by POFF signals, if current flows into the
second stage VREG terminal through the load from
VDD' = VI = –5V
VDD = 0V
10µF
Load
100kΩ
to
1MΩ
1
2
3
4
5
6
7
14
13
12
11
10
9
1
2
3
4
5
6
7
14
13
12
11
10
9
+
–
+
–
10µF
10µF
10µF
1MΩ
–
5V
+
–
V
O
= –10V= VI
V
REG' = –15V
8
8
VO = –20V
10µF
–
V
I
= –5V
+
–
10µF
D1
VDD = 0 V
D1
D2
5 V
D3
Positive Voltage Conversion
Adding diodes converts a negative voltage to a positive
one.
C1
10 µF
1
2
3
4
5
6
7
14
13
12
11
10
9
+
To convert the voltage tripler shown earlier to a voltage
doubler, remove C2 and D2, and short circuit D3. Small
Schottky diodes are recommended for all these diodes.
The resulting voltage is lowered by VF, the voltage drop
in the forward direction for each diode used. For ex-
ample, if VDD = 0V, VI = –5V, and VF = 0.6V, the re-
sulting voltages would be as follows.
• For a voltage tripler,
C2
ROSC
1 MΩ
10 µF
+
+
8
V
O = 8.2 V C3
10 µF
VO = 10 – (3 × 0.6) = 8.2V
• For a voltage doubler,
VI = –5 V
VO = 5 – (2 × 0.6) = 3.8V
S1F70000 Series
Technical Manual
EPSON
2–13
S1F76610 Series
Simultaneous Voltage Conversion
Combining a standard voltage tripler circuit with one
for positive voltage conversion generates both –15 and
8.2V outputs from a single input, however, it also raises
the output impedance.
Using an External Gradient
The S1F7661C0B0/M0B0 offers three built-in tem-
perature gradients— –0.1, –0.4 and –0.6%/°C.
To set the gradient externally, place a thermistor, RT, in
series with the variable resistor, RRV, used to adjust the
output voltage.
A voltage doubler generates –10 and 3.8V outputs.
VDD = 0 V
VDD
1
2
3
4
5
6
7
14
13
12
11
10
9
10 µF
D1
D2
+
1
2
3
4
5
6
7
14
13
12
11
10
9
R1
10 µF
RRV
+
10 µF
R
1 MΩ
OSC
10 µF
+
10 µF
RT
RP
5 V
D3
VREG
10 µF
V
O1 = –15 V
+
8
8
V
O2 = 8.2 V
+
10 µF
VI = –5 V
Potential levels
VO2 = 8.2V
VDD = 0 V
VI
= –5 V
V
O1 = –15 V
2–14
EPSON
S1F70000 Series
Technical Manual
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