S1F77600Y00A00K [SEIKO]
1-CHANNEL POWER SUPPLY SUPPORT CKT, PSSO3, SOT-89, 3 PIN;
| 型号： | S1F77600Y00A00K |
| 厂家： | 
SEIKO EPSON CORPORATION |
| 描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PSSO3, SOT-89, 3 PIN |
| 文件： | 总19页 (文件大小：246K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MF1563 01
Power Supply IC
S1F77600
Technical Manual
f
NOTICE
No part of this material may be reproduced or duplicated in any form or by any means without the written
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material
or due to its application or use in any product or circuit and, further, there is no representation that this material
is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to
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license from the Ministry of International Trade and Industry or other approval from anther government agency.
©SEIKO EPSON CORPORATION 2003, All rights reserved.
All other product names mentioned herein are trademarks and/or registered trademarks of their respective
companies.
Configuration of product number
zDEVICES
S1
F
77600 Y
00A0
00
Packing specifications
00: Besides tape & reel
0A: TCP BL 2 directions
0B: Tape & reel Back
0C: TCP BR 2 directions
0D: TCP BT 2 directions
0E: TCP BD 2 directions
0F: Tape & reel FRONT
0G: TCP BT 4 directions
0H: TCP BD 4 directions
0J: TCP SL 2 directions
0K: TCP SR 2 directions
0L: Tape & reel LEFT
0M:TCP ST 2 directions
0N: TCP SD 2 directions
0P: TCP ST 4 directions
0Q: TCP SD 4 directions
0R: Tape & reel RIGHT
99: Specs not fixed
Specifications
Shape
(Y : SOT)
Model number
Model name
(F : Power Supply)
Product classification
(S1:Semiconductors)
CONTENTS
1. DESCRIPTION....................................................................................................................................1
2. FEATURES .........................................................................................................................................1
3. BLOCK DIAGRAM .............................................................................................................................2
4. DESCRIPTION OF BLOCK DIAGRAM .............................................................................................3
5. PIN ASSIGNMENT .............................................................................................................................3
6. PIN DESCRIPTION.............................................................................................................................3
6.1 Pin Function................................................................................................................................3
7. FUNCTIONAL DESCRIPTION ...........................................................................................................4
7.1 Outline of Operation ...................................................................................................................4
8. ABSOLUTE MAXIMUM RATINGS.....................................................................................................6
9. ELECTRICAL CHARACTERISTICS..................................................................................................7
9.1 Model with Detection Voltage 1.2V and Release Voltage 2.0V .................................................7
10. EXTERNAL CONNECTION DIAGRAM ...........................................................................................10
11. EXAMPLES OF CIRCUITS ..............................................................................................................11
Rev.1.1
EPSON
i
S1F77600 Technical Manual
1. DESCRIPTION
S1F77600 Series comprises high-accuracy, low-consumption low-voltage detectors which work at a low voltage.
Output is guaranteed until supply voltage reaches 0V. They are ICs used to prevent liquid leakage of a dry cell
by detecting the voltage drop of power supply of two cells connected in series. The internal circuits of the ICs
consist of reference voltage circuits, comparators, resistances for detecting voltage, hysteresis circuits,
output-securing circuits (forced output Hi-Z) and output transistors.
Detection voltage is of non-adjustment type, fixed inside the IC at high accuracy.
Output form is selectable from P-ch open drain and N-ch open drain.
The packages are of SOT89-3pin type.
These ICs are best suited to the dry-cell liquid leakage prevention/protection circuit of a portable product which
uses power supply of two dry cells connected in series.
2. FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
Current consumption..................................... Max.5.0µA (VDD = 3.0V, P-ch output)
Operational voltage....................................... 0.8V to 5.5V
Forced output Hi-Z........................................ 0.0V to 1.0V
Detection voltage .......................................... 1.2V to 1.6V (0.05V step: mask option)
Accuracy of voltage detection....................... ±3.5% (Ta = 25°C)
Detection temperature characteristics ........... -320ppm/°C
Hysteresis width............................................ 0.2V to 1.0V (0.05V step: mask option)
Release voltage ............................................. Detection voltage + hysteresis width
Accuracy of release voltage .......................... ±2.5% (Ta = 25°C)
Release temperature characteristics .............. -260ppm/°C
Operational temperature................................ -30°C to +85°C
Output form................................................... P-ch open drain, N-ch open drain (mask option)
Shipment form............................................... SOT89-3pin
Ú The products have no radiation-resistant or light-proof design.
Rev.1.1
EPSON
1
S1F77600 Technical Manual
3. BLOCK DIAGRAM
VDD
Q1
R1
Q2
Detection:1.2V
Release: 2.0V
R2
OUT
+
CMP
-
VREF
VREG
Q3
R3
Forced Output Hi-Z if Supply
Voltage is ≤1.0V
VSS
(Note 1) Shown is the case of a model with detection voltage 1.2V and hysteresis width 0.8V
(Note 2)
ꢀꢀꢀꢀ
P-ch open drain output
N-ch open drain output
(Mask option allows you to select either output form.)
Fig.3.1 Block diagram
2
EPSON
Rev.1.1
S1F77600 Technical Manual
4. DESCRIPTION OF BLOCK DIAGRAM
(1) Reference voltage: VREF
Generates reference voltage and reference current required for the inside of IC.
(2) Comparator CMP
Compares the divided potentials of resistances connected between power supply (VREG) with the reference
voltage generated inside IC (VREF).
(3) Resistances for detecting voltage: R1, R2, R3
Divided potential resistances which determine detection and release voltages. Either voltage is selectable with
aluminum option.
(4) Hysteresis: Q1
A transistor for hysteresis to prevent malfunction (output oscillation, etc.) caused by noise in power supply.
(5) Output securing circuit
Forces output pin to output fixed voltage Hi-Z if IC’s operational voltage drops to the lower limit or lower.
(6) Output transistors: Q2, Q3
Transistors to output by P-ch open drain (Q2) and N-ch open drain (Q3).
5. PIN ASSIGNMENT
SOT89-3pin S1F77600Y0A00
1
2
3
Fig.5.1 Pin Assignment
6. PIN DESCRIPTION
6.1 Pin Function
Table 6.1 List of pins
Pin name
OUT
I/O
Pin No.
Function
O
I
1
2
3
Detected-voltage output pin (selectable from P-ch/N-ch open drain)
Input voltage pin (-)
VSS
VDD
I
Input voltage pin (+)
Rev.1.1
EPSON
3
S1F77600 Technical Manual
7. FUNCTIONAL DESCRIPTION
7.1 Outline of Operation
S1F77600 Series comprises high-accuracy, low-consumption low-voltage detectors which work at a low voltage.
A detector detects voltage by inputting into a comparator the divided potentials of resistances, R1, R2 and R3,
connected between power supply (VREG) and the reference voltage generated inside IC (VREF). It has
hysteresis added to prevent malfunction caused by power supply noise because it can detect difference of
potential between VREG and VREF even if the difference is very small.
The detection voltage (-VDET), which is found if input voltage drops, and the release voltage (+VDET), which is
found if input voltage rises, are defined by the following formulas:
Detection voltage: -VDET = (R2+R3)/R3 × VREF .........................................................(formula 7.1.1)
Release voltage: +VDET = (R1+R2+R3)/R3 × VREF ....................................................(formula 7.1.2)
S1F77600 Series forces output of fixed voltage Hi-Z if operational voltage drops to the lower limit or lower.
Fig.7.1.1 and 7.1.2 show I/O characteristics of P-ch and N-ch open drain outputs, respectively.
Release Voltage (+VDET)
Supply Voltage
(VDD)
HYS Width
Detection Voltage (-VDET)
Lower Limit of Operational
Voltage
Vss
Release Voltage (+VDET)
Detection Voltage (-VDET)
Output Pch
Open Drain
(OUT)
Lower Limit of Operational
Voltage
Hi-Z
VSS
Fig.7.1.1 I/O characteristics of P-ch open drain
4
EPSON
Rev.1.1
S1F77600 Technical Manual
Release Voltage (+VDET)
Detection Voltage (-VDET)
Supply Voltage
(VDD)
HYS Width
Lower Limit of Operational
Voltage
VSS
Release Voltage (+VDET)
Detection Voltage (-VDET)
Output Nch
Open Drain
(OUT)
Lower Limit of Operational
Voltage
Hi-Z
VSS
Fig.7.1.2 I/O characteristics of N-ch open drain
(Note 3) The I/O characteristics of output P-ch or N-ch open drain shown in each figure above show examples
where a pull-down or pull-up resistance is connected to output pin, respectively.
Rev.1.1
EPSON
5
S1F77600 Technical Manual
8. ABSOLUTE MAXIMUM RATINGS
Rated values
Items
Symbols
Units
Applicable pins
Remarks
Min.
-0.3
-0.3
Max.
7.0
Input supply voltage
Output voltage
VDD
VOUT
IOUT
Pd
V
V
VDD
OUT
OUT
7.0
Output current
10
mA
mW
°C
Tolerable loss
200
85
-30 to +85°C
Operating temperature
Storage temperature
Soldering temperature and
time
Topr
Tstg
Tsol
-30
-55
150
250x10
°C
°Cxs
(Note 4) Don’t apply voltage to output pin from outside.
(Note 5) Use of the product under a condition beyond absolute maximum ratings may cause malfunction or
permanent failure of the IC.
Also, it may reduce reliability of the IC greatly, even if the IC works normally just temporally under
such condition.
6
EPSON
Rev.1.1
S1F77600 Technical Manual
9. ELECTRICAL CHARACTERISTICS
9.1 Model with Detection Voltage 1.2V and Release Voltage 2.0V
(Ta=25°C, unless specified otherwise (Note 6))
Standard values
Min. Typ. Max.
0.80 5.50
Items
Symbols
Conditions
Units Notes
Operational voltage
Detection voltage
Release voltage
VDD
-VDET
+VDET
VHYS
IOP1
Ta = -30°C to +85°C
V
V
1.158 1.200 1.242
1.950 2.000 2.050
0.708 0.800 0.892
V
Hysteresis width
VHYS = (+VDET) - (-VDET)
VDD = 3.0V
Ta = -30°C to +85°C
VDD = 0.7V
V
Current consumption 1
P-ch
N-ch
P-ch
N-ch
3.00
3.50
0.35
0.40
0.45
0.55
5.00
5.50
0.95
1.00
µA
µA
µA
µA
mA
mA
Current consumption 2
Output current
IOP2
IOUT
TPHL
TPLH
Ta = -30°C to +85°C
P-ch
N-ch
P-ch
N-ch
P-ch
N-ch
VDD = 3.0V, OUT = 2.8V
VDD = 3.0V, OUT = 0.2V
Ta = -30°C to +85°C
Ta = -30°C to +85°C
Ta = -30°C to +85°C
Ta = -30°C to +85°C
Ta = -30°C to +85°C
0.30
0.40
Transfer delay time
1
ms
ms
µs
8
8
8
8
7
1
100
100
µs
Temperature
∆-VDET
∆Topr
-560
-470
-320
-260
-200 ppm
characteristics of
detection voltage
Temperature
characteristics of release
voltage
/ °C
∆+VDET
∆Topr
Ta = -30°C to +85°C
0
ppm
7
/ °C
(Note 6) OUT pin is open unless specified otherwise.
(Note 7) Temperature characteristics are calculated using the following formula:
∆VDET/∆Topr = (VDETH - VDETL)/VDETM/115 × 106
VDETH : Value of detection/release voltage at 85°C
VDETL : Value of detection/release voltage at -30°C
VDETM : Value of detection/release voltage at 25°C
Rev.1.1
EPSON
7
S1F77600 Technical Manual
(Note 8) Explanatory diagram of measuring transfer delay time
3.0V
+VDET
VDD
-VDET
0.7V
VSS
t
VPLH
VPHL
3.0V
1.5V
OUT
0.35V
VSS
t
VDD
S1F77600 Series OUT
VSS
470kΩ
This explanatory diagram covers a P-ch open drain output model.
8
EPSON
Rev.1.1
S1F77600 Technical Manual
(Note 8) Explanatory diagram of measuring transfer delay time
3.0V
+VDET
VDD
-VDET
0.7V
VSS
t
VPLH
VPHL
3.0V
OUT
0.7V
0.35V
t
VSS
VDD
470kΩ
S1F77600 Series OUT
VSS
This explanatory diagram covers an N-ch open drain output model.
Rev.1.1
EPSON
9
S1F77600 Technical Manual
10. EXTERNAL CONNECTION DIAGRAM
Input voltage (+)
(3pin)
VDD
Voltage
Detection
Output
(1pin)
S1F77600 Series
OUT
VSS
(2pin)
Input voltage (-)
Fig.10.1 Connection diagram of a P-ch open drain model
Input voltage (+)
(3pin)
VDD
Voltage
Detection
Output
(1pin)
S1F77600 Series
OUT
VSS
(2pin)
Input voltage (-)
Fig.10.2 Connection diagram of an N-ch open drain model
10
EPSON
Rev.1.1
S1F77600 Technical Manual
11. EXAMPLES OF CIRCUITS
OUT
470kΩ
VDD
EXT
VSS
VOUT
VDD
OUT
VSS
S1F77600 Series
N-ch Open Drain
Voltage boost DC/DC
Fig.11.1 Example of Circuit 1
OUT
VDD
VSS
EXT
CE
VOUT
VDD
OUT
VSS
S1F77600 Series
P-ch Open Drain
Voltage boost DC/DC
470kΩ
Fig.11.2 Example of Circuit 2
Rev.1.1
EPSON
11
S1F77600 Technical Manual
VDD
VDD
VSS
OUT
OUT
470kΩ
S1F77600 Series
P-ch Open Drain
Fig.11.3 Example of circuit 3 (CR timer circuit)
12
EPSON
Rev.1.1
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S1F77600
Technical Manual
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
EPSON Electronic Devices Website
http://www.epsondevice.com/
First issue February, 2003
H
Printed in Japan
A
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