S1T98B00W10B0 [SEIKO]

SPECIALTY CONSUMER CIRCUIT, UUC21, DIE-21;
S1T98B00W10B0
型号: S1T98B00W10B0
厂家: SEIKO EPSON CORPORATION    SEIKO EPSON CORPORATION
描述:

SPECIALTY CONSUMER CIRCUIT, UUC21, DIE-21

商用集成电路
文件: 总24页 (文件大小:215K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
-
MF1585 01  
Intelligent Network Controller for Embedded System  
S1T98B00 B/S1T98B00 D Series  
*** ***  
Technical Manual  
NOTICE  
No part of this material may be reproduced or duplicated in any form or by any means without the written  
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.  
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material  
or due to its application or use in any product or circuit and, further, there is no representation that this material  
is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to  
any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty  
that anything made in accordance with this material will be free from any patent or copyright infringement of a  
third party. This material or portions thereof may contain technology or the subject relating to strategic  
products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export  
license from the Ministry of International Trade and Industry or other approval from anther government agency.  
All other product names mentioned herein are trademarks and/or registered trademarks of their respective  
companies.  
©SEIKO EPSON CORPORATION 2003, All rights reserved.  
Configuration of product number  
zDEVICES  
S1  
T
98B00 *  
****  
00  
Packing specifications  
00: Besides tape & reel  
0A: TCP BL 2 directions  
0B: Tape & reel Back  
0C: TCP BR 2 directions  
0D: TCP BT 2 directions  
0E: TCP BD 2 directions  
0F: Tape & reel FRONT  
0G: TCP BT 4 directions  
0H: TCP BD 4 directions  
0J: TCP SL 2 directions  
0K: TCP SR 2 directions  
0L: Tape & reel LEFT  
0M:TCP ST 2 directions  
0N: TCP SD 2 directions  
0P: TCP ST 4 directions  
0Q: TCP SD 4 directions  
0R: Tape & reel RIGHT  
99: Specs not fixed  
Specifications  
Shape  
W : Wafer  
D : Die  
M : SOP/SSOP  
Model number  
Model name  
(T : Clock)  
Product classification  
(S1:Semiconductors)  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
CONTENTS  
1. DESCRIPTION....................................................................................................................................1  
1.1 Features......................................................................................................................................1  
1.1.1 S1T98B00W B0/S1T98B00D B0/S1T98B00M B1...............................................1  
**  
**  
**  
1.1.2 S1T98B00W D0/S1T98B00D D0/S1T98B00M D1 ..............................................1  
**  
**  
**  
1.2 Model Numbers ..........................................................................................................................2  
2. BLOCK DIAGRAM .............................................................................................................................3  
2.1 S1T98B00W B0/S1T98B00D B0/S1T98B00M B1.............................................................3  
**  
**  
**  
2.2 S1T98B00W D0/S1T98B00D D0/S1T98B00M D1 ............................................................3  
**  
**  
**  
3. PAD LAYOUT AND PIN ASSIGNMENT ............................................................................................4  
3.1 Pad Layout of S1T98B00W 0/S1T98B00D 0....................................................................4  
***  
***  
3.2 Pad coordinates of S1T98B00W 0/S1T98B00D 0............................................................5  
***  
***  
3.3 Cross-Sectional Dimensions ......................................................................................................5  
3.4 Pad Dimensions .........................................................................................................................5  
3.5 Pin Assignment of S1T98B00M B1 (SOP3A-16) ....................................................................6  
**  
3.6 Pin Assignment of S1T98B00M D1 (SSOP2-16)....................................................................6  
**  
4. PIN DESCRIPTION.............................................................................................................................7  
4.1 Pin Description ...........................................................................................................................7  
4.2 Series Name - Pin Number Correspondence Table...................................................................8  
4.3 Relationship Between Input Pins (PWDX, XX, and XN) and Power Supply .............................9  
5. FUNCTIONAL DESCRIPTION ...........................................................................................................9  
6. ABSOLUTE MAXIMUM RATINGS...................................................................................................10  
7. ELECTRICAL CHARACTERISTICS................................................................................................10  
7.1 Operating Range ......................................................................................................................10  
7.2 DC Characteristics....................................................................................................................10  
7.3 AC Characteristics....................................................................................................................11  
7.3.1 Frequency characteristic of crystal oscillator section output (OUT32K)....................11  
7.3.2 Clock characteristics of crystal oscillator section output (OUT32K) ..........................11  
7.3.3 Frequency characteristic of PLL oscillator section output (OUT)...............................11  
7.3.4 Clock characteristic of PLL oscillator section output (OUT).......................................12  
8. PERIOD JITTERS.............................................................................................................................14  
9. EXTERNAL CONNECTION EXAMPLES.........................................................................................14  
9.1 Reference External Connection Example 1.............................................................................14  
9.2 Reference External Connection Example 2.............................................................................15  
9.3 Implementation Guidelines.......................................................................................................16  
10. PACKAGE OUTLINE DIMENSIONS................................................................................................17  
10.1 SOP3A-16.................................................................................................................................17  
10.2 SSOP2-16.................................................................................................................................18  
Rev.1.0  
EPSON  
i
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
1. DESCRIPTION  
The S1T98B00 B and S1T98B00 D Series are 32768Hz PLL oscillators that output PLL oscillation by  
*** ***  
externally providing 32768Hz crystals.  
There are four types of packages - WAFER (S1T98B00W 0), CHIP (S1T98B00D 0), SOP3A-16  
***  
***  
(S1T98B00M B1), and SSOP2-16 (S1T98B0M D1) - to choose from to your specific applications.  
** **  
The CMOS IC for these series contains a crystal oscillator circuit. Externally attaching a crystal oscillator to  
the built-in crystal oscillator circuit allows any of these series to output PLL oscillation and 32768Hz clocks  
from 32768Hz oscillation source.  
1.1 Features  
1.1.1 S1T98B00W B0/S1T98B00D B0/S1T98B00M B1  
**  
**  
WAFER  
CHIP  
**  
(S1T98B00W B0)  
Shipping forms  
**  
(S1T98B00D B0)  
**  
SOP3A-16pin  
(S1T98B00M B1)  
**  
2 types of outputs - crystal oscillation and PLL oscillation  
Inputs  
PLL oscillator output frequency  
External 32768Hz crystal inputs or 32768Hz clock inputs  
32768Hz × N ÷ X  
(N = 763 to 2137, X = 1 to 16)  
The number of N, X is variable via mask option.  
The output frequencies are determined by 2 bits (XN and XX pins).  
CMOS  
Output level  
Output buffer driving capability  
Operating supply voltage  
CL = 15pF (CMOS load)  
When crystal oscillator section operates: 1.8 to 3.6V  
When PLL oscillator section operates: 2.7 to 3.6V  
VBK x x x Power supply for crystal oscillator section  
VDD x x x Power supply for PLL oscillator section  
(VBK = VDD when PLL oscillator operates.)  
Power supply  
Contains resistors and capacitors for crystal oscillator and DC cut capacitors for XG pin  
Contains a low pass filter for PLL oscillation  
PLL oscillator section is provided with a power-down pin  
1.1.2 S1T98B00W D0/S1T98B00D D0/S1T98B00M D1  
**  
**  
WAFER  
CHIP  
**  
(S1T98B00W D0)  
Shipping forms  
**  
(S1T98B00D D0)  
**  
SSOP2-16pin  
(S1T98B00M D1)  
**  
2 types of outputs - crystal oscillation and PLL oscillation  
Inputs  
PLL oscillator output frequency  
External 32768Hz crystal inputs or 32768Hz clock inputs  
32768Hz × N ÷ X  
(N = 763 to 2137, X = 1 to 16)  
The number of N, X is variable via mask option.  
CMOS  
Output level  
Output buffer driving capability  
Operating supply voltage  
CL = 15pF (CMOS load)  
When crystal oscillator section operates: 1.8 to 3.6V  
When PLL oscillator section operates: 2.7 to 3.6V  
VBK x x x Power supply for crystal oscillator section  
VDD x x x Power supply for PLL oscillator section  
(VBK = VDD when PLL oscillator operates.)  
Power supply  
Contains resistors and capacitors for crystal oscillator and DC cut capacitors for XG pin  
PLL oscillator section is provided with a power-down pin (the crystal oscillator section is always enabled as  
long as power is applied.)  
Contains a low pass filter for PLL oscillation  
Rev.1.0  
EPSON  
1
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
1.2 Model Numbers  
The following model numbers will be provided.  
Number of output 32768Hz crystal 32768Hz crystal  
Output  
frequency  
Model Numbers  
frequencies  
selected  
4
oscillation  
circuit  
oscillator  
outputs  
Provided  
Package  
S1T98B00W10B0  
48005120Hz  
36012032Hz  
12001280Hz  
9003008Hz  
48005120Hz  
36012032Hz  
12001280Hz  
9003008Hz  
48005120Hz  
36012032Hz  
12001280Hz  
9003008Hz  
48005120Hz  
Can be used by  
WAFER  
(Selected by 2 bits, connecting a  
XN and XX pins.) 32768Hz crystal  
oscillator.  
S1T98B00D10B0  
S1T98B00M10B1  
S1T98B00W10D0  
S1T98B00D10D0  
S1T98B00M10D0  
4
Can be used by  
Provided  
Provided  
Provided  
Provided  
Provided  
CHIP  
SOP3A-16  
WAFER  
CHIP  
(Selected by 2 bits, connecting a  
XN and XX pins.) 32768Hz crystal  
oscillator.  
4
Can be used by  
(Selected by 2 bits, connecting a  
XN and XX pins.) 32768Hz crystal  
oscillator.  
1
1
1
Can be used by  
connecting a  
32768Hz crystal  
oscillator.  
Can be used by  
connecting a  
32768Hz crystal  
oscillator.  
Can be used by  
connecting a  
32768Hz crystal  
oscillator.  
48005120Hz  
48005120Hz  
SSOP2-16  
2
EPSON  
Rev.1.0  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
2. BLOCK DIAGRAM  
2.1 S1T98B00W B0/S1T98B00D B0/S1T98B00M B1  
** ** **  
VBK  
OUT32K  
VDD  
VREG  
XG  
XD  
Level  
shifter  
OSC  
Low  
X
Phase  
1/2  
OUT  
Pass  
Filter  
VCO  
Divider  
Ditector  
N
1/2  
Divider  
XN  
XX  
VSS  
PWDX  
2.2 S1T98B00W D0/S1T98B00D D0/S1T98B00M D1  
** ** **  
VBK  
OUT32K  
VDD  
VREG  
XG  
XD  
Level  
shifter  
OSC  
Low  
X
Phase  
1/2  
OUT  
Pass  
Filter  
VCO  
Divider  
Ditector  
N
1/2  
Divider  
VSS  
PWDX  
Rev.1.0  
EPSON  
3
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
3. PAD LAYOUT AND PIN ASSIGNMENT  
3.1 Pad Layout of S1T98B00W  
0/S1T98B00D 0  
***  
***  
13  
12  
11  
OUT  
16  
TSEN  
15  
SNX  
14  
TS[0]  
VDD  
VDD  
17  
PWDX  
10  
18  
XN  
TS[3]  
Y=1900  
9
(0,0)  
19  
TS[2]  
XX  
8
20  
TS[1]  
V
C
7
21  
V
REG  
VSS  
1
2
3
4
5
6
V
SS  
V
BK  
PWDX32  
OUT32K  
XD  
XG  
X=2000  
Chip size is the value of the scribe line centered.  
VSS across 1 and 21 should be internally shorted.  
VDD across 12 and 13 should be internally shorted.  
4
EPSON  
Rev.1.0  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
3.2 Pad coordinates of S1T98B00W  
0/S1T98B00D 0  
***  
***  
Unit : µm  
No.  
1
Pin name  
X
Y
VSS  
VBK  
-744.975  
-513.975  
-279.300  
-44.625  
190.050  
424.725  
858.375  
858.375  
858.375  
858.375  
277.050  
4.575  
-230.100  
-461.550  
-606.600  
-751.650  
-844.650  
-844.650  
-844.650  
-858.375  
-844.650  
-794.625  
-794.625  
-794.625  
-794.625  
-794.625  
-794.625  
-235.575  
-90.525  
54.525  
199.575  
753.525  
794.625  
794.625  
808.350  
808.350  
808.350  
276.225  
41.550  
2
3
PWDX32  
OUT32K  
XD  
4
5
6
XG  
7
VREG  
TS[1]  
TS[2]  
TS[3]  
OUT  
VDD  
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
VDD  
TS[0]  
SNX  
TSEN  
PWDX  
XN  
XX  
-193.050  
-395.700  
-543.975  
VC  
VSS  
Zero position: Chip center  
VSS across 1 and 21 should be internally shorted.  
VDD across 12 and 13 should be internally shorted.  
3.3 Cross-Sectional Dimensions  
400 ± 30  
Max. 50  
Max. 30  
Unit: µm  
3.4 Pad Dimensions  
Pad pitch: 230µm (Min.)  
Pad opening: 90µm × 90µm  
Rev.1.0  
EPSON  
5
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
3.5 Pin Assignment of S1T98B00M B1 (SOP3A-16)  
**  
16  
9
Pin No.  
Pin Name  
Pin No.  
9
Pin Name  
OUT32K  
XG  
1
2
3
4
5
6
7
8
VDD  
10  
PWDX  
XN  
11  
XD  
12  
XX  
13  
VSS  
14  
VBK  
15  
OUT  
(TEST)  
16  
Note: Pin 8 is a test pin that is provided with a  
PULL DOWN.  
1
8
Leave it unconnected (floating).  
3.6 Pin Assignment of S1T98B00M D1 (SSOP2-16)  
**  
16  
9
Pin No.  
Pin Name  
VSS  
Pin No.  
9
Pin Name  
1
2
3
4
5
6
7
8
VBK  
10  
(TEST)  
OUT32K  
XD  
11  
12  
OUT  
VDD  
PWDX  
INDEX  
13  
XG  
14  
15  
16  
(TEST)  
Note: Pins 3 and 16 are test pins that are provided  
with a PULL DOWN.  
1
8
Leave it unconnected (floating).  
6
EPSON  
Rev.1.0  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
4. PIN DESCRIPTION  
4.1 Pin Description  
Pin Name  
I/O  
Function  
VDD  
+ power Power supply to PLL section VDD = 2.7 to 3.6V  
supply  
VBK  
VSS  
+ power Power supply to crystal oscillator section VBK = 1.8 to 3.6V  
supply  
- power VSS = 0V  
supply  
XG  
I
Gate input for crystal oscillator  
x Connect to one end of the 32.768kHz crystal oscillator.  
Drain output for crystal oscillator  
XD  
O
O
I
x Connect to one end of the 32.768kHz crystal oscillator.  
32.768kHz crystal oscillator signal output  
OUT32K  
PWDX32  
x Electrostatic protection is provided between this pin and VBK.  
Test pin  
(Leave it unconnected, or floating).  
PLL oscillator signal output.  
OUT  
PWDX  
O
I
When input is LOW the PLL oscillator circuit stops.  
When input is HIGH the PLL oscillator circuit starts.  
Since no internal terminal processing (PULL UP or PULL DOWN) is carried out, this pin  
must be tied HIGH or LOW.  
x Electrostatic protection is provided between this pin and VBK.  
XN  
XX  
I
I
S1T98B00 B Pin that selects the divider setting for the divider at PLL oscillator  
*** *  
feedback side.  
Since no internal terminal processing (PULL UP or PULL DOWN) is carried out, this pin  
must be tied HIGH or LOW.  
(For details, see Section 5. FUNCTIONAL DESCRIPTION.)  
x This pin must be left open for the S1T98B00***D*.  
(This pin must be left floating for the S1T98B00***D*.)  
x Electrostatic protection is provided between this pin and VBK.  
S1T98B00 B Pin that selects the divider setting for the divider at PLL oscillator  
*** *  
output side.  
Since no internal terminal processing (PULL UP or PULL DOWN) is carried out, this pin  
must be tied HIGH or LOW.  
(For details, see Section 5. FUNCTIONAL DESCRIPTION.)  
x This pin is to be used as a test pin for the S1T98B00***D*.  
(This pin must be left floating for the S1T98B00***D*.)  
x Electrostatic protection is provided between this pin and VBK.  
Pin that monitors the operating voltage (approx. 1.4V) of oscillator section.  
VREG  
VC  
O
(TEST) (Leave it unconnected, or floating).  
O
Pin that monitors the output of charge pump in the PLL oscillation circuit.  
(TEST) (Leave it unconnected, or floating)  
Enable test mode.  
(TEST) (Leave it unconnected, or floating)  
Test inputs.  
(TEST) (Leave it unconnected, or floating)  
Test input.  
(TEST) (Leave it unconnected, or floating)  
TSEN  
TS[0] to [3]  
SNX  
I
I
I
Rev.1.0  
EPSON  
7
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
4.2 Series Name - Pin Number Correspondence Table  
S1T98B00W B0  
S1T98B00W D0  
**  
**  
(Wafer)  
(Wafer)  
S1T98B00D B0  
S1T98B00D D0  
**  
**  
Pin Name  
I/O  
(CHIP)  
(CHIP)  
S1T98B00M B1  
S1T98B00M D1  
**  
**  
(SOP3A-16)  
(SSOP2-16)  
VDD  
VBK  
VSS  
+ power  
{
{
supply  
+ power  
{
{
{
{
supply  
- power  
supply  
XG  
XD  
OUT32K  
PWDX32  
OUT  
PWDX  
XN  
I
{
{
{
{
{
{
O
O
I
O
{
{
{
{
{
{
I
I
XX  
VREG  
I
O
(TEST)  
VC  
TSEN  
O
(TEST)  
I
(TEST)  
TS[0] to [3]  
SNX  
I
(TEST)  
I
(TEST)  
8
EPSON  
Rev.1.0  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
4.3 Relationship Between Input Pins (PWDX, XX, and XN) and Power Supply  
Note that XX and XN pins are only applicable to the S1T98B00W10B0, S1T98B00D10B0, and  
S1T98B00M10B1.  
VDD  
VBK  
Electrostatic  
protection  
circuit  
Internal circuit  
Electrostatic  
protection  
circuit  
VSS  
5. FUNCTIONAL DESCRIPTION  
Selection of PLL output frequencies (applicable to S1T98B00W10B, S1T98B00D10B0, and S1T98B00M10B1  
only)  
The PLL output frequency can be set via XN and XX pins as shown below.  
N
PLL output frequency = 32768×  
(Hz)  
X
XN  
0
XX  
0
F(IN) (Hz)  
32768  
N
X
4
1
4
1
F(VCO) (Hz)  
72,024,064  
72,024,064  
96,010,240  
96,010,240  
F(OUT) (Hz)  
9,003,008  
36,012,032  
12,001,280  
48,005,120  
1099  
1099  
1465  
1465  
0
1
32768  
1
1
0
1
32768  
32768  
Asserting PWDX pin low stops the PLL oscillator circuit (OUT pin output = LOW).  
External component for the oscillator section x x x Crystal oscillator (32.768kHz)  
Rev.1.0  
EPSON  
9
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
6. ABSOLUTE MAXIMUM RATINGS  
VSS = 0V  
Parameter  
Supply voltage  
Symbol  
VDD  
Condition  
Min.  
-0.3  
Typ.  
Max.  
4.5  
Unit  
V
VBK  
-0.3  
4.5  
V
Input voltage  
Storage temperature  
VIN  
TSTG  
VSS-0.3  
-55  
VBK+0.3  
+125  
V
°C  
7. ELECTRICAL CHARACTERISTICS  
7.1 Operating Range  
VSS = 0V  
Parameter  
Supply voltage  
Symbol  
VDD  
Condition  
Min.  
2.7  
Typ.  
Max.  
3.6  
Unit  
V
VBK  
1.8  
3.6  
V
Supply voltage with PLL running  
Output load  
VBKP  
VBK pin  
VDD-0.1  
VDD+0.1  
15  
V
CL32K OUT32K pin, CMOS load  
pF  
pF  
°C  
CLPLL  
TSTG  
OUT pin, CMOS load  
15  
85  
Operating temperature  
-40  
Note: VBK should be kept equal to VDD when PLL is running.  
7.2 DC Characteristics  
(No load unless otherwise specified, VSS = 0V, VBK = VDD = 2.7 to 3.6V, Ta = -40 to +85°C)  
Parameter  
Current consumption 1 (when  
PLL operation is stopped)  
Current consumption 2 (when  
PLL operation is stopped)  
Input HIGH voltage  
Symbol  
Condition  
VBK = 1.8 to 3.6V,  
VDD = 0V  
Min.  
Typ.  
Max.  
Unit  
IOP1  
3
µA  
VBK = VDD = 2.7 to 3.6V,  
PWDX = HIGH  
PWDX, XX and XN pins  
PWDX, XX and XN pins  
IOP2  
15  
mA  
VIH  
VIL  
0.8VDD  
-0.3  
VDD+0.2  
0.2VDD  
V
V
Input LOW voltage  
Output HIGH voltage,  
crystal oscillator output  
Output LOW voltage,  
crystal oscillator output  
Output HIGH voltage,  
PLL oscillator output  
VOH1  
VOL1  
VOH2  
VOL2  
ILK  
OUT32K pin, IOH = 100µA VBK-0.4  
V
OUT32K pin, IOL = 100µA  
0.4  
V
OUT pin, IOH = 4mA  
OUT pin, IOL = -4mA  
VDD-0.4  
V
Output LOW voltage,  
PLL oscillator output  
0.4  
0.5  
V
PWDX, XX and XN pins  
VIN = VDD or VSS  
Input leak current  
-0.5  
10  
µA  
Between TSEN, TST0,  
TST1, TST2, TST3, SNX,  
PWDX32 and VSS  
Test pin (pull down resistor)  
Test pin (pull down resistor 2)  
Rpd  
Rpd2  
Rleak  
300  
300  
1000  
1000  
kΩ  
kΩ  
Between XX and VSS for  
10  
the S1T98B00  
D
*** *  
Insert a resistor between  
XG-VBK, VSS and  
XD-VBK, VSS  
Acceptable leak resistor value  
for XG and XD pins  
200  
MΩ  
10  
EPSON  
Rev.1.0  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
7.3 AC Characteristics  
The AC characteristics shown below are those characteristics which are presented when Seiko Epson C-004SH  
(R1 = 50kMax.) is connected to the S1T98B00M 1.  
***  
(R1 value = Equivalent series resistance; CL value = Load resistance)  
The following characteristics are not guaranteed if any other crystal oscillators or external clocks are used.  
7.3.1 Frequency characteristic of crystal oscillator section output (OUT32K)  
(Unless otherwise specified, VSS = 0V, VBK = 3.0V, Ta = 25°C)  
Parameter  
Output frequency  
Output frequency accuracy  
Temperature characteristics of  
frequency  
Symbol  
fo  
Condition  
Min.  
Typ.  
32.768  
0
Max.  
Unit  
kHz  
ppm  
fo  
-95  
105  
10  
Tf  
Ta = -40 to +85°C  
-170  
0
ppm  
Voltage characteristics of  
frequency  
f/V  
VBK = 1.8 to 3.6V  
-2  
0
2
ppm/V  
7.3.2 Clock characteristics of crystal oscillator section output (OUT32K)  
(Unless otherwise specified, VSS = 0V, VBK = 1.8 to 3.6V, Ta = -40 to +85°C)  
Parameter  
Symbol  
tr1  
Condition  
Min.  
Typ.  
Max.  
100  
100  
60  
Unit  
ns  
ns  
%
Output rise time  
Output fall time  
20% 80%  
tf1  
80% 20%  
DUTY  
tw / t1  
VTH = VBK/2  
40  
50  
Time to start oscillation (Note 1)  
Tsta1  
VBK = 0 1.8 to 3.6V  
3
s
Note 1: The above Tsta1 (time to start oscillation) defines the time the crystal oscillation output falls within fo ±  
1%.  
7.3.3 Frequency characteristic of PLL oscillator section output (OUT)  
(Unless otherwise specified, VSS = 0V, VBK = VDD = 3.0V, Ta = 25°C)  
Parameter  
Output frequency  
Symbol  
fpll  
Condition  
N = 1465 or 1499,  
X = 1 or 4  
Min.  
Typ.  
Max.  
Unit  
kHz  
ppm  
ppm  
32.768*N/X  
Output frequency  
Temperature characteristics of  
frequency  
fpll  
Tfpll  
-95  
0
0
105  
10  
Ta = -40 to +85°C  
-170  
Voltage characteristics of  
frequency  
fpll/V  
VBK = VDD = 2.7 to 3.6V  
-2  
0
2
ppm/V  
ps  
Period jitter for 48MHz output  
VBK = VDD = 2.7 to 3.6V;  
XN = HIGH, XX = HIGH  
(provided for reference purposes Pj48M  
only)  
Period jitter for 36MHz output  
(provided for reference purposes Pj36M  
only)  
Period jitter for 12MHz output  
(provided for reference purposes Pj12M  
only)  
100  
for the S1T9800 B .  
*** *  
VBK = VDD = 2.7 to 3.6V;  
XN = LOW, XX = HIGH  
150  
150  
200  
ps  
ps  
ps  
for the S1T9800 B .  
*** *  
VBK = VDD = 2.7 to 3.6V;  
XN = HIGH, XX = LOW  
for the S1T9800 B .  
*** *  
Period jitter for 9MHz output  
(provided for reference purposes  
only)  
VBK = VDD = 2.7 to 3.6V;  
Pj9M  
XN = LOW, XX = LOW for  
the S1T9800 B .  
*** *  
Note 2: The period jitters are provided for reference purposes only. Precise measurement of these values  
should depend on the technique or instruments used. For details, see Section 8, Period Jitters.  
Rev.1.0  
EPSON  
11  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
7.3.4 Clock characteristic of PLL oscillator section output (OUT)  
(Unless otherwise specified, VSS = 0V, VBK = VDD = 2.7 to 3.6V, Ta = -40 to +85°C)  
Parameter  
Symbol  
tr2  
Condition  
Min.  
Typ.  
Max.  
Unit  
Output rise time  
Output fall time  
DUTY  
Time to start oscillation 1  
(Note 2)  
20% 80%  
5
5
ns  
tf2  
80% 20%  
ns  
tw / t2  
Tstap1  
VTH = VDD/2  
40  
50  
60  
Tsta1+  
0.01  
%
VBK = VDD = 0  
s
2.7 to 3.6V  
VBK = 2.7 to 3.6V,  
VDD = 0V VBK, or VBK  
= VDD = 2.7 to 3.6V,  
PWDX = LOW HIGH  
PWDX = HIGH LOW  
Time to start oscillation 2  
(Note 2)  
Tstap2  
Tstp  
0.01  
100  
s
Time to stop oscillation  
ns  
Note 3: The above Tstap1 and Tstap2 (time to start oscillation) define the time the PLL oscillation output falls  
within fp11±1%.  
12  
EPSON  
Rev.1.0  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
Clock characteristics of crystal oscillator section output (OUT32K)  
OUT32K  
T1  
TW  
tr1  
tf1  
T
W
tw / t1 =  
T
1
PWDX32  
or  
VBK  
Tsta1  
Stabilization period  
OUT32K  
Clock characteristic of PLL oscillator section output (OUT)  
OUT  
T
2
T
W2  
tr2  
tf2  
T
W2  
tw / t2 =  
T
2
VBK &  
VDD  
or  
PWDX32  
Tsta1  
Stabilization period  
OUT32K  
OUT  
Tstap1  
Stabilization period  
Tstap2=Tsta1+Tstap1  
VDD  
or  
PWDX  
Tstap2  
Stabilization period  
OUT  
Rev.1.0  
EPSON  
13  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
8. PERIOD JITTERS  
The standard value for period jitter Pj is the difference between the maximum and minimum of the period in any  
10,000 cycles.  
T
1
T
2
T
3
T
9999  
T10000  
Pj=Tmax-Tmin  
Tmax=Max.(Tn),n=1 to 10000  
Tmin=Min.(Tn),n=1 to 10000  
Package: SOP3A-8 (S1F98B00M10B1) is used.  
Locate 0.1µF ceramic capacitors (used as bypass capacitors) as close as possible to the package to place them  
between VDD and VSS, VDD2 and VSS, and VBK and VSS and measure the jitter.  
Instruments: Use the standard instruments provided by Seiko Epson.  
9. EXTERNAL CONNECTION EXAMPLES  
9.1 Reference External Connection Example 1  
Short VBK and VDD.  
Recommended crystal oscillator: Seiko Epson C-004SH (R1 = 50kMax.)  
OUT  
C
C
1
=C  
2
=0.1µF  
VDD  
3=C  
4=1nF  
C
1
C3  
TSEN SNX  
TS[0]  
VDD  
OUT  
PWDX  
XN  
XX  
TS[3]  
TS[2]  
TS[1]  
VC  
VREG  
VSS  
VBK  
PWDX32 OUT32K  
XG  
XD  
C2  
C4  
OUT32K  
14  
EPSON  
Rev.1.0  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
9.2 Reference External Connection Example 2  
Separate VBK and VDD.  
Note that VBK should be kept equal to VDD when PLL is running.  
Recommended crystal oscillator: Seiko Epson C-004SH (R1 = 50kMax.)  
OUT  
C
C
1
=C  
2
=0.1  
µ
F
V
DD  
3=C  
4
=1nF  
C
1
C3  
V
BK  
TSEN SNX  
TS[0]  
VDD  
OUT  
PWDX  
XN  
XX  
TS[3]  
TS[2]  
TS[1]  
VC  
VREG  
V
SS  
BK  
V
PWDX32 OUT32K  
XG  
XD  
C
2
C
4
OUT32K  
Rev.1.0  
EPSON  
15  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
9.3 Implementation Guidelines  
1) VSS should be connected to the ground plane of PCB.  
2) The VBK should be kept equal to VDD when PLL is running.  
3) C1 to C4 are ceramic bypass capacitors. C1 and C2 must have a value of 0.1µF and C3 and C4 = 1nF. It  
is important to place them as close to the + power supply pins, VDD and VBK, as possible and connect the  
other ends to a ground plane on the PCB. Make the length of wiring as short as possible so that the area  
of loop between each positive power supply and ground is minimized.  
Applying excessive level of extraneous noise to power source or input terminal may cause latch up or  
spurious phenomenon, which results in malfunction and breakdown.  
4) The crystal oscillators must be placed as close to XG and XD pins as possible.  
5) Avoid routing signal and/or power supply lines near the oscillator circuit (particularly crystal oscillator).  
6) The insulation resistance between XG and XD pins and PCB should be as high as possible (200Mor  
more).  
7) Avoid condensation, which should cause the crystal oscillator to stop.  
8) Avoid setting up any input pin potential to middle, which results in increased power consumption, reduced  
noise margin, damaged elements, etc. It is recommended that the potential of any input pin be set up as  
close to the VDD or VSS potential as possible.  
Since any input pin has a very high impedance, avoid leaving them open to prevent malfunction caused by  
potential inaccuracies or noise. It is required to use pullup or pulldown resistors on any unused input pins.  
Each of the test pins (VREG, TST0 to TST3, SNX, TSEN, and VC) has a pulldown resistor. Leave them  
floating.  
9) Static electricity  
Although an anti-static-electricity protection circuit is provided in the circuit, excessive levels of static  
electricity may damage the IC. Choose conductive materials for packing and container. Use a soldering  
gun and a measuring circuit free from high-voltage leak and provide grounding connection when working  
with them.  
16  
EPSON  
Rev.1.0  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
10. PACKAGE OUTLINE DIMENSIONS  
10.1 SOP3A-16  
[Note] These dimensions are subject to change without notice.  
Reference  
Plastic SOP 16pin (225mil) (SOP3A)  
D
D1  
16  
9
INDEX  
θ
1
8
θ2  
R1  
R
C
e
b
L2  
L
L1  
θ3  
Lead type STD (SOP3A-16pin STD)  
Dimension in Millimeters  
Symbol  
Dimension in Inches *  
Min.  
Nom.  
Max.  
Min.  
Nom.  
Max.  
E
4.2  
4.4  
4.6  
(0.166)  
(0.173)  
(0.181)  
D1  
A
1.7  
(0.066)  
A1  
0.05  
1.5  
1.27  
0.4  
0.15  
(0.002)  
(0.059)  
(0.050)  
(0.016)  
(0.006)  
A2  
e
b
0.3  
0.5  
(0.012)  
(0.019)  
C
θ
0
0.3  
10  
0.7  
(0)  
(0.012)  
(10)  
(0.027)  
L
0.5  
0.9  
(0.020)  
(0.035)  
L1  
L2  
HE  
5.9  
10  
6.2  
10.2  
6.5  
10.4  
(0.233)  
(0.394)  
(0.244)  
(0.402)  
(0.255)  
(0.409)  
D
θ2  
θ3  
R
R1  
* for reference  
Rev.1.0  
EPSON  
17  
S1T98B00  
B/S1T98B00  
D Series Technical Manual  
***  
***  
10.2 SSOP2-16  
[Note] These dimensions are subject to change without notice.  
Reference  
Pin No.  
Pin Name  
VSS  
Pin No.  
9
Pin Name  
1
2
3
4
5
6
7
8
VBK  
10  
D
11  
D1  
OUT32K  
XG  
12  
OUT  
VDD  
PWDX  
13  
16  
9
XD  
14  
15  
16  
INDEX  
θ
1
8
θ2  
R1  
R
C
e
b
L2  
L
L1  
θ3  
Lead type STD (SSOP2-16pin STD)  
Dimension in Millimeters  
Symbol  
Dimension in Inches *  
Min.  
4.2  
Nom.  
4.4  
Max.  
4.6  
Min.  
Nom.  
(0.173)  
(0.260)  
Max.  
E
(0.166)  
(0.252)  
(0.181)  
(0.267)  
(0.066)  
D1  
6.4  
6.6  
6.8  
A
1.7  
A1  
0.05  
1.5  
0.8  
0.36  
0.15  
(0.002)  
(0.059)  
(0.031)  
(0.014)  
(0.006)  
A2  
1.4  
1.6  
(0.056)  
(0.062)  
e
b
0.26  
0.1  
0°  
0.46  
0.25  
10°  
(0.011)  
(0.004)  
(0°)  
(0.018)  
(0.009)  
(10°)  
C
θ
L
0.3  
0.5  
0.9  
0.4  
6.2  
0.7  
(0.012)  
(0.020)  
(0.035)  
(0.016)  
(0.244)  
(0.027)  
L1  
L2  
HE  
5.9  
6.5  
7
(0.233)  
(0.255)  
(0.275)  
D
θ2  
θ3  
R
R1  
* for reference  
18  
EPSON  
Rev.1.0  
International Sales Operations  
AMERICA  
ASIA  
EPSON ELECTRONICS AMERICA, INC.  
EPSON (CHINA) CO., LTD.  
HEADQUARTERS  
150 River Oaks Parkway  
23F, Beijing Silver Tower 2# North RD DongSanHuan  
ChaoYang District, Beijing, CHINA  
San Jose, CA 95134, U.S.A.  
Phone: +1-408-922-0200  
Phone: 64106655  
FAX: 64107319  
FAX: +1-408-922-0238  
SHANGHAI BRANCH  
SALES OFFICES  
West  
7F, High-Tech Bldg., 900, Yishan Road,  
Shanghai 200233, CHINA  
1960 E.Grand Avenue  
El Segundo, CA 90245, U.S.A.  
Phone: +1-310-955-5300  
Phone: 86-21-5423-5577  
FAX: 86-21-5423-4677  
FAX: +1-310-955-5400  
FAX: +1-815-455-7633  
FAX: +1-781-246-5443  
EPSON HONG KONG LTD.  
20/F., Harbour Centre, 25 Harbour Road  
Wanchai, Hong Kong  
Phone: +852-2585-4600  
Telex: 65542 EPSCO HX  
Central  
101 Virginia Street, Suite 290  
Crystal Lake, IL 60014, U.S.A.  
Phone: +1-815-455-7630  
FAX: +852-2827-4346  
EPSON TAIWAN TECHNOLOGY & TRADING LTD.  
14F, No. 7, Song Ren Road,  
Taipei 110  
Northeast  
301 Edgewater Place, Suite 120  
Wakefield, MA 01880, U.S.A.  
Phone: +1-781-246-3600  
Phone: 02-8786-6688  
FAX: 02-8786-6660  
HSINCHU OFFICE  
Southeast  
3010 Royal Blvd. South, Suite 170  
Alpharetta, GA 30005, U.S.A.  
13F-3, No. 295, Kuang-Fu Road, Sec. 2  
HsinChu 300  
Phone: 03-573-9900  
FAX: 03-573-9169  
Phone: +1-877-EEA-0020  
FAX: +1-770-777-2637  
EPSON SINGAPORE PTE., LTD.  
No. 1 Temasek Avenue, #36-00  
Millenia Tower, SINGAPORE 039192  
EUROPE  
EPSON EUROPE ELECTRONICS GmbH  
HEADQUARTERS  
Phone: +65-6337-7911  
FAX: +65-6334-2716  
Riesstrasse 15  
80992 Munich, GERMANY  
Phone: +49-(0)89-14005-0  
SEIKO EPSON CORPORATION  
KOREA OFFICE  
50F, KLI 63 Bldg., 60 Yoido-dong  
Youngdeungpo-Ku, Seoul, 150-763, KOREA  
FAX: +49-(0)89-14005-110  
DÜSSELDORF BRANCH OFFICE  
Altstadtstrasse 176  
Phone: 02-784-6027  
FAX: 02-767-3677  
51379 Leverkusen, GERMANY  
Phone: +49-(0)2171-5045-0  
GUMI OFFICE  
6F, Good Morning Securities Bldg., 56 Songjeong-Dong,  
Gumi-City, Seoul, 730-090, KOREA  
Phone: 054-454-6027  
- JAPAN -  
SEIKO EPSON CORPORATION  
FAX: +49-(0)2171-5045-10  
UK & IRELAND BRANCH OFFICE  
Unit 2.4, Doncastle House, Doncastle Road  
Bracknell, Berkshire RG12 8PE, ENGLAND  
FAX: 054-454-6093  
Phone: +44-(0)1344-381700  
FAX: +44-(0)1344-381701  
ELECTRONIC DEVICES MARKETING DIVISION  
FRENCH BRANCH OFFICE  
1 Avenue de lAtlantique, LP 915 Les Conquerants  
Z.A. de Courtaboeuf 2, F-91976 Les Ulis Cedex, FRANCE  
IC Marketing Department  
IC Marketing & Engineering Group  
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN  
Phone: +81-(0)42-587-5816  
Phone: +33-(0)1-64862350  
FAX: +33-(0)1-64862355  
FAX: +81-(0)42-587-5624  
BARCELONA BRANCH OFFICE  
Barcelona Design Center  
Edificio Testa, Avda. Alcalde Barrils num. 64-68  
E-08190 Sant Cugat del Vallès, SPAIN  
ED International Marketing Department  
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN  
Phone: +81-(0)42-587-5814  
FAX: +81-(0)42-587-5117  
Phone: +34-93-544-2490  
FAX: +34-93-544-2491  
Scotland Design Center  
Integration House, The Alba Campus  
Livingston West Lothian, EH54 7EG, SCOTLAND  
Phone: +44-1506-605040  
FAX: +44-1506-605041  
S1T98B00 B/S1T98B00  
***  
Technical Manual  
D Series  
***  
SEIKO EPSON CORPORATION  
ELECTRONIC DEVICES MARKETING DIVISION  
EPSON Electronic Devices Website  
http://www.epsondevice.com/  
First issue July, 2003  
H
Printed in Japan  
A

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