SED1230TAB [SEIKO]
Interface Circuit;型号: | SED1230TAB |
厂家: | SEIKO EPSON CORPORATION |
描述: | Interface Circuit |
文件: | 总8页 (文件大小:255K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PF775-04
SED1230 Series
Dot Matrix LCD Controller Driver
SSC5000Series
■12 Character × 4 Line (5 × 7 dot)
■Built-in Character Generator ROM and RAM
■Built-in Power Supply Circuit for LCD
■ DESCRIPTION
The SED1230 Series is a dot matrix LCD controller driver for character display, and can display a maximum of 48
characters, 4 user-defined characters, and a maximum of 64 symbols by means of 4-bit, 8-bit or serial data sent
from a microcomputer.
A built-in character generator ROM is prepared for 256 character types, and each character font consists of 5 × 7
dots. A user-defined character RAM for four characters of 5 × 7 dots are incorporated, and a symbol register is also
incorporated. With these, it is possible to apply this Series to display with a high degree of freedom. This Series
can operate handy units with a minimum power consumption by means of its low power consumption and standby
mode.
The SED1230 Series are classified into SED1230, SED1231, SED1232, and SED1233 depending on the duty of
use and the number of display columns.
■ FEATURES
■ Built-in display RAM
48 characters + 4 user-defined characters + 64 symbols
■ CGROM (for up to 256 characters), CGRAM (4 characters), and symbol register (64 symbols)
■ Number of display columns × number of lines
(12 columns + 1 column for signal) × 4 lines + 52 symbols: SED1230
(12 columns + 1 column for signal) × 3 lines + 52 symbols: SED1231
(12 columns + 1 column for signal) × 2 lines + 52 symbols: SED1232
16 columns × 2 lines + 64 symbols:
■ CR oscillating circuit (incorporating C and R)
■ High-speed MPU interface
SED1233
Interfacing with both 68 series and 80 series MPU
Interfacing in 4 bits/8 bits
■ Serial interface
■ Character font
■ Duty ratio
5 × 7 dots
1/16 (SED1232, SED1233)
1/23 (SED1231)
1/30 (SED1230)
■ Simple command setting
■ Built-in liquid crystal driving power circuit
Voltage boosting circuit, voltage regulating circuit, voltage follower × 4
■ Built-in electronic volume function
■ Low power consumption
100 µA Max. (In normal operation mode:
Including the operating current of the built-in power supply)
20 µA Max. (In standby display mode)
■ Power supply
VDD - VSS (logic section):
–2.4 V to –3.6 V
VDD - V5 (liquid crystal drive section): –5.0 V to –11.0 V (In the case of external power supply)
■ Wide operating temperature range
Ta = -30 to 85°C
■ CMOS process
■ Package:
Die form SED123 D B, SED123 D E (Au bump)
*
*
*
*
SED123 D A, SED123 D C (Al pad)
*
*
*
*
TCP
SED123 T**
*
■ This IC is not designed with a protection against radioactive rays.
1
D0
D1
D2
D3
D4
VS1
D5
D6 (SCL)
D7 (SI)
CAP1+
CAP1–
CAP2+
CAP2–
VR
IF
RES
CS
Cursor control
VOUT
WR (E)
P/S
Command
decoder
SEG driving circuit
COM driving circuit
A0
SEG1–60
SEG1–6
COM1–28
COMS1–3
V1
V2
V3
V4
V5
SED1230 Series
■ PAD SPECIFICATION
173
86
85
174
(0,0)
193
69
58
1
SED1230D 1/30 duty 12 columns + 1 signal column
**
SED1231D 1/23 duty 12 columns + 1 signal column
**
SED1232D 1/16 duty 12 columns + 1 signal column
**
SED1233D 1/16 duty 16 columns
**
↑
#1 Column for CGROM pattern change
Chip size:
Pad pitch:
Chip thickness: 625 ± 25 µm (SED123
525 ± 25 µm (SED123
10.23 × 3.11 mm
110 µm (Min.)
D
D
A, SED123
C, SED123
D
B)
E)
*
*
*
*
D
*
*
*
*
1) A1 pad specification (SED123
D A)
*
*
Pad size: A 86 µm × 135 µm
B 135 µm × 86 µm
2) Au bump specification (SED123
B )
D* *
*
For reference:
Bump sizeA 80 µm × 129 µm
B 129 µm × 80 µm
Bump height 22.5 µm ± 5.5 µm
■ ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
VSS
Value
Unit
V
Power supply voltage (1)
Power supply voltage (2)
–6.0 to +0.3
–16.0 to +0.3
V5 to +0.3
V5
V
Power supply voltage (3)
Input voltage
V1, V2, V3, V4
V
VIN
VO
VSS–0.3 to +0.3
VSS–0.3 to +0.3
–30 to +85
V
V
Output voltage
Operating temperature
Topr
°C
TCP
–55 to +100
Storage temperature
Tstr
°C
Bare chip
–75 to +125
(VCC) VDD
(GND) VSS
VDD
V5
Notes: 1. All the voltage values are based on VDD = 0 V.
2. For voltages of V1, V2, V3 and V4, keep the condition of VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5 at all times.
3. If the LSI is used exceeding the absolute maximum ratings, it may lead to permanent destruction.
In ordinary operation, it is desirable to use the LSI in the condition of electrical characteristics. If the LSI
is used out of this condition, it may cause a malfunction of the LSI and have a bad effect on the reliability
of the LSI.
3
SED1230 Series
■ DC CHARACTERISTICS
(VDD = 0 V, VSS = –3.6 V to –2.4 V, Ta = –30 to 85°C unless otherwise specified.)
Characteristic
Recommended
operation
Symbol
Condition
Min.
–3.6
Typ.
–3.0
Max.
–2.4
Unit
V
Applicable pin
VSS
Power
supply
VSS
V5
voltage (1) Operable
–5.5
–3.0
–2.0
–5.0
*1
Power
supply
Recommended
operation
–11.0
V
V5
voltage (2) Operable
Operable
–11.0
–4.5
VDD
*2
V1, V2
V3, V4
VIHC
VILC
ILI
0.6
×V5
V
V
V
V
V1, V2
V3, V4
*3
Operable
VDD
0.8
×V5
High-level input voltage
Low-level input voltage
Input leakage current
LC driver ON resistance
0.2
×VSS
VDD
VSS
–1.0
0.8
×VSS
*3
VIN = VDD or VSS
1.0
40
µA
*3
RON
Ta=25
°C
V5=–7.0V
20
K
Ω
COM,SEG
*4
∆
V=0.1V
Static current consumption
IDDQ
0.1
5.0
100
20
µ
µA
µA
A
VDD
Dynamic current
consumption
IDD
Display State V5 = –7 V without load
Standby state Oscillation ON,
Power OFF
VDD *5
VDD *6
Sleep state
Oscillation OFF,
Power OFF
5
µA
VDD
Access state fcyc=200KHz
500
8.0
µ
A
VDD *7
*3
Input pin capacity
Reset time
CIN
Ta=25°C
f=1MHz
5.0
pF
tR
1.0
10
µ
µs
s
*8
Reset pulse width
Input voltage
tRW
VSS
VOUT
*9
–3.6
–7.2
–10.8
–11.0
–2.4
V
V
*10
Booster output voltage
Double boosting state
Triple boosting state
VOUT
Voltage follower
operating voltage
Reference voltage
V5
–4.5
–2.7
V
VREG
Ta = 25
°C
–3.5
–3.1
V
*1: A wide operating voltage range is guaranteed but an abrupt voltage variation in the access status of the MPU is not
guaranteed.
*2: The operating voltage range is applicable to the case where an external power supply is used.
*3: D0 - D5, D6 (SCL), D7 (SI), A0, RES, CS WR (E), P/S, IF
*4: This is a resistance value when a voltage of 0.1 V is applied between output pin SEGn, SEGSn, COMn or COMSn, and each
power pin (V1, V2, V3 or V4). It is specified in the range of operating voltage (2).
RON = 0.1 V / ∆I
(∆I: Current flowing when 0.1 V is applied between the power and output)
*5: Character “
” display. This is applicable to the case where no access is made from the MPU and the built-in power circuit
and oscillating circuit are in operation.
*6: This is applicable to the case where the built-in power circuit is OFF and the oscillating circuit is in operation in the standby
mode.
*7: Current consumption when data is always written by fcyc.
The current consumption in the access state is almost proportional to the access frequency (fcyc).
When no access is made, only IDD (I) occurs.
*8: tR (reset time) indicates the internal circuit reset completion time from the edge of the RES signal. Accordingly, the SED123
*
usually enters the operating state after tR.
*9: The minimum pulse width of the RES signal is specified.
To cause a reset operation, it is necessary to input a pulse width exceeding tRW.
*10: When operating the boosting circuit, the power supply VSS must be used within the input voltage range.
4
SED1230 Series
■ CHARACTOR FONT (JIS TYPE STANDARD)
■ SED123*DA*
Lower 4 Bit of Code
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
5
SED1230 Series
■ SED123*DB*
Lower 4 Bit of Code
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
6
SED1230 Series
■ SED123*DG*
Lower 4 Bit of Code
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
7
SED1230 Series
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson
reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any
inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material
is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted
by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any
patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products
under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license from the Ministry of International
Trade and Industry or other approval from another government agency.
© Seiko Epson Corporation 2000 All right reserved.
All other product names mentioned herein are trademarks and/or registered trademarks of their respective companies.
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
■
Electronic devices information on the Epson WWW server.
http://www.epson.co.jp/device/
ED International Marketing Department I (Europe, U.S.A)
421-8 Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: 042
–
587
–
5812 FAX: 042
–587
–5564
ED International Marketing Department II (ASIA)
421-8 Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: 042
–
587
–
5814 FAX: 042
–
587
–
5110
First issue February, 1999
Printed in February, 2000 Japan H
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