SC1453ISK-3.2TRT [SEMTECH]
3.2V FIXED POSITIVE LDO REGULATOR, 0.23V DROPOUT, PDSO5, ROHS COMPLIANT, SOT-23, 5 PIN;
| 型号： | SC1453ISK-3.2TRT |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | 3.2V FIXED POSITIVE LDO REGULATOR, 0.23V DROPOUT, PDSO5, ROHS COMPLIANT, SOT-23, 5 PIN 稳压器 |
| 文件： | 总15页 (文件大小：249K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SC1453
150mA Ultra Low Dropout
Regulator with Low Noise Bypass
POWER MANAGEMENT
Description
Features
The SC1453 is a low dropout linear regulator that
operates from a +2.25V to +6.5V input range and
delivers up to 150mA. A PMOS pass transistor allows
the low 75µA supply current to remain independent of
load, making these devices ideal for battery operated
portable equipment such as cellular phones, cordless
phones and personal digital assistants.
“2982/5205” compatible pinout
Guaranteed 150 mA output current
2% output accuracy guaranteed over line, load and
temperature
Very small external components - designed to work
with ceramic capacitors
Low 26µVRMS output noise
(1.5V option, CIN = COUT = 1µF, CBYP = 10nF)
Very low supply current
Thermal overload protection
Reverse battery protection
The SC1453 has a bandgap reference bypass pin for
very low noise operation - a 10nF (typ.) capacitor may be
connected between this pin and ground. Other features
include low powered shutdown, short circuit protection,
thermal shutdown protection and reverse battery
protection. The SC1453 comes in the tiny 5 lead SOT-23
package and the ultra-low profile 5 lead TSOT-23.
Low power shutdown
Full industrial temperature range
Very low profile packaging available (1mm max. height)
Surface mount packaging (5 pin SOT-23 and
TSOT-23)
Available in Lead-free packages, fully WEEE and RoHS
compliant
Applications
Battery Powered Systems
Cellular Telephones
Cordless Telephones
Personal Digital Assistants
Portable Instrumentation
Modems
PCMCIA cards
Typical Application Circuit
U1
SC1453
1
3
5
VIN
VOUT
IN
OUT
C1
4
C3
1uF
EN
BYP
GND
2
1uF
C2
10nF
Revision: April 21, 2008
1
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SC1453
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Parameter
Symbol
Maximum
Units
Input Supply Voltage
VIN
θJA
-0.6 to +7
256
V
°C/W
°C/W
°C
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case
Operating Ambient Temperature Range
Operating Junction Temperature Range
Storage Temperature Range
81
θJC
TA
-40 to +85
-40 to +125
-65 to 150
300
TJ
°C
TSTG
TLEAD
ESD
°C
Lead Temperature (Soldering) 10 Sec.
ESD Rating
°C
2
kV
Electrical Characteristics
Unless specified: VIN = VOUT + 1V, VEN = VIN, IOUT = 100µA, CIN = COUT = 1µF, TA = 25°C. Values in bold apply over full operating ambient temperature range.
Parameter
Symbol
Conditions
Min
Typ
Max
Units
IN
Supply Voltage Range
Supply Current
VIN
IQ
2.25
6.50
130
160
1.0
V
IOUT = 0mA to150mA
VIN = 6.5V, VEN = 0V
75
µA
0.1
µA
1.5
OUT
Output Voltage (1)
VOUT
IOUT = 1mA
-1.5%
VOUT
2.5
-3
+1.5%
+2.0%
10
V
0mA ≤ IOUT ≤ 150mA, VOUT +1V ≤ VIN ≤ 5.5V -2.0%
(VOUT(NOM) + 0.1V) ≤ VIN ≤ 5.5V, IOUT = 1mA
Line Regulation (1)(2)
Load Regulation (1)
REG(LINE)
REG(LOAD)
mV
mV
12
IOUT = 0.1mA to 150mA
-10
-20
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2
SC1453
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: VIN = VOUT + 1V, VEN = VIN, IOUT = 100µA, CIN = COUT = 1µF, TA = 25°C. Values in bold apply over full operating ambient temperature range.
Parameter
Symbol
Conditions
Min
Typ
Max Units
OUT (Cont.)
Current Limit
Dropout Voltage(1)(3)
ILIM
VD
400
mA
mV
IOUT = 1mA
1
IOUT = 50mA
50
65
75
mV
I
OUT = 100mA
100
150
125
155
190
230
mV
IOUT = 150mA
mV
Output Voltage Noise,
COUT = 1µF
en
en
10Hz to 100kHz, IOUT = 1mA
CBYP = 10nF, VOUT = 1.5V
26
54
13
29
61
µVRMS
10Hz to 100kHz, IOUT = 1mA
CBYP = 10nF, VOUT = 3.3V
Output Voltage Noise,
COUT = 100µF
10Hz to 100kHz, IOUT = 1mA
CBYP = 10nF, VOUT = 1.5V
µVRMS
10Hz to 100kHz, IOUT = 1mA
CBYP = 10nF, VOUT = 3.3V
Power Supply Rejection Ratio
PSRR
tr
f = 120Hz, CBYP = 10nF
dB
ms
V
BYP
Start-up Rise Time
EN
CBYP = 10nF
1.3
Enable Input Threshold
VIH
VIL
IEN
2.25V ≤ VIN ≤ 6.5V
2.25V ≤ VIN ≤ 6.5V
0V ≤ VEN ≤ VIN
1.6
0.4
Enable Input Bias Current (4)
Over Temperature Protection
High Trip Level
-0.5
0
+0.5
µA
THI
150
20
°C
°C
Hysteresis
THYST
Notes:
(1) Low duty cycle pulse testing with Kelvin connections required.
(2) VIN(MIN) = 2.25V.
(3) Defined as the input to output differential at which the output voltage drops 100mV below the value measured
at a differential of 1V. Not measurable on 1.5V and 1.8V parts due to minimum VIN constraints.
(4) Guaranteed by design.
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3
SC1453
POWER MANAGEMENT
Pin Configuration
Top View
(SOT-23-5 & TSOT-23-5)
Pin Descriptions
Pin #
Pin Name
IN
Pin Function
1
2
3
4
Input pin.
GND
EN
Ground pin. Can be used for heatsinking if needed.
Active high enable pin. Connect to IN if not being used.
BYP
Reference bypass. Connect a 10nF capacitor (typical) between this pin and GND to reduce
output noise.
5
OUT
Regulator output, sourcing up to 150mA.
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4
SC1453
POWER MANAGEMENT
Ordering Information
Package
Voltage Option
(V)
Part Number
Package
Voltage Option
(V)
Part Number
TSOT-23-5 (1)
1.5
1.8
SC1453ITSK1.5TR
SC1453ITSK1.8TR
SC1453ITSK2.5TR
SC1453ITSK2.7TR
SC1453ITSK2.8TR
SC1453ITSK285TR
SC1453ITSK2.9TR
SC1453ITSK3.0TR
SC1453ITSK3.1TR
SC1453ITSK3.2TR
SC1453ITSK3.3TR
SC1453ITSK15TRT
SC1453ITSK18TRT
SC1453ITSK25TRT
SC1453ITSK27TRT
SC1453ITSK28TRT
SC1453TSK285TRT
SC1453ITSK29TRT
SC1453ITSK30TRT
SC1453ITSK31TRT
SC1453ITSK32TRT
SC1453ITSK33TRT
SC1453EVB
SOT-23-5 (1)
1.5
1.8
2.5
2.7
2.8
2.9
3.0
3.1
3.2
3.3
1.5
1.8
2.5
2.7
2.8
2.9
3.0
3.1
3.2
3.3
SC1453ISK-1.5TR
SC1453ISK-1.8TR
SC1453ISK-2.5TR
SC1453ISK-2.7TR
SC1453ISK-2.8TR
SC1453ISK-2.9TR
SC1453ISK-3.0TR
SC1453ISK-3.1TR
SC1453ISK-3.2TR
SC1453ISK-3.3TR
SC1453ISK1.5TRT
SC1453ISK18TRT
SC1453ISK2.5TRT
SC1453ISK2.7TRT
SC1453ISK2.8TRT
SC1453ISK2.9TRT
SC1453ISK3.0TRT
SC1453ISK3.1TRT
SC1453ISK3.2TRT
SC1453ISK33TRT
2.5
2.7
2.8
2.85
2.9
3.0
3.1
3.2
Lead-free
3.3
SOT-23-5 (1)(2)
Lead-free
1.5
TSOT-23-5 (1)(2)
1.8
2.5
2.7
2.8
2.85
2.9
3.0
3.1
Notes:
3.2
(1) Only available in tape and reel packaging. A reel
contains 3000 devices.
3.3
(2) Lead free packaging (ordered with suffix extension
“TRT”) is optional. Consult factory for availability. This
product is fully WEEE and RoHS compliant.
(3) Evaluation board for SC1453. Specify output voltage
option when ordering.
Evaluation
Board (3)
Specify
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5
SC1453
POWER MANAGEMENT
Marking Information
Bottom Mark
yyww
Top Mark
x3XX
yyww = Date code
(example: 0008 for week 8 of 2000)
x = package (5 for SOT-23-5, T for TSOT-23-5)
3 = SC1453
XX = voltage option
(examples: 5331 for 3.1V option in SOT-23-5
Bottom Mark
Top Mark
yyww
BX00
yyww = Date code
(example: 0008 for week 8 of 2000)
For SC1453, 2.85V option:
X = L for SOT-23-5 and N for TSOT-23-5
Block Diagram
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SC1453
POWER MANAGEMENT
Applications Information
Theory Of Operation
Component Selection - General
The SC1453 is intended for applications where very low
dropout voltage, low supply current and low output noise
are critical. It provides a very simple, low cost solution
that uses very little pcb real estate. Only three external
capacitors are required for operation (two if a low noise
output is not required).
Output capacitor - Semtech recommends a minimum
capacitance of 1µF at the output with an equivalent
series resistance (ESR) of < 1Ω over temperature. While
the SC1453 has been designed to be used with ceramic
capacitors, it does not have to be used with ceramic
capacitors, allowing the designer a choice. Increasing the
bulk capacitance will further reduce output noise and
improve the overall transient response.
The SC1453 contains a bandgap reference trimmed for
optimal temperature coefficient which is fed into the
inverting input of an error amplifier. The output voltage
of the regulator is divided down internally using a
resistor divider and compared to the bandgap voltage.
The error amplifier drives the gate of a low RDS(ON)
P-channel MOSFET pass device.
Input capacitor - Semtech recommends the use of a 1µF
ceramic capacitor at the input. This allows for the device
being some distance from any bulk capacitance on the
rail. Additionally, input droop due to load transients is
reduced, improving overall load transient response.
Bypass capacitor - Semtech recommends the use of a
10nF ceramic capacitor to bypass the bandgap
reference. Increasing this capacitor to 100nF will
further improve power supply rejection and overall
output noise. CBYP may be omitted if low noise operation
is not required.
An active high enable pin (EN) allows the regulator to be
shut down. Pulling this pin low causes the device to
enter a very low power shutdown mode, where it will draw
typically 0.1µA from the input supply.
A bypass pin (BYP) is provided to decouple the bandgap
reference to reduce output noise and also to improve
power supply rejection. This pin can be left open if low
noise operation is not required.
Thermal Considerations
The worst-case power dissipation for this part is given
by:
The regulator has its own current limit circuitry to
ensure that the output current will not damage the
device during output short, overload or start-up. The
current limit is guaranteed to be greater than 400mA to
allow fast charging of the output capacitor and high
initial currents for DSP initialization.
(1)
P
=
VIN(MAX) − VOUT(MIN) • IOUT(MAX) + VIN(MAX) • IQ(MAX)
( )
D(MAX)
For all practical purposes, equation (1) can be reduced
to the following expression:
PD(MAX)
=
VIN(MAX) − VOUT(MIN) • IOUT(MAX)
( )
(2)
The SC1453 has a fast start-up circuit to speed up the
initial charging time of the bypass capacitor to enable
the output voltage to come up quicker (typically 1.3ms Looking at a typical application, 3.3V to 2.8V at 150mA:
with CBYP = 10nF).
VIN(MAX) = 3.3 + 5% = 3.465V
VOUT(MIN) = 2.8V - 2% = 2.744V
The SC1453 includes thermal shutdown circuitry to turn IOUT = 150mA
off the device if TJ exceeds 150°C (typical), with the TA = 85°C
device remaining off until TJ drops by 20°C (typical).
Reverse battery protection circuitry ensures that the
device cannot be damaged if the input supply is
accidentally reversed, limiting the reverse current to less
than 1.5mA.
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SC1453
POWER MANAGEMENT
Applications Information (Cont.)
Inserting these values into equation (2) gives us:
Layout Considerations
While layout for linear devices is generally not as critical
as for a switching application, careful attention to detail
will ensure reliable operation.
PD(MAX)
=
3.465 − 2.744
( )• 0.150 = 108mW
Using this figure, we can calculate the maximum thermal
impedance allowable to maintain TJ ≤ 125°C:
1) Attaching the part to a larger copper footprint will
enable better heat transfer from the device, especially
on PCBs where there are internal ground and power
planes.
(
TJ(MAX) − TA(MAX)
)
(
125 − 85
)
θJA(MAX)
=
=
= 370°C/ W
PD(MAX)
0.108
2) Place the input, output and bypass capacitors close
to the device for optimal transient response and device
behaviour.
With the standard SOT-23-5/TSOT-23-5 Land Pattern
shown at the end of this datasheet, and minimum trace
widths, the thermal impedance junction to ambient for
SC1453ISK is 256°C/W. Thus no additional heatsinking
is required for this example.
3) Connect all ground connections directly to the ground
plane. If there is no ground plane, connect to a common
local ground point before connecting to board ground.
The junction temperature can be reduced further (or
higher power dissipation can be allowed) by the use of
larger trace widths and connecting PCB copper to the
GND pin (pin 2), which connects directly to the device
substrate. Adding approximately one square inch of PCB
copper to pin 2 will reduce θJA to approximately
130°C/W and TJ(MAX) for the example above to
approximately 100°C for the SOT-23-5 package. The use
of multi layer boards with internal ground/power planes
will lower the junction temperature and improve overall
output voltage accuracy.
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8
SC1453
POWER MANAGEMENT
Typical Characteristics
Quiescent Current vs. Junction Temperature
Off-State Quiescent Current
vs. Junction Temperature
vs. Input Voltage
120
200
175
150
125
100
75
VIN = 6.5V
VEN = 0V
IOUT = 150mA
V
IN = 6.5V
100
80
60
40
20
0
V
IN = 3.8V
50
25
0
-50
-25
0
25
50
75
100
125
125
125
-50
-25
0
25
50
75
100
125
125
125
T
J (°C)
TJ (°C)
Output Voltage vs. Junction Temperature
vs. Output Current
Line Regulation vs. Junction Temperature
vs. Input Voltage Change
0.00
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
12
10
8
I
OUT = 1mA
IOUT = 1mA
IOUT = 50mA
V
IN = VOUT + 1V to 6.5V
6
100mA ≤ IOUT ≤ 150mA
4
2
VIN = VOUT + 1V to 5.5V
VIN = VOUT + 1V
0
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
T
J (°C)
TJ (°C)
Load Regulation vs.
Junction Temperature
Current Limit vs. Junction Temperature
vs. Input Voltage
10
9
8
7
6
5
4
3
2
1
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
VIN = VOUT + 1V
IOUT = 0.1mA to 150mA
VIN = 6.5V
VIN = 3.8V
0
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
T
J (°C)
TJ (°C)
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SC1453
POWER MANAGEMENT
Typical Characteristics (Cont.)
Dropout Voltage vs. Junction Temperature
Dropout Voltage vs. Output Current
vs. Junction Temperature
vs. Output Current
200
200
175
150
125
100
75
175
150
IOUT = 150mA
125
100
75
Top to bottom:
TJ = 125°C
TJ = 25°C
50
50
IOUT = 50mA
25
0
25
TJ = -40°C
0
-50
-25
0
25
50
75
100
125
0
25
50
75
100
125
150
TJ (°C)
IOUT (mA)
Bypass Start-up Rise Time vs. Junction Temperature
vs. Input Voltage
Enable Input Threshold Voltage vs. Junction
Temperature vs. Input Voltage
1.8
1.6
CBYP = 10nF
1.7
1.4
1.2
1.0
0.8
0.6
0.4
VIH @ VIN = 6.5V
IH @ VIN = 3.8V
1.6
1.5
V
VIN = 3.8V
1.4
1.3
1.2
VIL @ VIN = 6.5V
1.1
V
IL @ VIN = 3.8V
VIN = 6.5V
1.0
0.9
0.8
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
TJ (°C)
TJ (°C)
Reverse Battery Protection vs.
Junction Temperature
Output Spectral Noise Density vs. Frequency
vs. Output Voltage, COUT = 1µF
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
10
VIN = VEN = -6.5V
VIN = VOUT + 1V
IOUT = 1mA
CIN = 1µF
1
0.1
C
BYP = 10nF
TJ = 25°C
Top to bottom:
VOUT = 3.3V
V
OUT = 3.0V
VOUT = 2.8V
VOUT = 2.5V
0.01
0.001
V
OUT = 1.8V
VOUT = 1.5V
-50
-25
0
25
50
75
100
125
0.01 0.1
1
10
100
1000
T
J (°C)
f (kHz)
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SC1453
POWER MANAGEMENT
Typical Characteristics (Cont.)
Output Spectral Noise Density vs. Frequency
vs. Output Voltage, COUT = 100µF
Output Spectral Noise Density vs. Frequency
vs. Output Capacitance
10
10
VIN = VOUT + 1V
Left to right:
COUT = 100µF
IOUT = 1mA
C
OUT = 44µF
CIN = 1µF
1
1
COUT = 22µF
COUT = 10µF
C
BYP = 10nF
TJ = 25°C
C
OUT = 1µF
0.1
0.01
0.1
Top to bottom:
VOUT = 3.3V
VOUT = 1.5V
V
OUT = 3.0V
VIN = 2.5V
IOUT = 1mA
VOUT = 2.8V
VOUT = 2.5V
0.01
C
BYP = 10nF
V
OUT = 1.8V
CIN = 1µF
TJ = 25°C
VOUT = 1.5V
0.001
0.001
0.01
0.1
1
10
100
1000
1000
1000
0.01
0.1
1
10
100
1000
f (kHz)
f (kHz)
Output Spectral Noise Density vs. Frequency
vs. Bypass Capacitance
Output Spectral Noise Density vs. Frequency
vs. Output Current
10
10
Top to bottom:
CBYP = 1nF
CBYP = 10nF
I
I
OUT = 150mA
OUT = 100mA
C
BYP = 100nF
1
0.1
1
0.1
IOUT = 50mA
IOUT = 1mA
CBYP = 1µF
VOUT = 1.5V
VIN = 2.5V
CIN = 1µF
BYP = 10nF
COUT = 1µF
TJ = 25°C
VOUT = 1.5V
VIN = 2.5V
IOUT = 1mA
0.01
0.01
C
C
IN = 1µF
COUT = 1µF
TJ = 25°C
0.001
0.001
0.01
0.1
1
10
100
0.01
0.1
1
10
100
1000
f (kHz)
f (kHz)
Power Supply Rejection Ratio vs. Frequency
vs. Output Voltage, CBYP = 10nF
Power Supply Rejection Ratio vs. Frequency
vs. Output Voltage, CBYP = 100nF
80
80
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
Top to bottom:
VOUT = 1.5V
OUT = 2.5V
Top to bottom:
OUT = 1.5V
VOUT = 1.8V
OUT = 2.5V
VOUT = 2.8V
VOUT = 3.0V
VOUT = 3.3V
V
V
VOUT = 1.8V
VOUT = 2.8V
VOUT = 3.0V
V
VIN = VOUT + 1V
IN = COUT = 1µF
CBYP = 10nF
IOUT = 1mA
TJ = 25°C
VIN = VOUT + 1V
IN = COUT = 1µF
CBYP = 100nF
IOUT = 1mA
TJ = 25°C
V
OUT = 3.3V
C
C
0.01
0.1
1
10
100
0.01
0.1
1
10
100
1000
f (kHz)
f (kHz)
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11
SC1453
POWER MANAGEMENT
Evaluation Board Schematic
J1
RIPPLE MON
J2
IN MON
J3
U1
SC1453
OUT
J4
1
3
5
4
IN
R1
IN
OUT MON
C1
C2
R4
C3
C4
R2
R3
BYP
EN
GND
2
J5
J6
1
2
C5
J8
EN
J7
IQ MON
FLG
1
2
3
EN
J9
Q1
LOAD DRV
J10
J11
J12
J13
J14
J15
GND GND GND GND GND GND
1
2
3
4
8
7
6
5
S
S
S
G
D
D
D
D
J16
1
2
3
Si4410
LOAD DRV EN
Evaluation Board Bill of Materials
Quantity
Reference
C1, C4
Part/Description
Not placed
1µF ceramic
10nF ceramic
BNC socket
Test pin
Vendor
Notes
2
2
1
1
3
1
1
1
2
1
6
1
2
1
1
1
C2, C3
C5
Murata
Various
Various
Various
Various
Various
GRM42-6X7R105K10
J1
VOUT ripple monitor
J2 - J4
J5
Red
Test pin
White
J6
Header, 2 pin
Not placed
Header, 3 pin
Test pin
J7
J8, J16
J9
Various
Various
Various
Vishay
Orange
J10 - J15
Q1
Test pin
Black (J14 not placed)
Si4410
R1, R2
R3
Not placed
See next page
10kΩ, 1/10W
Various
Various
R4
U1
SC1453ISK-X.X or
SC1453ITSK-XX
Semtech
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12
SC1453
POWER MANAGEMENT
Evaluation Board Gerber Plots
Top Copper
Bottom Copper
Output Voltage Option (V)
R3 Value/Size
1.5
1.8
2.5
2.6
2.7
2.8
2.85
2.9
3.0
3.1
3.2
3.3
10Ω/0.5W
12Ω/0.5W
16Ω/0.5W
16Ω/0.5W
18Ω/0.5W
18Ω/0.5W
18Ω/0.5W
18Ω/0.5W
20Ω/0.5W
20Ω/0.5W
22Ω/0.5W
22Ω/0.5W
Top Silk Screen
www.semtech.com
2008 Semtech Corp.
13
SC1453
POWER MANAGEMENT
Outline Drawing - SOT-23-5
DIMENSIONS
INCHES MILLIMETERS
A
DIM
A
MIN NOM MAX MIN NOM MAX
e1
D
E
-
-
-
-
.035
.057 0.90
.006 0.00
1.45
0.15
A1 .000
A2 .035 .045 .051
.90
.020 0.25
.009 0.08
1.15 1.30
N
1
-
-
-
-
b
.010
.003
0.50
0.22
2X
E/2
c
EI
D
.110 .114 .118 2.80 2.90 3.00
E1 .060 .063 .069 1.50 1.60 1.75
2
E
.110 BSC
.037 BSC
.075 BSC
2.80 BSC
0.95 BSC
1.90 BSC
ccc C
2X N/2 TIPS
e
e1
L
e
.012 .018 .024 0.30 0.45 0.60
(.024)
(0.60)
L1
N
B
5
5
-
-
01
0°
10°
0°
10°
aaa
.004
.008
.008
0.10
0.20
0.20
D
bbb
ccc
aaa C
A2
A
SEATING PLANE
A1
bxN
bbb
H
C
c
GAGE
C A-B D
PLANE
0.25
L
01
(L1)
DETAIL A
SEE DETAIL
A
SIDE VIEW
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-
3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
Land Pattern - SOT-23-5
X
DIMENSIONS
DIM
INCHES
(.098)
.055
MILLIMETERS
(2.50)
1.40
0.95
0.60
1.10
3.60
C
G
P
X
Y
Z
(C)
G
Z
.037
.024
Y
.043
.141
P
NOTES:
1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
www.semtech.com
2008 Semtech Corp.
14
SC1453
POWER MANAGEMENT
Outline Drawing - TSOT-23-5
DIMENSIONS
INCHES MILLIMETERS
A
DIM
A
MIN NOM MAX MIN NOM MAX
-
-
-
-
-
-
-
-
-
-
-
-
.039
1.00
0.10
0.90
0.50
0.20
e1
D
E
A1 .000
.004 0.00
.035 0.70
.020 0.30
.008 0.08
.028
.012
.003
A2
b
N
2X E/2
ccc
c
E1
D
.110 .114 .118 2.80 2.90 3.00
E1 .060 .063 .067 1.50 1.60 1.70
1
2
E
.110 BSC
.037 BSC
.075 BSC
2.80 BSC
0.95 BSC
1.90 BSC
C
e
e1
L
2X N/2 TIPS
.012 .018 .024 0.30 0.45 0.60
e
(.024)
(0.60)
L1
N
B
5
5
-
-
01
aaa
0°
8°
0°
8°
.004
.008
.010
0.10
0.20
0.25
D
bbb
ccc
aaa
C
A2
A
SEATING
PLANE
H
A1
bxN
bbb
C
c
GAGE
PLANE
0.25
C
A-B D
L
01
(L1)
DETAIL A
SEE DETAIL A
SIDE VIEW
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-
3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
REFERENCE JEDEC STD MO-193, VARIATION AB.
4.
Land Pattern - TSOT-23-5
DIMENSIONS
X
DIM
INCHES
(.087)
.031
MILLIMETERS
(2.20)
0.80
0.95
0.60
1.40
3.60
C
G
P
X
Y
Z
(C)
G
Z
.037
Y
.024
.055
.141
P
NOTES:
1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
www.semtech.com
2008 Semtech Corp.
15
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