SC4524 [SEMTECH]
Programmable Frequency, 2A Output 30V Step-Down Switching Regulator; 可编程频率， 2A输出30V降压型开关稳压器
| 型号： | SC4524 |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | Programmable Frequency, 2A Output 30V Step-Down Switching Regulator |
| 文件： | 总21页 (文件大小：1196K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SC4524
Programmable Frequency, 2A Output
30V Step-Down Switching Regulator
POWER MANAGEMENT
Description
Features
The SC4524 is an adjustable frequency peak current- ꢀ Up to 1.5 MHz Programmable Switching Frequency
mode step-down switching regulator with an integrated
2.3A, 30V switch. The SC4524 can be programmed up
to 1.5MHz. This allows the use of small inductor and
ceramic capacitors, resulting in very compact power
supplies. The SC4524 is suitable for next generation XDSL
modems, set-top boxes and point of load applications.
ꢀ 2.3A Integrated Switch
ꢀ Wide Input Voltage Range 2.8V to 30V
ꢀ Peak Current-Mode Control with Cycle-by-Cycle
Current Limiting
ꢀ Hiccup Overload Protection
ꢀ Soft-Start and Enable
ꢀ Thermal Shutdown
ꢀ Thermally Enhanced 8-Pin SOIC Package
ꢀ Fully WEEE and RoHS Compliant
The SC4524 uses peak current-mode PWM control for
ease of compensation. Cycle-by-cycle current limit and
hiccup overload protection reduce power dissipation
during overload. Combined soft start and enable pin not
only eliminates output start up overshoot but also allows
power sequencing.
The SC4524 is available in SOIC-8 EDP package.
Applications
ꢀ XDSL and Cable Modems
ꢀ Set-top Boxes
ꢀ Point of Load Applications
ꢀ CPE Equipment
ꢀ DSP Power Supplies
ꢀ Disk Drives
Typical Application Circuit
Efficiency
90
V
24V
IN
85
80
D1
IN
SS
BST
C2
1N4148
0.1ꢀF
C7
L1
OUT
22nF
75
SC4524
SW
FB
4.7ꢀH
5V/2A
R1
22.1k
70
COMP
ROSC
GND
R5
15.4k
65
60
55
50
D2
20BQ030
C6
C3
R2
C1
22pF
5.49k
10ꢀF
22ꢀF
R3
17.4k
C5
470pF
L1: Coiltronics FP3-4R7
C1: Murata GRM21BR60J226M
C3: Murata GRM32ER71H106K
0.0
0.5
1.0
1.5
2.0
Load Current (A)
Figure 1. 1MHz 24V to 5V/2A Step-down Converter.
Revision: December 30th, 2006
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SC4524
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Parameter
Symbol
Max
Units
Input Voltage
BST Pin
VIN
VBST
-0.3 to 32
42
V
V
V
V
V
V
BST Pin Above SW
SS Pin
VBST-VSW
VSS
24
3
FB Pin
VFB
-0.3 to VIN
-0.6 to VIN
VIN +1.5
-2.5
VSW
SW Voltage
SW Transient Spikes (<10ns Duration)
VSW
V
Operating Ambient Temperature Range
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case
Maximum Junction Temperature
TA
θJA
-40 to 85
36
°C
°C/W
°C/W
°C
5.5
θJC
TJ
150
Storage Temperature Range
TSTG
TLEAD
ESD
-65 to +150
300
°C
Lead Temperature (Soldering)10 sec
ESD Rating (Human Body Model)
°C
1500
V
Notes: This device is ESD sensitive. ESD handling precaution is required.
Electrical Characteristics
Unless specified: -40°C < TA < 85°C, -40°C < TJ< 105°C, ROSC = 12.1kΩ, VIN = 5V, VBST = 8V
Parameter
Conditions
Min
Typ
Max
Units
Maximum Operating VIN
VIN Start Voltage
30
V
V
2.45
2.62
75
2.78
VIN Start Hysteresis
mV
mA
µA
V
VIN Quiescent Current
Not switching
VSS = 0V
3.5
5
VIN Quiescent Current in Shutdown
Feedback Voltage
40
60
0.980
1.000
0.005
-15
1.020
Feedback Voltage Line Regulation
FB Pin Input Bias Current
VIN = 3V to 30V
%/V
VFB = 1V, VCOMP = 1.5V
-30
nA
Error Amplifier Transconductance
280
µΩ-1
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SC4524
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: -40°C < TA < 85°C, -40°C < TJ< 105°C, ROSC = 12.1kΩ, VIN = 5V, VBST = 8V
Parameter
Conditions
Min
Typ
Max
Units
Error Amplifier Open-Loop Gain
COMP Source Current
COMP Sink Current
53
20
20
8
dB
µA
µA
A/V
V
V
V
FB = 0.8V, VCOMP = 1.5V
FB = 1.2V, VCOMP = 1.5V
COMP Pin to Switch Current Gain
COMP Switching Threshold
COMP Maximum Voltage
Switching Frequency
0.7
1.1
2.2
1.4
90
3.2
0.3
1.3
1.6
V
FB = 0.9V
V
1.2
80
MHz
%
Maximum Duty Cycle
(Note 2)
(Note 1)
Switch Current Limit
2.3
A
Switch Saturation Voltage
Switch Leakage Current
Minimum BST Voltage
ISW = -2A
V
10
µA
V
ISW = -2A
1.8
20
60
2.5
ISW = -0.5A
mA
mA
BST Pin Current
ISW = -2A
Minimum Soft-Start Voltage to Exit
Shutdown
0.2
0.4
0.7
V
VSS = 0V
2
µA
µA
µA
Soft-start Charging Current
V
SS = 1.5V
1.8
0.8
Soft-start Discharging Current
VSS = 1.5V
Minimum Soft-start Voltage to
Enable Overload Shutoff
VSS Rising
SS = 2.3V, VFB Falling
VSS Falling
2
0.7
1
V
V
V
FB Overload Threshold
V
Soft-start Voltage to Restart
0.7
1.3
Switching After Overload Shutoff
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
155
10
°C
°C
Notes: (1) Guaranteed by design, not tested in production.
(2) The maximum duty cycle specified corresponds to 1.4MHz switching frequency. Duty cycles higher than those specified can be
achieved by lowering the operating frequency.
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SC4524
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Pin Configuration
Ordering Information
Part Number
Package
TOP VIEW
SC4524SETRT(1)(2)
SOIC-8 EDP
SW
VIN
ROSC
1
2
3
4
8
7
6
5
BST
FB
COMP
SC4524EVB
Evaluation Board
Notes:
GND
SS
(1) Only available in tape and reel packaging. Areel contains
2500 devices.
(2) Lead free product. This product is fully WEEE and RoHS
compliant.
(8 Pin SOIC-EDP)
Underside metal must be soldered to ground.
Pin Descriptions
SO-8EDP
Pin Name
Pin Function
The emitter of the internal NPN power transistor. Connect this pin to the inductor and the
freewheeling diode.
1
SW
Power supply to the SC4524. It is also connected to the collector of the internal NPN power
transistor. It must be bypassed with a ceramic capacitor to ground.
2
VIN
Frequencysetting pin. Anexternal resistor from his pinto the ground sets the oscillator frequency.
Ground pin.
3
4
ROSC
GND
Soft start and enable pin.
(1). A capacitor from SS pin to the ground provides soft-start and overload hiccup functions. Soft
start is recommended for all applications.
5
SS
(2). Pulling SS pin below 0.4V shuts off the regulator and reduces the input supply current to
40uA at 5V.
Compensation pin. It is also the output of the internal error amplifier.
(1). A RC network at this pin compensates the control loop.
6
COMP
(2). The voltage at this pin controls the peak current of the internal switch.
The output voltage feedback pin. It is also the inverting input of the error amplifier.
7
8
FB
Supply pin to the power transistor driver. Tie to external bootstrap circuit to generate a local
supply voltage higher than the input voltage in order to fully turn on the internal power transistor.
BST
The exposed pad at the bottom of the package is electrically connected to the ground pin of the
SC4524. It also provides a thermal contact to the circuit board. It has to be soldered to the analog
ground of the PC board.
Metal
Pad
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SC4524
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Block Diagrams
2
VIN
+
+
ISEN
ꢀ
-
+
6.3mꢀ
SLOPE
+
COMP
20mV
ILIM
-
BST
COMP
6
8
FB
7
+
S
-
PWM
Q
POWER
-
EA
R
TRANSISTOR
+
SS
5
FB
SW
1
Soft-Start
And
1V
0.7V
OVLD
Overload
Hiccup
Control
REFERENCE
& THERMAL
SHUTDOWN
FAULT
SLOPE
4
GND
COMP
SLOPE COMP
OSCILLATOR
ROSC
3
CLK
Figure 2. SC4524 Functional Diagram
F
F
B
B
+
+
-
-
0
0
.
.
7
7
V
V
S
S
OVLD
OVLD
Q
Q
1
1
.
.
8 A
8 A
ꢀ
ꢀ
SS
SS
R
R
11VV//22VV
FAULLTT
22
.
.
66 AA
ꢀ
ꢀ
Figure 3. Details of the Soft-Start and Overload Hiccup Control Circuit
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SC4524
POWER MANAGEMENT
Typical Characteristics
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SC4524
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Typical Characteristics
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SC4524
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Operation
The SC4524 is a 30V constant-frequency peak current-
mode step-down switching regulator with an integrated
2.3A power transistor. The switching frequency can be
programmed with an external resistor from the ROSC pin
to ground. Frequency adjustability makes switching
regulator design flexible.
turned off. If the SS pin is pulled below 0.2V, then the
SC4524 will undergo overall shutdown. The current drawn
from the input power supply reduces to 40µA. When the
SS pin is released, the soft-start capacitor is charged
with a 2µA current source (not shown in Figure 3). As the
SS voltage exceeds 0.4V, the internal bias circuit of the
SC4524 is enabled. The SC4524 draws 3.5mA from VIN.
An internal fast charge circuit quickly charges the soft-
start capacitor to 1V. At this juncture, the fast charge
circuit turns off and the 1.8µA current source slowly
charges the soft-start capacitor. The output of the error
amplifier is forced to track the slow soft-start ramp at
the SS pin. When the COMP voltage exceeds 1.1V, the
switching regulator starts to switch. During soft-start, the
current limit of the converter is gradually increased until
the converter output comes into regulation.
Peak current mode control is utilized for the SC4524.
The double reactive poles of the output LC filter are
reduced to a single real pole by the inner current loop,
easing loop compensation. Fast transient response can
be achieved with a simple Type-2 compensation network.
Switch collector current is sensed with an integrated
6.3mW sense resistor. The sensed current is summed
with slope-compensating ramp before it is compared with
the transconductance error amplifier output. The PWM
comparator trip point determines the switch turn-on pulse
width (Figure 2). The current-limit comparator ILIM turns
off the power switch when the sensed-signal exceeds
the 20mV current-limit threshold. ILIM therefore provides
cycle-by-cycle limit. Current-limit does not vary with duty-
cycle.
Hiccup overload protection is utilized in the SC4524.
Overload shutdown is disabled during soft-start (VSS
<
2V). In Figure 3 the reset input of the overload latch will
remain high if the SS voltage is below 2V. Once the soft-
start capacitor is charged above 2V, the overload
shutdown latch is enabled. As the load draws more current
from the regulator, the current-limit comparator will limit
the peak inductor current. This is cycle-by-cycle current
limiting. Further increase in load current will cause the
output voltage to decrease. If the output voltage falls
below 70% of its set point, then the overload latch will
be set and the soft-start capacitor will be discharged with
a net current of 0.8µA. The switching regulator is shut
off until the soft-start capacitor is discharged below 1V.
At this moment, the overload latch is reset. The soft-
start capacitor is recharged and the converter again
undergoes soft-start. The regulator will go through soft-
start, overload shutdown and restart until it is no longer
overloaded.
Driving the base of the power transistor above the input
power supply rail minimizes the power transistor turn-on
voltage and maximizes efficiency. An external charge
pump (or bootstrap circuit) generates a voltage higher
than the input rail at the BST pin. The bootstrapped
voltage generated becomes the supply voltage for the
power transistor driver.
The SS pin is a multiple-function pin. An external capacitor
connected from the SS pin to ground together with the
internal 1.8µA and 2.6µA current sources set the soft-
start and overload shutoff times of the regulator (Figure
3). The SS pin can also be used to shut off the regulator.
When the SS pin is pulled below 0.8V, the regulator is
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SC4524
POWER MANAGEMENT
Applications Information
Setting the Output Voltage
The switching frequency is limited by the minimum
controllable on time at low duty cycles. For VIN > 20V,
setting switching frequency below 500kHz makes
converter output short circuit operation more robust.
These will be described in more details later.
The regulator output voltage is set with an external
resistive divider (Figure 4) with its center tap tied to the
FB pin.
ꢀ
ꢀ
Minimum On Time Consideration
ꢀ
ꢀ
The operating duty cycle of a non-synchronous step-down
switching regulator in continuous-conduction mode (CCM)
is given by
ꢀ
ꢀ
ꢀ
ꢀ
9
+ 9
' =
(2)
9 + 9 - 9
Figure 4. VOUT is set with a Resistive Divider
where VCESAT is the switch saturation voltage and VD is
voltage drop across the rectifying diode.
5 = 5 ꢂ9 -ꢁꢀ
(1)
9
The percentage error due the input bias current of the
error amplifier is
Duty cycle decreases with increasing
ratio. In peak
9
-ꢀꢄQ$ ¼ꢀꢃꢃ¼ꢂ5 ÔÏ5 ꢁ
D9
9
current-mode control, the PWM modulating ramp is the
sensed current ramp of the power switch. This current
ramp is absent unless the switch is turned on. The
intersection of this ramp with the output of the voltage
feedback error amplifier determines the switch pulse
width. The propagation delay time required to
immediately turn off the switch after it is turned on is
the minimum controllable switch on time (TON(MIN)). Closed-
=
.
ꢀ9
Example: Determine the output voltage error of a
= ꢃ9 converter with 5 = ꢃꢁꢄꢁNW .
9
From (1),
5 = ꢃꢁꢄꢁNW ¼ꢂꢃ -ꢁꢀ = ꢅꢆꢃNW
9
loop measurement of the SC4524 with low
ratios
9
-ꢃꢇQ$ ¼ꢃꢁꢁ ¼ ꢈꢇꢃꢄꢃNÔÏꢆꢁꢇNꢅ
D9
9
=
= -ꢁꢄꢁꢂꢃꢀ
.
ꢃ9
This error is at least an order of magnitude lower than
the ratio tolerance resulting from the use of 1% resistors
in the divider string.
Setting the Switching Frequency
The switching frequency of the SC4524 is set with an
external resistor from the ROSC pin to ground. A graph
of switching frequency against ROSC is shown in Typical
Performance Characteristics. The switching frequency
is programmable up to 1.5MHz.
Figure 5. Variation of Minimum On Time with
Ambient Temperature.
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SC4524
POWER MANAGEMENT
Applications Information
shows that the minimum on time is about 105ns at room
temperature (Figure 5). The power switch in the SC4524
is either not turned on at all or for at least TON(MIN). If the
ꢀ + ꢂꢅꢀꢃ
ꢀꢅꢃ + ꢂꢅꢀꢃ - ꢂꢅꢆꢃ
' =
= ꢂꢅꢄꢃ
.
'
The maximum operating channel frequency of the
required switch on time (= ) is shorter than the minimum
I
ꢁ -'
= ꢀꢁꢂ.+]
converter is therefore
.
on time, the regulator will either skip cycles or it will jitter.
ꢁꢆꢂQV
Example: Determine the maximum operating frequency
of a 24V to 1.2V switching regulator using the SC4524.
Transient headroom requires that channel frequency be
lower than 410kHz.
Assuming that VD = 0.45V, VCESAT = 0.25V and VIN = 26.4V
(10% high line), the duty ratio can be calculated using
(2).
Inductor Selection
The inductor ripple current DIL for a non-synchronous
step-down converter in continuous-conduction mode is
ꢆꢃꢂ + ꢀꢃꢅꢄ
ꢂꢁꢃꢅ + ꢀꢃꢅꢄ - ꢀꢃꢂꢄ
' =
= ꢀꢃꢀꢁꢂ
ꢁ9 + 9 ꢀꢁꢂ - 'ꢀ ꢁ9 + 9 ꢀꢁ9 - 9 - 9
ꢀ
D, =
=
To allow for transient headroom, the minimum operating
switch on time should be at least 30% higher than the
worst-case minimum on time exhibited in Figure 5.
I/
ꢁ9 + 9 - 9
ꢀI/
(3)
Designing for a switch on time of 150ns at 9 = ꢅꢈꢄꢇ9 ,
where f is the switching frequency and L is the
inductance.
'
= ꢀꢁꢂ.+]
the maximum operating frequency is
.
ꢁꢃꢂQV
In current-mode control, the slope of the modulating
(sensed switch current) ramp should be steep enough
to lessen jittery tendency but not so steep that large
flux swing decreases efficiency. Inductor ripple current
DIL between 25-40% of the peak inductor current limit is
a good compromise. Inductors so chosen are optimized
Minimum Off Time Limitation
The PWM latch in Figure 2 is reset every period by the
clock. The clock also turns off the power transistor to
refresh the bootstrap capacitor. This minimum off time
limits the attainable duty cycle of the regulator at a given
switching frequency. The measured minimum off time is
120ns. For a step-down converter, D increases with
in size and DCR. Setting D, = ꢆꢄꢊꢂꢅꢄꢊꢀ = ꢆꢄꢈꢉ$ ,
9 = ꢆꢄꢇꢃ9 and 9
= ꢆꢄꢅꢃ9 in (3),
ꢅ9 + ꢄꢃꢈꢇꢀꢅ9 - 9 - ꢄꢃꢆꢇꢀ
ꢅ9 + ꢄꢃꢆꢀꢅꢄꢃꢁꢂꢀI
9
/ =
increasing
ratio. If the required duty cycle is higher
(4)
9
than the attainable maximum, then the output voltage
will not be able to reach its set value in continuous-
where L is in mH and f is in MHz.
conduction mode.
9
ꢀ
D,
Equation (3) shows that for a given
increases
as D decreases. If
varies over a wide range, then
9
Example: Determine the maximum operating frequency
of a 5V to 4V switching regulator using the SC4524.
choose L based on the nominal input voltage. Always
verify converter operation at the input voltage extremes.
Assuming that VD = 0.45V, VCESAT = 0.25V and VIN = 4.5V
(10% low line), the duty ratio can be calculated using (2). The peak current limits of both SC4524 power transistors
are internally set at 3.2A. The peak current limits are
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SC4524
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Applications Information
10mF X5R ceramic capacitor is adequate. For high voltage
applications, a small ceramic (1mF or 2.2mF) can be
placed in parallel with a low ESR electrolytic capacitor to
duty-cycle invariant and are guaranteed higher than 2.3A.
The maximum load current is therefore conservatively
satisfy both the ESR and bulk capacitance requirements.
D,
ꢆ
D,
ꢆ
,
= ,
-
= ꢆꢅꢇ$ -
(5)
Output Capacitor
The output ripple voltage DVOUT of a buck converter can
be expressed as
If D, = ꢆꢄꢊ¼, , then
D,
ꢃꢂꢅ,
,
= ,
-
= ,
-
= ꢃꢂꢀꢁ¼,
.
Ë
Û
ꢁ
Ì
Ü
Ü
ꢄ
ꢄ
D9 = D, (65+
(7)
Ì
Í
ꢀI&
Ý
The saturation current of the inductor should be 20-30%
higher than the peak current limit (2.3A). Low-cost
powder iron cores are not suitable for high-frequency
switching power supplies due to their high core losses.
Inductors with ferrite cores should be used.
where COUT is the output capacitance.
Inductor ripple current DIL increases as D decreases
(Equation (3)). The output ripple voltage is therefore the
highest when VIN is at its maximum. The first term in (7)
results from the ESR of the output capacitor while the
second term is due to the charging and discharging of
COUT by the inductor ripple current. Substituting DIL =
0.69A, f = 500kHz and COUT = 22mF ceramic with ESR =
2mW in (7),
Power Line Input Capacitor
A buck converter draws pulse current with peak-to-peak
amplitude equal to its output current IOUT from its input
supply. An input capacitor placed between the supply
and the buck converter filters the AC current and keeps
the current drawn from the supply to a DC constant. The
input capacitance CIN should be high enough to filter the
pulse input current. Its equivalent series resistance (ESR)
should be low so that power dissipated in the capacitor
does not result in significant temperature rise and
degrade reliability. For a buck converter, the RMS ripple
current in the input capacitor is
D9 = ꢄꢃꢁꢂ$ ¼ ꢅꢆPW + ꢋꢋꢃꢈPWꢀ
=ꢋꢃꢈP9 + ꢊꢃꢉP9 = ꢂꢃꢆP9
Depending on operating frequency and the type of
capacitor, ripple voltage resulting from charging and
discharging of COUT may be higer than that due to ESR. A
10mF to 47mF X5R ceramic capacitor is found adequate
for output filtering in most applications. Ripple current
in the output capacitor is not a concern because the
inductor current of a buck converter directly feeds COUT,
resulting in very low ripple current. Avoid using Z5U and
Y5V ceramic capacitors for output filtering because these
types of capacitors have high temperature and high
voltage coefficients.
,
= ,
'ꢂꢁ -'ꢀ
.
(6)
,
¼ꢁ(65ꢀ
Power dissipated in the input capacitor is
.
,
ꢀ
ꢅ
' =
Equation (6) has a maximum value of
( at
),
ꢀ
corresponding to the worst-case power dissipation
Freewheeling Diode
,
¼(65
ꢇ
in CIN.
Use of Schottky barrier diodes as freewheeling rectifiers
reduces diode reverse recovery input current spikes,
easing high-side current sensing in the SC4524. These
diodes should have an average forward current rating
between 1A and 2A and a reverse blocking voltage of at
least a few volts higher than the input voltage. For
switching regulators operating at low duty cycles (i.e. low
Multi-layer ceramic capacitors, which have very low ESR
(a few mW) and can easily handle high RMS ripple current,
are the ideal choice for input filtering. A single 4.7mF or
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SC4524
POWER MANAGEMENT
Applications Information
during the off interval.
The switch base current
output voltage to input voltage conversion ratios), it is
beneficial to use freewheeling diodes with somewhat
higher average current ratings (thus lower forward
voltages). This is because the diode conduction interval
is much longer than that of the transistor. Converter
efficiency will be improved if the voltage drop across the
diode is lower.
,
,
=
, where ISW and b
+ ꢁ
are the switch emitter current and current gain
respectively, is drawn from the bootstrap capacitor CBST.
,
7
Charge
is drawn from CBST during the switch on
The freewheeling diodes should be placed close to the
SW pins of the SC4524 to minimize ringing due to trace
inductance. 10BQ015, 20BQ030 (International Rectifier),
MBRM120LT3 (ON Semi), UPS120 and UPS140 (Micro-
Semi) are all suitable.
,
7
time, resulting in a voltage droop of
. If ISW = 2A,
&
9
TON = 1ms, b = 35 and CBST = 0.1mF, then the
droop
every
9 - 9 + 9
will be 0.57V. CBST is refreshed to
Bootstrapping the Power Transistors
cycle, where 9 is the applied DBST anode voltage. Switch
base current discharges the bootstrap capacitor to
To maximize efficiency, the turn-on voltage across the
internal power NPN transistor should be minimized. If
the transistor is to be driven into saturation, then its
base will have to be driven from a power supply higher in
, 7
9 - 9 + 9
-
at the end of conduction. This
b&
voltage must be higher than the minimum shown in Figure
6 to ensure full switch enhancement. DBST can be tied
either to the input or to the output of the DC/DC
converter.
voltage than VIN. The required driver supply voltage (at
least 2.5V higher than the SW voltage over the industrial
temperature range) is generated with a bootstrap circuit
(the diode DBST and the capacitor CBST in Figure 7). The
bootstrapped output (the common node between DBST
and CBST) is connected to the BST pin of the SC4524.
The power transistor in the SC4524 is first switched on
to build up current in the inductor. When the transistor
is switched off, the inductor current pulls the SW node
If DBST is tied to the input, then the charge drawn from
,
7
the input power supply will be
(the base charge
b
of the switch). The energy loss due to base charge per
low, allowing CBST to be charged through DBST. When the
power switch is again turned on, the SW voltage goes
9
+ 9
high. This brings the BST voltage to
, thus back-
biasing DBST. CBST voltage increases with each subsequent
switching cycle, as does the bootstrapped voltage at the
BST pin. After a number of switching cycles, CBST will be
fully charged to a voltage approximately equal to that
applied to the anode of DBST. Figure 6 shows the typical
minimum BST to SW voltage required to fully saturate
= 9
the power transistor. This differential voltage (
)
must be at least 1.8V at room temperature. This is also
specified in the Electrical Characteristics as Minimum
Bootstrap Voltage. The minimum required VC increases
as temperature decreases. The bootstrap cirBcSuTit reaches
equilibrium when the base charge drawn from CBST during
transistor on time is equal to the charge replenished
Figure 6. Typical Minimum Bootstrap Voltage Re-
quired to Maintain Saturation at ISW = 2A.
ã 2006 Semtech Corp.
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SC4524
POWER MANAGEMENT
Applications Information
ISW VINTON
DISW VOUT
DISW VIN ISW VOUT
W
loss of
.
cycle is
for a power loss of
.
ꢀ
ꢀ
ꢀ
ꢀ
Since VOUT < VIN, DBST should always be tied to VOUT (if
>2.5V) to maximize efficiency. In general efficiency
penalty increases as D decreases.
If DBST is tied to the output, then the charge drawn from
ISW TON
the output capacitor will still be
. The energy loss
ꢀ
Figure 7 summarizes various ways of bootstrapping the
SC4524. A fast switching PN diode (such as 1N4148 or
ISW VOUT TON
due to base charge per cycle is
for a power
ꢀ
MAX VBST = VIN + VOUT
DBST
DBST
MAX VBST = 2VIN
BST
BST
CBST
CBST
VIN
VIN
VOUT
VOUT
IN
SW
IN
SW
SC4524
SC4524
D
D
RECT
RECT
GND
GND
(a)
MAX VBST = 2VIN - VZ
(b)
DBST
DZ
DBST
MAX VBST = VIN + VS
VS > 2.5V
VIN
+ VZ -
BST
BST
CBST
CBST
VOUT
VIN
VOUT
SW
IN
SW
IN
SC4524
SC4524
D
D
RECT
RECT
GND
GND
(c)
(d)
MAX VBST = VS
DBST
VS > VIN + 2.5V
BST
VIN
VOUT
IN
SW
SC4524
D
RECT
GND
(d)
Figure 7.
Methods of Bootstrapping the SC4524.
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SC4524
POWER MANAGEMENT
Applications Information
1N914) and a small (0.1µF – 0.47µF) ceramic capacitor 5V and a 3.3V converters on the load current. Once
can be used. In Figure 7(a) the power switch is started the bootstrap circuit is able to sustain itself down
bootstrapped from the output. This is the most efficient
configuration and it also results in the least voltage stress
at the BST pin. The maximum BST pin voltage is about
to zero load.
Shutdown and Soft-Start
VIN +VOUT . If the output is below 2.8V, then D will
BST
preferably be a small Schottky diode (such as BAT-54) to
maximize bootstrap voltage. A 0.33-0.47µF bootstrap
capacitor may be needed to reduce droop. Bench
measurement shows that using Schottky bootstrapping
diode has no noticeable efficiency benefit.
Pulling the soft-start pin below 0.8V with an open-
collector NPN or an open-drain NMOS transistor turns
off the regulator. In “Typical Characteristics”, the soft-
start pin current is plotted against the soft-start voltage
with VIN = 5V. When the soft-start pin is pulled below 1V,
105µA current flows out of the pin. Pulling the soft-start
pin below 0.2V shuts off the internal bias circuit of the
The SC4524 can also be bootstrapped from the input
(Figure 7(b)). This configuration is not as efficient as Figure
7(a). However this may be only option if the output SC4524. The total VIN current decreases to 40µA. In
voltage is less than 2.5V and there is no other supply
with voltage higher than 2.5V. Voltage stress at the BST
shutdown the SS pin sources only 2µA. A fast charging
circuit (enabled by the internal bias circuit), which charges
the soft-start capacitor below 1V, causes the difference
pin can be somewhat higher than 2VIN. The Zener diode
in Figure 7(c) reduces the maximum BST pin voltage. The in the soft-start pin currents.
BST pin voltage should not exceed its absolute maximum
rating of 42V.
If the SS pin is released in shutdown, the internal current
source pulls up on the SS pin. When this SS voltage
Figures 7(d) and (e) show how to bootstrap the SC4524
from a second power supply VS with voltage > 2.5V.
reaches 0.4V, the SC4524 turns on and theVINquiescent
current increases to 3.5mA. The fast charging circuit
quickly pulls the released soft-start capacitor to 1V
(slightly below the switching threshold). The fast charging
circuit is then disabled. A 1.8µA current source continues
to charge the soft-start capacitor (Figure 3). The soft-
Since the inductor current charges CBST, the bootstrap
circuit requires some minimum load current to get going.
Figures 8(a) and 8(b) show the dependence of the
minimum input voltage required to properly bootstrap a
Minimum Starting and
Minimum Starting and
Sustaining VIN vs Load Current
Sustaining VIN vs Load Current
7.5
5.5
DBST TIED
TO OUTPUT
VOUT = 5V
MA729
VOUT = 3.3V
DBST TIED
MA729
7.0
6.5
6.0
5.5
5.0
4.5
TO OUTPUT
5.0
STARTING
STARTING
4.5
DBST TIED
TO INPUT
4.0
DBST TIED
TO INPUT
SUSTAINING
SUSTAINING
3.5
1
10
100
1000
0.1
1.0
10.0
100.0
1000.0
Load Current (mA)
Load Current (mA)
(a)
(b)
Figure 8. Minimum Input Voltage Required to Start and to Maintain Bootstrap.(TA = 25°C).
ã 2006 Semtech Corp.
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SC4524
POWER MANAGEMENT
Applications Information
Overload / Short-Circuit Protection
start voltage ramp at the SS pin clamps the error amplifier
output (Figure 2). During regulator start-up, COMP voltage
follows the SS voltage. The converter starts to switch
when its COMP voltage exceeds 1.1V. The peak inductor
current gradually increases until the converter output
comes into regulation. Proper soft-start prevents output
overshoot during start-up. Current drawn from the input
supply is also well controlled. Notice that the inductor
current, not the converter output voltage, is ramped
during soft-start.
The current limit comparator in the SC4524 limits the
peak inductor current to 3.2A (typical). The regulator
output voltage will fall if the load is increased above the
current limit. If overload is detected (the output voltage
falls below 70% of the set voltage), then the regulator
will be shut off. An internal 0.8µA current sink starts to
discharge the soft-start capacitor. As the soft-start
capacitor is discharged below 1V, the discharge current
source turns off and the soft-start capacitor is recharged
with a 1.8µA current source. The regulator undergoes
soft-start. During soft-start (1V < VSS < 2V), the overload
shutdown latch in Figure 3 cannot be set. When VSS
exceeds 2V, the set input of the overload latch is no
The soft-start capacitor is charged to a final voltage of
about 2.4V.
2.4V
2V
V
SS
Hiccup
Enabled
1V
0.3V
0
Fast
Charge
V
FB
11V
0.7V
Switching Starts
Output must be at
least 70% of its set
voltage in this
interval or the
regulator will
Normal Soft-start.
Figure 9(a).
0
undergo shutdown
and restart
(hiccup).
2V
1V
V
SS
V
COMP
0.3V
0
Switching
Not Switching
Switching
Not Switching
1V
0.7V
V
FB
0
Figure 9(b).
Start-up Fails due to (i) Short Soft-start Duration or (ii) Output Overload or (iii)
Output Short-circuited.
2006 Semtech Corp.
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SC4524
POWER MANAGEMENT
Applications Information
proportional to its controlling input VCOMP. Its
longer blanked. If VFB is still below 0.7V, then the regulator
transconductance GMP is 8W-1. With the current loop
will undergo shutdown and restart. The soft-start process
should allow the output voltage to reach 70% of its final
value before CSS is charged above 2V. Figures 9(a) and
9(b) show the timing diagrams of successful and failed
start-up waveforms respectively. The soft-start interval
should also be made sufficiently long so that the output
voltage rises monotonically and it does not overshoot
its final voltage by more than 5%.
Y
closed, the control-to-output transfer function
has
Y
a dominant-pole p2 located at a frequency slightly higher
than that of the output filter pole.
Q,
Q
w
-
= -
(8)
9
&
5
&
During normal soft-start, both the COMP voltage and the
switch current limit gradually increase until the converter
becomes regulated. If the regulator output is shorted to
ground, then the COMP voltage will continue to rise to
its 2.4V upper limit. The SC4524 will reach its cycle-by-
cycle current limit sometime during the soft-start charging
phase. As described previously, the switches in the
SC4524 either do not turn on at all or for at least 105ns.
With the output shorted, the error amplifier will command
the regulator to operate at full duty cycle. The current
limit comparator will turn off the switch if the switch
current exceeds 3.2A. However, this happens only after
the switch is turned on for 105ns. During switch off time,
the inductor current ramps down at a slow rate
determined by the forward voltage of the freewheeling
diode and the resistance of the short. If the resulting
reverse volt-second is insufficient to reset the inductor
before the start of the next cycle, then the inductor
current will keep increasing until the diode forward
voltage becomes high enough to achieve volt-second
balance. This makes the current limit comparator
where C1 is the output capacitor, ROUT is the equivalent
load resistance and n (depending on duty ratio, slope
compensation, frequency and passive components) is
usually between 1 and 2.
If C1 is ceramic, then its ESR zero can be neglected as it
situates well beyond half the switching frequency. The
low frequency gain of the control-to-output transfer
function is simply the product of power stage
transconductance and the equivalent load resistance
(Figure 11).
The transfer functions of the feedback network and the
error amplifier are:
Î
Ï
Þ
ß
à
Ë
Û
Y
5
ꢂ + V& 5
Ì
Ì
Ü
Ü
=
(9)
Y
5 +5 ꢂ + V
(
5 ÔÏ5
)
&
Í
Ý
Ð
ineffective. Setting the switching frequency below and
500kHz at high VIN (> 20V) will make the off time
sufficiently long to keep the inductor current within
bounds under short circuit condition.Shortening the soft-
start interval from the onset of switching to hiccup enable
Y
* 5
ꢂ + V& 5
(10)
Y
(
ꢂ + V& 5
)
¼
(ꢂ + V& 5
)
also makes short circuit operation more robust. A 22- provided that & >> & and 5 >>5 .
47nF soft-start capacitor is found adequate for most
applications.
In Equation (10), C5 forms a low frequency pole p1 with
the output resistance RO of the error amplifier and C6
forms a high frequency pole p3 with R5:
Loop Compensation
Figure 10 shows a simplified equivalent circuit of a step-
down converter. The power stage, which consists of the
current-mode PWM comparator, the power switch, the
freewheeling diode and the inductor, feeds the output
network. The power stage can be modeled as a voltage-
controlled current source, producing an output current
$PSOLILHU2SHQ/RRS *DLQ
7UDQVFRQGXF WDQFH
ꢃꢊG%
5 =
=
=ꢁꢄꢈ0W
ꢅꢋꢆmW
ꢀ
w
= -
5 &
ã 2006 Semtech Corp.
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SC4524
POWER MANAGEMENT
Applications Information
I
OUT
POWER
STAGE
GMP = 8W
V
IN
V
V
-1
OUT
ESR
C1
R
C11
R1
R2
OUT
FB
-
COMP
GMA =
-1
280mW
+
R5
C5
1V
RO
1.6MW
C6
VOLTAGE
REFERENCE
Figure 10. Simplified Control Loop Equivalent Circuit
Gain
T(jw)
æ
ç
è
R2
ö
÷
÷
GMARO
ç
R1 +R2 ø
vCOMP
vOUT
æ
ç
è
R2
ö
÷
÷
GMAR5
ç
R1 +R2 ø
wCC1ROUT
n
GMPROUT
1
1
n
1
ROC5
R5C5
ROUT C1
R5C6
w
w
wZ 1
wp 2
w
p3
wC
wS
p1
2
Control-to-Output
Transfer Function
Figure 11. Bode Plots of Control-to-Ouput, Output-to-Control and the Overall Loop
Gain. Control-to-output transfer function is shown with two poles near
half the switching frequency w .
S
ã 2006 Semtech Corp.
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SC4524
POWER MANAGEMENT
Applications Information
wz1 is shown to be less than wp2 in Figure 11. Making
ꢀ
w
= -
w
w
5 &
w
=
=
gives a first-order estimate of C5:
ꢀ
ꢀꢁ
In addition C5 and R5 form a zero with angular frequency:
ꢁꢂ
&
(12)
w 5
ꢀ
w
= -
5 &
Notice that R5 determines the mid-band loop gain of the
converter. Increasing R5 increases the mid-band gain and
the crossover frequency. However it reduces the phase
margin. C6 is a small ceramic capacitor to roll off the
The
output-to-control
transfer
function
Y
Y
Y
=
¼
is also shown in Figure 11. Its mid-
w
Y
Y
Y
loop gain at high frequency. Placing p3 at about
gives:
(13)
ꢃ
Ë
Û
5
ꢀ
Ì
Ì
Ü
Ü
* 5
band gain (between z1 and p3) is
. The
&
5 +5
Í
Ý
pI5
overall loop gain T(s) is the product of the control-to-
output and the output-to-control transfer functions. To
Computed R5, C5 and C6 can indeed result in near optimal
load transient responses in over half of the applications.
However in other cases empirically determined
compensation networks based on optimized load
transient responses may differ from those calculated by
a factor of 3. Therefore checking the transient response
of the converter is imperative. Starting with calculated
R5, C5 and C6 (using n=1 in Equations (11)-(13)), apply
the largest expected load step to the converter at the
maximum operating VIN. Observe the load transient
response of the converter while adjusting R5, C5 and C6.
Choose the largest R5, the smallest C5 and C6 so that
the inductor current waveform does not show excessive
ringing or overshoot.
7ꢁMwꢀ
simplify
Bode plot, the feedback network is
assumed to be resistive. If the overall loop gain is to
cross 0dB at one tenth of the switching frequency
w
ꢁꢂ
pI
ꢀ
w =
=
(
) at 20dB/decade, then its mid-band gain
(between z1 and p2) will be
w
ꢀꢁ
Q
w
w
w & 5
=
=
ꢀꢁQ
& 5
Ë
Û
Feedforward capacitor C11 boosts phase margin over a
limited frequency range and is sometimes used to
improve loop response. C11 will be more effective if
5
Ì
Ì
Ü
Ü
* 5 * 5
This is also equal to
. Therefore
5 +5
Í
Ý
Ë
Û
5
w & 5
.
5 >> 5 ÔÏ5
Ì
Ì
Ü
Ü
* 5 * 5
=
.
5 + 5
ꢃꢁQ
Í
Ý
Example: Determine the compensation components for
the 550kHz 12V to 3.3V converter in Figure 13(a).
Re-arranging,
For the converter, w = ꢊꢄꢃ0UDGV , ,
= ꢅ$ and
Ë
Û
5
5
w &
ꢁꢂQ* *
Ì
Ü
Ü
5 = ꢁ +
(11)
Ì
Í
& = ꢅꢅm) . n is assumed to be 1 in (11) and (12).
Ý
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SC4524
POWER MANAGEMENT
Applications Information
Ë
Û
Ü
Ü
Ý
ꢂꢁꢃꢀN
ꢀꢂN
ꢂꢃꢈ ꢀꢁ ¼ꢆꢆꢀꢁ
ꢀꢁ ¼ꢇꢀꢄ ¼ꢇꢅꢄ ¼ꢇꢆꢃꢅ ꢀꢁ
ꢀ
Ì
5 = ꢀ +
ꢀ
Ì
ꢄ
Í
=ꢀꢀꢃꢂNW
ꢁꢄ
&
=ꢋꢃꢇQ)
ꢀ
ꢀ
ꢋꢋꢃꢌN ¼ꢆp ¼ꢇꢃꢇ ꢋꢄ
ꢁ
&
ꢇꢌS)
p ¼ꢂꢃꢃꢆ ꢁꢆ ꢀ ¼ ꢂꢁꢁꢄꢊ ꢁꢆ ꢀ
ꢀ
ꢀ
Bench measurement shows that compensation
components computed from our simplified linear model
give very good load transient response for the converter.
Figure 12.
Fast Switching Current Paths in a Buck
Regulator. Minimize the size of this loop
to reduce parasitic trace inductance.
Board Layout Considerations
In a step-down switching regulator, the input bypass
capacitor, the main power switch and the freewheeling
GL
diode carry discontinuous currents with high
(Figure
GW
12). For jitter-free operation, the size of the loop formed
by these components should be minimized. Since the
power switches are already integrated within the SC4524,
connecting the anodes of both freewheeling diodes close
to the negative terminal of the input bypass capacitor
minimizes size of the switched current loop. The input
bypass capacitors should be placed close to the VIN pin.
Shortening the traces of the SW and BST nodes reduces
the parasitic trace inductance at these nodes. This not
only reduces EMI but also decreases switching voltage
spikes at these nodes.
The exposed pad should be soldered to a large analog
ground plane as the analog ground copper acts as a heat
sink for the device. To ensure proper adhesion to the
ground plane, avoid using vias directly under the device.
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SC4524
POWER MANAGEMENT
Typical Application Circuit
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Figure 13(a). 550kHz 12V to 3.3V/2A step down converter.
Figure 13(b). Load characteristic.
Figure 13(c). 12VIN start-up transient at 2A load.
Figure 13(d). 0.5A to 2A step load transient response.
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SC4524
POWER MANAGEMENT
Outline Drawing - SOIC-8 EDP
A
D
E
DIMENSIONS
INCHES MILLIMETERS
e
N
DIM
A
MIN NOM MAX MIN NOM MAX
-
-
-
-
-
-
-
-
-
-
.053
.069 1.35
.005 0.00
.065 1.25
.020 0.31
.010 0.17
1.75
0.13
1.65
0.51
0.25
2X E/2
A1 .000
A2 .049
E1
b
.012
.007
c
D
.189 .193 .197 4.80 4.90 5.00
1
2
E1 .150 .154 .157 3.80 3.90 4.00
E
.236 BSC
.050 BSC
6.00 BSC
1.27 BSC
ccc
C
e
2X N/2 TIPS
e/2
F
H
.116 .120 .130 2.95 3.05 3.30
.085 .095 .099 2.15 2.41 2.51
B
-
-
h
.010
.020 0.25
0.50
L
.016 .028 .041 0.40 0.72 1.04
D
F
(.041)
(1.05)
L1
N
8
8
aaa
C
-
-
01
0°
8°
0°
8°
A2
A
D
aaa
.004
.010
.008
0.10
0.25
0.20
SEATING
PLANE
bbb
ccc
C
A1
bxN
bbb
C
A-B
h
EXPOSED PAD
h
H
H
c
GAGE
PLANE
0.25
L
(L1)
01
DETAIL
A
SEE DETAIL
A
SIDE VIEW
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-
3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4. REFERENCE JEDEC STD MS-012, VARIATION BA.
Land Pattern - SOIC-8 EDP
E
D
SOLDER MASK
DIMENSIONS
DIM
INCHES
(.205)
.134
MILLIMETERS
(5.20)
3.40
5.10
2.56
3.00
1.27
0.60
2.20
7.40
C
D
E
F
Z
(C)
G
Y
F
.201
.101
G
P
X
Y
Z
.118
.050
.024
THERMAL VIA
Ø 0.36mm
P
.087
X
.291
NOTES:
1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2. REFERENCE IPC-SM-782A, RLP NO. 300A.
3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012-8790
Phone: (805)498-2111 FAX (805)498-3804
2006 Semtech Corp.
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相关型号：
SC4524DSETRT
Switching Regulator, Current-mode, 4.3A, 1560kHz Switching Freq-Max, PDSO8, HALOGEN FREE AND ROHS COMPLIANT, MS-012BA, SOIC-8
SEMTECH
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