SC4614MSTRT [SEMTECH]

500kHz Voltage Mode PWM Controller; 500kHz的电压模式PWM控制器
SC4614MSTRT
型号: SC4614MSTRT
厂家: SEMTECH CORPORATION    SEMTECH CORPORATION
描述:

500kHz Voltage Mode PWM Controller
500kHz的电压模式PWM控制器

稳压器 开关式稳压器或控制器 电源电路 开关式控制器 光电二极管
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中文:  中文翻译
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SC4614  
500kHz Voltage Mode PWM Controller  
POWER MANAGEMENT  
Description  
Features  
The SC4614 is a high-speed, voltage mode PWM con-  
troller that provides the control and protection features  
necessary for a synchronous buck converter.  
500kHz switching frequency  
4V to 25V power rails  
0.5V voltage reference for programmable output  
voltages  
Internal LDO for optimum gate drive voltage  
1.5A gate drive current  
Adaptive non-overlapping gate drives provide  
shoot-through protection for MOSFETs  
Internal soft start  
The SC4614 is designed to directly drive the top and  
bottom MOSFETs of the buck converter. It allows the con-  
verter to operate at 500kHz switching frequency with  
4V to 25V power rail and as low as 0.5V output. It uses  
an internal 8.2V supply as the gate drive voltage for mini-  
mum driver power loss and MOSFET switching loss.  
Hiccup mode short circuit protection  
Power rail under voltage lockout  
MSOP-10 package, fully RoHS and WEEE compliant  
The SC4614 features soft-start, supply power under volt-  
age lockout, and hiccup mode over current protection.  
The SC4614 monitors the output current by using the  
Rdson of the bottom MOSFET in the buck converter that  
eliminates the need for a current sensing resistor. The  
SC4614 is offered in a MSOP-10 package.  
Applications  
Embedded, low cost, high efficiency converters  
Point of load power supplies  
Set top box power supplies  
PDP/TFT TVs  
Consumer electronics  
Typical Application Circuit  
12V IN  
+
1
2
3
4
5
10  
9
BST  
DH  
PN  
1.5V OUT  
OCS  
COMP  
FB  
1
2
8
DL  
7
VCC  
DRV  
6
+
GND  
SC4614  
1
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January 16, 2007  
SC4614  
POWER MANAGEMENT  
Absolute Maximum Ratings  
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified  
in the Electrical Characteristics section is not implied.  
Parameter  
Symbol  
Maximum  
20  
Units  
V
Input Supply Voltage  
VCC  
BST to GND  
VBST  
VBST_PN  
VPN  
40  
V
BST to PN  
10  
V
PN to GND  
-1 to 30  
-5  
V
PN to GND Negative Pulse (tpulse < 20ns)  
DL to GND  
VPN_PULSE  
VDL  
V
-1 to +10  
-3  
V
DL to GND Negative Pulse (tpulse < 20ns)  
DH to PN  
VDL_PULSE  
VDH_PN  
VDH_PULSE  
VDRV  
V
-1 to +10  
-3  
V
DH to PN Negative Pulse (tpulse < 20ns)  
DRV to GND  
V
10  
V
Operating Ambient Temperature Range  
Operating Junction Temperature  
Thermal Resistance Junction to Ambient  
Thermal Resistance Junction to Case  
Lead Temperature (Soldering) 10s  
Storage Temperature  
TA  
-40 to 85  
-40 to 125  
136  
°C  
°C  
°C/W  
°C/W  
°C  
°C  
TJ  
θJA  
45  
θJC  
TLEAD  
TSTG  
300  
-65 to 150  
Electrical Characteristics  
Unless specified: VCC = 5V to 18V; VFB = VO; VBST - VPN = 5V to 8.2V; TA = -40 to 85°C  
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max Units  
General  
VCC Supply Voltage  
VCC Quiescent Current  
VCC Under Voltage Lockout  
BST to PN Supply Voltage  
BST Quiescent Current  
Internal LDO  
V
CC  
4
18  
7
V
mA  
V
IQVCC  
UVVCC  
VBST_PN  
IQBST  
5
V
V
CC = 12V, VBST -VPN = 8.2V  
VHYST = 100mV  
4
4
10  
3
V
mA  
CC = 12V, VBST -VPN = 8.2V  
LDO Output  
VDRV  
8.6V < VCC < 18V  
4V < VCC < 8.6V  
8.2  
0.4  
V
V
Dropout Voltage  
VDROP  
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2005 Semtech Corp.  
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SC4614  
POWER MANAGEMENT  
Electrical Characteristics  
Unless specified: VCC = 5V to 18V; VFB = VO; VBST - VPN = 5V to 8.2V; TA = -40 to 85°C  
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max Units  
Switching Regulator  
Reference Voltage  
Load Regulation  
VREF  
TA = 25°C, VCC = 12V  
0.495 0.500 0.505  
V
%
IO  
= 0.2 to 4A  
0.4  
0.4  
Line Regulation  
V
CC = 10V to 14V  
%
Operating Frequency  
Ramp Amplitude (2)  
Maximum Duty Cycle (2)  
Minimum On-Time (2)  
FS  
400  
500  
0.8  
97  
600  
kHz  
V
Vm  
DMAX  
%
TON_MIN  
tSRC_DH  
tSINK_DH  
tSRC_DL  
tSINK_DL  
125  
41  
ns  
6V Swing at C  
L
= 3.3nF  
DH Rising/Falling Time  
DL Rising/Falling Time  
ns  
ns  
V
BST-VPN = 8.2V  
27  
29  
6V Swing at C = 3.3nF  
L
VDRV = 8.2V  
42  
DH, DL Nonoverlapping Time  
Soft Start Time  
30  
ns  
TA = 25°C, VCC = 12V  
1.5  
ms  
Voltage Error Amplifier  
Input Offset Voltage (2)  
Input Offset Current (2)  
Open Loop Gain (2)  
Unity Gain Bandwidth (2)  
Output Source Current  
Output Sink Current  
Slew Rate (2)  
2
mV  
nA  
40  
80  
10  
0.9  
0.9  
1.2  
dB  
MHz  
mA  
mA  
V/us  
For CL=500pF Load  
Notes:  
(1) This device is ESD sensitive. Use of standard ESD handling precautions is required.  
(2) Guaranteed by design, not tested in production.  
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2005 Semtech Corp.  
3
SC4614  
POWER MANAGEMENT  
Pin Configuration  
Ordering Information  
Part Numbers  
SC4614MSTRT(1)(2)  
SC4614EVB  
Package  
TOP VIEW  
MSOP-10  
BST  
OCS  
COMP  
FB  
1
2
3
4
5
10  
9
8
7
6
DH  
PN  
DL  
VCC  
DRV  
Note:  
(1) Only available in tape and reel packaging. A reel  
contains 2500 devices.  
GND  
(2) Lead free product. This product is fully WEEE and  
RoHS compliant.  
(MSOP-10)  
Pin Descriptions  
Pin #  
Pin Name  
Pin Function  
1
BST  
OCS  
Boost input for top gate drive bias.  
Current limit setting. Connect resistors from this pin to DRV pin and to ground to program  
the trip point of load current. Refer to Applications Information Section for details.  
2
3
4
5
COMP  
FB  
Error amplifier output for compensation.  
Voltage feed back of sychronous buck converter.  
Chip ground.  
GND  
Internal LDO output. Connect a 1uF ceramic capasitor from this pin to ground for  
decoupling. This voltage is used for chip bias, including gate drivers.  
6
DRV  
Chip input power supply.  
7
8
VCC  
DL  
Gate drive for bottom MOSFET.  
9
PN  
Phase node. Connect this pin to bottom N-MOSFET drain.  
Gate drive for top MOSFET.  
10  
DH  
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4
SC4614  
POWER MANAGEMENT  
Block Diagram  
8.2V  
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5
SC4614  
POWER MANAGEMENT  
Applications Information  
THEORY OF OPERATION  
To program a load trip point for short circuit protection, it  
is recommended to connect a 3.3k resistor from the OCS  
pin to the ground, and a resistor Rset from the OCS pin to  
the DRV pin, as shown in Fig. 1.  
The SC4614 is a high-speed, voltage mode PWM con-  
troller that provides the control and protection features  
necessary for a synchronous buck converter.  
As shown in the block diagram of the SC4614, the volt-  
age-mode PWM controller consists of an error amplifier,  
a 500kHz ramp generator, a PWM comparator, a RS latch  
circuit, and two MOSFET drivers. The buck converter out-  
put voltage is fed back to the error amplifier negative  
input and is regulated to a reference voltage level. The  
error amplifier output is compared with the ramp to gen-  
erate a PWM wave, which is amplified and used to drive  
the MOSFETs in the buck converter. The PWM wave at  
the phase node with the amplitude of Vin is filtered out  
to get a DC output. The PWM controller works with soft-  
start and fault monitoring circuitry to meet application  
requirements.  
12V  
7
VCC  
6
DRV  
Rset  
2
OCS  
SC4614  
3.3k  
GND  
5
UVLO, Start Up and Shut Down  
Fig. 1. Programming load trip point  
To initiate the SC4614, a supply voltage is applied to the  
Vcc pin. The top gate (DH) and bottom gate (DL) are held  
low until Vcc voltage exceeds UVLO (Under Voltage Lock  
Out) threshold, typically 4.0V. Then the internal Soft-Start  
(SS) capacitor begins to charge, the top gate remains  
low, and the bottom gate is pulled high to turn on the  
bottom MOSFET. When the SS voltage at the capacitor  
reaches 0.4V, the top and bottom gates of PWM control-  
ler begin to switch. The switching regulator output is slowly  
ramping up for a soft turn-on.  
350  
325  
300  
275  
250  
225  
200  
175  
150  
If the supply voltages at the Vcc pin falls below UVLO  
threshold during a normal operation, the SS capacitor  
begins to discharge. When the SS voltage reaches 0.4V,  
the PWM controller controls the switching regulator out-  
put to ramp down slowly for a soft turn-off.  
0
100  
200  
300  
400  
500  
600  
Rset (k-ohm)  
Hiccup Mode Short Circuit Protection  
Fig. 2. Pull up resistor (Rset) vs. trip voltage Vpn  
The SC4614 uses low-side MOSFET Rdson sensing for  
over current protection. In every switching cycle, after  
the bottom MOSFET is on for 150ns, the SC4614 de-  
tects the phase node voltage and compares it with an  
internal setting voltage. If the phase node is lower than  
the setting voltage, an overcurrent condition occurs. The  
SC4614 will discharge the internal SS capacitor and shut-  
down both outputs. After waiting for around 10 millisec-  
onds, the SC4614 begins to charge the SS capacitor  
again and initiates a fresh startup. The startup and shut-  
down cycle will repeat until the short circuit is removed.  
This is called a hiccup mode short circuit protection.  
The resistor Rset can be found in Fig. 2 for a given phase  
node voltage Vpn at the load trip point. This voltage is  
the product of the inductor peak current at the load trip  
point and the Rdson of the low-side MOSFET:  
Vpn I peak P Rds _on  
The soft start time of the SC4614 is fixed at around  
1.5ms. Therefore, the maximum soft start current is de-  
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SC4614  
POWER MANAGEMENT  
Applications Information (Cont.)  
duction losses of the top and bottom MOSFETs are given  
by:  
termined by the output inductance and output capaci-  
tance. The values of output inductor and output bulk  
capacitors have to be properly selected so that the soft  
start peak current does not exceed the load trip point of  
the short circuit protection.  
P
IO2 Rdson D  
C _TOP  
P
IO2 Rdson (1D)  
Internal LDO for Gate Drive  
C _ BOT  
An internal LDO is designed in the SC4614 to lower the  
12V supply voltage for gate drive. A 1uF external ce-  
ramic capacitor connected in between DRV pin to the  
ground is needed to support the LDO. The LDO output is  
connected to the low gate drive internally, and has to be  
connected to the high gate drive through an external  
bootstrap circuit. The LDO output voltage is set at 8.2V.  
The manufacture data and bench tested results show  
that, for low Rdson MOSFETs run at applied load current,  
the optimum gate drive voltage is around 8.2V, where  
the total power losses of power MOSFETs are minimized.  
If the requirement of total power losses for each MOSFET  
is given, the above equations can be used to calculate  
the values of Rdson and gate charge, then the devices  
can be determined accordingly. The solution should en-  
sure the MOSFET is within its maximum junction tem-  
perature at highest ambient temperature.  
Output Capacitor  
The output capacitors should be selected to meet both  
output ripple and transient response criteria. The output  
capacitor ESR causes output ripple VRIPPLE during the  
inductor ripple current flowing in. To meet output ripple  
criteria, the ESR value should be:  
COMPONENT SELECTION  
LfOSC VRIPPLE  
General design guideline of switching power supplies can  
be applied to the component selection for the SC4614.  
RESR  
VO  
VO (1ꢀ  
)
VIN  
Inductor and MOSFETs  
The selection of inductor and MOSFETs should meet ther-  
mal requirements because they are power loss dominant  
components. Pick an inductor with as high inductance  
as possible without adding extra cost and size. The higher  
inductance, the lower ripple current, the smaller core loss  
and the higher efficiency will be. However, too high in-  
ductance slows down output transient response. It is rec-  
ommended to choose the inductance that creates an  
inductor ripple current of approximate 20% of maximum  
load current. So choose inductor value from:  
The output capacitor ESR also causes output voltage tran-  
sient VT during a transient load current IT flowing in. To  
meet output transient criteria, the ESR value should be:  
VT  
IT  
RESR  
To meet both criteria, the smaller one of above two ESRs  
is required.  
The output capacitor value also contributes to load tran-  
sient response. Based on a worst case where the induc-  
tor energy 100% dumps to the output capacitor during  
the load transient, the capacitance then can be calcu-  
lated by:  
5
VO  
VIN  
L  
VO (1ꢀ  
)
IO fosc  
The MOSFETs are selected by their Rdson, gate charge,  
and package specifications. The SC4614 provides 1.5A  
gate drive current and gives 50nC/1.5A=33ns switching  
time for driving a 50nC gate charge MOSFET. The switch-  
ing time ts contributes to the top MOSFET switching loss:  
IT2  
C Lꢀ  
VT2  
P IO VIN tS fOSC  
S
Input Capacitor  
The input capacitor should be chosen to handle the RMS  
ripple current of a synchronous buck converter. This value  
There is no significant switching loss for the bottom  
MOSFET because of its zero voltage switching. The con-  
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SC4614  
POWER MANAGEMENT  
Applications Information (Cont.)  
is given by:  
SC4614AND MOSFETS  
Vc  
IRMS (1D)II2N D(Io IIN )2  
REF  
+
-
PWM  
MODULATOR  
EA  
FB  
L
Vo  
where Io is the load current, IIN is the input average cur-  
rent, and D is the duty cycle. Choosing low ESR input  
capacitors will help maximize ripple rating for a given size.  
OUT  
COMP  
Zf  
Co  
Bootstrap Circuit  
Zs  
Resr  
The SC4614 uses an external bootstrap circuit to pro-  
vide a voltage at the BST pin for the top MOSFET drive.  
This voltage, referring to the Phase Node, is held up by a  
bootstrap capacitor. Typically, it is recommended to use  
a 1uF ceramic capacitor with 16V rating and a commonly  
available diode IN4148 for the bootstrap circuit.  
Fig. 3. Block diagram of the control loop  
Filters for Supply Power  
For each pin of DRV and Vcc, it is recommended to use a  
1uF/16V ceramic capacitor for decoupling. In addition,  
place a small resistor (10 ohm) in between the Vcc pin  
and the supply power for noise reduction.  
The model is a second order system with a finite DC gain,  
a complex pole pair at Fo, and an ESR zero at Fz, as  
shown in Fig. 4. The locations of the poles and zero are  
determined by:  
CONTROL LOOP DESIGN  
1
LC  
FO  
The goal of compensation is to shape the frequency re-  
sponse charateristics of the buck converter to achieve a  
better DC accuracy and a faster transient response for  
the output voltage, while maintaining the loop stability.  
1
FZ  
RESRC  
The block diagram in Fig. 3 represents the control loop  
of a buck converter designed with the SC4614. The con-  
trol loop consists of a compensator, a PWM modulator,  
and a LC filter.  
The compensator in Fig. 3 includes an error amplifier and  
impedance networks Zf and Zs. It is implemented by the  
circuit in Fig. 5. The compensator provides an integrator,  
double poles and double zeros. As shown in Fig. 4, the  
The LC filter and PWM modulator represent the small integrator is used to boost the gain at low frequency.  
signal model of the buck converter operating at fixed Two zeros are introduced to compensate excessive phase  
switching frequency. The transfer function of the model lag at the loop gain crossover due to the integrator  
is given by:  
(-90deg) and complex pole pair (-180deg). Two high fre-  
quency poles are designed to compensate the ESR zero  
and attenuate high frequency noise.  
VO VIN  
1sRESRC  
VC Vm 1sL/ R s2LC  
where VIN is the power rail voltage, Vm is the amplitude  
of the 500kHz ramp, and R is the equivalent load.  
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SC4614  
POWER MANAGEMENT  
Applications Information (Cont.)  
(2). Select the open loop crossover frequency Fc located  
at 10% to 20% of the switching frequency. At Fc, find the  
required DC gain.  
60  
Fp1  
Fz  
Fp2  
COMPENSATOR GAIN  
(3). Use the first compensator pole Fp1 to cancel the  
ESR zero Fz.  
30  
0
Fz1  
Fz2  
(4). Have the second compensator pole Fp2 at half the  
switching frequency to attenuate the switching ripple and  
high frequency noise.  
Fo  
Fc  
-30  
-60  
(5). Place the first compensator zero Fz1 at or below  
50% of the power stage resonant frequency Fo.  
(6). Place the second compensator zero Fz2 at or below  
the power stage resonant frequency Fo.  
100  
1K  
10K  
FREQUENCY (Hz)  
100K  
1M  
A MathCAD program is available upon request for the  
calculation of the compensation parameters.  
Fig. 4. Bode plots for control loop design  
LAYOUT GUIDELINES  
C2  
The switching regulator is a high di/dt power circuit. Its  
Printed Circuit Board (PCB) layout is critical. A good lay-  
out can achieve an optimum circuit performance while  
minimizing the component stress, resulting in better sys-  
tem reliability. During PCB layout, the SC4614 controller,  
MOSFETs, inductor, and power decoupling capacitors have  
to be considered as a unit.  
C1  
R2  
C3  
R3  
Vo  
Vc  
-
+
2
1
3
Rtop  
Rb ot  
VREF  
0.5V  
The following guidelines are typically recommended for  
using the SC4614 controller.  
(1). Place a 4.7uF to 10uF ceramic capacitor close to  
the drain of top MOSFET for the high frequency and high  
current decoupling. The loop formed by the capacitor,  
the top and bottom MOSFETs must be as small as pos-  
sible. Keep the input bulk capacitors close to the drain  
of the top MOSFETs.  
Fig. 5. Compensation network  
The top resistor Rtop of the voltage divider in Fig. 5 can  
be chosen from 1k to 5k. Then the bottom resistor Rbot  
is found from:  
(2). Place the SC4614 over a quiet ground plane to avoid  
pulsing current noise. Keep the ground return of the gate  
drive short.  
0.5V  
VO 0.5V  
Rbot  
Rtop  
(3). Connect bypass capacitors as close as possible to  
the decoupling pins (DRV and Vcc) to the ground pin GND.  
The trace length of the decoupling capacitor on DRV pin  
should be no more than 0.2” (5mm).  
where 0.5V is the internal reference voltage of the  
SC4614.  
(4). Locate the components of the bootstrap circuit close  
to the SC4614.  
The other components of the compensator can be cal-  
culated using following design procedure:  
(1). Plot the converter gain, including LC filter and PWM  
modulator.  
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SC4614  
POWER MANAGEMENT  
Applications Information (Cont.)  
Typical Application Schematics with 12V Input  
12V  
Rcc  
2R2  
C4  
+
C3  
10uF  
Q1  
IPD05N03  
1uF  
1800uF  
Rli mit  
3.3k  
R4  
0
499k  
C15  
D1  
U1  
0
1.5V/15A  
L1  
1
2
3
4
5
10  
9
1
2
BST  
OC S  
COMP  
FB  
DH  
PN  
D1N4148  
1.2uH  
R8  
R12  
301  
+
C5  
C7  
8
R11  
1R0  
14. 7k  
DL  
Q3  
IPD05N03  
C9  
1800uF  
10uF  
+
C6  
7
2.2nF  
VCC  
DRV  
6
1800uF  
GN D  
C18  
1uF  
C17  
1uF  
C13  
0
2.2nF  
R15  
SC4614  
0
C8  
7.32k  
10nF  
C10  
680pF  
R13  
0
11.5k  
Bill of Materials (12V Input)  
Item  
1
2
3
4
5
6
7
8
Quantity Reference  
Part  
10uF/16V  
10uF/6.3V  
1800uF/16V  
1800uF/6.3V  
1uF  
2.2nF  
2.2nF  
10nF  
680pF  
D1N4148  
1.2uH  
IPD05N03  
2R2  
3.3k  
499k  
301  
1R0  
Vendor  
Vishay  
Vishay  
Rubycon, MBZ  
Rubycon, MBZ  
Vishay  
Vishay  
Vishay  
Vishay  
Vishay  
1
1
1
2
3
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
C4  
C7  
C3  
C5,C6  
C15,C17,C18  
C9  
C13  
C8  
C10  
D1  
L1  
Q3,Q1  
Rcc  
Rlimit  
R4  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
Any  
Cooper Electr. Tech  
Infineon  
Vishay  
Vishay  
Vishay  
Vishay  
Vishay  
Vishay  
Vishay  
R8  
R11  
R12  
R15  
R13  
U1  
14.7k  
7.32k  
11.5k  
SC4614  
Vishay  
SEMTECH  
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10  
SC4614  
POWER MANAGEMENT  
Applications Information (Cont.)  
Performance Characteristics (12V Input)  
Start up  
Efficiency (%) vs Load Current  
90  
85  
80  
75  
70  
65  
60  
12V Input (5V/DIV)  
1.5V Output (1V/DIV)  
1
3
5
7
9
11  
13  
15  
X=5ms/DIV  
Load Current (A)  
Transient Response  
Load Characteristics (Output vs Load Current)  
1.6  
1.4  
1.2  
1.0  
1.5V Output Response (100mV/DIV)  
0.8  
0.6  
0.4  
0.2  
0.0  
Step Load Current (10A/DIV)  
0
5
10  
15  
20  
X=20us/DIV  
Load Current(A)  
Gate Waveforms (Io=15A)  
Short Circuit Protection  
Output Short  
DL (10V/DIV)  
DH (10V/DIV)  
1.5V OUT (1V/DIV)  
PN (10V/DIV)  
Output Current (10A/DIV)  
X=5ms/DIV  
X=50ns/DIV  
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11  
SC4614  
POWER MANAGEMENT  
Applications Information (Cont.)  
Typical Application Schematics with 25V Input  
Vin=25V  
Rcc  
C4  
+
C3  
732  
10uF  
Q1  
IRLR7821  
1uF  
1800uF  
Rli mit  
3.3k  
R4  
0
499k  
C15  
D1  
U1  
5V/10A  
0
L1  
1
2
3
4
5
10  
9
1
2
BST  
OC S  
COMP  
FB  
DH  
PN  
D1N4148  
2.2uH  
R8  
R12  
22k  
301  
C7  
8
R11  
1R 0  
DL  
Q3  
IRLR7821  
C9  
10uF  
7
2.2nF  
+
C6  
VCC  
DR V  
6
1800uF  
GN D  
C17  
1uF  
C13  
0
2.2nF  
R15  
SC4614  
0
C8  
C18  
1uF  
2.43k  
4.7nF  
C10  
1nF  
R13  
22k  
D2  
BZX84B16LT1  
0
0
Note: Zener diode D2 is required when Vin is18V or higher.  
Bill of Materials (25V Input)  
Item  
1
2
3
4
5
6
7
8
Quantity Reference  
Part  
Vendor  
Murata  
Vishay  
Rubycon  
Rubycon, MBZ  
Vishay  
Vishay  
Vishay  
Vishay  
Vishay  
1
1
1
1
3
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
C4  
C7  
C3  
C6  
10uF/35V  
10uF/6.3V  
1800uF/35V  
1500uF/6.3V  
1uF  
2.2nF  
2.2nF  
4.7nF  
1nF  
D1N4148  
BZX84B16LT1  
2.2uH  
IRLR7821  
732  
3.3k  
499k  
301  
1R0  
C15,C17,C18  
C9  
C13  
C8  
C10  
D1  
D2  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Any  
ON Semi  
Cooper Electr. Tech  
IR  
Vishay  
Vishay  
Vishay  
Vishay  
Vishay  
Vishay  
L1  
Q3,Q1  
Rcc  
Rlimit  
R4  
R8  
R11  
R12  
R15  
R13  
U1  
22k  
2.43k  
22k  
SC4614  
Vishay  
Vishay  
SEMTECH  
www.semtech.com  
2005 Semtech Corp.  
12  
SC4614  
POWER MANAGEMENT  
Applications Information (Cont.)  
Performance Characteristics (25V Input)  
Start up  
Efficiency (%) vs Load Current  
92  
90  
88  
86  
25V Input (10V/DIV)  
5V Output (2V/DIV)  
84  
82  
80  
78  
76  
1
2
3
4
5
6
7
8
9
10  
X=5ms/DIV  
Load Current (A)  
Gate Waveforms (Io=10A)  
Transient Response  
5V Output Response (200mV/DIV)  
DL (10V/DIV)  
DH (10V/DIV)  
PN (10V/DIV)  
Step Load Current (10A/DIV)  
X=100ns/DIV  
X=20us/DIV  
www.semtech.com  
2005 Semtech Corp.  
13  
SC4614  
POWER MANAGEMENT  
Outline Drawing - MSOP-10  
DIMENSIONS  
INCHES MILLIMETERS  
e
DIM  
A
A
MIN NOM MAX MIN NOM MAX  
D
E
-
-
-
-
-
-
-
-
-
-
-
-
.043  
1.10  
0.15  
0.95  
0.27  
0.23  
N
A1 .000  
A2 .030  
.006 0.00  
.037 0.75  
.011 0.17  
.009 0.08  
b
c
D
.007  
.003  
2X E/2  
.114 .118 .122 2.90 3.00 3.10  
E1  
E1 .114 .118 .122 2.90 3.00 3.10  
PIN 1  
E
e
.193 BSC  
.020 BSC  
4.90 BSC  
0.50 BSC  
INDICATOR  
L
L1  
N
.016 .024 .032 0.40 0.60 0.80  
ccc  
C
1 2  
(.037)  
10  
-
(.95)  
10  
-
2X N/2 TIPS  
B
01  
aaa  
0°  
8°  
0°  
8°  
.004  
.003  
.010  
0.10  
0.08  
0.25  
bbb  
ccc  
D
aaa  
C
H
A2  
A
SEATING  
PLANE  
c
GAGE  
A1  
bxN  
bbb  
C
PLANE  
C
A-B D  
0.25  
L
01  
(L1)  
DETAIL A  
SEE DETAIL A  
SIDE VIEW  
NOTES:  
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).  
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-  
3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS  
OR GATE BURRS.  
4. REFERENCE JEDEC STD MO-187, VARIATION BA.  
Land Pattern - MSOP-10  
X
DIMENSIONS  
DIM  
INCHES  
(.161)  
.098  
MILLIMETERS  
(4.10)  
2.50  
0.50  
0.30  
1.60  
5.70  
C
G
P
X
Y
Z
(C)  
G
Y
Z
.020  
.011  
.063  
.224  
P
NOTES:  
1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.  
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR  
COMPANY'S MANUFACTURING GUIDELINES ARE MET.  
Contact Information  
Semtech Corporation  
Power Management Products Division  
200 Flynn Road, Camarillo, CA 93012  
Phone: (805)498-2111 FAX (805)498-3804  
www.semtech.com  
2005 Semtech Corp.  
14  

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