UR8HC007-004_技术文档

TM

Juno 04 UR8HC007-004

TM

Zero-Power Input Device and

Power Management IC

HID & SYSTEM MANAGEMENT PRODUCTS, H/PC IC FAMILY

DESCRIPTION

FEATURES

TM

The Juno 04 is a member of a

• Typically consumes less than 1µA

• Scans an 8 x 16 keyboard matrix

that supports Japanese, English

and European keyboards

• Interfaces any four- or eight-wire

resistive touch screen

• Has additional GPIO available for

LEDs, switches, etc.

series of input device and power

management companion ICs for

RISC-based portable systems. On

• Offers internal control of LCD

brightness/contrast, audio, etc. as

well as four 10-bit A/D channels

for power management monitoring

• Provides programmable features

that allow for maximum design

differentiation without

TM

a single IC, the Juno 04 integrates

control of any 4-wire or 8-wire

resistive touch screen, keyboard

scanning, unique power

management capabilities, and

plenty of General Purpose Input /

Output (GPIO).

• Operates continuously between 3

Volts and 5 Volts

• Offers unique power management

capabilities that work in harmony

with Windows® CE power modes

• Always runs in "Stop" mode without

data or event loss

• GPIO pins provide interrupt at both

falling and rising edge of signals,

ideal for lid functions, power, ring

indicators, docking signals, battery

measurement, etc.

customization

• Cost-effective, reducing overall

system costs by integrating

features that would typically

require multiple components

• Available in 80-pin 13 x 13 mm,

1.7mm high package to

TM

The Juno 04 provides continuous

operation between 3 and 5V and

scans a fully programmable 8 X 16

keyboard matrix.The Zero-Power

TM

Juno 04 will power down even

accommodate slim designs

between key presses. Typical

power consumption is less than 1

µA, a first for embedded ICs.

APPLICATIONS

TM

• H/PCs

• Web Phones, G3 Terminals

• Jupiter-class devices

• Professional H/PCs

The Juno 04 is equipped with

Semtech’s proprietary protocol

developed specifically for RISC-

based handheld machines. It

interfaces the system via either

Asynchronous Serial (UART) or the

Serial Peripheral Interface (SPI).

PIN ASSIGNMENTS

41

60

The integration of features, many of

them programmable, on one IC

increases flexibility and reduces

component count and cost.

61

R1

R0

40

RIGHT2/GIO66

RIGHT3/GIO67

C8

C9

C10

BOT3/RIGHT

BOT2/LEFT

BOT1/BOT

BOT0/TOP

TOP3/RIGHTEN

TOP2/LEFTEN

TOP1/BOTEN

TOP0/TOPEN

VDD

C11

GIO00/LED0

GIO01/LED1

GIO02/LED2

GIO03/LED3

VSS

OSCO

OSCI

UR8HC007-004-FQ

AVREF

AVSS

TOPAD

C12

BOTAD

C13

LEFTAD

RIGHTAD

C15

RESET

VSS1

LID

C14

GIO31/AD1

PWROK

MOSI/RXD

80

21

1

20

Juno is a trademark of Semtech Corporation. All

other trademarks belong to their respective

companies.

Copyright @1998-2001 Semtech Corporation

DOC8-007-004-DS-103

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1

ORDERING CODE

Package Options

Pitch in mm’s

TA = 0° C to +75° C

80-pin, Plastic LQFP

0.5

UR8HC007-004-XX-FQ

Other Materials

Type

Order number

Technical Reference Manual

Juno 04 Eval. Kit

Document

Evaluation Kit

DOC8-007-004-TR-XXX

EVK8-007-004-XXX

TM

Note 1: XX= Optional for customization; XXX= Denotes revision number

BLOCK DIAGRAM

SCLK / ISEL

Dual Mode

Serial

Communications

Port

MOSI/RxD

MISO/TxD

SS/RTS

ATN/CTS

ROW 0-7

COL 0-15

Keyboard

Matrix

Scanner

PWROK

LID

Configuration

Status and

Control

Power

Management

Unit

TouchScreen

Port /

Registers

HSUS

21

GIO60-7

Analog Outputs

PWM0-1

D/A0-1

2

GIO50-1

Analog Inputs

A/D0-1

(Shared with GIO3)

GPIO

GIO30-31 /

A/D0-1

GIO00-03 /

LED0-3

GIO10-11

GIO41-43 /

SW / INT

2

4

2

3

DOC8-007-004-DS-103

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2

PIN DEFINITIONS

Pin Numbers

Mnemonic

Power Supply

VDD

QFP

Type

Name and Function

71

72

PWR

AI

Positive Supply Voltage

Positive analog reference

voltage

AVREF

AVSS

VSS

VSS1

73

30

24

PWR

Ground: analog signal

Ground: negative supply voltage

Auxiliary Ground; must be tied to

pin 30

Reset

_RESET

25

I

Controller hardware reset pin:

when at Low-level, this pin holds the

UR8HC007in a reset state. This pin

must be held at a logic-low until Power

Supply voltage (VDD) reaches the

minimum operating level (2.7V).

Oscillator pins

OSCI

28

29

I

Oscillator input: connect ceramic

resonator with built-in load capacitors

or CMOS clock from external oscillator

4 MHz operating frequency

Oscillator Output: connect ceramic

resonator with built-in load capacitors

or keep open if external oscillator

is used

_OSCO

O

Scanned

matrix pins

ROW0-ROW7

COL0-COL7

COL8-COL11

COL12-COL13

COL14-COL15

62-55

54-47

38-35

27-26

79-78

I

O

Row matrix outputs

Column matrix outputs

DOC8-007-004-DS-103

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3

PIN DEFINITIONS, (CON’T)

Pin Numbers

Mnemonic

QFP

Type

Name and Function

General Purpose

Input/Ouput

GIO0

GIO00/LED0-GIO3/LED3

34-31

I/O

General purpose input/output pin

LED driver

GIO1

GIO10-GIO11

GIO3 - analog input

GIO30/AD0

17-16

1

I/O

General purpose input/output pin,

I/O/Ai

General purpose input/output pin,

A/D input 0

General purpose input/output pin,

A/D input 1

GIO31/AD1

80

GIO4

GIO41/SW1/ INT1

4

3

I/O, I Int

I/O

General purpose input/output pin,

switch Input. Capable of interrupt on

both positive and negative edges

General purpose input/output pin;

negative input cancels all LED

blinking, unless blink-cancel function

disabled in register

GIO42/_BLINKCANCEL

GIO43

2

I/O

General purpose input/output pin

GIO5 - analog output

DA0/PWM0/GIO50

DA1/PWM1/GIO51

Touch Screen interface

RIGHT3/GIO67

11

10

Ao

D/A output (Range: AVSS to AVREF)

39

40

41

42

I/O

If no hardware touchscreen driver,

drive output to right side of

touchscreen; otherwise general

purpose I/O

If no hardware touchscreen driver,

drive output to right side of

touchscreen; otherwise general

purpose I/O

If no hardware touchscreen driver,

drive output to right side of

touchscreen; otherwise general

purpose I/O

If no hardware touchscreen driver,

drive output to right side of

RIGHT2/GIO66

RIGHT1/GIO65

RIGHT0/GIO64

touchscreen; otherwise general

purpose I/O

LEFT3/GIO63

LEFT2/GIO62

LEFT1/GIO61

LEFT0/GIO60

43

44

45

46

I/O

If no hardware touchscreen driver,

drive output to left side of touchscreen;

otherwise general purpose I/O

If no hardware touchscreen driver,

drive output to left side of touchscreen;

otherwise general purpose I/O

If no hardware touchscreen driver,

drive output to left side of touchscreen;

otherwise general purpose I/O

If no hardware touchscreen driver,

drive output to left side of touchscreen;

otherwise general purpose I/O

DOC8-007-004-DS-103

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4

PIN DEFINITIONS, (CON’T)

Pin Numbers

Mnemonic

QFP

Type

Name and Function

BOT3/RIGHT

63

O

If no hardware touchscreen driver,

drive output to bottom side of

touchscreen; otherwise output for right

side of touchscreen

BOT2/LEFT

64

65

66

67

68

69

70

O

If no hardware touchscreen driver,

drive output to bottom side of

touchscreen; otherwise output for left

side of touchscreen

If no hardware touchscreen driver,

drive output to bottom side of

touchscreen; otherwise output for

bottom side of touchscreen

If no hardware touchscreen driver,

drive output to bottom side of

touchscreen; otherwise output for top

side of touchscreen

If no hardware touchscreen driver,

drive output to top side of touchscreen;

otherwise enable output to right side of

touchscreen

If no hardware touchscreen driver,

drive output to top side of touchscreen;

otherwise enable output to left side of

touchscreen

BOT1/BOT

BOT0/TOP

TOP3/_RIGHTEN

TOP2/_LEFTEN

TOP1/_BOTEN

TOP0/_TOPEN

If no hardware touchscreen driver,

drive output to top side of touchscreen;

otherwise enable output to bottom side

of touchscreen

If no hardware touchscreen driver,

drive output to top side of touchscreen;

otherwise enable output to top side of

touchscreen

_TOUCHINT

RIGHTAD

5

77

I

Ai

Touchscreen interrupt input

A/D input from right side of

touchscreen

LEFTAD

BOTAD

76

75

Ai

A/D input from left side of touchscreen

A/D input from bottom side of

touchscreen

TOPAD

74

23

Ai

A/D input from top side of touchscreen

System and Power

Management

_LID

I Int

Lid closed signal from the lid switch

(active-low). Capable of interrupt on

both positive and negative edges

Power OK signal. Capable of interrupt

on both positive and negative edges

Host Suspended signal (active-low).

When "Low," indicates that host

computer system is in power-reduced

or Stop mode.

PWROK

_HSUS

22

9

I Int

I

DOC8-007-004-DS-103

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5

PIN DEFINITIONS, (CON’T)

Pin Numbers

Mnemonic

QFP

Type

Name and Function

Host Communication

Interface

_SS/_RTS

13

I_Int

Slave_Select (SPI Mode) or

Ready_To_Send (Asynchronous Serial

Mode). Active-Low signal Input. Low-level

indicates that the Host System has data

for the UR8HC007 peripheral device or the

Host System is ready to accept data from

the UR8HC007 peripheral device.

Capable of Interrupt on Negative edge.

Pin 60 and pin 18 should both be "Low" for

data exchange to occur.

_ATN/_CTS

18

O

Attention (SPI Mode) or Clear_To_Send

(Asynchronous Serial Mode ). Active-Low

signal Output. Low-level indicates that the

UR8HC007 peripheral device has data for

the Host System or the UR8HC007

peripheral device is ready to accept data

from the Host System. Pin 18 and pin 60

should both be "Low" for data exchange to

occur.

MISO/TXD

20

I/O / O

Master-In-Slave-Out (SPI Mode) or

Transmit Data (Asynchronous Serial Mode,

Idle = "High" = 1)

MOSI/RXD

21

19

I

Master-Out-Slave-In (SPI Mode) or Receive

Data (Asynchronous Serial Mode)

SCLK/_ISEL

Serial Clock (SPI Mode) or Interface Select

(Asynchronous Serial Mode). Tie "Low" to

select Asynchronous Serial Mode. In SPI

Mode, use the following Clock sequence:

Idle-High / Negative-Edge (Shift Data) \

Positive-Edge (Latch Data), Idle-High.

Note 2: An underscore before a pin mnemonic denotes an active low signal.

Pin Types Legend: PWR= Power; Ai=Analog Input; Ao= Analog Output; I=Digital Input;

I_Int=Digital Input capable of generating interrupts on a positive to negative edge transition;

I Int=Digital Input capable of generating interrupts on either a positive or a negative edge

transition of the input signal; Ipup= Digital Input with built-in Pull-up to VDD; O=Output; pD=

p-channel open Drain Output (switch to VDD); I/O=Input or Output (Bidirectional pin); nD= n-

channel open Drain Output (switch to VSS); 15V= 5 Volt tolerant input (even if VDD is less

than 5V); nD5V=5 Volt tolerant n-channel open Drain Output.

DOC8-007-004-DS-103

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6

TM

JUNO FAMILY COMMUNICATIONS INTERFACE

The Juno™ family of controllers

implements two modes of serial

communications: The "Synchronous

Peripheral Interface" (SPI) mode

and the "Asynchronous Serial

Interface" (ASI).

The diagrams below describe the SPI and ASI communications interfaces,

respectively.

SPI Communications Interface

The SPI is a synchronous bi-

MOSI

MISO

directional, multi-slave interface that

supports bit rates up to 500 Kb/s.

Several Hosts and companion chips

implement the SPI protocol in order

to communicate with a wide range

of peripherals such as EEPROMs,

A/D converters, MCUs and other

system components. Alternatively,

the SPI may be implemented

SCLK

Host

(master)

_SS

_ATN

_SS

through software on the Host side.

USAR Juno™

SLAVE 2

(slave)

The Juno™ family implements the

_ATN as an additional hand-shake

signal in order to support low power

operation of the bus.

ASI Communications Interface

The ASI is an asynchronous

interface (UART type) that operates

at a fixed baud rate of 62.5 Kb/s.

Host

UR8HC007

Both interfaces are implemented

through the same set of four pins.

CTS

RTS

The IC determines the mode of

communication with the Host during

power-up by reading the value of

the SCLK/ISEL pin. If the pin is tied

low, the ASI mode is enabled. If it

is high, the SPI interface is enabled.

RxD

TxD

RxD

TxD

TM

Please refer to the Juno 04

ISEL

Technical Reference Manual for a

description of handshake and

critical timing parameters for each

interface.

GND

DOC8-007-004-DS-103

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7

PROTOCOLS, COMMANDS AND REPORTS

Overview

General Message Structure

The Juno™ UR8HC007-004

implements and supports four types

of transaction messages.

Communications between the Juno™ UR8HC007-004 and

the Host processor are implemented using a set of packet protocols

and commands. The general structure of a message is shown in the

following diagram:

1. Commands from the IC to the

Host system

Protocol Header

Command/Report Identifier

Message Body

2. Commands from the Host system

to the IC

(if applicable)

LRC

3. Human Input Device (HID)

reports to the system

General Message Format

The Protocol Header identifies the type of transaction. The following table

lists the available protocols.

4. Event Alert messages to the

system

Protocol Headers

The protocol is fundamentally

implemented through a set of

general packet commands that

allow handling and reporting of

each individual controller register

and each bit within each register. In

this manner, the system achieves

maximum flexibility in manipulating

the operation of the UR8HC007-004

controller.

Protocols used in

commands issued by the Host

Protocol

Simple Commands

Write Register bit

Read Register bit

Write Register

Read Register

Write Block

Header

80H

81H

82H

83H

84H

85H

86H

Read Block

Protocols used in responses,

reports and alerts issued

by the controller

Protocol

Simple Commands

Header

80H

Report Register bit & Event Alerts

Report Register

81H

83H

Report Block

85H

Relative Pointer Data Report

Keyboard PS/2 Code Data Report

Absolute Pointer Data Report

Keyboard Key Code (position) Report

87H

88H

89H

8AH

DOC8-007-004-DS-103

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8

PROTOCOLS, COMMANDS AND REPORTS (CON’T)

HID Data Report

General Commands Format

The Pointing Device Data Reports

format covers both absolute (where

applicable) and relative positioning

devices.

For protocols used by either the host or the UR8HC007, a set of simple

commands is implemented. These support the basic communication

protocol and handle reset and errors in transmission.

A simple command would have the following structure:

Keyboard Data Report

Header (80H)

Command Code

LRC

The Keyboard Data Reports return

changes on the keyboard matrix or

the External PS/2 keyboard device.

The report ibncludes a make or

break bit, a column number, and a

row number.

Simple Command Structure

Following is a summary of the simple commands used by both the Host

and the UR8HC007-004:

LRC (Longitudinal

Simple Commands Summary

Redundancy Check)

Command

Initialize

Protocol

Simple

Cmd Code

20H

Description

The LRC is calculated for the

whole packet, including the

Forces the recipient to enter the

known default power-on state

Issued as a hand-shake response

only to the "Initialize" command.

Issued upon error in the reception

of a package. The recipient will

resend the last transmitted packet

Protocol Header. The LRC is

calculated by first taking the

bitwise exclusive OR of all bytes

from the message. If the most

significant bit (MSB) of the LRC is

set, the LRC is modified by

Initialization Complete Simple

21H

25H

Resend Request

Simple

clearing the MSB and changing the

state of the next most significant

bit. Thus, the Packet Check Byte

will never consist of a valid LRC

with the most significant bit set.

DOC8-007-004-DS-103

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9

REGISTERS

The Juno™ 04 implements a set of

internal registers that can be used

to control and monitor the operation

of the various functional units of the

controller IC. These registers can

be accessed through the

Read/Write Register commands

described in the Commands section

of the Juno™ 04 Technical

Registers’ Page Organization

Register Offset

00

01

Reference Manual. The register

architecture of the Juno™ 04 allows

for maximum flexibility and

expandability of the controller

operation. At the same time, by

using the default values for each

register, a system can utilize all the

basic functionality of the IC

Registers’ Page 0

Control and Status

Registers

0

1

255

Page Number Register

controller with minimum Host driver

intervention.

Register Offset

00

01

Registers’ Page 1

Scanned Matrix and

Alternate Layout Keys

Registers

255

Page Number Register

Figure 1: Registers’ Page Organization

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10

POWER MANAGEMENT MODES OF OPERATION

POWER MANAGEMENT

TM

The Juno family has three modes

The Juno™ UR8HC007 family of controllers implements two power

management methods: system-coordinated power management and

Self-Power Management™ (SPM).

of operation relating to its power

consumption.

The "Stop" mode is the lowest

System-coordinated power management primarily determines the tasks

performed and the type of reports communicated to the Host. The Juno™

04 monitors the system states through the PWROK (Power OK), _LID (Lid

closed) and _HSUS (Host suspended) lines. In addition to these signal

inputs, the UR8HC007 family provides a set of registers, described in the

power consumption mode. In this

mode, the crystal is stopped and

the IC consumes only 1 µA of

leakage current. This is the default

mode to which the IC will revert any

time an event or a signal condition

does not force it to exit this mode.

TM

"Registers" chapter of the Juno 04 Technical Reference Manual, that can

be used by the host to control the PM-related performance of the controller

through software. According to the status of these lines (or register

settings), the Juno™ 04 will enable or disable specific tasks and reports

suited to the current power and system management state of the Host.

The "Wait" mode is entered each

time it is necessary for a timer to be

running in order to perform a

system function. Such functions

include the LED blinking mode and

the use of one of the PWM

channels. Typical power

consumption in this mode is several

hundred µAs.

Self-Power Management™ describes a method implemented by the Juno™

family of controllers that, independently of any system intervention, results in

the lowest power consumption possible within the given parameters of its

operation. Through Self-Power Management™, the Juno™ controllers are

capable of typically operating at only 1 µA, independent of the state of the

system. Self-Power Management™ primarily determines the actual power

consumption of the controller IC.

The "Run" mode is entered briefly,

only to process an event or while an

interrupt-generating signal condition

persists. The controller IC will

remain in this mode only for as long

a signal prohibits it from reentering

a lower power consumption mode

or for as long as it is necessary to

process a Host-related transaction

(a few milliseconds).

The Juno™ 04 implements the Semtech-patented Self-Power

Management™ method to achieve the minimum power consumption

possible, independent of the Host power management state.

Even when the Host is in the active state, the IC can still operate most of

the time at only 1 µA, even with external PS/2 devices attached to it.

Critical

Suspend

PWROK=1

AND

PWROK=1

PWROK=0

AND _LID=1

AND _HSUS=1

_LID=0

PWROK=0

PWROK=1

AND _LID=1

AND _HSUS=0

PWROK=0

PWROK=1

Lid

Closed*

AND _LID=1

PWROK=1

AND _LID=0

AND _HSUS=1

PWROK=1

AND _LID=1

AND _HSUS=0

PWROK=1

AND _LID=0

Host

Suspend

PWROK=1 AND _LID=1 AND _HSUS=1

SPM

PWROK=1 AND _LID=1

AND _HSUS=0

DOC8-007-004-DS-103

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11

HID MANAGER

KEYBOARD ENCODING

The UR8HC007-004 Human Input

Device (HID) Manager is

The UR8HC007-004 will encode an 8-row by 16-column keyboard matrix.

OEMs may reprogram the matrix by sending commands to the IC from the

system. The Juno 04 supports English, Japanese and European

keyboards. In addition, the IC supports both sticky keys and notebook-style

keyboards.

TM

responsible for the configuration

and handling of HID devices that

are embedded or attached to the

controller. The HID Manager has

the following responsibilities:

1. Enabling and disabling

The keyboard below, the Fujitsu FKB7654, is the default keyboard for the

UR8HC007-004.

embedded and attached input

devices through the "HID

enable/disable control" register

2. Formatting and relaying input

device reports to the Host

SL

NL

Pau

Brk

Ins

Prt

Del

Srq

Esc

F1

F2

F3

F4

F5

F6

F7

F8

F9

8

F10

F11

F12

_

7

9

~

`

!

1

@

2

#

3

$

4

%

5

^

6

&

7

*

8

(

)

0

+

=

bk

sp

-

9

4

5

6

{

[

}

]

Q

W

E

R

T

Y

U

I

O

P

enter

tab

3. Controlling the configuration and

operation of both embedded and

attached input devices

+

1

2

3

:

;

|

\

cap

A

S

D

F

G

H

J

K

L

"

'

lock

.

0

/

<

>

?

/

Z

X

C

V

B

N

M

shift

ctrl

shift

,

.

The HID Manager consists of the

two functional blocks: the Keyboard

Manager and the Pointing Device

Manager.

fn

alt

sZpace

alt

ctrl

pgup

Fujitsu FKB7654

The function of each Manager is

explained in full in the Juno 04

Technical Reference Manual.

GENERAL PURPOSE INPUT OUTPUT

TM

The Juno 04 provides many GPIO pins which enable OEMs to easily

differentiate their products.

TM

OTHER JUNO SERIES MEMBERS

Four GPIO ports provide interrupt at both falling and rising edge of signals.

Two of these pins are dedicated for use as a Lid indicator and Digital power

monitor. The other two may be used for a ring indicator, docking signal, soft

power button, etc.

TM

Other members of the Juno series

of companion ICs offers advanced,

ergonomic control of an internal

pointing device. Enabled pointing

devices include touch pads or force

sticks. If the application requires an

internal pointing device, using a

Three GPIO pins provide A/D input and are ideal for battery measurement.

Three GPIO pins provide two Pulse Width Modulation (PWM) channels and

one D/A channel and may be used for analog control functions such as

LCD brightness/contrast or audio volume control.

TM

pointing-enabled Juno will

eliminate the need for a dedicated

mouse encoder IC.

Four GPIO pins with high drive ability are set aside as LED drivers or I/O.

Eight GPIO pins can be used as system control outputs or inputs, for

example, for switches.

DOC8-007-004-DS-103

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12

TM

JUNO 04 POINTING DEVICE MANAGER

TM

The Juno 04 Pointing Device Manager has the following features:

Pin drive or device drive detection

The designer can select one of two configurations for touchscreen driving:

with hardware driver (device drive) and without (pin drive). The Juno™ 04

can detect the configuration automatically at power-up and behave

properly for that configuration. The touch and motion qualities are exactly

the same for both configurations. For more details, see the analytical pin

descriptions for touchscreen in the "Pin information" chapter.

Touch detection

The Pointing Device Manager periodically checks whether there is touch on

touchscreen. If no touch is detected, the pointing device manager drives

the touchscreen into power saving mode. If a touch is detected,

touchscreen is forced into driving state and prepared for measurement.

Touch measurement

When the Pointing Device Manager detects a touch on touchscreen, it

drives the touchscreen into drive state and does measurement. If the

touch data is not good enough, the measured data are not used for the

algorithm. Only good touch data are used for the algorithm.

Touch algorithm

Due to hand shaking and electrical noise, the raw data can not be output

directly. The Pointing Device Manager uses a proprietary algorithm to

process the data.

Sampling rate

The sampling rate is 100 coordinate points per second.

Resolution

The maximum touchscreen resolution is approximately 1000 points per

direction. It varies with different touchscreens due to voltage drop on

connection wires.

Touchscreens from different manufacturers

Touchscreens from different manufacturers have different parameters. The

touchscreen parameters also depend on the size of touchscreen and

material from which it is made. Because the Pointing Device Manager

takes these properties into account, it can support almost any touchscreen.

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13

TM

JUNO 04 ELECTRICAL CHARACTERISTICS

Absolute maximum ratings

(VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH)

Parameter

Symbol

Value

Unit

Supply Voltage

VDD

-0.3 to +7.0

V

Input voltage

All pins except 2-9

Pins 2-9

(PS/2 ports XXXDAT, XXXCLK,

GIO16/SW16, GIO17/SW17)

Output current

Total peak for all pins

VIN

-0.3 to VDD+0.3

-0.3 to +5.8

V

VIN

ΣIOH (Peak)

ΣIOL (Peak)

ΣIOH (Avg)

ΣIOL (Avg)

-80

80

-40

40

mA

Total average for all pins

All pins except 31-34

Peak for each pin

IOH (Peak)

IOL (Peak)

IOH (Avg)

IOL (Avg)

-10

10

-5

mA

Average for each pin

5

Pins 31-34

(GIO00/LED0 - GIO03/LED3)

Peak for each pin

IOH (Peak)

IOL (Peak)

IOH (Avg)

IOL (Avg)

-10

20

-5

mA

Average for each pin

15

Temperature range

Operating Temperature

Storage Temperature

TLOW to THIGH

TSTG

-20 to 85

-40 to 125

ºC

DOC8-007-004-DS-103

www.semtech.com

16

POWER CONSUMPTION WHILE OPERATING THE PWM CHANNELS

Users should consider the built-in PWM channels for generating slowly changing DC control voltages. Since

continuous clocking is necessary for the PWM operations, the only penalty for using the built-in PWM channels is the

requirement for the chip to operate at least in the Reduced Power Mode, with typical Current Consumption of 750 µA.

TM

JUNO 04 ELECTRICAL CHARACTERISTICS, (CON’T)

NOTES FOR ELECTRICALS

Note 3:

Recommended Operating Conditions, Digital Section

(VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH)

Parameter

Symbol

VDD

Min

2.7

Typ

3.0

Max

5.5

Unit

V

Current Consumption values do not

include any loading on the Output

pins or Analog Reference Current

for the built-in A/D or D/A modules.

Supply voltage

Input logic high

voltage

All pins except 2-9

Pins 2-9

(PS/2 ports xxxDAT,

xxxCLK, GIO16/SW16,

GIO17/SW17)

VIH

0.8VDD

VDD

5.5

V

Note 4:

Since the built-in A/D module

consumes current only during short

periods of time (when A/D

conversion is actually requested),

the Analog Reference Current for

the built-in A/D module is not a

significant contributor to the overall

power consumption.

Input logic low

voltage

All pins except 28

Pin 28 (OSCI)

Input current

VI = VSS, VDD)

Input Pull-up Current

(pins 56-58 / IP6-IP8,

VI = VSS)

Output voltage

IOH = -1.0 mA

VIL

0

0.2VDD

0.16VDD

V

IIL / IIL

IPUP

-5.0

0

5.0

-10

0.4

µA

-120

VOH

VOL

VDD-1.0

V

Note 5:

IOL = 1.6 mA

Current Consumption

(see Note 3 below)

Full Speed Mode

(Fosc=4MHz)

Reduced Power Mode

(Fosc=4MHz)

The Analog Reference Current for

the built-in D/A module correlates

linearly to the Output Voltage. For

D/A output of 0V, the Analog

Reference Current is null. For D/A

outputs approaching Full Scale

(AVREF), the maximum Analog

Reference Current is indicated in

this Table. This current is a

IDD

3.5

7.0

mA

µA

750

Stop Mode

(Interrupts active, Fosc=0)

1.0 (TA = 25ºC)

10(TA = 85ºC ) µA

IDD

.1

Recommended operating conditions, analog section

(VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH)

significant contributor to the overall

power consumption.

Parameter

Symbol

AVSS

AVREF

Min

Typ

0

VDD

Max

Unit

V

Bits

LSb

Analog Signal Ground

Analog Reference Voltage

A/D Resolution-

A/D Absolute Accuracy

A/D Analog Input

Voltage Range

A/D Analog Input Current

Analog Reference Current

(see Note 4)

2.7

VDD

10

4

VIA

IIA

AVSS

AVREF

5.0

V

µA

(A/D is active)

D/A Resolution-

D/A Absolute Accuracy

D/A Output Impedance

IAVREF

RO

200

8

2.5

4.0

µA

Bits

%

-

1

2.5

KOhms

Analog Reference Current

(see Note 5)

(D/A is active,

Output = Full Scale)

IAVREF

3.2

mA

Note 3: please see left

Note 4: please see left

Note 5: please see left

DOC8-007-004-DS-103

www.semtech.com

17

MECHANICAL INFORMATION FOR THE UR8HC007-004 LQFP PACKAGE

HD

D

80

61

1

60

80 Pin LQFP

20

41

A

21

40

L1

F

e

L

Detail F

b

y

Dimension in Millimeters

Symbol

Min

–

0

Nom

–

0.1

Max

1.7

0.2

–

MD

A

A1

A2

b

c

D

–

1.4

0.13

0.105

11.9

–

0.18

0.125

12.0

0.5

0.28

0.175

12.1

–

E

e

HD

HE

L

L1

y

13.8

0.3

–

0˚

14.0

0.5

1.0

–

14.2

0.7

–

0.1

10˚

–

I2

Recommended Mount Pad

–

b2

I2

–

1.0

0.225

–

MD

ME

–

12.4

–

DOC8-007-004-DS-103

www.semtech.com

18

TM

JUNO 04 BILL OF MATERIALS FOR PAGE 13 SCHEMATIC

UR8HC007-004-FQ BOM

Description

Quantity

Manufacturer

Part#

Description

Capacitors:

C1-C4

C2,C3,C4

C6

4

3

1

3

Generic

Any

100pF, 5%, Ceramic, NPO or X7R

.1uF, 10%, Ceramic, X7R or Z5U

1uF, 10V, +80%/-20%, Tantalum

10uF, 10V, +80%/-20%, Tantalum

C5A,C5B,C5C

ICs:

U4

U3

U1

1

National

Generic

Semtech

LMV321M5

74HC4053

UR8HC007-004-FQ

Single OpAmp, Low Voltage, SOT23-5

Tri 2-ch Analog Mux

Juno Controller

TM

Resistors:

R2

R1

R3

R4,R5

1

2

Generic

Any

1k, 5%, 1/16W

2.7k, 5%, 1/16W

3.16k, 1%, 1/16W

100k, 5%, 1/16W

Resonator:

Y1

Transistor:

Q1

1

AVX

PBRC-4.00BR

BSS84ZXCT

4.00MHz Ceramic Resonator w/ Caps, SMT

MOSFET_P Transistor, SMT, SOT-23

Zetex

DOC8-007-004-DS-103

www.semtech.com

19

For sales information

and product literature,

contact:

HID & System Mgmt Division

Semtech Corporation

568 Broadway

New York, NY 10012

usar@semtech.com

http://www.semtech.com

212 226 2042 Telephone

212 226 3215 Telefax

Semtech Western Regional Sales

805-498-2111 Telephone

805-498-3804 Telefax

Semtech Central Regional Sales

972-437-0380 Telephone

972-437-0381 Telefax

Semtech Eastern Regional Sales

203-964-1766 Telephone

203-964-1755 Telefax

Semtech Asia-Pacific Sales Office

+886-2-2748-3380 Telephone

+886-2-2748-3390 Telefax

Semtech Japan Sales Office

+81-45-948-5925 Telephone

+81-45-948-5930 Telefax

Semtech Korea Sales Sales

+82-2-527-4377 Telephone

+82-2-527-4376 Telefax

Northern European Sales Office

+44 (0)2380-769008 Telephone

+44 (0)2380-768612 Telefax

Southern European Sales Office

+33 (0)1 69-28-22-00 Telephone

+33 (0)1 69-28-12-98 Telefax

Central European Sales Office

+49 (0)8161 140 123 Telephone

+49 (0)8161 140 124 Telefax

Junoand Zero-Power are trademarks of Semtech Corporation.

Semtech is a registered trademark of Semtech Corporation. All

other trademarks belong to their respective companies.

INTELLECTUAL PROPERTY DISCLAIMER

This specification is provided "as is" with no warranties whatsoever

including any warranty of merchantability, fitness for any particular

purpose, or any warranty otherwise arising out of any proposal,

specification or sample. A license is hereby granted to reproduce

and distribute this specification for internal use only. No other

license, expressed or implied to any other intellectual property

rights is granted or intended hereby. Authors of this specification

disclaim any liability, including liability for infringement of proprietary

rights, relating to the implementation of information in this

specification. Authors of this specification also do not warrant or

represent that such implementation(s) will not infringe such rights.

DOC8-007-004-DS-103

20

www.semtech.com


型号：	UR8HC007-004
厂家：	SEMTECH CORPORATION
描述：	Zero-PowerTM Input Device and Power Management IC 零PowerTM输入设备和电源管理IC
文件：	总20页 (文件大小：153K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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