SGM2054 [SGMICRO]

Sink and Source DDR Termination Regulator;
SGM2054
型号: SGM2054
厂家: Shengbang Microelectronics Co, Ltd    Shengbang Microelectronics Co, Ltd
描述:

Sink and Source DDR Termination Regulator

双倍数据速率
文件: 总14页 (文件大小:732K)
中文:  中文翻译
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SGM2054  
Sink and Source  
DDR Termination Regulator  
GENERAL DESCRIPTION  
FEATURES  
The SGM2054 device is a sink and source DDR (double  
data rate) termination regulator. It is specifically designed  
for low-cost and low-external component count systems.  
VLDOIN Voltage Range: 1.1V to 3.5V  
Low Input Voltages: 2.5V Rail and 3.3V Rail  
Minimum VO Effective Capacitance: 20μF  
Open-Drain Power-Good (PG) Output  
EN Logic Control  
Other features include logic-controlled shutdown mode,  
output current limit and thermal shutdown protection.  
The SGM2054 has an EN signal that can be used to  
discharge VO when EN is less than 0.3V.  
Buffered Reference: ±10mA  
Soft-Start Inrush Control  
Remote Sensing  
With fast transient response, remote sensing, and  
soft-start capabilities to reduce inrush current, the  
SGM2054 ensures the optimal system performance for  
powering the DDR2, DDR3, Low-Power DDR3, DDR3L,  
DDR4 and DDR5 VTT bus termination.  
Fast Load Transient Response  
Under-Voltage Lockout  
Output Current Limit  
Thermal Shutdown Protection  
-40to +125Operating Temperature Range  
Available in a Green TDFN-3×3-10L Package  
The SGM2054 is available in a Green TDFN-3×3-10L  
package. It operates over an operating temperature  
range of -40to +125.  
APPLICATIONS  
LCD TV  
STB  
Wireless Base Station  
Server, Notebook and Desktop PC  
Printer  
TYPICAL APPLICATION  
10  
1
VREFIN  
REFIN  
VIN  
VVIN  
CREFIN  
1nF  
R1  
100kΩ  
2
9
VVLDOIN  
VLDOIN  
PGOOD  
PGOOD  
CVLDOIN  
10μF × 2  
CIN  
4.7μF  
SGM2054  
ON  
OFF  
7
6
EN  
3
5
VVO  
VO  
VREFOUT  
CREFOUT  
1μF  
REFOUT  
VOSNS  
CVO  
10μF × 3  
PGND  
GND  
8
4
Figure 1. Typical Application Circuit  
SG Micro Corp  
JANUARY 2022 – REV.A  
www.sg-micro.com  
Sink and Source  
SGM2054  
DDR Termination Regulator  
PACKAGE/ORDERING INFORMATION  
SPECIFIED  
TEMPERATURE  
RANGE  
PACKAGE  
DESCRIPTION  
ORDERING  
NUMBER  
PACKAGE  
MARKING  
PACKING  
OPTION  
MODEL  
SGM  
2054D  
XXXXX  
SGM2054  
TDFN-3×3-10L  
SGM2054XTD10G/TR  
Tape and Reel, 4000  
-40to +125℃  
MARKING INFORMATION  
NOTE: XXXXX = Date Code, Trace Code and Vendor Code.  
X X X X X  
Vendor Code  
Trace Code  
Date Code - Year  
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If  
you have additional comments or questions, please contact your SGMICRO representative directly.  
OVERSTRESS CAUTION  
ABSOLUTE MAXIMUM RATINGS  
Stresses beyond those listed in Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to  
absolute maximum rating conditions for extended periods  
may affect reliability. Functional operation of the device at any  
conditions beyond those indicated in the Recommended  
Operating Conditions section is not implied.  
REFIN, VIN, VLDOIN, VOSNS to GND ............ -0.3V to 3.6V  
EN, PGOOD to GND ........................................ -0.3V to 3.6V  
PGND to GND .................................................. -0.3V to 0.3V  
REFOUT to GND............................-0.3V to (VREFOUT + 0.3V)  
VO to GND........................................ -0.3V to (VLDOIN + 0.3V)  
Package Thermal Resistance  
TDFN-3×3-10L, θJA .................................................... 56/W  
TDFN-3×3-10L, θJB .................................................... 26/W  
TDFN-3×3-10L, θJC(TOP) ............................................. 59/W  
TDFN-3×3-10L, θJC(BOT) ............................................. 10/W  
Junction Temperature.................................................+150℃  
Storage Temperature Range .......................-65to +150℃  
Lead Temperature (Soldering, 10s)............................+260℃  
ESD Susceptibility  
ESD SENSITIVITY CAUTION  
This integrated circuit can be damaged if ESD protections are  
not considered carefully. SGMICRO recommends that all  
integrated circuits be handled with appropriate precautions.  
Failure to observe proper handling and installation procedures  
can cause damage. ESD damage can range from subtle  
performance degradation tocomplete device failure. Precision  
integrated circuits may be more susceptible to damage  
because even small parametric changes could cause the  
device not to meet the published specifications.  
HBM.............................................................................7000V  
CDM ............................................................................1000V  
RECOMMENDED OPERATING CONDITIONS  
VIN to GND.....................................................2.375V to 3.5V  
VLDOIN to GND .................................................1.1V to 3.5V  
EN, PGOOD, VO, VOSNS to GND........................0V to 3.5V  
REFIN to GND....................................................0.5V to 1.8V  
REFOUT to GND...................................................0V to 1.8V  
PGND to GND ...................................................................0V  
VLDOIN Effective Capacitance, CLDOIN ................ 15μF (MIN)  
VIN Effective Capacitance, CIN .............................. 1μF (MIN)  
VO Effective Capacitance, CVO .......................20μF to 100μF  
REFOUT Effective Capacitance, CREFOUT ..........0.1μF to 1μF  
Operating Junction Temperature Range......-40to +125℃  
DISCLAIMER  
SG Micro Corp reserves the right to make any change in  
circuit design, or specifications without prior notice.  
SG Micro Corp  
www.sg-micro.com  
JANUARY 2022  
2
Sink and Source  
SGM2054  
DDR Termination Regulator  
PIN CONFIGURATION  
(TOP VIEW)  
REFIN  
1
2
3
4
5
10 VIN  
VLDOIN  
VO  
9
8
7
6
PGOOD  
GND  
GND  
PGND  
VOSNS  
EN  
REFOUT  
TDFN-3×3-10L  
PIN DESCRIPTION  
PIN  
1
NAME  
REFIN  
VLDOIN  
VO  
I/O  
I
FUNCTION  
Reference Input Pin.  
Regulator Supply Voltage Pin. It is recommended to use a ceramic capacitor with a  
minimum effective capacitance of 15μF from VLDOIN pin to ground.  
2
I
Regulator Output Pin. It is recommended to use output capacitor with effective capacitance  
3
O
G
I
in the range of 20μF to 100μF.  
4
PGND  
VOSNS  
REFOUT  
EN  
Regulator Power Ground.  
Voltage Sense Input Pin. Connect to the remote voltage sensing point of load powered by  
VO.  
5
Reference Output Pin. It is recommended to use output capacitor with effective capacitance  
6
O
I
in the range of 0.1μF to 1μF.  
7
Enable Pin. Drive EN high to turn on the regulator. Drive EN low to turn off the regulator.  
Signal Ground.  
8
GND  
G
O
I
Power-Good Indicator Output Pin. An open-drain output and active high when the output  
voltage reaches VTH(PG) of the target.  
9
PGOOD  
VIN  
Input Voltage Supply Pin. It is recommended to use a ceramic capacitor with a minimum  
effective capacitance of 1μF from VIN pin to ground.  
10  
Exposed  
Pad  
Exposed Pad. Connect it to GND internally. Connect it to a large ground plane to maximize  
thermal performance; this pad is not an electrical connection point.  
GND  
G
NOTE: I = Input, O = Output, G = Ground.  
SG Micro Corp  
www.sg-micro.com  
JANUARY 2022  
3
Sink and Source  
SGM2054  
DDR Termination Regulator  
ELECTRICAL CHARACTERISTICS  
(VVIN = 3.3V, VVLDOIN = 1.8V, VREFIN = 0.9V, VEN = VVIN, CVO = 3 × 10μF, TJ = -40to +125, typical values are at TJ = +25,  
unless otherwise noted.)  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX UNITS  
Supply Current  
Supply Current  
IVIN  
VEN = 3.3V, no load  
0.7  
50  
1
mA  
VEN = 0V, VREFIN = 0V, no load  
VEN = 0V, VREFIN > 0.4V, no load  
VEN = 3.3V, no load  
65  
240  
50  
10  
Shutdown Current  
ISHDN  
IVLDOIN  
μA  
165  
1
Supply Current of VLDOIN  
Shutdown Current of VLDOIN  
Input Current  
μA  
μA  
IVLDOIN(SHDN) VEN = 0V, no load  
0.1  
Input Current of REFIN  
VO Output  
IREFIN  
VEN = 3.3V  
0.5  
μA  
TJ = +25  
0.9  
0.75  
0.675  
0.6  
V
mV  
V
V
REFOUT = 0.9V (DDR2),  
IVO = 0A  
TJ = -40to +125℃  
TJ = +25℃  
-12  
-12  
-12  
-12  
12  
12  
12  
12  
VREFOUT = 0.75V (DDR3),  
IVO = 0A  
TJ = -40to +125℃  
TJ = +25℃  
mV  
V
VREFOUT = 0.675V (DDR3L),  
Output DC Voltage of VO  
VVO  
I
VO = 0A  
TJ = -40to +125℃  
TJ = +25℃  
mV  
V
VREFOUT = 0.6V (DDR4),  
IVO = 0A  
TJ = -40to +125℃  
TJ = +25℃  
mV  
V
0.55  
VREFOUT = 0.55V (DDR5),  
IVO = 0A  
TJ = -40to +125℃  
-12  
-12  
12  
12  
mV  
mV  
Output Voltage Tolerance to REFOUT  
VO Source Current Limit  
VOTOL  
-2A < IVO < 2A  
With reference to REFOUT, VOSNS = 90% × VREFOUT  
TJ = -40to +85℃  
,
IVOSRCL  
3
5.5  
A
With reference to REFOUT, VOSNS = 110% × VREFOUT  
TJ = -40to +85℃  
VREFIN = 0V, VVO = 0.3V, VEN = 0V  
,
VO Sink Current Limit  
IVOSNCL  
RDIS  
-5.7  
-3.5  
30  
A
Discharge Resistance of VO  
16  
Power-Good Comparator  
PGOOD window lower threshold with respect to  
REFOUT  
PGOOD window upper threshold with respect to  
REFOUT  
-24  
16  
-20  
-16  
26  
VO PGOOD Threshold  
VTH(PG)  
%
20  
5
PGOOD hysteresis  
Start-up rising edge, VOSNS within 15% of  
REFOUT  
PGOOD Start-Up Delay  
tPGSTUPDLY  
2
ms  
Output Low Voltage  
PGOOD Bad Delay  
VPGOODLOW ISINK = 4mA  
0.4  
1
V
tPBADDLY  
VOSNS is outside of the ±20% PGOOD window  
0.2  
μs  
VOSNS = VREFIN (PGOOD high impedance),  
VPGOOD = VIN + 0.2V  
Leakage Current  
IPGOODLKG  
μA  
SG Micro Corp  
www.sg-micro.com  
JANUARY 2022  
4
Sink and Source  
SGM2054  
DDR Termination Regulator  
ELECTRICAL CHARACTERISTICS (continued)  
(VVIN = 3.3V, VVLDOIN = 1.8V, VREFIN = 0.9V, VEN = VVIN, CVO = 3 × 10μF, TJ = -40to +125, typical values are at TJ = +25,  
unless otherwise noted.)  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX UNITS  
REFIN and REFOUT  
REFIN Voltage Range  
VREFIN  
0.5  
1.8  
V
mV  
mV  
V
REFIN Under Voltage Lockout  
VREFINUVLO REFIN rising  
350  
380  
20  
410  
REFIN Under Voltage Lockout Hysteresis VREFINUVHYS  
REFOUT Voltage  
VREFOUT  
REFIN  
VREFIN = 1.25V  
-12  
-12  
-12  
-12  
-12  
-12  
20  
12  
12  
12  
12  
12  
12  
VREFIN = 0.9V  
VREFIN = 0.75V  
VREFIN = 0.675V  
VREFIN = 0.6V  
VREFIN = 0.55V  
REFOUT Voltage Tolerance to VREFIN  
VREFOUTTOL -1mA < IREFOUT < 1mA  
mV  
REFOUT Source Current Limit  
REFOUT Sink Current Limit  
UVLO and EN Logic Threshold  
IREFOUTSRCL VREFOUT = 0V  
IREFOUTSNCL VREFOUT = VIN  
40  
40  
mA  
mA  
20  
Wake up  
VUVLO  
V
2.15  
1
2.25  
80  
2.35  
UVLO Threshold  
Hysteresis  
mV  
High-Level Input Voltage  
Low-Level Input Voltage  
Hysteresis Voltage  
VENIH  
VENIL  
Enable  
Enable  
Enable  
EN  
0.5  
1
V
VENYST  
IEN-LKG  
0.03  
27  
Logic Input Leakage Current  
-1  
μA  
μs  
COUT = 100μF, VVO(NOM) = 0.6V,  
EN turns on to VVO = 90% × VVO(NOM)  
Start-Up Time  
tSTR  
Thermal Shutdown  
Thermal Shutdown Temperature  
Thermal Shutdown Hysteresis  
TSHDN  
150  
20  
ΔTSHDN  
SG Micro Corp  
www.sg-micro.com  
JANUARY 2022  
5
Sink and Source  
SGM2054  
DDR Termination Regulator  
TYPICAL PERFORMANCE CHARACTERISTICS  
TJ = +25, VVLDOIN = 1.8V, VVOSNS = 0.9V, VEN = VVIN, CVO = 3 × 10μF, unless otherwise noted.  
VO Load Regulation  
VO Load Regulation  
903  
902  
901  
900  
899  
898  
897  
753  
752  
751  
750  
749  
748  
747  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
VREFIN = 0.9V,  
VVIN = 3.3V  
DDR2  
VREFIN = 0.75V,  
VVIN = 3.3V  
DDR3  
-3  
-2  
-1  
0
1
2
3
3
3
-3  
-2  
-1  
0
1
2
3
3
3
Output Current (A)  
VO Load Regulation  
Output Current (A)  
VO Load Regulation  
678  
677  
676  
675  
674  
673  
672  
603  
602  
601  
600  
599  
598  
597  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
VREFIN = 0.6V,  
VVIN = 3.3V  
DDR4  
VREFIN = 0.675V,  
VVIN = 3.3V  
DDR3L  
-3  
-2  
-1  
0
1
2
-3  
-2  
-1  
0
1
2
Output Current (A)  
VO Load Regulation  
Output Current (A)  
VO Load Regulation  
903  
902  
901  
900  
899  
898  
897  
753  
752  
751  
750  
749  
748  
747  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
VREFIN = 0.9V,  
VVIN = 2.5V  
DDR2  
VREFIN = 0.75V,  
VVIN = 2.5V  
DDR3  
-3  
-2  
-1  
0
1
2
-3  
-2  
-1  
0
1
2
Output Current (A)  
Output Current (A)  
SG Micro Corp  
www.sg-micro.com  
JANUARY 2022  
6
Sink and Source  
SGM2054  
DDR Termination Regulator  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
TJ = +25, VVLDOIN = 1.8V, VVOSNS = 0.9V, VEN = VVIN, CVO = 3 × 10μF, unless otherwise noted.  
VO Load Regulation  
VO Load Regulation  
678  
677  
676  
675  
674  
673  
672  
603  
602  
601  
600  
599  
598  
597  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
VREFIN = 0.675V,  
VVIN = 2.5V  
DDR3L  
VREFIN = 0.6V,  
VVIN = 2.5V  
DDR4  
-3  
-2  
-1  
0
1
2
3
-3  
-2  
-1  
0
1
2
3
Output Current (A)  
Output Current (A)  
REFOUT Load Regulation  
REFOUT Load Regulation  
905  
903  
901  
899  
897  
895  
755  
753  
751  
749  
747  
745  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
— TJ = -40℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
VREFIN = 0.9V,  
VVIN = 3.3V  
DDR2  
VREFIN = 0.75V,  
VVIN = 3.3V  
DDR3  
-10  
-5  
0
5
10  
-10  
-5  
0
5
10  
REFOUT Output Current (mA)  
REFOUT Load Regulation  
REFOUT Output Current (mA)  
REFOUT Load Regulation  
680  
678  
676  
674  
672  
670  
605  
603  
601  
599  
597  
595  
— TJ = -40℃  
— TJ = -40℃  
VREFIN = 0.675V,  
VVIN = 3.3V  
DDR3L  
VREFIN = 0.6V,  
VVIN = 3.3V  
DDR4  
— TJ = 0℃  
— TJ = 0℃  
— TJ = +25℃  
— TJ = +85℃  
— TJ = +25℃  
— TJ = +85℃  
-10  
-5  
0
5
10  
-10  
-5  
0
5
10  
REFOUT Output Current (mA)  
REFOUT Output Current (mA)  
SG Micro Corp  
www.sg-micro.com  
JANUARY 2022  
7
Sink and Source  
SGM2054  
DDR Termination Regulator  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
TJ = +25, VVLDOIN = 1.8V, VVOSNS = 0.9V, VEN = VVIN, CVO = 3 × 10μF, unless otherwise noted.  
Load Transient Response  
IVO  
VREFOUT  
VVO  
VVIN = 3.3V, IVO = -1.5A to 1.5A  
Time (1ms/div)  
SG Micro Corp  
www.sg-micro.com  
JANUARY 2022  
8
Sink and Source  
SGM2054  
DDR Termination Regulator  
FUNCTIONAL BLOCK DIAGRAM  
VLDOIN  
+
REFIN  
REFOUT  
-
UVLO1  
-
Discharge 1  
0.38V  
2.25V  
+
+
VO  
-
UVLO2  
-
Discharge 2  
+
VIN  
EN  
PGND  
+
VOSNS  
PGOOD  
1.2 × VREFOUT  
0.8 × VREFOUT  
-
Start-Up  
Delay  
GND  
+
-
SGM2054  
Figure 2. Block Diagram  
SG Micro Corp  
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JANUARY 2022  
9
Sink and Source  
SGM2054  
DDR Termination Regulator  
DETAILED DESCRIPTION  
and VO pins. For sinking, it discharges output capacitors  
from the REFOUT and VO pins to GND. When VO is  
outside of the power-good window, the clamping  
current is one-half of the full over-current limit (OCL).  
When VO is inside the power-good window, the  
clamping current will switch to the full OCL.  
Sink and Source Regulator (VO Pin is the  
Output)  
The SGM2054 is an ultra-low dropout voltage, sink and  
source linear regulator which is specifically designed as  
the termination voltage of DDR memory. It can provide  
up to 3A output current capability.  
The SGM2054 has a built-in high-side N-MOSFET for  
current sourcing and a low-side N-MOSFET for current  
sinking. To support the fast load transient response of  
DDR memory, the feedback loop of the SGM2054 is  
very fast, it can get fast load transient response using  
small ceramic capacitors and save cost. The VOSNS  
remote sensing pin is used to compensate the dropout  
voltage generated by the PCB trace resistance and it  
should be connected to the remote node of load which  
is powered by VO.  
Enable Control  
The SGM2054 uses the EN pin to enable/disable the  
device. When the EN pin voltage is lower than 0.5V, the  
device is in shutdown state. In this state, the internal  
discharge transistor is active to pull the output voltage to  
ground through a 16Ω (TYP) resistor.  
When the EN pin voltage is higher than 1V, the device  
is in active state, the input voltage is regulated to the  
output voltage and the internal discharge transistor is  
turned off.  
Reference Input (REFIN Pin)  
Power-Good  
The input voltage range of the REFIN pin is from 0.5V  
to 1.8V and it is used to generate the reference voltage  
(VREFOUT) of DDR memory. It is set by an external  
equivalent ratio voltage divider connected to the  
memory power supply bus (VDDQ). In application,  
The PGOOD pin is an open-drain that asserts high with  
2ms (TYP) delay time after the VO enters power-good  
window which is VVO within +20% of VREFOUT. When the  
VO is outside the PGOOD window, PGOOD de-asserts  
within 0.2μs (TYP). 100kΩ (TYP) pull-up resistor is  
recommended, which should be connected to a stable  
and right power supply to interface with digital  
controller.  
VREFOUT, VTT and VDDQ must meet the equation:  
VREFOUT = VTT = VDDQ / 2  
REFOUT and VO must track the reference input at the  
REFIN pin.  
Output Current Limit  
When overload events happen, the output current is  
internally limited.  
Reference Output (REFOUT Pin)  
REFOUT is independent of the EN pin state. The output  
voltage is tightly regulated to track the reference voltage  
applied at the REFIN pin. When REFIN voltage rises to  
380mV and VVIN is above the UVLO threshold,  
REFOUT will become active. When VREFOUT is lower  
than 360mV, REFOUT is disabled, and it will be  
discharged to GND by an internal 130(TYP) MOSFET.  
Under-Voltage Lockout (UVLO)  
The UVLO circuit monitors the input voltage to prevent  
the device from turning on before VVIN rises above the  
VUVLO threshold. The UVLO circuit responds quickly to  
glitches on the VIN pin and attempts to disable the  
output of the device if any of these rails collapses. The  
local input capacitance prevents severe brownouts in  
most applications.  
REFOUT can source and sink 10mA to/from load. It is  
used as DDR termination voltage (VTT) of DDR memory.  
Soft-Start  
Thermal Shutdown  
The VO pin has soft-start function using current clamp  
method. It limits inrush current when charging the  
output capacitors. The soft-start function and over-  
current protection are completely symmetrical for  
sourcing and sinking current. For sourcing, it charges  
output capacitors from the VLDOIN pin to the REFOUT  
The SGM2054 can detect the temperature of die. When  
the die temperature exceeds the threshold value of  
thermal shutdown, the SGM2054 will be in shutdown  
state and remain in this state until the die temperature  
decreases to +130.  
SG Micro Corp  
www.sg-micro.com  
JANUARY 2022  
10  
Sink and Source  
SGM2054  
DDR Termination Regulator  
REVISION HISTORY  
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.  
Changes from Original (JANUARY 2022) to REV.A  
Page  
Changed from product preview to production data .................................................................................................................................................All  
SG Micro Corp  
www.sg-micro.com  
JANUARY 2022  
11  
PACKAGE INFORMATION  
PACKAGE OUTLINE DIMENSIONS  
TDFN-3×3-10L  
D
e
N10  
D1  
k
E
E1  
N5  
N1  
b
L
BOTTOM VIEW  
TOP VIEW  
2.4  
1.7 2.8  
A
A1  
A2  
0.6  
SIDE VIEW  
0.24  
0.5  
RECOMMENDED LAND PATTERN (Unit: mm)  
Dimensions  
In Millimeters  
Dimensions  
In Inches  
Symbol  
MIN  
MAX  
0.800  
0.050  
MIN  
0.028  
0.000  
MAX  
0.031  
0.002  
A
A1  
A2  
D
0.700  
0.000  
0.203 REF  
0.008 REF  
2.900  
2.300  
2.900  
1.500  
3.100  
2.600  
3.100  
1.800  
0.114  
0.091  
0.114  
0.059  
0.122  
0.103  
0.122  
0.071  
D1  
E
E1  
k
0.200 MIN  
0.500 TYP  
0.008 MIN  
0.020 TYP  
b
0.180  
0.300  
0.300  
0.500  
0.007  
0.012  
0.012  
0.020  
e
L
NOTE: This drawing is subject to change without notice.  
SG Micro Corp  
TX00060.000  
www.sg-micro.com  
PACKAGE INFORMATION  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
P2  
P0  
W
Q2  
Q4  
Q2  
Q4  
Q2  
Q4  
Q1  
Q3  
Q1  
Q3  
Q1  
Q3  
B0  
Reel Diameter  
P1  
A0  
K0  
Reel Width (W1)  
DIRECTION OF FEED  
NOTE: The picture is only for reference. Please make the object as the standard.  
KEY PARAMETER LIST OF TAPE AND REEL  
Reel Width  
Reel  
Diameter  
A0  
B0  
K0  
P0  
P1  
P2  
W
Pin1  
Package Type  
W1  
(mm)  
(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant  
TDFN-3×3-10L  
13″  
12.4  
3.35  
3.35  
1.13  
4.0  
8.0  
2.0  
12.0  
Q2  
SG Micro Corp  
TX10000.000  
www.sg-micro.com  
PACKAGE INFORMATION  
CARTON BOX DIMENSIONS  
NOTE: The picture is only for reference. Please make the object as the standard.  
KEY PARAMETER LIST OF CARTON BOX  
Length  
(mm)  
Width  
(mm)  
Height  
(mm)  
Reel Type  
Pizza/Carton  
13″  
386  
280  
370  
5
SG Micro Corp  
www.sg-micro.com  
TX20000.000  

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