SGM41562B_技术文档

SGM41562A/SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

GENERAL DESCRIPTION

FEATURES

The SGM41562A and SGM41562B are highly integrated, I²C

programmable, single-cell Li-Ion or Li-polymer battery chargers

with system power path management. They are specifically

designed for portable applications requiring minimum board

space and small external components. The charging profile

includes pre-charge, constant-current and constant-voltage

phases. Several safety and protection features are included

such as built-in safe charge timer to set maximum duration of

charge and pre-charge, input voltage and current monitoring,

internal (junction) and external (battery) temperature monitoring,

input current limiting and load current limiting. SGM41562A

can charge with a wide input voltage range of up to 18V

compared to the SGM41562B which has 5.75V charging

range, but the rest of their functions are the same.

● Fully Autonomous Charger for Single-Cell Li-Ion and

Li-Polymer Battery

● ±0.6% Charging Voltage Accuracy

● 21V Maximum Input Voltage Rating with Over-Voltage

Protection

● 18V Maximum Operating Voltage (SGM41562A)

● 5.75V Maximum Operating Voltage (SGM41562B)

● I²C Interface for Parameters Setting/Status Reporting

● Fully Integrated Power Switches

● No External Blocking Diode Required

● Built-in Robust Charge Protections Including Battery

Temperature Monitor and Programmable Timer

● Battery or PCB Over-Temperature Protection

● Built-in Battery Disconnection Function

● System Reset Function

The SGM41562A/B has 3 power ports: input power port (IN),

battery port (BAT) and system or load port (SYS). The system

is powered from the input whenever it is available. Input is

typically a USB power source. If the input source is weak or

removed, power source for the system will automatically switch

to the battery. The voltage and currents from input and

battery as power sources are continuously monitored to

prevent battery damage due to excessive currents or

over-discharge.

● Thermal Limit Regulation on Chip

● Available in a Green WLCSP-1.52×1.52-9B Package

APPLICATIONS

I²C serial interface is used to program the device functions

and parameters or to read its status. 12 read/write or read only

8-bit registers (REG00 to REG0B) are accessible. A watchdog

protection feature is also included. If this feature is enabled

and there is no in time read/write activity or signal from the

host, the device will reset the charging parameters to their

defaults and recycles power to the system (turn off/on) that

may reset the host.

Wearable Devices

IoT Gadgets

TYPICAL APPLICATION

System Load

IN

SYS

USB

Port

4.7μF

10μF

The SGM41562A is capable of charging with input voltages

as high as 18V but with higher input voltages, the chip

temperature can easily rise up and thermal protection may

stop charging if proper cooling is not considered. The

SGM41562B goes into voltage protection state if V_IN> 6V.

The input changes are continuously monitored and a system

power recycle (SYS) may occur if the system does not

response to the input toggles.

Qbypass

Qrvs

VDD

1μF

SGM41562B

nINT

SDA

SCL

Li-Ion

Battery

Pack

BAT

NTC

4.7μF

Host

GND

VDD

The SGM41562A/B is available in a Green WLCSP-1.52×1.52-9B

package. Device functionality and protection features are

assured in the ambient temperature range from -40℃ to

+125℃. Charging parameters are guaranteed in 0℃ to +55℃.

Figure 1. Typical Application Circuit

SG Micro Corp

JANUARY 2022 - REV. A. 1

www.sg-micro.com

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

PACKAGE/ORDERING INFORMATION

SPECIFIED

TEMPERATURE

RANGE

PACKAGE

DESCRIPTION

ORDERING

NUMBER

PACKAGE

MARKING

PACKING

OPTION

MODEL

XXXXX

RD0

SGM41562A

SGM41562B

WLCSP-1.52×1.52-9B

SGM41562AXG/TR

SGM41562BXG/TR

Tape and Reel, 3000

-40℃ to +125℃

XXXXX

RD1

MARKING INFORMATION

NOTE: XXXXX = Date Code, Trace Code and Vendor Code.

Date Code - Year

Trace Code

Vendor Code

X X X X X

Y Y Y

Serial Number

Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If

you have additional comments or questions, please contact your SGMICRO representative directly.

OVERSTRESS CAUTION

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed in Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to

absolute maximum rating conditions for extended periods

may affect reliability. Functional operation of the device at any

conditions beyond those indicated in the Recommended

Operating Conditions section is not implied.

IN....................................................................... -0.3V to 21V

SYS ........................................-0.3V to 5.3V (5.5V for 500μs)

All Other Pins to GND.......................................... -0.3V to 6V

I

_INCLAMP............................................................................5mA

Package Thermal Resistance

WLCSP-1.52×1.52-9B, θ_JA........................................ 95℃/W

Junction Temperature.................................................+150℃

Storage Temperature Range.......................-65℃ to +150℃

Lead Temperature (Soldering, 10s)............................+260℃

ESD Susceptibility

ESD SENSITIVITY CAUTION

This integrated circuit can be damaged if ESD protections are

not considered carefully. SGMICRO recommends that all

integrated circuits be handled with appropriate precautions.

Failureto observe proper handlingand installation procedures

can cause damage. ESD damage can range from subtle

performance degradation tocomplete device failure. Precision

integrated circuits may be more susceptible to damage

because even small parametric changes could cause the

device not to meet the published specifications.

HBM.............................................................................3000V

CDM ............................................................................1000V

RECOMMENDED OPERATING CONDITIONS

Supply Voltage, V_IN... 4.35V to 18V (SGM41562A, Charging)

................................. 4.35V to 5.5V (SGM41562B, Charging)

(Over-Voltage Protection State, Continuous) ...............19V

I_IN...................................................................... Up to 500mA

I_BAT........................................................................ Up to 3.2A

DISCLAIMER

SG Micro Corp reserves the right to make any change in

I

_CHG................................................................... Up to 456mA

circuit design, or specifications without prior notice.

V_{BAT_REG}............................................................ Up to 4.545V

Operating Junction Temperature Range.......-40℃ to +125℃

SG Micro Corp

www.sg-micro.com

JANUARY2022

2

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

PIN CONFIGURATION

(TOP VIEW)

1

2

3

A

B

C

IN

SYS

BAT

NTC

SDA

nINT

SCL

VDD

GND

WLCSP-1.52×1.52-9B

PIN DESCRIPTION

A1

A2

A3

NAME

TYPE ⁽¹⁾

FUNCTION

Input Power Pin. Place a minimum 2.2μF ceramic capacitor between IN pin and GND pin as close as

IN

P

possible to these pins.

System Power Supply Output. Place a ceramic capacitor between SYS pin and GND pin as close as

possible to these pins.

SYS

BAT

Battery Positive Terminal Connection Pin. Place a ceramic capacitor between BAT pin and GND pin

as close as possible to the device. Connect the negative battery terminal to power GND.

Battery Temperature Sense Input. Connect a negative temperature coefficient thermistor between this

pin and GND pin. NTC is usually placed in touch with battery pack. Hot-cold temperature window can be

programmed by a resistor divider network placed between VDD to NTC to GND pins. Charging will

suspend if NTC function is enabled and NTC pin voltage goes out of the V_HOTand V_COLDrange.

B1

NTC

AIO

Interrupt Output Pin. The nINT pin can send a charging status and fault interrupt signal to the host.

nINT is also used to disconnect the system from the battery. Pull nINT pin from high to low for >

t_{RST_DGL}(16s default). The battery FET turns off and turns on again automatically after > t_{RST_DUR}(4s

default) regardless of the nINT state. Both t_{RST_DGL}and t_{RST_DUR}can be programmed via the I²C

interface.

B2

B3

nINT

VDD

DIO

P

Internal Power Supply Pin. Connect a minimum 0.1μF decoupling ceramic capacitor from this pin to

GND. External load current on this pin should not exceed 1mA.

C1

C2

C3

SDA

SCL

GND

DIO

DI

I²C Bus Data. A 10kΩ pull-up to the logic-high rail should be used on SDA line.

I²C Bus Clock. A 10kΩ pull-up to the logic-high rail should be used on SCL line.

Ground Pin of the Device.

—

NOTE:

1. AIO = Analog Input and Output, DI = Digital Input, DO = Digital Output, DIO = Digital Input and Output, P = Power.

SG Micro Corp

www.sg-micro.com

JANUARY2022

3

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

ELECTRICAL CHARACTERISTICS

(T_A= +25℃, V_IN= 5V and V_BAT= 3.5V, unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Input Source and Battery Protection

Input Under-Voltage Lockout Threshold

V_{IN_UVLO}Threshold Hysteresis

V_{IN_UVLO}

Input falling

3.44

3.65

105

19

3.88

V

V_{IN_UVLO_HYS}Input rising

mV

SGM41562A input rising threshold

SGM41562B input rising threshold

18

21

Input Over-Voltage Protection Threshold

V_{IN_OVLO}

V

5.75

6

6.27

V_{IN_OVLO}Threshold Hysteresis

Input Clamp Voltage

V_{IN_OVLO_HYS}

300

21

mV

V

V_{IN_CLAMP}Test for having 1.5mA clamp current

19.5

Input vs. Battery Voltage Headroom

Threshold

V_HDRM

Input rising vs. battery

100

150

mV

Input vs. battery voltage headroom

threshold hysteresis

V_HDRMThreshold Hysteresis

BAT Pin Input Voltage

V_{HDRM_HYS}

V_BAT

mV

V

4.5

85

Wait time before sending interrupt pulse for

reporting input power new status

Input Power Detection Time

nINT Output Pulse Duration

t_PWD

55

70

ms

μs

t_{INT_PULSE}

250

2.40

2.76

3.00

V

_BATfalling, VBAT_UVLO[2:0] = 000

2.30

2.69

2.95

2.66

2.86

3.14

Battery Under-Voltage Lockout Threshold

V_{BAT_UVLO}V_BATfalling, VBAT_UVLO[2:0] = 100

V_BATfalling, VBAT_UVLO[2:0] = 111

V

Battery Under-Voltage

Threshold Hysteresis

V_{BAT_UVLO_HYS}V_{BAT_UVLO}= 2.76V

210

100

mV

Battery Over-Voltage Protection Threshold

V_{BAT_OVP}

Rising, higher than V_{BAT_REG}

Power Path Management

V

_IN= 5.5V, R_SYS= 100Ω, I_CHG= 0A,

4.15

4.59

4.20

4.65

4.25

4.71

VSYS_REG[3:0] = 0000, V_{SYS_REG}= 4.2V

Regulated System Output

Voltage Accuracy

V_{SYS_REG_ACC}

V

mA

V

V_IN= 5.5V, R_SYS= 100Ω, I_CHG= 0A,

VSYS_REG[3:0] = 1001, V_{SYS_REG}= 4.65V

Input Current Limit

I_{IN_LIM}

IIN_LIM[3:0] = 1111, I_{IN_LIM}= 500mA

VIN_MIN[3:0] = 0000, V_{IN_MIN}= 3.88V

VIN_MIN[3:0] = 1001, V_{IN_MIN}= 4.60V

VIN_MIN[3:0] = 1111, V_{IN_MIN}= 5.08V

V_IN= 4.5V, I_SYS= 100mA

320

3.58

4.27

4.85

500

3.88

4.60

5.08

235

620

4.20

4.96

5.35

Input Minimum Voltage Regulation

IN to SYS Switch On-Resistance

Input Quiescent Current

V_{IN_MIN}

R_{ON_Q1}

I_{IN_Q}

mΩ

µA

V

_IN= 5.5V, EN_HIZ = 0, CEB = 0,

80

100

charge enable, I_CHG= 0A, I_SYS= 0A

V_IN= 5.5V, EN_HIZ = 0, CEB = 1,

charge disabled

V_IN= 5.5V, EN_HIZ = 1, CEB = 0,

charge enable

Input Suspend Current

I_{IN_SUSP}

µA

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JANUARY2022

4

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

ELECTRICAL CHARACTERISTICS (continued)

(T_A= +25℃, V_IN= 5V and V_BAT= 3.5V, unless otherwise noted.)

PARAMETER

Battery Quiescent Current

Battery FET On-Resistance

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

V_IN= 5V, CEB = 0, I_SYS= 0A, V_BAT= 4.3V,

charge complete

18

V_IN= GND, CEB = 1, VDD_GATE = 1,

FET_DIS = 0, EN_SHIP_DGL[1:0] ≠ 11,

_SYS= 0A, V_BAT= 4.35V,

disable external NTC circuit driving

10

12

70

I

V_IN= GND, CEB = 1, I_SYS= 0A,

_BAT= 4.35V, enable PCB OTP function,

excluding the external NTC bias

I_{BAT_Q}

µA

V

V_IN= GND, CEB = 1, I_SYS= 0A,

_BAT= 4.35V, enable PCB OTP function and

watchdog, excluding the NTC bias

V

28

V_BAT= 4.5V, IN is open or grounded,

shipping mode

0.7

1.2

R_{ON_Q2}V_IN< 2V, V_BAT= 3.5V, I_SYS= 100mA

100

400

mΩ

IDSCHG[3:0] = 0001, I_DSCHG= 400mA

I_DSCHG

Battery FET Discharge Current Limit

(Refer to Histogram)

mA

IDSCHG[3:0] = 1001, I_DSCHG= 2000mA

2000

Delay after discharge OC detection and

t_{DSCHG_CUT}

Delay before Discharge Over-Current Cut

Delay before Retry after Cut

64

μs

before turning switch off

t_RETRY

V_FWD

Turn on retry delay after OC turn off

50mA discharge current

800

5

μs

Ideal Diode Forward Voltage in Supplement

Mode (BAT to SYS)

mV

Shipping Mode

Enter to Shipping Mode Deglitch Delay

Time after Programming the Shipping Mode

FET_DIS is set from 0 to 1,

EN_SHIP_DGL[1:0] = 00

t_{SMEN_DGL}

1

2

s

Exit Shipping Mode Delay

(Initiated by nINT pin or V_INPlug-in)

t_{SMEX_DGL}nINT pin is pulled low

Auto-Reset Mode

tRST_DGL[1:0] = 00

t_{RST_DGL}

8

16

2

Reset and Power Recycle

by nINT Pin is Pull Down

s

tRST_DGL[1:0] = 10

tRST_DUR = 0

t_{RST_DUR}

Battery FET Off-Time Duration after Reset

tRST_DUR = 1

4

Battery Charger

VBAT_REG[5:0] = 101000, V_{BAT_REG}= 4.2V

4.175

4.354

4.518

5.5

4.200

4.380

4.545

8

4.225

4.406

4.572

9.8

Battery Charge Regulation Voltage

V_{BAT_REG}VBAT_REG[5:0] = 110100, V_{BAT_REG}= 4.38V

VBAT_REG[5:0] = 111111, V_{BAT_REG}= 4.545V

ICC[5:0] = 000000, I_CC= 8mA

V

ICC[5:0] = 001100, I_CC= 96mA

I_CC

80

96

110

Charge Current

mA

ICC[5:0] = 100000, I_CC= 264mA

235

375

60

264

456

305

ICC[5:0] = 111000, I_CC= 456mA

530

I²C programmable range

T_{J_REG}

120

Junction Temperature Regulation

Pre-Charge Current

℃

120

11

TJ_REG[1:0] = 11, T_{J_REG}= 120℃

ITERM[3:0] = 0101, I_TERM= I_PRE= 11mA

I_PRE

mA

ITERM[3:0] = 1111, I_TERM= I_PRE= 31mA

31

SG Micro Corp

www.sg-micro.com

JANUARY2022

5

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

ELECTRICAL CHARACTERISTICS (continued)

(T_A= +25℃, V_IN= 5V and V_BAT= 3.5V, unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

MIN

0.7

1.8

6.4

TYP

1

MAX

1.2

4

UNITS

ITERM[3:0] = 0000, I_TERM= 1mA

ITERM[3:0] = 0001, I_TERM= 3mA

ITERM[3:0] = 0101, I_TERM= 11mA

Charge Termination Current Threshold

I_TERM

3

mA

11

15

Termination Deglitch Time

t_{TERM_DGL}

V_{BAT_PRE}

200

ms

V

V_BATRising, VBAT_PRE = 1,

Pre-Charge to Fast Charge Threshold

2.9

3

3.1

V

_{BAT_PRE}= 3V

Pre-Charge to Fast Charge Threshold

Hysteresis

V_{BAT_PRE_HYS}

90

mV

Below V_{BAT_REG}, VRECH = 0

Below V_{BAT_REG}, VRECH = 1

110

210

135

240

200

155

275

Battery Auto-Recharge Voltage Drop Threshold

V_RECH

mV

ms

Battery Auto-Recharge Deglitch Time

Thermal Protection

t_{RECH_DGL}

Thermal Shutdown Threshold

T_{J_SHDN}

150

20

℃

Thermal Shutdown Hysteresis

NTC Pin Output Current

I_NTC

CEB = 0, NTC = 3V

As percentage of V_DD

-200

63

200

67

nA

%

NTC Cold Temp Rising Threshold

NTC Cold Temp Rising Threshold Hysteresis

NTC Hot Temp Falling Threshold

NTC Hot Temp Falling Threshold Hysteresis

NTC Hot Temp Falling Threshold for PCB OTP

V_COLD

65

30

33

70

32

mV

%

V_HOT

As percentage of V_DD

31

30

35

34

mV

%

V_{HOT_PCB}As percentage of V_DD

NTC Hot Temp Falling Threshold

Hysteresis for PCB OTP

90

mV

Logic IO Pin Characteristics

Low Logic Voltage Threshold

High Logic Voltage Threshold

I²C Interface (SDA, SCL)

V_L

0.4

V

V_H

1.4

Input Low Logic Voltage Threshold

Input High Logic Voltage Threshold

Output Low Threshold Level

I²C Clock Frequency

V_IL

V_IH

V

V_OL

f_SCL

I_SINK= 5mA

0.2

V

400

kHz

Clock Frequency and Watchdog Timer

Watchdog Timer

t_WDT

WATCHDOG[1:0] = 11

160

s

SG Micro Corp

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JANUARY2022

6

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= +25℃, V_IN= 5V, I_IN= 500mA, I_CC= 128mA and V_{IN_MIN}= 4.6V, unless otherwise noted.

Battery Charge Curve

Auto-Recharge

V_IN

V_SYS

V_IN

V_SYS

V_BAT

I_BAT

Time (4s/div)

Time (500ms/div)

CC Charge Steady State

SYS Load Transient

V_IN

V_SYS

V_BAT

V_IN

V_SYS

I_BAT

I_SYS

Time (2ms/div)

Time (500ms/div)

Input Current Limit-Based PPM

Input Voltage Regulation-Based PPM

V_IN

V_SYS

I_BAT

I_IN

I_SYS

Time (4s/div)

Time (2s/div)

SG Micro Corp

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JANUARY2022

7

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

T_A= +25℃, V_IN= 5V, I_IN= 500mA, I_CC= 128mA and V_{IN_MIN}= 4.6V, unless otherwise noted.

Power-On

Power-Off

V_IN

V_SYS

V_BAT

V_IN

I_BAT

Time (4ms/div)

Charge Enable

Time (200μs/div)

Charge Disable

V_IN

V_SYS

V_BAT

I_BAT

Time (400μs/div)

BATT Insertion

BATT Removal

V_IN

V_SYS

V_BAT

V_IN

V_SYS

V_BAT

I_BAT

Time (500ms/div)

SG Micro Corp

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JANUARY2022

8

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

T_A= +25℃, V_IN= 5V, I_IN= 500mA, I_CC= 128mA and V_{IN_MIN}= 4.6V, unless otherwise noted.

NTC Rising

NTC Falling

V_SYS

V_BAT

V_NTC

V_SYS

V_BAT

V_NTC

I_BAT

Time (10ms/div)

PCB_OTP at Charge Mode

PCB_OTP at Discharge Mode

V_NTC

V_SYS

V_BAT

V_SYS

I_BAT

Time (2s/div)

V_INOVP Operation

System Reset Function Operation Profile

t_{RST_DGL}= 8s, t_{RST_DUR}= 2s

V_SYS

V_IN

V_INT

V_BAT

V_SYS

I_BAT

Time (2s/div)

SG Micro Corp

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JANUARY2022

9

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

T_A= +25℃, V_IN= 5V, I_IN= 500mA, I_CC= 128mA and V_{IN_MIN}= 4.6V, unless otherwise noted.

Battery Charge Regulation Voltage vs. Temperature

System Regulation Voltage vs. Temperature

4.5

4.4

4.3

4.2

4.1

4.0

3.9

5.0

4.9

4.8

4.7

4.6

4.5

4.4

V_{BAT_REG}= 4.2V

V_{SYS_REG}= 4.65V

-40 -25 -10

5

20 35 50 65 80 95 110

-40 -25 -10

5

20 35 50 65 80 95 110

Temperature (℃)

Battery Current under Shipping Mode vs. Temperature

3.0

Pre-Charge Current vs. Temperature

4.0

3.5

3.0

2.5

2.0

1.5

1.0

2.5

2.0

1.5

1.0

0.5

0.0

I_PRE= 3mA

-40 -25 -10

5

20 35 50 65 80 95 110

-40 -25 -10

5

20 35 50 65 80 95 110

Temperature (℃)

Fast Charge Current vs. Temperature

Charge Termination Current vs. Temperature

160

150

140

130

120

110

100

4.0

3.5

3.0

2.5

2.0

1.5

1.0

I_CC= 128mA

I_TERM= 3mA

-40 -25 -10

5

20 35 50 65 80 95 110

-40 -25 -10

5

20 35 50 65 80 95 110

Temperature (℃)

SG Micro Corp

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10

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

T_A= +25℃, V_IN= 5V, I_IN= 500mA, I_CC= 128mA and V_{IN_MIN}= 4.6V, unless otherwise noted.

Battery OVP Voltage vs. Temperature

Input Current Limit vs. Temperature

4.6

4.5

4.4

4.3

4.2

4.1

4.0

800

700

600

500

400

300

200

V_{BAT_REG}= 4.2V

20 35 50 65 80 95 110

Temperature (℃)

Input Minimum Voltage vs. Temperature

I_{IN_LIM}= 500mA

-40 -25 -10

5

-40 -25 -10

5

20 35 50 65 80 95 110

Temperature (℃)

Production Distribution

4.80

4.75

4.70

4.65

4.60

4.55

4.50

20

16

12

8

5000 Samples

1 Production Lot

4

V_{IN_MIN}= 4.6V

0

-40 -25 -10

5

20 35 50 65 80 95 110

400mA Discharge Current (mA)

Temperature (℃)

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SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

FUNCTIONAL BLOCK DIAGRAM

IN

SYS

Qbypass

Qrvs

LDO Regulator

gm_

I_LIM

Qswitch

I_{IN_ILIM_REF}

Body

Switch

Loop Control

VDD

gm_

V_DPM

V_{IN_DPM}

BAT

I_BATTERY

VSYS

gm_

sys

gm_

I_CHRG

V_SYSREG

I_{CHRG_REF}

BAT-20mV

VSYS

BAT

gm_

V_TERM

gm_

fwd

V_{TERM_REF}

nINT

GND

I_{TERM_REF}

I_BATTERY

EOC

Interrupt

Control

V_TERM- V_RECHG

RECHG

V_BAT

SDA

SCL

I²C

Interface

PRECOND

V_BAT

Register

Charger

Control

V_{PRECON_REF}

V_VIN

6V

OVP

Thermistor

Monitor

NTC

V_BAT+ 150mV

V_VIN

SLEEP

nUVLO

3.65V

V_VIN

Figure 2. Functional Block Diagram

SG Micro Corp

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JANUARY2022

12

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

DETAILED DESCRIPTION

Introduction

The chip has a watchdog timer as a protective feature against

The SGM41562A/B is a single-cell battery charger with power

path management function for Li-Ion and Li-polymer batteries.

The charge features include pre-charge, fast charge including

constant-current mode (CCM) and constant-voltage mode

(CVM), end-of-charge termination, auto-recharge, and a

built-in safe charge timer. The safe charge timer is used to

prevent over-charging or other issues if the host runs out of

control.

unexpected host malfunctions. When watchdog timer is

enabled, it must be reset by host regularly to prevent

watchdog timer overflow that results in a chip reset and power

recycle. Watchdog reset is by writing into the watchdog

register through I²C interface (I/F). If the watchdog is not reset

on time, the power to the host will recycle.

The power fed to the SYS pin is recycled when watchdog

times out, the host does not response to IN power input

(when watchdog is forced on) or COLD_RESET bit is set to 1,

to clear the running environment before system program

upgrade or release from locked situations.

A bypass switch between IN and SYS pins, and a battery

switch between SYS and BAT pins are integrated to provide

complete power path management (PPM). The switches have

low on-resistances to minimize loss and heat. System load is

primarily powered from the input when it is available, and the

remaining input power is used to charge the battery if needed.

When the input source is weak, the load is powered partially

from the battery. This mode in which the battery provides the

power deficit is called supplement mode. Battery will provide

the full load power if input is removed or if V_INis out of range.

For battery charging, the power to the battery is regulated by

the battery switch. To prevent faulty charge conditions, input

voltage, input current, system voltage, chip temperature and

external temperature (sensed by NTC) are continuously

monitored during charge.

Input Detection

Figure 4 shows how the input voltage status is detected and

affects the device function along with the relevant timings and

nINT output signal updates. The device continuously monitors

the input voltage at the IN node. The SYS node and charge

circuit is only started and connected to the input when for a

duration of t_INI, V_INis within its normal range (above V_{IN_UVLO}

and below V_{IN_OVLO}). Qbypass and Qrvs switches will turn off

as soon as an input UVLO or OVLO is detected.

As shown in Figure 4 any input state is considered stable if it

continuously stays in the same condition for a duration of t_PWD

after which the device sends out a negative pulse to the nINT

pin with a pulse width of t_{INT_PULSE}to inform the host about the

input state change.

Figure 3 shows the power paths and key internal blocks of the

device. The Qbypass switch regulates the voltage of the

system and the internal charge circuit. The Qrvs switch acts

as a near ideal blocking diode to prevent reverse power (or

leakage) from the load (SYS pin) back to the input (IN pin).

The Qswitch switch is responsible for battery charging

regulation and connecting or disconnecting of the battery

(BAT pin) to the system (SYS pin). The charge and discharge

circuits in the Figure 3 that are connected to the IN and BAT

pins have their own independent UVLO and power supply.

The rest of the chip is powered by either IN or SYS pin,

whichever has the higher voltage. The I/F interface (I²C

communication and nINT) block is active whenever any of the

power sources (IN or BAT pin) are available.

The watchdog timer WATCHDOG[1:0] register is set to 01

once the valid input is detected and when an INT pulse is

asserted, which resumes its original setting when any writing

to this device occurs. If the host does not clear the watchdog,

power to the host is recycled for reset when watchdog runs

time out.

t_PWD

t_INI

V_{IN_OVLO}

V_{IN_OVLO_HYS}

t_INI

V_{IN_UVLO}

V_{IN_UVLO_HYS}

V_IN

V_SYS

Qbypass Qrvs

SYS

IN

I_IN

t_{INT_PULSE}

Power Input

System Load

nINT

UVLO

Charge

Circuit

Qswitch

Figure 4. Input Power Detection and nINT Signaling Timings

BAT

UVLO

Discharge

Circuit

I/F

Interface

Figure 3. Power Path Management Structure

SG Micro Corp

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JANUARY2022

13

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

DETAILED DESCRIPTION (continued)

Power Path Management

When the input voltage is normal and have enough headroom

Pre-Charge: If the battery voltage is less than the pre-charge

threshold (V_{BAT_PRE}), the battery is charged with the small

pre-charge current (I_PRE). The pre-charge current value is the

same as the termination current (I_TERM) that is programmed

via bit D[3:0] of the REG03, also called ITERM[3:0].

for powering the system (V_IN> V_{IN_UVLO}and V_IN- V_SYS

>

V

_HDRM), the input power path will conduct and the device

starts to power the system from input by setting the system

voltage to V_{SYS_REG}. V_{SYS_REG}is selected by programming

VSYS_REG[3:0] register, the lower 4 bits of REG07 (also

called system voltage register or VSYS_REG[3:0] register).

However, the actual system voltage (V_SYS) can be affected by

the input voltage level, input current limit and battery voltage.

Constant-Current Charge: When battery voltage is higher

than V_{BAT_PRE}, and less than V_{BAT_REG}, it will be charged with a

constant current. The constant-current value is determined by

bit D[5:0] of the REG02 that is called ICC[5:0] and a single

scaling bit that if set, multiplies it by ¼. This bit is used for

finer CC adjustment (CC_FINE bit in REG0A).

I²C commands can directly control the power paths. Input

path will be disconnected (high-impedance) by turning off

Qbypass switch if the EN_HIZ bit is set to 1. If the battery is

getting charge and Qswitch switch is on, it can also be

disconnected by setting charge enable bit, set the CEB bit to

1 (turn off Qswitch switch in charge direction). The power path

control bits are explained in Table 1. When these bits are

clear, they have no effect.

Constant-Voltage Charge: When the battery voltage reaches

to the V_{BAT_REG}, the voltage is kept constant and the charge

current drown by battery will start to fall. The V_{BAT_REG}value is

determined by bit D[7:2] of the REG04 that is also called

VBAT_REG[5:0].

Charge Termination: A charge termination is recognized

when the charge current drops to a small value represented by

Table 1. Switch Control by I²C Interface

I_TERM. If the termination detection is enabled by setting the

FETs

EN_HIZ = 1

CEB = 1

EN_TERM bit in REG05 D[4] to 1, then if the charge current

(I_CHG) stays equal or lower than I_TERMfor a period of t_{TERM_DGL}

(termination deglitching time) the charge cycle is considered

complete and charging current will be turned off and drop to

zero. With no termination, the charge current will continue to

drop. Note that a charge cycle is also considered complete and

charging will be turned off, if the safe timer function runs out of

time provided that the safe timer function is already enabled

by setting EN_TIMER bit in REG05 D[3] to 1.

Qbypass

Off

X

Off

X

Qswitch (Charging)

Qswitch (Discharging)

X

NOTE: X = Don't Care.

Battery Charge Profile

Figure 5 shows the battery charge profile used in this device.

The charge phases are explained below. Depending on the

I²C settings and the battery state of charge (SOC), some or

all of the phases may be skipped or used to finish a complete

charge cycle as explained below:

V_{BAT_REG}

I_CC

V_{BAT_REG}- V_RECH

Charge

Current

Battery

Voltage

V_{BAT_PRE}

I_TERM= I_PRE

I_PRE

Pre-Charge

CC Charge

CV Charge

Termination

Discharge

Auto-Recharge

Figure 5. Battery Charge Profile

SG Micro Corp

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JANUARY2022

14

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

DETAILED DESCRIPTION (continued)

The charge status is updated to "charge complete" once the

termination condition is detected. The charge current will be

terminated when termination conditions are met and if the

TERM_TMR bit is set to 0 (REG05 D[0] = 0); the charge will not

terminate and current keeps decreasing if TERM_TMR bit is 1.

Input Current and Input Voltage Based

Power Management

Usually the input source (typically USB) is not strong enough

for all system power demands and a power management

scheme is needed to keep the system voltage in desired level

without over loading the source. Figure 6 shows the power

management profile and explains how it is implemented in

SGM41562A/B including the battery assist operation

(supplement) when input source is not able to provide

required power.

During the whole charging process, the actual charge current

may fall below the set values due to the other regulations or

controls such as dynamic power management (DPM)

regulation caused by insufficient input voltage or current or

due to thermal regulation. In thermal regulation the device

reduces the power path currents to keep junction temperature

below the programmed limit.

The input current is continuously monitored to make sure the

input source maximum current limit specification is met. The

total input current limit is programmable by I²C and is used to

prevent over loading of the input source.

A new charge cycle starts when one of the following

conditions occurs:

If the input source is weak and the programmed input current

limit is higher than the effective capability of the source (like in

a dynamic loading condition) the back-up power management

will come in effect to prevent over loading of the input source.

The back-up power management is based on limiting the

input voltage drop to V_{IN_MIN}value (programmable). The

voltage based dynamic power management (DPM) will

regulate the input voltage to V_{IN_MIN}when the load is higher

than the input current capacity. If input current and voltage

limit are both reached, then the Qbypass switch (between IN

and SYS pins) will regulate and limit the total power taken

from the input. With the power limiting, if the system voltage

drops to the minimum value of (V_{SYS_REG}- 90mV) or the input

voltage falls below (V_IN- 160mV), the device will finally

reduce the charge current to prevent further voltage drops.



The input power recycles (input on/off).

Battery charging is enabled by I²C command.

Auto-recharge kicks in due to battery charge state.

If all the following conditions are satisfied:



No NTC thermistor temperature fault.

No safety (charge) timer fault.

No battery over-voltage event.

The Qswitch switch is not forced to turn off (e.g. CEB = 1).

Battery Over-Voltage Protection

SGM41562A/B has a built-in battery over-voltage protection

limit. A battery over-voltage event is detected when battery

voltage is higher than V_{BAT_OVP}+ V_{BAT_REG}. When this event

occurs, the charging is immediately suspended and a fault is

asserted. The discharging path will be turned on if battery

over-voltage condition does not clear and continues.

The programmed V_{IN_MIN}must be at least 250mV higher than

V

_{BAT_REG}to assure stable operation of the regulator.

SG Micro Corp

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JANUARY2022

15

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

DETAILED DESCRIPTION (continued)

I_SYS

I_IN

V_SYS

MIN(V_{SYS_REG}- 90mV, V_IN- 160mV)

V_BAT

10mV

30mV

I

_DSCHG× R_{ON_BATFET}

I_BAT

Charging

0

Discharging

Figure 6. Dynamic Power Management and Battery Supplement Operation Profile

Battery Supplement Mode

Battery Regulation Voltage

As mentioned above, the DPM will reduce the charge current

to keep the input current or voltage in regulation when source

power is not sufficient for system demand. If the charge

current is reduced to zero but still due to heavy system load

the input source is overloaded and V_SYScontinues to drop,

then the battery will supply the deficit to assist the input

source. This mode is called battery supplement mode in

which the battery provides I_DSCHGas supplement current to

the load. This mode starts when the system drop reaches to

30mV below the battery voltage. In this mode the Qswitch

switch acts as a near ideal diode from battery to the system.

The Qswitch switch is controlled to regulate and maintain the

The battery voltage for the constant-voltage regulation phase

(CV) is represented by V_{BAT_REG}

.

Thermal Regulation and Shutdown

SGM41562A/B continuously monitors its internal junction

temperature to avoid junction overheating while keeping the

power delivery at its maximum. When the internal junction

temperature reaches its programmable limit (T_{J_REG}), the

device starts to reduce the charge current to prevent higher

power dissipation. The thermal regulation limit is

programmable to help adjusting the design for the thermal

requirements in different applications. 4 different junction

temperature regulation thresholds (default 120℃) can be

chosen by programming the TJ_REG[1:0] register. In

particular, it is recommended that the junction temperature be

set not lower than the ambient temperature at which the

device charging behavior may occur.

V_BAT- V_SYSdrop to a fixed 10mV value when I_DSCHG

×

R_{ON_BATFET}is less than 10mV. If I_DSCHG× R_{ON_BATFET}is larger

than 10mV, the Qswitch switch is fully turned on to pass

battery voltage to the system with minimum drop.

In the battery supplement mode the ideal diode mode will be

disabled as soon as the system load decreases and V_SYS

exceeds the V_BAT+ 20mV value.

The device fixed thermal shutdown limit (T_{J_SHDN}) is slightly

higher than the highest programmable T_{J_REG}. If T_Jrises

above this limit, both Qbypass and Qswitch switches will turn

off.

When V_INsource is not available, the device operates in

discharge mode (battery power) in which the Qswitch switch

is always fully on to reduce the losses.

SG Micro Corp

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JANUARY2022

16

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

DETAILED DESCRIPTION (continued)

NTC Function and VDD Gating

 A new charge cycle is started.

The NTC pin is provided to sense the battery temperature

using an NTC thermistor. Thermistors are usually included in

the rechargeable battery packs to ensure safe operation by

monitoring the battery temperature and making sure it is

between hot and cold limits. To adjust the temperature limits

for the device, two resistors (R_T1and R_T2in Figure 13) should

be connected to NTC pin as a divider between VDD and GND

pins. The thermistor itself is connected between NTC pin and

GND. The voltage on the NTC pin is determined by all three

resistors. This resistor divider along with the hot and cold limit

voltages defined in the EC table determines the hot-cold

operating window. Note that due to the negative temperature

coefficient of NTC, when its voltage drops below V_HOT, it

means the battery temperature is exceeding the hot limit. The

NTC protection function can be disabled by clearing the

 Write in REG01 D[3] bit: from 1 to 0 (charge enable)

 Write in REG05 D[3] bit: from 0 to 1 (safety timer enable)

 Write in REG02 D[7] bit: from 0 to 1 (software reset)

 Write in REG0A D[4] bit: from 0 to 1 (software power recycle)

The safety time limit is 1 hour for pre-charge condition in

which the battery voltage stays lower than V_{BAT_PRE}and

cannot go higher. For the charge phase the time limit is

programmable through I²C and the safety timer starts

counting when the battery enters in constant-current charge

mode or constant-voltage charge mode.

Host Mode and Default Mode

SGM41562A/B can operate in either default mode (with default

parameters) or host mode (parameters programmed by host).

It will go to the default mode if one of the following occurs:



Input refresh with no battery connected.

Re-insert battery with no input source connected.

Device registers reset by writing 1 to REG_RST bit.

Watchdog timer expiry.

EN_NTC bit to 0. The default settings for NTC function are

the PCB OTP levels specified in EC table that can be change

by I²C as explained in Table 2.



Table 2. NTC Function Selection

Upon a power-on reset, the device starts in default mode and

in the same state as if watchdog timer expiration has

occurred. In this mode all registers take their default values,

including EN_HIZ = 0 and CEB = 1, that means the input

power path is enabled and device is set to battery discharge

mode. Note that by default the battery will not be charged

after a reset.

I²C Control

Function

EN_NTC

EN_PCB OTP

0

1

don't care

Disable

NTC

1

0

PCB OTP

NTC function only works in charge mode. When NTC pin

voltage falls out of the hot-cold window it means that the

temperature is outside the safe operating range and results in

a pause in charging and sets the fault bits. Charging will

resume when the temperature falls back into the safe range.

When the device is in the host mode, watchdog function can

be activated and works in both charge and discharge modes

(Watchdog timer is independent of the charge safety timer).

Watchdog timer can be enabled by programming a non-zero

expiry time in its register, that is WATCHDOG[1:0] ≠ 00. If

watchdog timer is enabled, it must be reset regularly before it

runs out of time by writing 1 to WD_RST bit in REG02.

Otherwise the watchdog timer will expire and results in a

power recycle to the system. Therefore, resetting the

watchdog timer by host must happen in the intervals shorter

than watchdog time limit. The power recycle is performed by

turning off Qswitch and Qbypass for a duration of t_{RST_DUR}and

then turning them on again. After watchdog timer expiration,

all registers will reset to their default values and the device

goes to the default mode.

If DIS_VDD bit is disabled and V_INis removed, V_DDpower

turns off and becomes high-impedance leaving only R_T2in

parallel with the NTC thermistor. If DIS_VDD bit is enabled,

V_DDremains active. V_DDuses battery power if V_INis removed.

With PCB OTP selected, if the NTC pin voltage is lower than

the NTC hot threshold, Qbypass and Qswitch switches will

turn off. The PCB OTP fault also will set the NTC_FAULT

status bit to 1. The operation will resume when the NTC pin

voltage goes back above the NTC hot threshold.

Safety Timer

To reduce the quiescent current during discharge mode, the

watchdog timer can be turned off by setting the

EN_WD_DISCHG bit to 0. If the WATCHDOG[1:0] is set to 00,

the watchdog timer is disabled under charge and discharge

modes independent of the EN_WD_DISCHG bit value.

Using an internal safety timer, SGM41562A/B is capable to

limit the maximum duration of the pre-charge and charge

periods to avoid extended charging cycles that may happen

due to abnormal battery conditions. This protection can be

disabled by I²C. The safety timer starts counting if one of the

following occurs:

SG Micro Corp

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JANUARY2022

17

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

DETAILED DESCRIPTION (continued)

Battery Discharge Function

If the battery is connected (V_BATis above the V_{BAT_UVLO}

Interrupt to Host (nINT Pin)

The nINT output signal is provided to alert the host on power

threshold) and the input source is missing, the Qswitch turns

events. SGM41562A/B sends out a negative pulse (width =

fully on. The low on resistance of the Qswitch minimizes the

conduction loss during discharge. The quiescent current of

the device is as low as 12μA in this mode. By setting REG0A

D[3] bit to 1, the Qswitch will stay on even if the rest of the

internal blocks are turned off, to reduce the device quiescent

current to less than 1.2μA. The low on-resistance and low

quiescent current of the device extend the run time.

t_{INT_PULSE}) to nINT if any of the following events occurs:



A good input source is detected (UVLO < V_IN< OVLO).

UVLO or OVLO is detected (input).



Charge completed.

A charging status change.

A fault record in REG09 occurs (input fault, thermal fault,

safety timer fault, battery OVP fault or NTC fault).

Watchdog expiration (WTD_FAULT in REG08 D[7]).



Over-Discharge Current Protection

When one of the mentioned faults occurs, the relevant fault

bit will latch in the register except for NTC fault bit that always

reports the current status of the thermistor. A fault status bit is

unlatched if the device quits that fault state. It will reset to 0

after the host reads the register if the bit is unlatched.

The over-discharge current protection is effective in discharge

mode and supplement mode. If the I_BATexceeds discharge

current limit value programmed in the REG03 D[7:4], the

Qswitch turns off after a wait delay (t_{DSCHG_CUT}) and then

resumes conducting after a retry delay time (t_RETRY).

The assertion of nINT signal pulse can be masked for some

of the events listed above when the corresponding mask

control bits are set in REG06 D[4:0]. If a mask bit is set, and

the event occurs, the nINT signals stays high.

When the battery voltage falls below the V_{BAT_UVLO}limit that is

programmed in the REG01 D[2:0], the Qswitch turns off to

prevent over-discharging the battery.

If SWITCH_MODE bit (REG0A D[3]) is set to 1, the Qswitch is

forced to remain on like a simple switch and the over-

discharge is ignored during battery discharge. This bit will

reset if power is re-applied to the input. It will also reset if the

battery is connected or disconnected while power is applied

to the input.

The nINT pin is also used as an input to initiate a power

recycle on the SYS output for example when a turn off/turn on

is needed on the system when battery is not removable. This

input is also used to exit the shipping mode that keeps the

battery disconnected.

System Short Circuit Protection

If a short circuit (to GND) occurs on the load connected to

SYS pin, the Qswitch disconnects the BAT to SYS path and

the Qbypass limits the current flowing in the IN to SYS path. If

the short circuit persists, the die temperature goes high and

causes a thermal shutdown.

SG Micro Corp

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18

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

DETAILED DESCRIPTION (continued)

Battery Disconnection Function

System power can be recycled by turning off the Qswitch and

Qbypass if nINT pin is pulled low for a duration of more than

t_{RST_DGL}. It is the time delay to avoid noise and glitches or to

hold a push bottom. The t_{RST_DGL}time is programmed by

tRST_DGL[1:0] in REG01. The off state lasts for a duration of

t_{RST_DUR}which can be programmed via tRST_DUR in REG01.

After this time the Qswitch and/or Qbypass will be

automatically turned on and the system is powered again.

During the off period, the nINT pin is biased to a lower

voltage.

When the battery is not removable, it’s essential to disconnect

the battery from the system to allow system power recycling

or to put that in the shipping mode. It is performed by forcing

the Qswitch to remain off by setting FET_DIS bit to 1. Table 3

explains how the SGM41562A/B can be programmed in

shipping mode (or to do a power recycle on SYS) and how to

exit the shipping mode. To exit shipping mode either the input

power should be applied to IN port, or a low voltage (ground)

should be applied to nINT pin for a short time (for example by

holding a push bottom).

The waveforms of power recycling are shown in Figure 7.

Table 3. Shipping Mode Control

Enter Shipping Mode

FET_DIS = 1

don't care

Exit Shipping Mode

Items

nINT Pin

H to L for 2s

V_INPlug-in

On

V_INT

V_BAT

Qbypass

don't care

Qswitch

(Charging)

Qswitch

Off

On

On (64ms Later)

Off

On (64ms Later)

(Discharging)

V_SYS

The FET_DIS bit is used for battery disconnection control. If

the bit is set to 1, the device enters the shipping mode after a

delay time, which can be programmed by EN_SHIP_DGL[1:0].

After the delay the Qswitch turns off and the FET_DIS bit

resets to 0. The device wakes up from shipping mode by

pulling down nINT pin or detecting an acceptable voltage on

the IN pin. The device exits from shipping mode 2 seconds

after pulling nINT pin down or 64ms after detecting an

acceptable V_IN. For the application of nINT pulled down to a

low voltage in the shipping mode, EN_SHIP_DGL[1:0] must

keep default value.

Time (2s/div)

Figure 7. Power Recycling Waveforms

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19

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

REGISTER MAPS

All registers are 8-bit and individual bits are named from D[0] (LSB) to D[7] (MSB).

I²C Slave Address: 03H

R/W:

R:

Read/Write bit(s).

Read only bit(s).

PORV:

n:

Power-On Reset value.

Parameter code formed by the bits as an unsigned binary number.

REG00

Register address: 0x00; R/W

PORV = 10011111

Table 4. REG00 Register Details

BITS

BIT NAME

DESCRIPTION

VIN_MIN[3]

COMMENT

PORV

TYPE

RESET BY

REG_RST

Minimum Input Voltage Limit (n: 4 bits):

= 3.88 + 0.08n (V)

1

R/W

1 = 640mV

VIN_MIN[2]

1 = 320mV

VIN_MIN[1]

1 = 160mV

VIN_MIN[0]

1= 80mV

IIN_LIM[3]

1 = 240mA

IIN_LIM[2]

1 = 120mA

IIN_LIM[1]

1= 60mA

0

1

R/W

REG_RST

Offset: 3.88V

D[7:4]

VIN_MIN[3:0]

Range:3.88V (0000) - 5.08V (1111)

Default: 4.60V (1001)

Input Current Limit (n: 4 bits):

= 50 + 30n (mA)

Offset: 50mA

D[3:0]

IIN_LIM[3:0]

Range: 50mA (0000) - 500mA (1111)

Default: 500mA (1111)

IIN_LIM[0]

1 = 30mA

REG01

Register address: 0x01; R/W

PORV = 10101100

Table 5. REG01 Register Details

BITS

BIT NAME

DESCRIPTION

00 = 8s

01 = 12s

10 = 16s (default)

11 = 20s

COMMENT

PORV

TYPE

RESET BY

nINT Pull-Down Period to Disconnect the

Battery (n: 2 bits):

= 8s + 4n (seconds)

REG_RST

or Watchdog

REG_RST

1

R/W

D[7:6] tRST_DGL[1:0]

0

1

R/W

or Watchdog

Battery FET off-time duration after reset.

The Qbypass and Qswitch off-time before auto

turn-on.

0 = 2s

1 = 4s (default)

REG_RST

or Watchdog

D[5]

D[4]

D[3]

tRST_DUR

EN_HIZ

CEB

Control Qbypass switch.

HIZ Mode Enable

0 = Disable (default)

1 = Enable

Default: disable (0) or switch on

Note: The EN_HIZ bit only controls the on and

off of the Qbypass.

Charge enable/disable Qswitch configuration.

Default: charge disabled (1) or Qswitch off

REG_RST

or Watchdog

0

1

R/W

Setting Charge Enable

0 = Charge enable

1 = Charge disabled (default)

VBAT_UVLO[2]

1 = 360mV

VBAT_UVLO[1]

1 = 180mV

VBAT_UVLO[0]

1 = 90mV

REG_RST

or Watchdog

Battery UVLO Threshold Value (n: 3 bits):

= 2.4V + 0.09n (V)

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

1

0

R/W

D[2:0] VBAT_UVLO[2:0]

Offset: 2.4V

Range: 2.4V (000) - 3.03V (111)

Default: 2.76V (100)

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SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

REGISTER MAPS (continued)

REG02

Register address: 0x02; R/W

PORV = 00001111

Table 6. REG02 Register Details

BITS

BIT NAME

DESCRIPTION

Software Reset

0 = Keep current setting

(default)

COMMENT

PORV TYPE

RESET BY

If set, will reset most parameters to default.

(as explained in the last column of register map

tables)

D[7]

REG_RST

0

R/W

REG_RST

1 = Reset

I²C Watchdog Timer Reset If set, will reset watchdog timer.

REG_RST

or Watchdog

D[6]

WD_RST

0 = Normal (default)

1 = Reset

ICC[5]

1= 256mA

ICC[4]

1 = 128mA

ICC[3]

1 = 64mA

ICC[2]

1 = 32mA

ICC[1]

1 = 16mA

ICC[0]

Fast Charge Current Value (CC Mode)

(n: 5 bits): = 8mA + 8n (mA) (n ≤ 56)

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

0

1

R/W

Offset: 8mA

Range: 8mA (000000) - 456mA (111000)

Default: 128mA (001111)

D[5:0]

ICC[5:0]

Note:

Values above 56D = 111000 (456mA) are

clamped to 56D = 111000 (456mA).

1 = 8mA

or Watchdog

REG03

Register address: 0x03; R/W

PORV = 10010001

Table 7. REG03 Register Details

BITS

BIT NAME

DESCRIPTION

IDSCHG[3]

COMMENT

PORV

TYPE

RESET BY

BAT to SYS Discharge Current Limit Value

(n: 4 bits): = 200mA + 200n (mA), n ≠ 0

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

1

R/W

1 = 1600mA

IDSCHG[2]

1 = 800mA

IDSCHG[1]

1 = 400mA

IDSCHG[0]

1 = 200mA

ITERM[3]

1 = 16mA

ITERM[2]

1 = 8mA

0

1

0

1

R/W

Offset: 200mA

D[7:4]

IDSCHG[3:0]

Valid Range: 400mA (0001) - 3.2A (1111)

Default: 2000mA (1001)

Charge Termination Current Value (n: 4 bits):

= 1mA + 2n (mA)

Offset: 1mA

D[3:0]

ITERM[3:0]

Range: 1mA (0000) - 31mA (1111)

Default: 3mA (0001)

ITERM[1]

1 = 4mA

ITERM[0]

1 = 2mA

or Watchdog

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SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

REGISTER MAPS (continued)

REG04

Register address: 0x04; R/W

PORV = 10100011

Table 8. REG04 Register Details

BITS

BIT NAME

DESCRIPTION

VBAT_REG[5]

1 = 480mV

VBAT_REG[4]

1 = 240mV

VBAT_REG[3]

1 = 120mV

VBAT_REG[2]

1 = 60mV

VBAT_REG[1]

1 = 30mV

VBAT_REG[0]

1 = 15mV

COMMENT

PORV

TYPE

RESET BY

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

or Watchdog

REG_RST

Battery Charge Regulation Voltage Value

(CV Mode) (n: 6 bits):

= 3.6V + 0.015n (V)

1

R/W

0

1

0

R/W

Offset: 3.60V

Range: 3.60V (000000) - 4.545V (111111)

Default: 4.2V (101000)

D[7:2] VBAT_REG[5:0]

or Watchdog

Pre-Charge to Fast Charge

Threshold

0 = 2.8V

1 = 3.0V (default)

Battery Recharge Threshold Offset below VBAT_REG.

REG_RST

or Watchdog

D[1]

D[0]

VBAT_PRE

VRECH

1

R/W

REG_RST

or Watchdog

0 = 100mV

1 = 200mV (default)

REG05

Register address: 0x05; R/W

PORV = 01111010

Table 9. REG05 Register Details

BITS

BIT NAME

DESCRIPTION

COMMENT

PORV

TYPE

RESET BY

Watchdog Control

Watchdog control in discharge mode.

D[7] EN_WD_DISCHG 0 = Disable (default)

1 = Enable

0

R/W

REG_RST

Watchdog Timer

00 = Disable timer

D[6:5] WATCHDOG[1:0] 01 = 40s

10 = 80s

If WATCHDOG[1:0] = 00, then watchdog timer

is disabled no matter EN_WD_DISCHG is set

or not.

1

R/W

REG_RST

11 = 160s (default)

Termination Control

0 = Disable

Use termination or not.

REG_RST

or Watchdog

D[4]

D[3]

EN_TERM

EN_TIMER

1

R/W

1 = Enable (default)

Safety Timer Control

0 = Disable

1 = Enable (default)

Charge Timer

00 = 3hrs

Charge safety timer enable/disable setting.

REG_RST

or Watchdog

REG_RST

or Watchdog

0

1

R/W

D[2:1]

D[0]

CHG_TMR[1:0] 01 = 5hrs (default)

REG_RST

or Watchdog

10 = 8hrs

11 = 12hr

Termination Timer Control When TERM_TMR is enabled, the device will

REG_RST

or Watchdog

TERM_TMR

0 = Disable (default)

1 = Enable

not suspend the charge current after charge

termination.

0

R/W

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SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

REGISTER MAPS (continued)

REG06

Register address: 0x06; R/W

PORV = 11000000

Table 10. REG06 Register Details

BITS

BIT NAME

DESCRIPTION

NTC Control

0 = Disable

COMMENT

POR

TYPE

RESET BY

REG_RST

D[7]

EN_NTC

1

R/W

or Watchdog

1 = Enable (default)

Enable Half Clock Rate Safety Timer

0 = Disable

1 = Enable 2× extended safety timer

during PPM (default)

REG_RST

or Watchdog

D[6]

D[5]

TMR2X_EN

FET_DIS

1

0

R/W

Qswitch control for shipping mode

and system power recycle.

Note: The FET_DIS bit controls the

on and off of the Qswitch in both

charging and discharging.

0 = Enable (default)

1 = Disable

REG_RST

0 = On (default)

1 = Off

Charge Completed INT Mask Control

0 = On (default)

1 = Off

REG_RST

or Watchdog

D[4]

D[3]

PG_INT_CTL

0

R/W

REG_RST

or Watchdog

EOC_INT_CTL

Charging Status Change INT Mask

Charging statuses are: not

CHG_STATUS_ Control

charging, pre-charge and charge.

REG_RST

or Watchdog

D[2]

D[1]

0

R/W

INT_CTL

0 = On (default)

1 = Off

0 = On (default)

1 = Off

REG_RST

or Watchdog

REG_RST

NTC_INT_CTL

0

R/W

0 = On (default)

1 = Off

D[0] BATOVP_INT_CTL

or Watchdog

REG07

Register address: 0x07; R/W

PORV = 00110111

Table 11. REG07 Register Details

BITS

BIT NAME

DESCRIPTION

PCB OTP Enable

0 = Enable (default)

1 = Disable

COMMENT

PORV

TYPE

RESET BY

REG_RST

or Watchdog

D[7]

EN_PCB OTP

0

R/W

0 = Enable (default)

1 = Disable

Thermal Regulation Threshold

00 = 60℃

01 = 80℃

10 = 100℃

11 = 120℃ (default)

VSYS_REG[3]

1 = 400mV

VSYS_REG[2]

1 = 200mV

REG_RST

or Watchdog

D[6]

EN_VINLOOP

TJ_REG[1:0]

0

1

R/W

REG_RST

or Watchdog

D[5:4]

REG_RST

or Watchdog

1

R/W

System Regulation Voltage Value:

= 4.2V + 0.05n (V) (n: 4 bits)

0

1

R/W

REG_RST

Offset: 4.2V

Range: 4.2V (0000) - 4.95V (1111)

Default: 4.55V (0111)

D[3:0] VSYS_REG[3:0]

VSYS_REG[1]

1 = 100mV

VSYS_REG[0]

1 = 50mV

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SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

REGISTER MAPS (continued)

REG08

Register address: 0x08; R and R/W

PORV = 00000000

Table 12. REG08 Register Details

BITS

BIT NAME

DESCRIPTION

PORV

TYPE

RESET BY

NA

Watchdog Expiration

0 = Normal (default)

1 = Watchdog timer expiration

Input Current Limit Release

0 = Disable (default)

1 = Enable

D[7]

WTD_FAULT

0

R

REG_RST

or Watchdog

D[6]

IIN_LIM_REL

0

R/W

Add 200mA to Input Current Limit

REG_RST

or Watchdog

D[5] IIN_LIM_ADD200 0 = Disable (default)

1 = Enable

Charging Status

0

R

NA

00 = Not charging (default)

D[4:3] CHG_STAT[1:0] 01 = Pre-charge

10 = Charge

11 = Charge done

Device in Power Path Management Mode (PPM)

0 = No PPM (default)

1 = In PPM

Input Power (IN) Status

0 = Power fail (default)

1 = Power good

D[2]

D[1]

D[0]

PPM_STAT

PG_STAT

0

R

NA

Thermal Regulation Status

THERM_STAT 0 = No thermal regulation (default)

1 = In thermal regulation

REG09

Register address: 0x09; R and R/W

PORV = 00000000

Table 13. REG09 Register Details

BITS

BIT NAME

DESCRIPTION

Enter Shipping Mode Deglitch Time

00 = 1s (default)

01 = 2s

10 = 4s

PORV

TYPE

RESET BY

0

R/W

REG_RST

EN_SHIP_DGL

[1:0]

D[7:6]

0

R/W

R

REG_RST

NA

11 = 8s

Input VIN Fault Status

0 = Normal (default)

1 = Input fault (OVP or bad source)

Thermal Shutdown Fault Status

0 = Normal (default)

1 = Thermal shutdown

Battery Over-Voltage Fault Status

0 = Normal (default)

1 = Battery OVP

D[5]

D[4]

D[3]

D[2]

D[1]

D[0]

VIN_FAULT

THEM_SD

0

R

NA

BAT_FAULT

Safety Timer Expiration Fault Status

STMR_FAULT 0 = Normal (default)

1 = Safety timer expiration

NTC Exceeding Hot Level

NTC_FAULT[1] 0 = Normal (default)

1 = NTC hot

NTC Exceeding Cold Level

NTC_FAULT[0] 0 = Normal (default)

1 = NTC cold

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24

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

REGISTER MAPS (continued)

REG0A

Register address: 0x0A; R and R/W

PORV = 01100000

Table 14. REG0A Register Details

BITS

BIT NAME

DESCRIPTION

Slave Address

001 = 01H

COMMENT

PORV

TYPE

RESET BY

0

R

NA

010 = 02H

011 = 03H (default)

100 = 04H

101 = 05H

110 = 06H

111 = 07H

D[7:5]

ADDR[2:0]

1

R

NA

Software Power Recycle

COLD_RESET 0 = No action (default)

1 = Power recycle reset

Causes a system power recycles if set to 1.

Automatically clears after power recycle.

D[4]

D[3]

0

R/W

NA

Effective in battery discharge mode only.

When Qswitch is forced on, there is no

current and voltage limit because the internal

circuits are shut down for lower consumption.

If set to 1, V_DDbecomes high-impedance

0 = Normal power path (default)

1 = Qswitch forced on

SWITCH_MODE

DIS_VDD

0 = Enable battery power (default) when V_INis removed.

D[2]

0

R/W

NA

1 = Disable battery power

If the PCB OTP of NTC function is be

selected, the DIS_VDD bit setting is invalid.

Disables over-voltage lockout detection of

V_INif set to 1.

If set to 1, the programmed charge current

in ICC[5:0] is weighted to ¼.

0 = Enable (default)

1 = Disable

0 = Normal scale (default)

1 = Fine scale

D[1]

D[0]

DIS_VINOVP

CC_FINE

0

R/W

NA

REG0B

Register address: 0x0B; R

PORV = 00000010 (SGM41562A)

PORV = 00000000 (SGM41562B)

Table 15. REG0B Register Details

BITS

BITNAME

DESCRIPTION

Device ID

COMMENT

PORV

TYPE

RESET BY

SGM41562A = 00000010

SGM41562B = 00000000

D[7:0]

ID[7:0]

R

NA

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JANUARY2022

25

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

OTP MAP

The following table shows the one time programmable (OTP) regions of the register map. The OTP bits can be read only.

ADDRESS

0x0A

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

COLD_

RESET

SWITCH_

MODE

OTP BITS: ADDR[2:0]

DIS_VDD

DIS_VINOVP

CC_FINE

0x0B

OTP BITS: ID[7:0]

OTP DEFAULT

OTP ITEMS

ICC

DEFAULT

128mA

3mA

ITERM

VBAT_REG

WATCHDOG

EN_VINLOOP

Address

4.2V

160s

Enable

03H

SGM41562A: 00000010. V_{IN_OVLO}= 19V

SGM41562B: 00000000. V_{IN_OVLO}= 6V

Device ID

STATE CONVERSION CHART

BATFET OFF or CEB[ ] = 1

Only

Power System Mode

Charge Mode

BATFET ON and CEB[ ] = 0

V_INPlug-in and

EN_HIZ[ ] = 0

V_INPlug-in

SWITCH_MODE[ ] = 0

P_VSYS< P_VIN

P_VSYS> P_VIN

V_BAT< V_{BAT_UVLO}

and V_IN< V_{IN_UVLO}

SWITCH_MODE[ ] = 1

V_INPlug-in

and EN_HIZ[ ] = 0

Power-Off

Supplement Mode

Switch Mode

Any State

V_INUn-Plug

or EN_HIZ[ ] = 1

and V_BAT> V_{BAT_UVLO}

V_INUn-Plug or

EN_HIZ[ ] = 1

V_INPlug-in and

EN_HIZ[ ] = 0

V

_INPlug-in

SWITCH_MODE[ ] = 0

BATFET ON

V_BAT> V_{BAT_UVLO}

Discharge Mode

Shipping Mode

BATFET OFF

Figure 8. State Machine Conversion

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26

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

CONTROL FLOW CHART

POWER-ON RESET (POR)

NO

V

_BAT> V_{BAT_UVLO}

and

NO

V_IN> V_{IN_UVLO}

V_IN< V_{IN_UVLO}

YES

MONITOR MODE

- Set Registers to Default

- Set WATCHDOG[1:0] to 01

- Start Watchdog Timer Counter

Write

EN_WD_DISCHG[ ]=1

YES

NO

HOST CONTROL MODE

- Host Programs Registers

- Start Watchdog Timer Counter

NO

Any I²C Write?

YES

Is Watchdog Timer Expired?

YES

RESET WATCHDOG SETTING

- Reset WATCHDOG[1:0] to Default

RESET HOST POWER

- Reset Qswitch

- Reset Qbypass and Qrvs

- Reset WATCHDOG[1:0] to Default

YES

Is Watchdog Disabled?

NO

DEFAULT MODE

- Set Registers to Default

Is I²C Watchdog

Timer Reset?

YES

Any I²C Write?

NO

Is Watchdog Timer

Expired?

Disable Watchdog Timer

YES

Figure 9. Startup, Host Mode, Default Mode and Host Power Reset

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27

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

CONTROL FLOW CHART (continued)

V_IN< V_{IN_UVLO}or V_IN> V_{IN_OVLO}

or V_IN< V_BAT+ V_SLP

or CEB[ ] = 1 or BATFET OFF

Disable

V

_{IN_UVLO}< V_IN< V_{IN_OVLO}

and V_IN> V_BAT+ V_SLP

and CEB[ ] = 0 or BATFET ON

V_HOT< V_NTC< V_COLD

and V_BAT< V_{BAT_PRE}

Pre-Charge

State

V_NTC< V_HOT

or V_NTC> V_COLD

V_BAT> V_{BAT_PRE}

V_BAT< V_{BAT_PRE}

V

_NTC< V_HOT

or V_NTC> V_COLD

t_SAFETYExpired

Safety Timer Fault

State

Constant-Current

State

Temperature Fault

State

V_HOT< V_NTC< V_COLD

and V_BAT> V_{BAT_PRE}

V_BAT= V_TERM

V_BAT< V_TERM

Constant-Voltage

State

I_BAT< I_TERM

and t_{TERM_DGL}Expired

V_BAT< V_TERM- V_RECH

and t_{RECH_DGL}Expired

Charge Done State

Figure 10. Charging Process

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28

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

CONTROL FLOW CHART (continued)

Regulation Mode

Battery Discharge

V_SYSis regulated at V_{SYS_REG}

Battery Supplement or Discharged

NO

V_SYS< 1.5V

NO

V

_SYS< 1.5V

YES

Fold Back BAT to V_SYS

Current I_DISCHGto 50%

YES

I

_IN> 360mA (Fixed)

Current Limit

YES

I

_BAT> 3.7A (Fixed)

Current Limit

NO

I

_IN> I_{IN_LIM}

NO

I

_BAT> I_DISCHG

YES

CC Mode

Limit I_INat I_{IN_LIM}

Start 60μs Timer

YES

CC Mode

Limit I_BATat I_DISCHG

Start 60μs Timer

NO

60μs Expired

NO

60μs Expired

YES

Hiccup Mode

Turn off Qbypass and Qswitch ,

Hiccup Mode

Turn off Qbypass and Qswitch ,

Start 800μs Timer

NO

800μs Expired

NO

800μs Expired

YES

Turn On Qbypass and Qswitch

Figure 11. System Short Circuit Protection

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29

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

APPLICATION INFORMATION

Resistor Divider for NTC Sensor

External Capacitor Selection

A resistor divider between VDD and GND pins can be used to

adjust the battery temperature limits sensed by the NTC

sensor. The R_T1and R_T2resistors (see Figure 12) allow

independent programming of the high and low temperature

limits for any type of NTC temperature characteristics.

Like many low-dropout regulators, SGM41562A/B requires

external capacitors on its power ports for stability and noise or

spike voltage immunity. These capacitors must be properly

selected and placed near the device.

Input Capacitor (IN to GND)

A minimum 2.2μF input capacitor must be connected between

IN and GND pins for stable operation over full load range. In

general an output capacitance larger than the input capacitor

is acceptable if the input capacitor is at least 2.2μF.

VDD

Low Temp Threshold

R_T1

V_COLD

NTC

Output Capacitor (SYS to GND)

SGM41562B is designed specifically to operate with small

ceramic output capacitance. A ceramic capacitor (X5R or X7R)

larger than 2.2μF is suitable for the SGM41562A/B

applications. The output capacitor should be connected close

to the device between SYS and GND pins with thick traces

and small loop area.

R_NTC

R_T2

Hot Temp Threshold

V_HOT

Figure 12. NTC Function Block

BAT to GND Capacitor

A capacitor is needed between BAT and GND pins. Use a

For a given NTC thermistor, if the NTC resistances at the

desired high and low temperatures are R_NTCHand R_NTCL

respectively, R_T1and R_T2values can be calculated by:

ceramic capacitor (X5R or X7R) that is at least 2.2μF.

VDD to GND Capacitor

V

_COLD− V_HOT×R_NTCH×R_NTCL

(

)

VDD voltage powers the internal control and logic circuit. It is

critical to use a 0.1μF decoupling ceramic capacitor between

VDD pin and GND close to the device with thick PCB traces

to decouple noise and stabilize VDD voltage.

R_T2

=

V

− V_COLDV_HOT×R

− V

− V_COLDV_HOT×R

)

COLD NTCH

(

)

(

HOT

NTCL

1− V_COLD

V_COLD

R_T1

=

× R_T2/ /R_NTCL

(

)

where V_COLDand V_HOTthresholds values are voltage levels on

the NTC pin given in the EC table for hot and cold detection.

PCB Layout Guide

1. Place external capacitors as close as possible to the

device to minimize stray inductances and connection

impedance.

For example, for a thermistor with R₂₅= 10kΩ and β = 3260,

℃

R_NTCLis 27.2kΩ at T_COLD= 0℃, and R_NTCHis 4.29kΩ at T_HOT

50℃. Using Equation 1 and Equation 2 to calculate R_T1

=

2. The GND for the I²C signals should be clean and directly

connected to GND pin, without sharing its route with GND

returns that carry high current or switching currents.

7.6kΩ and R_T2= 29.33kΩ (to be recalculated when the EC

table mean values are characterized), assuming that the NTC

window is between 0℃ and 50℃ and using the V_COLDand

V_HOTvalues from the EC table.

3. Due to relatively slow rise/fall times, it is ok to route the

I²C wires in parallel on the same PCB layer.

SG Micro Corp

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JANUARY2022

30

SGM41562A

SGM41562B

500mA Single-Cell Li-Ion Battery Charger

with Power Path Management

TYPICAL APPLICATION CIRCUIT

A1

A2

B2

IN

SYS

nINT

5V

SYS

C₁

4.7μF

C₂

10μF

B3

VDD

NTC

Input

/Host

C₃

1μF

B1

R_T1

Push

Button

SGM41562B

R_NTC

R_T2

A3

C3

BAT

C₄

4.7μF

C1

C2

GND

SDA

SCL

Host

Figure 13. SGM41562B Typical Application Circuit with 5V Input

Table 16. The Key BOM of Figure 13

QTY

REF

C₁, C₄

C₂

VALUE

4.7µF

10µF

1µF

DESCRIPTION

Ceramic Capacitor; 16V; X5R or X7R

PACKAGE

0603

1

2

1

0603

C₃

0603

REVISION HISTORY

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

JANUARY 2022 ‒ REV.A to REV.A.1

Page

Updated Interrupt to Host (nINT Pin) section .....................................................................................................................................................18

Changes from Original (DECEMBER 2021) to REV.A

Page

Changed from product preview to production data.............................................................................................................................................All

SG Micro Corp

www.sg-micro.com

JANUARY2022

31

PACKAGE INFORMATION

PACKAGE OUTLINE DIMENSIONS

WLCSP-1.52×1.52-9B

D

0.275

0.250

9 × Φ

0.5

A1 CORNER

E

0.5

TOP VIEW

RECOMMENDED LAND PATTERN (Unit: mm)

9 × Φd

3

2

1

A

B

C

A

e

A1

e

SIDE VIEW

BOTTOM VIEW

Dimensions In Millimeters

Symbol

MIN

MOD

0.600

MAX

0.638

0.251

1.550

0.336

A

A1

D

E

0.562

0.211

1.500

0.296

0.231

1.525

d

0.316

e

0.500 BSC

NOTE: This drawing is subject to change without notice.

SG Micro Corp

TX00207.000

www.sg-micro.com

PACKAGE INFORMATION

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

P2

P0

W

Q2

Q4

Q2

Q4

Q2

Q4

Q1

Q3

Q1

Q3

Q1

Q3

B0

Reel Diameter

P1

A0

K0

Reel Width (W1)

DIRECTION OF FEED

NOTE: The picture is only for reference. Please make the object as the standard.

KEY PARAMETER LIST OF TAPE AND REEL

Reel Width

Reel

Diameter

A0

B0

K0

P0

P1

P2

W

Pin1

Package Type

W1

(mm)

(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant

WLCSP-1.52×1.52-9B

7″

9.5

1.66

0.8

4.0

2.0

8.0

Q1

SG Micro Corp

TX10000.000

www.sg-micro.com

PACKAGE INFORMATION

CARTON BOX DIMENSIONS

NOTE: The picture is only for reference. Please make the object as the standard.

KEY PARAMETER LIST OF CARTON BOX

Length

(mm)

Width

(mm)

Height

(mm)

Reel Type

Pizza/Carton

7″ (Option)

7″

368

442

227

410

224

8

18

SG Micro Corp

www.sg-micro.com

TX20000.000


型号：	SGM41562B
厂家：	Shengbang Microelectronics Co, Ltd
描述：	500mA Single-Cell Li-Ion Battery Charger with Power Path Management 电池
文件：	总34页 (文件大小：1272K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SGM41562B [SGMICRO]

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