SGM836 [SGMICRO]
Microprocessor Supervisory Circuit with Programmable Delay Time;
| 型号： | SGM836 |
| 厂家： | 
Shengbang Microelectronics Co, Ltd |
| 描述： | Microprocessor Supervisory Circuit with Programmable Delay Time |
| 文件： | 总16页 (文件大小：892K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SGM836
Microprocessor Supervisory Circuit
with Programmable Delay Time
GENERAL DESCRIPTION
FEATURES
The SGM836 family can monitor system voltages from
0.4V to 5V. When the detection voltage falls below the
preset threshold (VITL) or the manual reset (nMR) pin is
driven low, the open-drain nRESET output is asserted.
After the detection voltage and nMR voltage return
higher than their respective thresholds, the nRESET
output remains low within the user-adjustable delay
time.
● Adjustable Reset Timeout Period: 1.25ms to 10s
● Low Quiescent Current: 0.6μA (TYP)
● High Threshold Accuracy: 1% (TYP)
● Factory-Set Detection Voltages: 0.9V to 5V
● Adjustable Detection Voltage Down to 0.4V
● Manual Reset (nMR) Input
● Open-Drain nRESET Output
● Available in Green SOT-23-6 and TDFN-2×2-6AL
Packages
The SGM836 uses a precision reference to achieve 1%
threshold accuracy. The fixed reset timeout period can
be set to 20ms by leaving the CT pin open and can be
set to 300ms by connecting the CT pin to VDD through a
resistor. The programmable reset timeout period can be
set from 1.25ms to 10s through an external capacitor
connected to the CT pin. Low quiescent current makes
the SGM836 very suitable for battery-powered
applications.
APPLICATIONS
Computers
Portable Equipment
Intelligent Instruments
Microprocessor Systems
Critical μP Power Monitoring
The SGM836 is available in Green SOT-23-6 and
TDFN-2×2-6AL packages.
TYPICAL APPLICATION
1.2V
3.3V
VDD
VDD
nRESET
VI/O
SENSE
CT
SENSE
GPIO
VCORE
DSP
SGM836-1.2
SGM836-3.3
nRESET
GND
nMR
CT
GND
GND
Figure 1. Typical Application Circuit
SG Micro Corp
APRIL2023–REV. A. 3
www.sg-micro.com
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
PACKAGE/ORDERING INFORMATION
SPECIFIED
TEMPERATURE
RANGE
THRESHOLD
VOLTAGE (VITL) (V) DESCRIPTION
PACKAGE
ORDERING
NUMBER
PACKAGE
MARKING
PACKING
OPTION
MODEL
SOT-23-6
0.84
-40℃ to +125℃
SGM836-0.9XN6G/TR
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
R6AXX
SGM836-0.9
R18
XXXX
TDFN-2×2-6AL -40℃ to +125℃ SGM836-0.9XTDI6G/TR
-40℃ to +125℃
SOT-23-6 SGM836-1.2XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-1.2XTDI6G/TR
SOT-23-6 -40℃ to +125℃ SGM836-1.25XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-1.25XTDI6G/TR
-40℃ to +125℃
SOT-23-6 SGM836-1.5XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-1.5XTDI6G/TR
SOT-23-6 -40℃ to +125℃ SGM836-1.8XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-1.8XTDI6G/TR
-40℃ to +125℃
SOT-23-6 SGM836-1.9XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-1.9XTDI6G/TR
SOT-23-6 -40℃ to +125℃ SGM836-2.5XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-2.5XTDI6G/TR
-40℃ to +125℃
SOT-23-6 SGM836-2.7XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-2.7XTDI6G/TR
-40℃ to +125℃
SOT-23-6 SGM836-2.9XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-2.9XTDI6G/TR
SOT-23-6 -40℃ to +125℃ SGM836-3.0XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-3.0XTDI6G/TR
-40℃ to +125℃
SOT-23-6 SGM836-3.3XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-3.3XTDI6G/TR
SOT-23-6 -40℃ to +125℃ SGM836-3.7XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-3.7XTDI6G/TR
-40℃ to +125℃
SOT-23-6 SGM836-4.0XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-4.0XTDI6G/TR
-40℃ to +125℃
SOT-23-6 SGM836-4.5XN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-4.5XTDI6G/TR
R6BXX
SGM836-1.2
SGM836-1.25
SGM836-1.5
SGM836-1.8
SGM836-1.9
SGM836-2.5
SGM836-2.7
SGM836-2.9
SGM836-3.0
SGM836-3.3
SGM836-3.7
SGM836-4.0
SGM836-4.5
1.12
1.16
1.40
1.67
1.77
2.33
2.52
2.7
R19
XXXX
R6CXX
R1A
XXXX
R6EXX
R1B
XXXX
R71XX
R1C
XXXX
R73XX
R1D
XXXX
R76XX
R1E
XXXX
R78XX
R1F
XXXX
R7AXX
R20
XXXX
R3DXX
2.79
3.07
3.45
3.73
4.2
R21
XXXX
R7CXX
R22
XXXX
R7EXX
R23
XXXX
R80XX
R24
XXXX
R82XX
R25
XXXX
SG Micro Corp
www.sg-micro.com
APRIL 2023
2
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
PACKAGE/ORDERING INFORMATION (continued)
SPECIFIED
TEMPERATURE
RANGE
THRESHOLD
VOLTAGE (VITL) (V) DESCRIPTION
PACKAGE
ORDERING
NUMBER
PACKAGE
MARKING
PACKING
OPTION
MODEL
SOT-23-6
4.65
-40℃ to +125℃
SGM836-5.0XN6G/TR
R84XX
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
SGM836-5.0
R26
XXXX
TDFN-2×2-6AL -40℃ to +125℃ SGM836-5.0XTDI6G/TR
-40℃ to +125℃
SOT-23-6 SGM836-ADJXN6G/TR
TDFN-2×2-6AL -40℃ to +125℃ SGM836-ADJXTDI6G/TR
R85XX
SGM836-ADJ
0.405
R27
XXXX
MARKING INFORMATION
NOTE: XX = Date Code. XXXX = Date Code and Trace Code.
SOT-23-6
TDFN-2×2-6AL
Serial Number
Y Y Y
X X X X
YYY X X
Date Code - Week
Date Code - Year
Serial Number
Trace Code
Date Code - Year
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
ABSOLUTE MAXIMUM RATINGS
OVERSTRESS CAUTION
VDD to GND.......................................................... -0.3V to 7V
CT to GND................................................-0.3V to VDD + 0.3V
nRESET, nMR, SENSE to GND........................... -0.3V to 7V
nRESET Pin Current.....................................................±5mA
Package Thermal Resistance
Stresses beyond those listed in Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods
may affect reliability. Functional operation of the device at any
conditions beyond those indicated in the Recommended
Operating Conditions section is not implied.
SOT-23-6, θJA .......................................................... 243℃/W
TDFN-2×2-6AL, θJA.................................................. 124℃/W
TDFN-2×2-6AL, θJC(TOP) ........................................... 129℃/W
TDFN-2×2-6AL,θJC(BOT) .............................................. 33℃/W
Junction Temperature.................................................+150℃
Storage Temperature Range.......................-65℃ to +150℃
Lead Temperature (Soldering, 10s)............................+260℃
ESD Susceptibility
ESD SENSITIVITY CAUTION
This integrated circuit can be damaged if ESD protections are
not considered carefully. SGMICRO recommends that all
integrated circuits be handled with appropriate precautions.
Failureto observe proper handlingand installation procedures
can cause damage. ESD damage can range from subtle
performance degradation tocomplete device failure. Precision
integrated circuits may be more susceptible to damage
because even small parametric changes could cause the
device not to meet the published specifications.
HBM.............................................................................4000V
CDM ............................................................................1000V
RECOMMENDED OPERATING CONDITIONS
Input Supply Voltage Range, VDD .....................1.65V to 6.5V
SENSE Pin Voltage, VSENSE...................................0V to 6.5V
CT Pin Voltage, VCT................................................VDD (MAX)
nMR Pin Voltage, VnMR ..........................................0V to 6.5V
nRESET Pin Voltage, VnRESET ................................0V to 6.5V
nRESET Pin Current, InRESET .....................0.0003mA to 5mA
Operating Junction Temperature Range......-40℃ to +125℃
DISCLAIMER
SG Micro Corp reserves the right to make any change in
circuit design, or specifications without prior notice.
SG Micro Corp
www.sg-micro.com
APRIL 2023
3
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
PIN CONFIGURATIONS
(TOP VIEW)
(TOP VIEW)
nRESET
GND
1
2
3
6
5
4
VDD
VDD
SENSE
CT
1
2
3
6
5
4
nRESET
GND
SENSE
CT
GND
nMR
nMR
SOT-23-6
TDFN-2×2-6AL
PIN DESCRIPTION
PIN
NAME
I/O
FUNCTION
SOT-23-6 TDFN-2×2-6AL
Active-Low Reset Output Pin. nRESET remains low if the SENSE input is
below VITL or nMR is logic low. It goes (or remains) low for the reset timeout
period after the SENSE voltage exceeds VITL and nMR pin is driven high. It
is recommended to connect a 10kΩ to 1MΩ pull-up resistor to this pin which
1
6
nRESET
O
enables the reset voltages greater than VDD
.
2
3
5
4
GND
nMR
—
I
Ground.
Manual Reset Input Pin. Pulling this pin (nMR) low will assert nRESET. nMR
is internally pulled up to VDD by a 100kΩ resistor.
Reset Timeout Delay Programming Pin. The fixed delay time can be set by
connecting a 40kΩ to 200kΩ resistor between CT pin and VDD or leaving it
open. And the programmable delay time can be set by connecting a
capacitor no less than 100pF to the ground.
4
3
CT
I
The Dedicated Voltage Monitor Pin. If the SENSE voltage falls below VITL
the nRESET will be asserted.
,
5
6
2
SENSE
VDD
I
I
1
Supply Voltage.
—
Exposed Pad
GND
—
Exposed Pad. Connect it to the ground.
NOTE: I: input, O: output.
SG Micro Corp
www.sg-micro.com
APRIL 2023
4
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
ELECTRICAL CHARACTERISTICS
(VDD = 1.65V to 6.5V, RLRESET = 100kΩ (1), TJ = -40℃ to +125℃, typical values are at TJ = +25℃, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply Range
VDD
1.65
6.5
V
VDD = 3.3V, nRESET not asserted,
nMR, nRESET, CT open
VDD = 6.5V, nRESET not asserted,
nMR, nRESET, CT open
0.6
0.9
1.5
2
Supply Current (Current into VDD Pin)
IDD
μA
1.3V ≤ VDD < 1.8V, IOL = 0.4mA
1.8V ≤ VDD ≤ 6.5V, IOL = 1mA
VOL (MAX) = 0.2V, InRESET = 15μA
All versions, TJ = +25℃
VITL ≤ 3.3V
0.2
0.3
0.8
1.0
1.5
1.8
1.25
1.3
3.5
3.5
Low-Level Output Voltage
Power-Up Reset Voltage (2)
VOL
V
V
VPOR
-1.0
-1.5
-1.8
-1.25
-1.3
Negative-Going Input Threshold Accuracy
VITL
3.3V < VITL ≤ 5.0V
%
VITL ≤ 3.3V, TJ = -40℃ to +85℃
3.3V < VITL ≤ 5.0V, TJ = -40℃ to +85℃
All versions
Positive-Going Input Threshold Accuracy
Hysteresis On VITL
VITH
VHYS
RnMR
%
%
All versions
nMR Internal Pull-Up Resistance
50
100
235
kΩ
SGM836-ADJ, VSENSE = VITL
Fixed versions, VSENSE = 6.5V
VnRESET = 6.5V, nRESET not asserted
CT pin, VIN = 0V to VDD
-25
25
1
Input Current at SENSE Pin
nRESET Leakage Current
Input Capacitance, Any Pin
ISENSE
IOH
nA
μA
pF
5
5
CIN
Other pins, VIN = 0V to 6.5V
Logic Low
VIL
VIH
0
0.3 × VDD
VDD
nMR Input
V
Logic High
0.7 × VDD
tSENSE
tnMR
VIH = 1.05 × VITL, VIL = 0.95 × VITL
VIH = 0.7 × VDD, VIL = 0.3 × V DD
25
100
1.206
20
μs
ns
V
Input Pulse Width to nRESET
CT Source Threshold Voltage
VTH-RAMP
CT = Open
12
180
0.8
28
420
1.8
nRESET Delay Time
tD
CT = VDD
300
1.3
ms
CT = 100pF
Propagation Delay
tMR
nMR to nRESET
SENSE to nRESET
250
100
ns
High-to-Low Level nRESET Delay
tRP0
μs
NOTE:
1. RLRESET is the resistor connected to the nRESET pin.
SG Micro Corp
www.sg-micro.com
APRIL 2023
5
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
TIMING DIAGRAM
SENSE
VIT H
VHYS
VIT L
VPO R
0. 0V
nRESET
tMR = nMR to Reset Propagation Delay
tRP0 = VDD Drop to Reset Delay
tD = Reset Timeout Period
tRP0
tMR
tD
tD
tD
= Undefined State
nMR
0. 7VDD
0. 3VDD
Time
Figure 2. SGM836 Timing Diagram Showing nMR and SENSE Reset Timing
SG Micro Corp
www.sg-micro.com
APRIL 2023
6
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
TYPICAL PERFORMANCE CHARACTERISTICS
TJ = +25℃, VDD = 3.3V and RLRESET = 100kΩ, unless otherwise noted.
Supply Current vs. Supply Voltage
nRESET Timeout Period vs. CT
+25℃, +40℃, +85℃, +125℃
1.5
1.2
0.9
0.6
0.3
0
100
10
+125℃
+85℃
1
0.1
+25℃
0.01
-40℃
0.001
1
2
3
4
5
6
7
0.0001
0.001
0.01
0.1
1
10
VDD (V)
CT (μF)
Normalized nRESET Delay Time vs. Temperature
(CT = Open, CT = VDD, CT = Any)
Maximum Transient Duration at SENSE vs. SENSE Threshold
Overdrive Voltage
10
8
110
Reset occurs above the curve
100
90
80
70
60
50
40
30
20
10
0
6
4
2
0
-2
-4
-6
-8
-10
-55 -35 -15
5
25 45 65 85 105 125
0
5
10 15 20 25 30 35 40 45 50
Overdrive (%VIT)
Temperature (℃)
Normalized SENSE Threshold Voltage (VITL) vs. Temperature
1
Low-Level nRESET Voltage vs. nRESET Current
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0.8
0.6
0.4
0.2
0
VDD = 1.8V
-0.2
-0.4
-0.6
-0.8
-1
VDD = 3.3V
VDD = 6.5V
-55 -35 -15
5
25 45 65 85 105 125
0
0.5
1
1.5
2
2.5
3
3.5
4
nRESET Current (mA)
Temperature (℃)
SG Micro Corp
www.sg-micro.com
APRIL 2023
7
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
FUNCTIONAL BLOCK DIAGRAM
VDD
100kΩ
nMR
Schmitt
+
-
CT
SENSE
VBG
Control
Logic
R1
R2
nRESET
-
+
VREF
0.405V
R1 + R2 = 25MΩ
GND
Figure 3. Fixed Voltage Version Block Diagram
VDD
100kΩ
nMR
Schmitt
+
CT
-
VBG
Control
Logic
nRESET
SENSE
-
+
VREF
0.405V
GND
Figure 4. Adjustable Voltage Version Block Diagram
SG Micro Corp
www.sg-micro.com
APRIL 2023
8
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
DETAILED DESCRIPTION
When the SENSE voltage falls below VITL or the nMR
pin is driven low, the open-drain nRESET output is
asserted. After the SENSE and nMR voltages exceed
their respective thresholds, the nRESET output
remains low within the user-adjustable delay time.
Setting the Reset Delay Time
There are 3 typical applications to set the reset timeout
delay in Figure 6, Figure 6 (a) shows the CT pin is
connected to VDD through a resistor (from 40kΩ to
200kΩ must be used) to configure for a fixed 300ms
delay time. Figure 6 (b) shows leaving the CT pin open
to set a fixed 20ms delay time. Figure 6 (c) shows that
the user-defined time can be set through programming
the capacitor between the CT pin and the ground. tD is
always between 1.25ms and 10s.
Feature Description
The SGM836 device has a reset delay time adjustment
function and a wide range of detection thresholds, so it
can be widely used in various applications. The
detection threshold voltages are factory-set from 0.9V
to 5V, while the SGM836-ADJ detection threshold
voltages must be set above 0.405V through an external
resistance divider. The fixed 20ms reset timeout period
can be set by leaving the CT pin open, and it also can
be set to 300ms by connecting the CT pin to VDD
through a resistor. The reset timeout period can be set
from 1.25ms to 10s through programming an external
capacitor which is connected to the CT pin.
3.3V
VDD
50kΩ
SGM836-3.3
SENSE nRESET
CT
GND
(a) 300ms Delay
SENSE Input
3.3V
The SENSE pin is dedicated for voltage monitor. The
nRESET will be asserted if the SENSE voltage falls
below VITL. The internal comparator has built-in hysteresis
to ensure smooth nRESET. It is recommended to
connect a bypass capacitor from 1nF to 10nF at the
SENSE pin to reduce the sensitivity to voltage transient
and PCB layout parasitic. The SGM836 immunes to
short negative transients on the SENSE pin. Sensitivity
to transients is dependent on the voltage overdrive on
this pin. The SGM836-ADJ typical circuit shown in
Figure 5, it can monitor any voltage rail as low as
0.405V.
VDD
SGM836-3.3
SENSE nRESET
CT
GND
(b) 20ms Delay
3.3V
VDD
SGM836-3.3
SENSE nRESET
VIN
VOUT
VDD
CT
R1
GND
CT
SGM836-ADJ
SENSE
nRESET
(c) Programmable delay
VIT L' = (1 + R1/R2) × 0.405
R2
1nF
GND
Figure 6. Different Setting methods of the nRESET Delay
Time
The nominal value of CT should be at least 100pF, so
Figure 5. The SGM836-ADJ is used to monitor a
User-Defined Threshold Voltage
that the SGM836 can identify the presence of the
capacitor. The reset timeout delay can be calculated by
using Equation 1:
tD (μs) = (5.58 × 106) × CT (μF) + 520μs
(1)
SG Micro Corp
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APRIL 2023
9
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
DETAILED DESCRIPTION (continued)
Internally there is a precise 216nA current source,
which charges the external capacitor CT to 1.206V
threshold, and this charge time will determine the reset
timeout delay.
nRESET Output
As long as SENSE voltage exceeds VITL and the nMR
is logic high, nRESET remains high (deasserted).
Either VSENSE is lower than VITL or nMR is set low,
nRESET will be low (asserted).
The capacitor will be discharged if nRESET is asserted.
After clearing the nRESET condition, the internal
current source will be enabled and the external
capacitor will be recharged. When the voltage on the
capacitor reaches 1.206V, nRESET is set to invalid. It
is recommended to use low leakage capacitors such as
ceramics, and the stray capacitance around the pins
may cause errors in the reset delay time.
If nMR returns to logic high again and SENSE voltage
exceeds VITH (VITL + VHYS), nRESET will remain low for
a fixed reset delay time due to the delay circuit function.
As soon as the reset delay has expired, the nRESET
turns into logic high. The pull-up resistor between
nRESET and VDD can be used to reset the
microprocessor signal to obtain a voltage above VDD
voltage. The pull-up resistor should be no less than
10kΩ due to the limited nRESET pull-down ability.
Manual Reset (nMR) Input
The manual reset (nMR) input allows the operator, test
technician, or external logic circuit to initiate a reset. A
logic low (0.3 × VDD) on nMR forces the nRESET low.
After nMR returns to a logic high and the SENSE
voltage rises above its reset threshold, nRESET is
deasserted after a reset delay time period (tD). nMR is
pulled up to VDD with an internal 100kΩ resistor. This
pin can be left floating if nMR is not used.
Device Functional Modes
Table 1. Matrices of the nRESET Output
nMR
SENSE > VITL
nRESET
L
L
0
1
0
1
L
L
H
H
L
H
Figure 7 shows how to use nMR to monitor multiple
system voltages. If the logic signal does not drive nMR
fully to VDD, some extra current will flow into VDD due to
the pull-up resistor on nMR. Figure 8 shows how to use
an external FET to minimize the current draw.
Normal Operation (VDD > VDD_MIN
)
When the VDD voltage is higher than VDD_MIN, the logic
state of nRESET is determined by VSENSE and the logic
state of nMR.
1.2V
3.3V
• nMR high: When VDD voltage is higher than 1.65V for a
selected time (tD), the nRESET logic state corresponds
to VSENSE relative to VITL.
VDD
SENSE
VDD
VI/O
CT
SENSE nRESET
GPIO
VCORE
• nMR low: nRESET is held low regardless of VSENSE in
this mode.
DSP
SGM836-1.2
nRESET
GND
SGM836-3.3
nMR
CT
GND
GND
Above Power-On Reset but Lower than VDD_MIN
(VPOR < VDD < VDD_MIN
)
Figure 7. Monitor Multiple System Voltages Using the
nMR Pin
When the VDD voltage is lower than VDD_MIN and higher
than the power-on reset voltage (VPOR), the nRESET is
asserted and driven to a low-impedance state.
3.3V
VDD
SENSE 100kΩ
Below Power-On Reset (VDD < VPOR
)
When the VDD voltage is lower than the required voltage
(VPOR), the nRESET voltage is undefined. In the case of
nRESET pulling up to VDD through a 100kΩ resistor,
nRESET voltage is equal to or lower than VDD voltage.
nMR
nRESET
SGM836
GND
Figure 8. An External MOSFET is used to Minimize IDD
SG Micro Corp
www.sg-micro.com
APRIL 2023
10
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
APPLICATION INFORMATION
The SGM836 requires a voltage supply within 1.65V
and 6.5V. Figure 9 shows a typical application of the
Voltage Transient on SENSE Pin
The short negative transient on the SENSE pin of the
SGM836 can be relatively immune. The sensitivity to
voltage transients depends on the value of threshold
overdrive. The larger the overdrive is, the faster the
nRESET responses. VITL is the threshold voltage in
Equation 2. Use the percent of the sense voltage
threshold to calculate the threshold overdrive.
SGM836-2.5 used with
a
2.5V microprocessor.
Normally, the nRESET output is connected to the
nRESET input of the microprocessor. It is necessary to
connect a 1MΩ pull-up resistor between nRESET and
VDD to keep the nRESET logic high if it is not asserted.
The reset delay time can be set by CT while it depends
on the requirement of microprocessor. If left it open, a
typical 20ms of reset delay time is set.
Overdrive = | (VSENSE / VITL - 1) × 100% |
(2)
Layout Guide
2.5V
It is recommended to connect a 0.1µF ceramic
capacitor to the VDD pin as close as possible. If there is
no connection capacitor, minimize the parasitic
capacitor to avoid a significant impact on the nRESET
delay time.
1MΩ
VDD
nRESET
SGM836-2.5
nMR
VDDSHV1, 3, 6, 7, 9
RESPWRON
SENSE
Processor
CT
GND
GND
Figure 9. SGM836 Typical Application circuit with a
Microprocessor
SG Micro Corp
www.sg-micro.com
APRIL 2023
11
Microprocessor Supervisory Circuit
with Programmable Delay Time
SGM836
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
APRIL 2023 ‒ REV.A.2 to REV.A.3
Page
Updated Electrical Characteristics section...........................................................................................................................................................5
AUGUST 2022 ‒ REV.A.1 to REV.A.2
Page
Updated Detail Description section.................................................................................................................................................................9-11
Added Application Information section...............................................................................................................................................................12
Updated Tape and Reel Information section......................................................................................................................................................16
MAY 2022 ‒ REV.A to REV.A.1
Page
Updated General Description section...................................................................................................................................................................1
Updated Detail Description section......................................................................................................................................................................9
Updated Tape and Reel Information section......................................................................................................................................................12
Changes from Original (JANUARY 2021) to REV.A
Page
Changed from product preview to production data.............................................................................................................................................All
SG Micro Corp
www.sg-micro.com
APRIL 2023
12
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
SOT-23-6
D
e1
e
E1
E
2.59
0.99
b
0.69
0.95
RECOMMENDED LAND PATTERN (Unit: mm)
L
A2
A
ccc
C
SEATING PLANE
A1
c
θ
C
0.25
Dimensions In Millimeters
Symbol
MIN
-
MOD
MAX
1.450
0.150
1.300
0.500
0.220
3.050
1.750
3.000
A
A1
A2
b
-
0.000
0.900
0.300
0.080
2.750
1.450
2.600
-
-
-
c
-
D
-
E
-
E1
e
-
0.950 BSC
e1
L
1.900 BSC
0.300
0°
-
-
0.600
8°
θ
ccc
0.100
NOTES:
1. This drawing is subject to change without notice.
2. The dimensions do not include mold flashes, protrusions or gate burrs.
3. Reference JEDEC MO-178.
SG Micro Corp
TX00034.001
www.sg-micro.com
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
TDFN-2×2-6AL
D
e
N6
L
D1
E1
E
N3
N1
b
BOTTOM VIEW
TOP VIEW
1.60
0.55
1.00
2.60
A
A1
A2
SIDE VIEW
0.30
0.65
RECOMMENDED LAND PATTERN (Unit: mm)
Dimensions
In Millimeters
Dimensions
In Inches
Symbol
MIN
MAX
0.800
0.050
MIN
MAX
0.031
0.002
A
A1
A2
D
0.700
0.000
0.028
0.000
0.203 REF
0.008 REF
1.900
1.500
1.900
0.900
0.250
2.100
1.700
2.100
1.100
0.350
0.075
0.059
0.075
0.035
0.010
0.083
0.067
0.083
0.043
0.014
D1
E
E1
b
e
0.650 BSC
0.026 BSC
L
0.174
0.326
0.007
0.013
NOTE: This drawing is subject to change without notice.
SG Micro Corp
TX00132.000
www.sg-micro.com
PACKAGE INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
P2
P0
W
Q2
Q4
Q2
Q4
Q2
Q4
Q1
Q3
Q1
Q3
Q1
Q3
B0
Reel Diameter
P1
A0
K0
Reel Width (W1)
DIRECTION OF FEED
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF TAPE AND REEL
Reel Width
Reel
Diameter
A0
B0
K0
P0
P1
P2
W
Pin1
Package Type
W1
(mm)
(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant
SOT-23-6
7″
7″
9.5
9.5
3.23
2.30
3.17
2.30
1.37
1.10
4.0
4.0
4.0
4.0
2.0
2.0
8.0
8.0
Q3
Q2
TDFN-2×2-6AL
SG Micro Corp
TX10000.000
www.sg-micro.com
PACKAGE INFORMATION
CARTON BOX DIMENSIONS
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF CARTON BOX
Length
(mm)
Width
(mm)
Height
(mm)
Reel Type
Pizza/Carton
7″ (Option)
7″
368
442
227
410
224
224
8
18
SG Micro Corp
www.sg-micro.com
TX20000.000
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