S-5712ACDH2-I4T1U [SII]
LOW VOLTAGE OPERATION;
| 型号： | S-5712ACDH2-I4T1U |
| 厂家： | 
SEIKO INSTRUMENTS INC |
| 描述： | LOW VOLTAGE OPERATION 传感器 换能器 |
| 文件： | 总30页 (文件大小：1831K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
S-5712 Series
LOW VOLTAGE OPERATION
BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
www.sii-ic.com
© SII Semiconductor Corporation, 2010-2016
Rev.4.6_00
This IC, developed by CMOS technology, is a high-accuracy Hall IC that operates at a low voltage and low current
consumption. The output voltage changes when this IC detects the intensity level of magnetic flux density. Using this IC with
a magnet makes it possible to detect the open / close in various devices.
High-density mounting is possible by using the small SOT-23-3 or the super-small SNT-4A package.
Due to its low voltage operation and low current consumption, this IC is suitable for battery-operated portable devices. Also,
due to its high-accuracy magnetic characteristics, this IC can make operation's dispersion in the system combined with
magnet smaller.
SII Semiconductor Corporation offers a "magnetism simulation service" that provides the ideal combination of magnets and
our Hall ICs for customer systems. Our magnetism simulation service will reduce prototype production, development period
and development costs. In addition, it will contribute to optimization of parts to realize high cost performance.
For more information regarding our magnetism simulation service, contact our sales office.
Features
• Pole detection*1:
Detection of both poles, S pole or N pole
Active "L", active "H"
Nch open-drain output, CMOS output
BOP = 1.8 mT typ.
• Detection logic for magnetism*1:
• Output form*1:
• Magnetic sensitivity*1:
BOP = 3.0 mT typ.
B
OP = 4.5 mT typ.
• Operating cycle (current consumption)*1:
Product with both poles detection
tCYCLE = 5.70 ms (IDD = 12.0 μA) typ.
t
t
CYCLE = 50.50 ms (IDD = 2.0 μA) typ.
CYCLE = 204.10 ms (IDD = 1.0 μA) typ.
Product with S pole or N pole detection
CYCLE = 6.05 ms (IDD = 6.0 μA) typ.
CYCLE = 50.85 ms (IDD = 1.4 μA) typ.
DD = 1.6 V to 3.5 V
Ta = −40°C to +85°C
t
t
• Power supply voltage range:
• Operation temperature range:
• Lead-free (Sn 100%), halogen-free
V
*1. The option can be selected.
Applications
• Mobile phone, smart phone
• Notebook PC, tablet PC
• Digital video camera
• Plaything, portable game
• Home appliance
Packages
• SOT-23-3
• SNT-4A
1
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
Block Diagrams
1. Nch open-drain output product
VDD
OUT
Sleep / Awake logic
*1
*1
Chopping
stabilized amplifier
VSS
*1. Parasitic diode
Figure 1
2. CMOS output product
VDD
*1
Sleep / Awake logic
*1
OUT
Chopping
*1
stabilized amplifier
VSS
*1. Parasitic diode
Figure 2
2
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
Rev.4.6_00
S-5712 Series
Product Name Structure
1. Product name
S-5712
x
x
x
x
x
-
xxxx
U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Package name (abbreviation) and packing specifications*1
M3T1: SOT-23-3, Tape
I4T1:
SNT-4A, Tape
Magnetic sensitivity
0:
1:
2:
BOP = 1.8 mT typ.
BOP = 3.0 mT typ.
BOP = 4.5 mT typ.
Detection logic for magnetism
L: Active "L"
H: Active "H"
Pole detection
D: Detection of both poles
S: Detection of S pole
N: Detection of N pole
Output form
N: Nch open-drain output
C: CMOS output
Operating cycle
A:
t
CYCLE = 50.50 ms typ.
(Product with both poles detection)
CYCLE = 50.85 ms typ.
(Product with S pole or N pole detection)
CYCLE = 204.10 ms typ.
(Product with both poles detection)
CYCLE = 5.70 ms typ.
(Product with both poles detection)
CYCLE = 6.05 ms typ.
(Product with S pole or N pole detection)
t
B:
C:
t
t
t
*1. Refer to the tape drawing.
2. Packages
Table 1 Package Drawing Codes
Package Name
Dimension
Tape
Reel
Land
−
SOT-23-3
SNT-4A
MP003-C-P-SD
PF004-A-P-SD
MP003-C-C-SD
PF004-A-C-SD
MP003-Z-R-SD
PF004-A-R-SD
PF004-A-L-SD
3
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
3. Product name list
3. 1 SOT-23-3
3. 1. 1 Nch open-drain output product
Table 2
Output Form
Operating Cycle
(tCYCLE
Detection Logic Magnetic Sensitivity
Product Name
Pole Detection
)
for Magnetism
Active "L"
Active "L"
Active "L"
Active "L"
Active "L"
Active "H"
Active "L"
(BOP)
S-5712ANDL0-M3T1U
S-5712ANDL1-M3T1U
S-5712ANDL2-M3T1U
S-5712ANSL1-M3T1U
S-5712ANSL2-M3T1U
S-5712ANSH1-M3T1U
S-5712BNDL2-M3T1U
50.50 ms typ.
50.50 ms typ.
50.50 ms typ.
50.85 ms typ.
50.85 ms typ.
50.85 ms typ.
Nch open-drain output Both poles
Nch open-drain output Both poles
Nch open-drain output Both poles
Nch open-drain output S pole
Nch open-drain output S pole
Nch open-drain output S pole
1.8 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
204.10 ms typ. Nch open-drain output Both poles
Remark Please contact our sales office for products other than the above.
3. 1. 2 CMOS output product
Table 3
Operating Cycle
Detection Logic Magnetic Sensitivity
Product Name
Output Form
CMOS output
Pole Detection
(tCYCLE
)
for Magnetism
Active "L"
Active "L"
Active "H"
Active "H"
Active "L"
Active "L"
Active "L"
Active "L"
Active "L"
Active "L"
(BOP)
S-5712ACDL1-M3T1U
S-5712ACDL2-M3T1U
S-5712ACDH1-M3T1U
S-5712ACDH2-M3T1U
S-5712ACSL1-M3T1U
S-5712ACSL2-M3T1U
S-5712ACNL1-M3T1U
S-5712ACNL2-M3T1U
S-5712CCDL1-M3T1U
S-5712CCSL1-M3T1U
50.50 ms typ.
50.50 ms typ.
50.50 ms typ.
50.50 ms typ.
50.85 ms typ.
50.85 ms typ.
50.85 ms typ.
50.85 ms typ.
5.70 ms typ.
6.05 ms typ.
Both poles
Both poles
Both poles
Both poles
S pole
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
3.0 mT typ.
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
S pole
N pole
N pole
Both poles
S pole
Remark Please contact our sales office for products other than the above.
4
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
Rev.4.6_00
S-5712 Series
3. 2 SNT-4A
3. 2. 1 Nch open-drain output product
Table 4
Output Form
Operating Cycle
Detection Logic Magnetic Sensitivity
Product Name
Pole Detection
(tCYCLE
)
for Magnetism
Active "L"
(BOP)
S-5712ANDL1-I4T1U
S-5712ANDL2-I4T1U
S-5712ANSL1-I4T1U
S-5712ANSL2-I4T1U
50.50 ms typ.
50.50 ms typ.
50.85 ms typ.
50.85 ms typ.
Nch open-drain output Both poles
Nch open-drain output Both poles
Nch open-drain output S pole
Nch open-drain output S pole
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
Active "L"
Active "L"
Active "L"
Remark Please contact our sales office for products other than the above.
3. 2. 2 CMOS output product
Table 5
Operating Cycle
Detection Logic Magnetic Sensitivity
(BOP
Product Name
Output Form
CMOS output
Pole Detection
(tCYCLE
)
for Magnetism
Active "L"
Active "L"
Active "L"
Active "H"
Active "H"
Active "L"
Active "L"
Active "H"
Active "H"
Active "L"
Active "L"
Active "H"
Active "L"
Active "L"
Active "H"
Active "H"
Active "L"
Active "H"
Active "L"
Active "L"
)
S-5712ACDL0-I4T1U
S-5712ACDL1-I4T1U
S-5712ACDL2-I4T1U
S-5712ACDH1-I4T1U
S-5712ACDH2-I4T1U
S-5712ACSL1-I4T1U
S-5712ACSL2-I4T1U
S-5712ACSH1-I4T1U
S-5712ACSH2-I4T1U
S-5712ACNL1-I4T1U
S-5712ACNL2-I4T1U
S-5712ACNH1-I4T1U
S-5712BCDL1-I4T1U
S-5712BCDL2-I4T1U
S-5712BCDH1-I4T1U
S-5712BCDH2-I4T1U
S-5712CCDL1-I4T1U
S-5712CCDH1-I4T1U
S-5712CCSL1-I4T1U
S-5712CCNL1-I4T1U
50.50 ms typ.
50.50 ms typ.
50.50 ms typ.
50.50 ms typ.
50.50 ms typ.
50.85 ms typ.
50.85 ms typ.
50.85 ms typ.
50.85 ms typ.
50.85 ms typ.
50.85 ms typ.
50.85 ms typ.
204.10 ms typ.
204.10 ms typ.
204.10 ms typ.
204.10 ms typ.
5.70 ms typ.
Both poles
Both poles
Both poles
Both poles
Both poles
S pole
1.8 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
4.5 mT typ.
3.0 mT typ.
3.0 mT typ.
3.0 mT typ.
3.0 mT typ.
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
CMOS output
S pole
S pole
S pole
N pole
N pole
N pole
Both poles
Both poles
Both poles
Both poles
Both poles
Both poles
S pole
5.70 ms typ.
6.05 ms typ.
6.05 ms typ.
N pole
Remark Please contact our sales office for products other than the above.
5
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
Pin Configurations
1. SOT-23-3
Table 6
Top view
1
Pin No.
Symbol
VSS
Pin Description
1
2
3
GND pin
VDD
OUT
Power supply pin
Output pin
2
3
Figure 3
2. SNT-4A
Top view
Table 7
Pin No.
Symbol
Pin Description
1
2
4
3
1
2
3
4
VDD
VSS
NC*1
OUT
Power supply pin
GND pin
Figure 4
No connection
Output pin
*1. The NC pin is electrically open.
The NC pin can be connected to the VDD pin or the VSS pin.
6
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
Rev.4.6_00
S-5712 Series
Absolute Maximum Ratings
Table 8
(Ta = +25°C unless otherwise specified)
Item
Power supply voltage
Output current
Symbol
VDD
Absolute Maximum Rating
Unit
V
VSS − 0.3 to VSS + 7.0
1.0
IOUT
mA
V
Nch open-drain output product
CMOS output product
VSS − 0.3 to VSS + 7.0
VSS − 0.3 to VDD + 0.3
−40 to +85
Output voltage
VOUT
V
Operation ambient temperature
Storage temperature
Topr
Tstg
°C
°C
−40 to +125
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Thermal Resistance Value
Table 9
Item
Symbol
Condition
Board 1
Min.
Typ.
200
165
300
242
Max.
Unit
−
−
−
−
−
−
−
−
°C/W
°C/W
°C/W
°C/W
SOT-23-3
SNT-4A
Board 2
Board 1
Board 2
Junction-to-ambient thermal resistance*1 θja
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark Refer to " Thermal Characteristics" for details of power dissipation and test board.
7
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
Electrical Characteristics
1. Product with both poles detection
1. 1 S-5712AxDxx
Table 10
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Test
Circuit
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Power supply voltage VDD
Current consumption IDD
−
1.60
1.85
2.0
3.50
4.0
V
−
1
Average value
Nch open-drain
output product
−
μA
Output transistor Nch,
OUT = 0.5 mA
Output transistor Nch,
OUT = 0.5 mA
Output transistor Pch,
OUT = −0.5 mA
−
−
−
−
−
−
0.4
0.4
−
V
2
2
3
4
I
Output voltage
VOUT
V
I
CMOS output
product
VDD
−
V
I
0.4
Nch open-drain output product
Output transistor Nch, VOUT = 3.5 V
Leakage current
ILEAK
tAW
tSL
−
1
μA
Awake mode time
Sleep mode time
Operating cycle
−
−
−
−
−
0.10
50.40
50.50
−
−
ms
ms
ms
−
−
−
tCYCLE tAW + tSL
100.00
1. 2 S-5712BxDxx
Table 11
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Test
Circuit
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Power supply voltage VDD
Current consumption IDD
−
1.60
1.85
1.0
3.50
2.0
V
−
1
Average value
Nch open-drain
output product
−
μA
Output transistor Nch,
OUT = 0.5 mA
Output transistor Nch,
OUT = 0.5 mA
Output transistor Pch,
OUT = −0.5 mA
−
−
−
−
−
−
0.4
0.4
−
V
2
2
3
4
I
Output voltage
VOUT
V
I
CMOS output
product
VDD
−
V
I
0.4
Nch open-drain output product
Output transistor Nch, VOUT = 3.5 V
Leakage current
ILEAK
tAW
tSL
tCYCLE tAW + tSL
−
1
μA
Awake mode time
Sleep mode time
Operating cycle
−
−
−
−
−
0.10
−
−
ms
ms
ms
−
−
−
204.00
204.10 400.00
8
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
1. 3 S-5712CxDxx
Table 12
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Test
Circuit
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Power supply voltage VDD
Current consumption IDD
−
1.60
1.85
12.0
3.50
22.0
V
−
1
Average value
Nch open-drain
output product
−
μA
Output transistor Nch,
OUT = 0.5 mA
Output transistor Nch,
OUT = 0.5 mA
Output transistor Pch,
OUT = −0.5 mA
−
−
−
−
−
−
0.4
0.4
−
V
2
2
3
4
I
Output voltage
VOUT
V
I
CMOS output
product
VDD
−
V
I
0.4
Nch open-drain output product
Output transistor Nch, VOUT = 3.5 V
Leakage current
ILEAK
tAW
tSL
tCYCLE tAW + tSL
−
1
μA
Awake mode time
Sleep mode time
Operating cycle
−
−
−
−
−
0.10
5.60
5.70
−
−
ms
ms
ms
−
−
−
12.00
9
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
2. Product with S pole and N pole detection
2. 1 S-5712AxSxx, S-5712AxNxx
Table 13
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Test
Circuit
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Power supply voltage VDD
Current consumption IDD
−
1.60
1.85
1.4
3.50
3.0
V
−
1
Average value
−
μA
Nch open-drain Output transistor Nch,
−
−
−
−
−
−
0.4
0.4
−
V
2
2
3
4
output product
I
OUT = 0.5 mA
Output transistor Nch,
OUT = 0.5 mA
Output transistor Pch,
OUT = −0.5 mA
Output voltage
VOUT
V
I
CMOS output
product
VDD
0.4
−
V
I
Nch open-drain output product
Leakage current
ILEAK
tAW
tSL
tCYCLE tAW + tSL
−
1
μA
Output transistor Nch, VOUT = 3.5 V
Awake mode time
Sleep mode time
Operating cycle
−
−
−
−
−
0.05
50.80
50.85
−
−
ms
ms
ms
−
−
−
100.00
2. 2 S-5712CxSxx, S-5712CxNxx
Table 14
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Test
Circuit
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Power supply voltage VDD
Current consumption IDD
−
1.60
1.85
6.0
3.50
11.0
V
−
1
Average value
−
μA
Nch open-drain Output transistor Nch,
−
−
−
−
−
−
0.4
0.4
−
V
2
2
3
4
output product
I
OUT = 0.5 mA
Output transistor Nch,
OUT = 0.5 mA
Output transistor Pch,
OUT = −0.5 mA
Output voltage
VOUT
V
I
CMOS output
product
VDD
0.4
−
V
I
Nch open-drain output product
Leakage current
ILEAK
tAW
tSL
tCYCLE tAW + tSL
−
1
μA
Output transistor Nch, VOUT = 3.5 V
Awake mode time
Sleep mode time
Operating cycle
−
−
−
−
−
0.05
6.00
6.05
−
−
ms
ms
ms
−
−
−
12.00
10
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
Rev.4.6_00
S-5712 Series
Magnetic Characteristics
1. Product with both poles detection
1. 1 Product with BOP = 1.8 mT typ.
Table 15
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item
Symbol
BOPS
Condition
Min.
0.6
−3.0
0.1
−2.4
−
Typ.
1.8
Max.
3.0
−0.6
2.4
−0.1
−
Unit
mT
mT
mT
mT
mT
mT
Test Circuit
S pole
N pole
S pole
N pole
S pole
N pole
−
−
−
−
5
5
5
5
5
5
Operation point*1
BOPN
−1.8
1.1
BRPS
Release point*2
BRPN
−1.1
0.7
BHYSS
BHYSN
BHYSS = BOPS − BRPS
BHYSN = |BOPN − BRPN
Hysteresis width*3
|
−
0.7
−
1.2 Product with BOP = 3.0 mT typ.
Table 16
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item
Symbol
BOPS
Condition
Min.
1.4
−4.0
1.1
−3.7
−
Typ.
3.0
Max.
4.0
−1.4
3.7
−1.1
−
Unit
mT
mT
mT
mT
mT
mT
Test Circuit
S pole
N pole
S pole
N pole
S pole
N pole
−
−
−
−
5
5
5
5
5
5
Operation point*1
BOPN
−3.0
2.2
BRPS
Release point*2
BRPN
−2.2
0.8
BHYSS
BHYSN
BHYSS = BOPS − BRPS
BHYSN = |BOPN − BRPN
Hysteresis width*3
|
−
0.8
−
1. 3 Product with BOP = 4.5 mT typ.
Table 17
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item
Symbol
BOPS
Condition
Min.
2.5
−6.0
2.0
−5.5
−
Typ.
4.5
Max.
6.0
−2.5
5.5
−2.0
−
Unit
mT
mT
mT
mT
mT
mT
Test Circuit
S pole
N pole
S pole
N pole
S pole
N pole
−
−
−
−
5
5
5
5
5
5
Operation point*1
BOPN
−4.5
3.5
BRPS
Release point*2
BRPN
−3.5
1.0
BHYSS
BHYSN
BHYSS = BOPS − BRPS
BHYSN = |BOPN − BRPN
Hysteresis width*3
|
−
1.0
−
11
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
2. Product with S pole detection
2. 1 Product with BOP = 1.8 mT typ.
Table 18
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item
Symbol
BOPS
Condition
Min.
0.6
0.1
−
Typ.
1.8
1.1
0.7
Max.
3.0
2.4
−
Unit
mT
mT
mT
Test Circuit
Operation point*1
S pole
S pole
S pole
−
−
5
5
5
Release point*2
Hysteresis width*3
BRPS
BHYSS
BHYSS = BOPS − BRPS
2. 2 Product with BOP = 3.0 mT typ.
Table 19
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item
Symbol
BOPS
Condition
Min.
1.4
1.1
−
Typ.
3.0
2.2
0.8
Max.
4.0
3.7
−
Unit
mT
mT
mT
Test Circuit
Operation point*1
S pole
S pole
S pole
−
−
5
5
5
Release point*2
Hysteresis width*3
BRPS
BHYSS
BHYSS = BOPS − BRPS
2. 3 Product with BOP = 4.5 mT typ.
Table 20
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item
Symbol
BOPS
Condition
Min.
2.5
2.0
−
Typ.
4.5
3.5
1.0
Max.
6.0
5.5
−
Unit
mT
mT
mT
Test Circuit
Operation point*1
S pole
S pole
S pole
−
−
5
5
5
Release point*2
Hysteresis width*3
BRPS
BHYSS
BHYSS = BOPS − BRPS
12
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
Rev.4.6_00
S-5712 Series
3. Product with N pole detection
3. 1 Product with BOP = 1.8 mT typ.
Table 21
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item
Symbol
BOPN
Condition
Min.
−3.0
−2.4
−
Typ.
−1.8
−1.1
0.7
Max.
−0.6
−0.1
−
Unit
mT
mT
mT
Test Circuit
Operation point*1
N pole
N pole
N pole
−
−
5
5
5
Release point*2
Hysteresis width*3
BRPN
BHYSN
BHYSN = |BOPN − BRPN|
3. 2 Product with BOP = 3.0 mT typ.
Table 22
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item
Symbol
BOPN
Condition
Min.
−4.0
−3.7
−
Typ.
−3.0
−2.2
0.8
Max.
−1.4
−1.1
−
Unit
mT
mT
mT
Test Circuit
Operation point*1
N pole
N pole
N pole
−
−
5
5
5
Release point*2
Hysteresis width*3
BRPN
BHYSN
BHYSN = |BOPN − BRPN|
3. 3 Product with BOP = 4.5 mT typ.
Table 23
(Ta = +25°C, VDD = 1.85 V, VSS = 0 V unless otherwise specified)
Item
Symbol
BOPN
Condition
Min.
−6.0
−5.5
−
Typ.
−4.5
−3.5
1.0
Max.
−2.5
−2.0
−
Unit
mT
mT
mT
Test Circuit
Operation point*1
N pole
N pole
N pole
−
−
5
5
5
Release point*2
Hysteresis width*3
BRPN
BHYSN
BHYSN = |BOPN − BRPN|
*1. BOPN, BOPS: Operation points
BOPN and BOPS are the values of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux
density applied to this IC by the magnet (N pole or S pole) is increased (by moving the magnet closer).
Even when the magnetic flux density exceeds BOPN or BOPS, VOUT retains the status.
*2. BRPN, BRPS: Release points
BRPN and BRPS are the values of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux
density applied to this IC by the magnet (N pole or S pole) is decreased (the magnet is moved further away).
Even when the magnetic flux density falls below BRPN or BRPS, VOUT retains the status.
*3. BHYSN, BHYSS: Hysteresis widths
BHYSN and BHYSS are the difference between BOPN and BRPN, and BOPS and BRPS, respectively.
Remark The unit of magnetic density mT can be converted by using the formula 1 mT = 10 Gauss.
13
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
Test Circuits
A
R*1
100 kΩ
VDD
S-5712
OUT
Series
VSS
*1. Resistor (R) is unnecessary for the CMOS output product.
Figure 5 Test Circuit 1
VDD
S-5712
Series
VSS
A
OUT
V
Figure 6 Test Circuit 2
VDD
S-5712
Series
A
OUT
VSS
V
Figure 7 Test Circuit 3
14
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
VDD
S-5712
A
OUT
Series
VSS
V
Figure 8 Test Circuit 4
R*1
100 kΩ
VDD
S-5712
Series
OUT
VSS
V
*1. Resistor (R) is unnecessary for the CMOS output product.
Figure 9 Test Circuit 5
15
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
Standard Circuit
R*1
100 k
Ω
VDD
S-5712
OUT
Series
CIN
0.1
μ
F
VSS
*1. Resistor (R) is unnecessary for the CMOS output product.
Figure 10
Caution The above connection diagram and constant will not guarantee successful operation. Perform
thorough evaluation using the actual application to set the constant.
16
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
Rev.4.6_00
S-5712 Series
Operation
1. Direction of applied magnetic flux
This IC detects the flux density which is vertical to the marking surface.
In the product with both poles detection, the output voltage (VOUT) is inverted when the S pole or N pole is moved closer
to the marking surface.
In the product with S pole detection, VOUT is inverted when the S pole is moved closer to the marking surface.
In the product with N pole detection, VOUT is inverted when the N pole is moved closer to the marking surface.
Figure 11 and Figure 12 show the direction in which magnetic flux is being applied.
1. 1 SOT-23-3
1. 2 SNT-4A
N
S
N
S
Marking surface
Marking surface
Figure 11
Figure 12
2. Position of Hall sensor
Figure 13 and Figure 14 show the position of Hall sensor.
The center of this Hall sensor is located in the area indicated by a circle, which is in the center of a package as
described below.
The following also shows the distance (typ. value) between the marking surface and the chip surface of a package.
2. 1 SOT-23-3
2. 2 SNT-4A
Top view
Top view
1
The center of Hall sensor;
in this φ 0.3 mm
The center of Hall sensor;
in this φ 0.3 mm
1
2
4
3
2
3
0.16 mm typ.
0.7 mm typ.
Figure 13
Figure 14
17
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
3. Basic operation
This IC changes the output voltage level (VOUT) according to the level of the magnetic flux density (N pole or S pole)
applied by a magnet.
The following explains the operation when the magnetism detection logic is active "L".
3. 1 Product with both poles detection
When the magnetic flux density vertical to the marking surface exceeds the operation point (BOPN or BOPS) after
the S pole or N pole of a magnet is moved closer to the marking surface of this IC, VOUT changes from "H" to "L".
When the S pole or N pole of a magnet is moved further away from the marking surface of this IC and the
magnetic flux density is lower than the release point (BRPN or BRPS), VOUT changes from "L" to "H".
Figure 15 shows the relationship between the magnetic flux density and VOUT
.
VOUT
BHYSN
BHYSS
H
L
S pole
N pole
BOPN BRPN
0
BRPS
BOPS
Magnetic flux density (B)
Figure 15
3. 2 Product with S pole detection
When the magnetic flux density vertical to the marking surface exceeds BOPS after the S pole of a magnet is
moved closer to the marking surface of this IC, VOUT changes from "H" to "L". When the S pole of a magnet is
moved further away from the marking surface of this IC and the magnetic flux density is lower than BRPS, VOUT
changes from "L" to "H".
Figure 16 shows the relationship between the magnetic flux density and VOUT
.
VOUT
BHYSS
H
L
S pole
N pole
0
BRPS
BOPS
Magnetic flux density (B)
Figure 16
18
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
Rev.4.6_00
S-5712 Series
3. 3
Product with N pole detection
When the magnetic flux density vertical to the marking surface exceeds BOPN after the N pole of a magnet is
moved closer to the marking surface of this IC, VOUT changes from "H" to "L". When the N pole of a magnet is
moved further away from the marking surface of this IC and the magnetic flux density is lower than BRPN, VOUT
changes from "L" to "H".
Figure 17 shows the relationship between the magnetic flux density and VOUT
.
VOUT
BHYSN
H
L
S pole
N pole
BOPN BRPN
0
Magnetic flux density (B)
Figure 17
19
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
Precautions
• If the impedance of the power supply is high, the IC may malfunction due to a supply voltage drop caused by feed-
through current. Take care with the pattern wiring to ensure that the impedance of the power supply is low.
• Note that the IC may malfunction if the power supply voltage rapidly changes.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• Large stress on this IC may affect on the magnetic characteristics. Avoid large stress which is caused by bend and
distortion during mounting the IC on a board or handle after mounting.
• SII Semiconductor Corporation claims no responsibility for any disputes arising out of or in connection with any
infringement by products including this IC of patents owned by a third party.
20
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
Rev.4.6_00
S-5712 Series
Thermal Characteristics
1. SOT-23-3
Tj = +125°C max.
1.0
0.8
0.6
0.4
0.2
0
Board 2
0.61 W
Board 1
0.50 W
0
50
100
150
Ambient temperature (Ta) [C]
Figure 18 Power Dissipation of Package (When Mounted on Board)
1. 1 Board 1*1
76.2 mm
Table 24
Item
Specification
Thermal resistance value
(θja)
200°C/W
Size
114.3 mm × 76.2 mm × t1.6 mm
Material
FR-4
Number of copper foil layer 2
1
Land pattern and wiring for testing: t0.070 mm
2
−
−
Copper foil layer
3
4
74.2 mm × 74.2 mm × t0.070 mm
Thermal via
−
Figure 19
1. 2 Board 2*1
76.2 mm
Table 25
Specification
165°C/W
Item
Thermal resistance value
(θja)
Size
114.3 mm × 76.2 mm × t1.6 mm
Material
FR-4
Number of copper foil layer 4
1
Land pattern and wiring for testing: t0.070 mm
74.2 mm × 74.2 mm × t0.035 mm
74.2 mm × 74.2 mm × t0.035 mm
74.2 mm × 74.2 mm × t0.070 mm
−
2
Copper foil layer
3
4
Thermal via
Figure 20
*1. The board is same in SOT-23-3, SOT-23-5 and SOT-23-6.
21
LOW VOLTAGE OPERATION BOTH POLES / UNIPOLAR DETECTION TYPE HALL IC
S-5712 Series
Rev.4.6_00
2. SNT-4A
Tj = +125°C max.
1.0
0.8
0.6
0.4
0.2
0
Board 2
0.41 W
Board 1
0.33 W
0
50
100
150
Ambient temperature (Ta) [C]
Figure 21 Power Dissipation of Package (When Mounted on Board)
2. 1 Board 1
76.2 mm
Table 26
Item
Specification
Thermal resistance value
(θja)
300°C/W
Size
114.3 mm × 76.2 mm × t1.6 mm
Material
FR-4
Number of copper foil layer 2
1
Land pattern and wiring for testing: t0.070 mm
2
−
−
Copper foil layer
3
4
74.2 mm × 74.2 mm × t0.070 mm
Thermal via
−
Figure 22
2. 2 Board 2
76.2 mm
Table 27
Specification
242°C/W
Item
Thermal resistance value
(θja)
Size
114.3 mm × 76.2 mm × t1.6 mm
Material
FR-4
Number of copper foil layer 4
1
Land pattern and wiring for testing: t0.070 mm
74.2 mm × 74.2 mm × t0.035 mm
74.2 mm × 74.2 mm × t0.035 mm
74.2 mm × 74.2 mm × t0.070 mm
−
2
Copper foil layer
3
4
Thermal via
Figure 23
22
2.9±0.2
1
2
3
+0.1
-0.06
0.16
0.95±0.1
1.9±0.2
0.4±0.1
No. MP003-C-P-SD-1.1
SOT233-C-PKG Dimensions
MP003-C-P-SD-1.1
TITLE
No.
ANGLE
UNIT
mm
SII Semiconductor Corporation
+0.1
-0
4.0±0.1
2.0±0.1
ø1.5
0.23±0.1
1.4±0.2
+0.25
ø1.0
-0
4.0±0.1
3.2±0.2
1
2
3
Feed direction
No. MP003-C-C-SD-2.0
TITLE
SOT233-C-Carrier Tape
MP003-C-C-SD-2.0
No.
ANGLE
UNIT
mm
SII Semiconductor Corporation
12.5max.
9.2±0.5
Enlarged drawing in the central part
ø13±0.2
No. MP003-Z-R-SD-1.0
SOT233-C-Reel
MP003-Z-R-SD-1.0
TITLE
No.
3,000
QTY.
ANGLE
UNIT
mm
SII Semiconductor Corporation
1.2±0.04
3
4
+0.05
-0.02
0.08
2
1
0.65
0.48±0.02
0.2±0.05
No. PF004-A-P-SD-6.0
TITLE
SNT-4A-A-PKG Dimensions
PF004-A-P-SD-6.0
No.
ANGLE
UNIT
mm
SII Semiconductor Corporation
+0.1
-0
ø1.5
4.0±0.1
2.0±0.05
0.25±0.05
+0.1
ø0.5
-0
4.0±0.1
0.65±0.05
1.45±0.1
5°
2
3
1
4
Feed direction
No. PF004-A-C-SD-1.0
TITLE
SNT-4A-A-Carrier Tape
PF004-A-C-SD-1.0
No.
ANGLE
UNIT
mm
SII Semiconductor Corporation
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PF004-A-R-SD-1.0
SNT-4A-A-Reel
TITLE
No.
PF004-A-R-SD-1.0
QTY.
5,000
ANGLE
UNIT
mm
SII Semiconductor Corporation
0.52
2
1.16
0.52
1
0.3
0.35
1.
2.
(0.25 mm min. / 0.30 mm typ.)
(1.10 mm ~ 1.20 mm)
0.03 mm
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.10 mm to 1.20 mm).
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
(0.25 mm min. / 0.30 mm typ.)
(1.10 mm ~ 1.20 mm)
1.
2.
SNT-4A-A
-Land Recommendation
TITLE
No.
PF004-A-L-SD-4.1
ANGLE
UNIT
No. PF004-A-L-SD-4.1
mm
SII Semiconductor Corporation
Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
SII Semiconductor Corporation is not responsible for damages caused by the reasons other than the products or
infringement of third-party intellectual property rights and any other rights due to the use of the information described
herein.
3. SII Semiconductor Corporation is not responsible for damages caused by the incorrect information described herein.
4. Take care to use the products described herein within their specified ranges. Pay special attention to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
SII Semiconductor Corporation is not responsible for damages caused by failures and/or accidents, etc. that occur
due to the use of products outside their specified ranges.
5. When using the products described herein, confirm their applications, and the laws and regulations of the region or
country where they are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products described herein, comply with the Foreign Exchange and Foreign Trade Act and all
other export-related laws, and follow the required procedures.
7. The products described herein must not be used or provided (exported) for the purposes of the development of
weapons of mass destruction or military use. SII Semiconductor Corporation is not responsible for any provision
(export) to those whose purpose is to develop, manufacture, use or store nuclear, biological or chemical weapons,
missiles, or other military use.
8. The products described herein are not designed to be used as part of any device or equipment that may affect the
human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems,
combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment,
aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle
use or other uses. Do not use those products without the prior written permission of SII Semiconductor Corporation.
Especially, the products described herein cannot be used for life support devices, devices implanted in the human
body and devices that directly affect human life, etc.
Prior consultation with our sales office is required when considering the above uses.
SII Semiconductor Corporation is not responsible for damages caused by unauthorized or unspecified use of our
products.
9. Semiconductor products may fail or malfunction with some probability.
The user of these products should therefore take responsibility to give thorough consideration to safety design
including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing
injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction.
The entire system must be sufficiently evaluated and applied on customer's own responsibility.
10. The products described herein are not designed to be radiation-proof. The necessary radiation measures should be
taken in the product design by the customer depending on the intended use.
11. The products described herein do not affect human health under normal use. However, they contain chemical
substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips
may be sharp. Take care when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products described herein, comply with the laws and ordinances of the country or region where
they are used.
13. The information described herein contains copyright information and know-how of SII Semiconductor Corporation.
The information described herein does not convey any license under any intellectual property rights or any other
rights belonging to SII Semiconductor Corporation or a third party. Reproduction or copying of the information
described herein for the purpose of disclosing it to a third-party without the express permission of SII Semiconductor
Corporation is strictly prohibited.
14. For more details on the information described herein, contact our sales office.
1.0-2016.01
www.sii-ic.com
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