500DBAA200M000ACFR [SILICON]

LVPECL Output Clock Oscillator, 0.9MHz Min, 200MHz Max, 200MHz Nom;


型号：	500DBAA200M000ACFR
厂家：	SILICON
描述：	LVPECL Output Clock Oscillator, 0.9MHz Min, 200MHz Max, 200MHz Nom 振荡器
文件：	总6页 (文件大小：72K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Si500D

DIFFERENTIAL OUTPUT SILICON OSCILLATOR

Features



Quartz-free, MEMS-free, and PLL-free all-silicon

oscillator

Any output frequencies from 0.9 to 200 MHz

Short lead times

Excellent temperature stability (±20 ppm)

Highly reliable startup and operation

High immunity to shock and vibration

Low jitter: <1.5 ps

0 to 85 °C operation includes 10-year aging in hot

environments



Footprint compatible with industry-

standard 3.2 x 5.0 mm XOs

CMOS and SSTL versions available

Driver stopped, tri-state, or powerdown

operation

RoHS compliant

1.8, 2.5, or 3.3 V options

Low power



More than 10x better fit rate than

competing crystal solutions

Specifications

Parameters

Condition

Min

Typ

Max

Units

Frequency Range

0.9

—

200

MHz

Temperature stability,

0 to +70 °C

—

±10

—

ppm

Temperature stability,

0 to +85 °C

±20

—

Frequency Stability

Total stability,

0 to +70 °C operation

±150

±250

Total stability,

0 to +85 °C operation

—

Operating Temperature

Storage Temperature

—

+85

+125

1.98

2.75

3.63

36.0

22.2

16.5

29.3

°C

–55

1.71

2.25

2.97

—

1.8 V option

2.5 V option

3.3 V option

LVPECL

—

Supply Voltage

—

34.0

19.3

14.9

25.3

Low Power LVPECL

LVDS

—

HCSL

—

Differential CMOS(3.3 V option,

10 pF on each output, 200 MHz)

—

Supply Current

Differential CMOS(3.3 V option,

1 pFon each output, 40 MHz)

Differential SSTL-3.3

Differential SSTL-2.5

Differential SSTL-1.8

Tri-State

—

24.5

24.3

22.2

9.7

27.7

26.7

10.7

1.9

Powerdown

1.0

Notes:

1. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,

first-year aging at 25 °C, shock, vibration, and one solder reflow.

2. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,

ten-year aging at 85 °C, shock, vibration, and one solder reflow.

3. See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding

output clock termination recommendations.

4. V_TT= .5 x V_DD

5. V_TT= .45 x V_DD

Rev. 1.0 5/11

Si500D

Parameters

Output Symmetry

Condition

= 0

Min

Typ

—

Max

54 + 13 ns/T

460

Units

46 – 13 ns/T

DIFF

CLK

LVPECL/LVDS

HCSL/Differential SSTL

Differential CMOS, 15 pF, >80 MHz

Mid-level

—

Rise and Fall Times (20/80%)

—

800

1.1

—

1.6

– 1.5

– 1.34

LVPECL Output Option

(DC coupling, 50  to V – 2.0 V)

Diff swing

.720

—

.880

Low Power LVPECL Output Option

Mid-level

—

N/A

—

(AC coupling, 100  Differential

Load)

Diff swing

.68

—

.95

Mid-level

Diff swing

1.15

0.25

0.85

0.25

0.35

0.65

—

1.26

0.45

0.96

0.45

0.425

0.82

LVDS Output Option (2.5/3.3 V)

= 100  diff)

TERM

Mid-level

LVDS Output Option (1.8 V)

= 100  diff)

Diff swing

TERM

Mid-level

HCSL Output Option

Diff swing

DC termination per pad



, sourcing 9 mA

– 0.6

—

CMOS Output Voltage

, sinking 9 mA

—

0.6

+ 0.375

—

SSTL-1.8 Output Voltage

SSTL-2.5 Output Voltage

SSTL-3.3 Output Voltage

Powerup Time

– 0.375

—

+ 0.48

—

– 0.48

—

+ 0.48

—

– 0.48

From time V crosses min spec

—

supply

OE Deassertion to Clk Stop

250 + 3 x T

CLK

Return from Output Driver Stopped

Mode

Return From Tri-State Time

—

12 + 3 x T

µs

Return From Powerdown Time

RMS

Non-CMOS

—

Period Jitter (1-sigma)

RMS

CMOS, C = 7 pF

1.0 MHz – min(20 MHz,

RMS

0.6

0.7

0.4 x F

),non-CMOS

OUT

Integrated Phase Jitter

1.0 MHz – min(20 MHz,

0.4 x F ),CMOS format

RMS

1.5

OUT

Notes:

1. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,

first-year aging at 25 °C, shock, vibration, and one solder reflow.

2. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,

ten-year aging at 85 °C, shock, vibration, and one solder reflow.

3. See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding

output clock termination recommendations.

4. V_TT= .5 x V_DD

5. V_TT= .45 x V_DD

Rev. 1.0

Si500D

Package Specifications

Table 1. Package Diagram Dimensions (mm)

Dimension

Min

0.80

Nom

0.85

0.03

0.64

Max

0.90

0.05

0.69

Dimension

Min

0.00

—

Nom

0.05

—

Max

0.10

0.08

0.00

aaa

bbb

ccc

0.59

—

3.20 BSC.

—

1.27 BSC.

4.00 BSC.

0.95

ddd

eee

—

0.10

0.05

1.00

1.05

Table 2. Pad Connections

Table 3. Tri-State/Powerdown/Driver Stopped

Function on OE (3rd Option Code)

NC—Make no external

connection to this pin

Open Active Active Active Active Active

Active

GND

Output

Tri-

State

Power-

down

Driver

Stopped

Active

Level

Tri-

State

Power-

down

Driver

Stopped

Complementary Output

VDD

Active

Level

0 C CC CC

T T T T T T

Y YWW

Dimension

(mm)

2.70

1.27

0.75

1.55

0 = Si500

CCCCC = mark code

TTTTTT = assembly manufacturing code

YY = year

WW = work week

Figure 2. Top Mark

Figure 1. Recommended Land Pattern

Rev. 1.0

Si500D

Environmental Compliance

Parameter

Conditions/Test Method

MIL-STD-883, Method 2002.4

MIL-STD-883, Method 2007.3 A

MIL-STD-202, 260 C° for 8 seconds

MIL-STD-883, Method 2003.8

IEC 68-2-3

Mechanical Shock

Mechanical Vibration

Resistance to Soldering Heat

Solderability

Damp Heat

Moisture Sensitivity Level

J-STD-020, MSL 3

Ordering Information

The Si500D supports a variety of options including frequency, output format, supply voltage, and tri-

state/powerdown. Specific device configurations are programmed into the Si500D at time of shipment.

Configurations are specified using the figure below. Silicon Labs provides a web-based part number utility that can

be used to simplify part number configuration. Refer to www.silabs.com/SiliconXOPartnumber to access this tool.

The Si500D XO series is supplied in a ROHS-compliant, Pb-free, 6-pad, 3.2 x 4.0 mm package. Tape and reel

packaging is available as an ordering option.

500D

XXMXXXX

Frequency

Si500

Differential

Oscillator

R = Tape & Reel

Blank = Cut-Tape

xMxxxxx: f_OUT< 10 MHz

xxMxxxx: 10 MHz < f_OUT< 100 MHz

xxxMxxx: f_OUT> 100 MHz

1^stOption Code

V_DDFormat

LVPECL

3^rdOption Code

Oper. Temp Range

3.3

2.5

1.8

Tri-State/Powerdown/

Output Driver Stopped

0 to 70 °C

0 to 85 °C

Low Power LVPECL

LVDS

HCSL

Dual Output CMOS

Differential CMOS

Dual Output SSTL

Differential SSTL

LVPECL

Low Power LVPECL

LVDS

HCSL

Dual Output CMOS

Differential CMOS

Dual Output SSTL

Differential SSTL

LVDS

OE active high/tristate

OE active low/tristate

OE active high/powerdown

OE active low/powerdown

OE active high/driver stopped

OE active low/driver stopped

Product Revision = C

2^ndOption Code

Package

Stability (ppm, max)

3.2 x 4.0 mm SMD

±150

±250

HCSL

Dual Output CMOS

Differential CMOS

Dual Output SSTL

Differential SSTL

Rev. 1.0

Si500D

DOCUMENT CHANGE LIST

Revision 0.2 to Revision 0.3



Revision B to Revision C updated in Ordering Information

0 to 85 C° Operating Temperature Range option added

Revision 0.3 to Revision 1.0



Clarified SSTL specifications.

Revised Differential CMOS supply current values.

Clarified Differential CMOS supply current loading

conditions.

Rev. 1.0

Si500D

CONTACT INFORMATION

Silicon Laboratories Inc.

400 West Cesar Chavez

Austin, TX 78701

Tel: 1+(512) 416-8500

Fax: 1+(512) 416-9669

Toll Free: 1+(877) 444-3032

Please visit the Silicon Labs Technical Support web page

and register to submit a technical support request.

The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.

Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from

the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features

or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-

resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-

quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to

support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-

sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap-

plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.

Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.

Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.

Rev. 1.0

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