SI4835-B31_技术文档

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Si483X-B/Si4820/24 ANTENNA, SCHEMATIC, LAYOUT,

AND DESIGN GUIDELINES

1. Introduction

This document provides general Si483x-B/Si4820/24 design and AM/FM/SW antenna selection guidelines,

including schematic, BOM and PCB layout. All users should follow the Si483x-B/Si4820/24 design guidelines

presented in Section 2 and Section 3 and choose the appropriate antennas based on the applications and device

used according to Sections 4 through 8.

Table 1. Part Selection Guide

†Part

†General Description

Number

FM Receiver

Si4831-B30

Si4835-B30

Si4835-B31

Wheel-tuned AM/FM Receiver

†

Wheel-tuned AM/FM/SW Receiver

†

Wheel-tuned AM/FM/SW Receiver,

Enhanced SW Tuning Feel

Si4820-A10

Si4824-A10

Entry Level Wheel-tuned AM/FM

Receiver, Mono Audio

†

Entry Level Wheel-tuned AM/FM/SW

Receiver, Mono Audio

†

Rev. 0.2 11/11

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2. Frequency Band Definition and Selection

Five FM bands and five AM bands are defined for the Si4831-B/Si4820. The Si4835-B/Si4824 has 16 SW bands

available. In each FM band, the parts also offer two de-emphasis selections and two LED stereo separation

threshold selections, which result in a total of 41 combinations. This section shows the detailed band definition and

selection information.

2.1. Band Definition

For the Si483x-B/Si4820/24, the FM band definition is a combination of frequency range, de-emphasis and LED

stereo separation threshold. Customers should choose the band according to not only frequency range, but also

de-emphasis setting and LED stereo separation requirements. For AM and SW, simply choose the band according

to the frequency range desired.

Table 2. Band Sequence Definition

Band

Number

Band Name Band Frequency

Range

De-emphasis

Stereo LED on

Threshold

Total R to GND

(k, 1%)

(Only for Si483x-B)

Band1

Band2

Band3

Band4

Band5

Band6

Band7

Band8

Band9

Band10

Band11

Band12

Band13

Band14

FM1

FM2

FM3

FM4

87–108 MHz

50 µs

75 µs

50 µs

75 µs

50 µs

75 µs

50 µs

Separation = 6 dB,

RSSI = 20

47

57

Separation = 12 dB,

RSSI = 28

87–108 MHz

Separation = 6 dB,

RSSI = 20

67

87–108 MHz

Separation = 12 dB,

RSSI = 28

77

86.5–109 MHz

87.3–108.25 MHz

76–90 MHz

Separation = 6 dB,

RSSI = 20

87

Separation = 12 dB,

RSSI = 28

97

Separation = 6 dB,

RSSI = 20

107

117

127

137

147

157

167

177

Separation = 12 dB,

RSSI = 28

Separation = 6 dB,

RSSI = 20

Separation = 12 dB,

RSSI = 28

Separation = 6 dB,

RSSI = 20

Separation = 12 dB,

RSSI = 28

Separation = 6 dB,

RSSI = 20

76–90 MHz

Separation = 12 dB,

RSSI = 28

2

Rev. 0.2

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Table 2. Band Sequence Definition (Continued)

Band

Number

Band Name Band Frequency

Range

De-emphasis

Stereo LED on

Threshold

Total R to GND

(k, 1%)

(Only for Si483x-B)

Band15

Band16

Band17

Band18

Band19

Band20

FM4

FM5

76–90 MHz

64–87 MHz

75 µs

50 µs

75 µs

Separation = 6 dB,

RSSI = 20

187

197

207

217

227

237

Separation = 12 dB,

RSSI = 28

Separation = 6 dB,

RSSI = 20

Separation = 12 dB,

RSSI = 28

Separation = 6 dB,

RSSI = 20

Separation = 12 dB,

RSSI = 28

Band21

Band22

Band23

Band24

Band25

Band26

Band27

Band28

Band29

Band30

Band31

Band32

Band33

Band34

Band35

Band36

Band37

Band38

Band39

Band40

Band41

AM1

AM2

520–1710 kHz

522–1620 kHz

504–1665 kHz

520–1730 kHz

510–1750 kHz

5.6–6.4 MHz

247

257

267

277

287

297

307

317

327

337

347

357

367

377

387

397

407

417

427

437

447

AM3

AM4

AM5

SW1

SW2

SW3

SW4

SW5

SW6

SW7

SW8

SW9

SW10

SW11

SW12

SW13

SW14

SW15

SW16

5.95–6.2 MHz

6.8–7.6 MHz

7.1–7.6 MHz

9.2–10 MHz

9.2–9.9 MHz

11.45–12.25 MHz

11.6–12.2 MHz

13.4–14.2 MHz

13.57–13.87 MHz

15–15.9 MHz

15.1–15.8 MHz

17.1–18 MHz

17.48–17.9 MHz

21.2–22 MHz

21.45–21.85 MHz

Rev. 0.2

3

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2.2. Si483x-B/Si4820/24 Band Selection

Refer to Figure 1 below for the band selection circuits. Selecting a band determines the resistance value from the

band select pin to GND.

To select a specific band, you need to ensure two things:

1. Total value of resistance from the BAND to GND is equal to the value specified in Table 2

2. Total resistance from TUNE1 to GND is 500 k in 1% tolerance

The following sections describe some commonly used bands and their respective selection circuits.

2.2.1. Typical 12-band application

Figure 1 and Table 3 illustrate the band and resistor value details for a typical 12-band application.

4

Rev. 0.2

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TUNE1

R36

33k 1%

R43

30k 1%

SW15 (21.2MHz - 22MHz)

SW13 (17.1MHz - 18MHz)

R35

20k 1%

R15

20k 1%

SW11 (15MHz - 15.9MHz)

SW9 (13.4MHz - 14.2MHz)

R10

20k 1%

Si4835/24 only

R12

20k 1%

S2

SW7(11.45MHz - 12.25MHz)

1

2

BAND

R11

20k 1%

3

4

5

6

7

SW5(9.2MHz - 10.0MHz)

SW3(6.8MHz - 7.6MHz)

8

9

R14

20k 1%

10

11

12

13

R9

20k 1%

SW1 (5.6MHz - 6.4MHz)

AM1 (520kHz - 1710kHz)

R8

50k 1%

R7

20k 1%

FM5 (64MHz - 87MHz)

R28

40k 1%

FM4 (76MHz - 90MHz)

FM1 (87MHz - 108MHz)

R29

120k 1%

R33

20k 1%

R44

47k 1%

Figure 1. Typical 12-Band Selection Circuit

Rev. 0.2

5

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Table 3. Typical 12-Band Selection

Band

Number

Band

Name

Band Frequency

De-emphasis

Stereo LED on

Total R to GND

Range

Threshold

(k, 1%)

(Only for Si483x-B)

Band3

Band15

Band19

FM1

FM4

FM5

87–108 MHz

76–90 MHz

64–87 MHz

75 µs

Separation = 6 dB,

RSSI = 20

67

Separation = 6 dB,

RSSI = 20

187

227

Separation = 6 dB,

RSSI = 20

Band21

Band26

Band28

Band30

Band32

Band34

Band36

Band38

Band40

AM1

SW1

SW3

SW5

SW7

SW9

SW11

SW13

SW15

520–1710 kHz

5.6–6.4 MHz

247

297

317

337

357

377

397

417

437

6.8–7.6 MHz

9.2–10 MHz

11.45–12.25 MHz

13.4–14.2 MHz

15–15.9 MHz

17.1–18 MHz

21.2–22 MHz

6

Rev. 0.2

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2.2.2. Typical 2-band Application for Europe

Table 4 and Figure 2 show the band and resistor value details for a typical European 2-band application.

Table 4. Typical European 2-Band Selection

Band

Number

Band

Name

Band Frequency

Range

De-emphasis

Stereo LED on

Threshold

Total R to GND

(k, 1%)

(Only for Si483x-B)

Band2

FM1

AM2

87–108 MHz

50 µs

Separation = 12 dB,

RSSI = 28

57

Band22

522–1620 kHz

257

Figure 2. Typical 2-Band Selection Circuit for Europe

Rev. 0.2

7

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2.2.3. Typical 2-band application for US

Table 5 and Figure 3 show the band and resistor value details for a typical 2-band application for the U.S.

Table 5. Typical U.S. 2-Band Selection

Band

Number

Band

Name

Band Frequency

Range

De-emphasis

Stereo LED on

Threshold

Total R to GND

(k, 1%)

(Only for Si483x-B)

Band4

FM1

AM1

87–108 MHz

75 µs

Separation = 12 dB,

RSSI = 28

77

Band21

520–1710 kHz

247

Figure 3. Typical 2-Band Selection Circuit for US

8

Rev. 0.2

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3. Si483x-B/Si4820/24 SSOP Schematic and Layout

This section shows the typical schematic and layout required for optimal Si483x-B/Si4820/24 performance.

There are basically two working modes for the Si483x-B: “Volume” and “Bass/Treble” modes. Adding a pull-up

resistor of 10 k on pin2 STATION sets the chip in "Volume" mode and removing the pull-up resistor sets the chip in

"Bass/Treble" mode, as illustrated in Figure 4. When working in Bass/Treble mode, the Bass/Treble can be

controlled via two push buttons with eight levels or by a slide switch with two or three levels. When working in

“Volume” mode, tuner audio output volume can be adjusted with 2 push buttons in 32 steps (2 dB per step).

Additionally, the default power up volume level can be set with pull-up/down resistors. Compared with the Si483x-

B, Si4820/24 only works in “Volume” mode, not “Bass/Treble” mode. The following sections describe in detail the

applications circuits for different working modes.

Figure 4. Si483x-B Mode Selection

Rev. 0.2

9

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3.1. Si483x-B/Si4820/24 Basic Volume Mode Applications Circuits

Figure 5 and Figure 6 illustrate the basic applications circuits for typical 4-band FM/AM radios if using Si4831-B/

Si4820 or 12-band FM/AM/SW radios if using Si4835-B/Si4824. The chip works in "Volume" mode without internal

volume adjustment. Volume control can be performed at audio amplifier circuit stage. For Si483x-B, the pull-up

resistor R42 of 10K for pin 2 STATION is a must for this application.

C6 and C15 are required bypass capacitors for VDD1/VDD2 power supply pin 20/21. Place C6/C15 as close as

possible to the VDD1/VDD2 pin 20/21 and DBYP pin 22. These recommendations are made to reduce the size of

the current loop created by the bypass cap and routing, minimize bypass cap impedance and return all currents to

the DBYP pin.

Pin 22 is the dedicated bypass capacitor pin. Do not connect it to power supply GND on PCB.

Pin 13 and pin 14 are the GND of the chip, these pins must be well connected to the power supply GND on PCB.

Pin 9 is the RFGND of the chip, it must be well connected to the power supply GND on PCB.

When doing PCB layout, try to create a large GND plane underneath and around the chip. Route all GND

(including RFGND) pins to the GND plane.

C4 and/or C7 (4.7uF) are ac coupling caps for receiver analog audio output from pin 23 and/or pin 24. The input

resistance of the amplifier R, such as a headphone amplifier, and the capacitor C will set the high pass pole given

by Equation 1. Placement location is not critical.

1

---------------

f_c

=

2RC

Equation 1.

C2 and C3 (22 pF) are crystal loading caps required only when using the internal oscillator feature. Refer to the

crystal data sheet for the proper load capacitance and be certain to account for parasitic capacitance. Place caps

C2 and C3 such that they share a common GND connection and the current loop area of the crystal and loading

caps is minimized.

Y1 (32.768 kHz) is an optional crystal required only when using the internal oscillator feature. Place the crystal Y1

as close to XTALO pin 18 and XTALI pin 19 as possible to minimize current loops. If applying an external clock

(32.768 kHz) to XTALI, leave XTALO floating.

Do not route digital signals or reference clock traces near pin 6 and 7. Do not route Pin 6 and 7. These pins must

be left floating to guarantee proper operation.

Pin 16, 17 are volume control or bass/treble control pins for using tuner internal volume control function or bass/

treble control function. In this basic application circuit, the tuner internal volume control function is not used, just

connect the two pins to GND.

VR1 (100K / 10%), R27, C1, C13 constitute the tuning circuit. 10 k at 10% tolerance is recommended for VR1.

1P12T switch S2 together with resistor ladder constitute band select circuits. Si4831/Si4820 includes all AM and

FM bands as defined in above section 2.1, Si4835/Si4824 includes all AM, FM and SW bands.

Q1(2SC9018) together with it’s peripherals B6, C30,31,33,36, R31,32,34,41 is the LNA circuit for all SW bands, the

LNA is switched off by LNA_EN signal in AM and FM mode controlled by Si4835/Si4824.

For Si4820/24, do not route pin 23. This pin must be left floating to guarantee proper operation.

10

Rev. 0.2

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Figure 5. Si483x-B Basic Volume Mode Applications Circuit

Rev. 0.2

11

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[1]

TUNE1

R36

33k 1%

R43

30k 1%

ANT2

SW8 (21.2MHz - 22MHz)

SW7 (17.1MHz - 18MHz)

[1]

TUNE1

FM/SW

VR1

50k 10%

R35

20k 1%

C13 C1

47u 0.1u

VCC

R15

20k 1%

R27

C36

0.47u

100R

R32

10R

SW6 (15MHz - 15.9MHz)

SW5 (13.4MHz - 14.2MHz)

C34

33p

R10

20k 1%

L2

C31

33n

270nH

R31

1k

LNA_EN

[1]

C33

10p

C5

R12

20k 1%

R41

LNA_EN

[1]

120k

0.47u

S2

C30

SW4(11.45MHz - 12.25MHz)

B6

1

2

BAND

[1]

2.5k/100M

R11

20k 1%

3

33n

Q1

4

2SC9018

5

R34

100k

U1

Si482x-A

6

7

SW3(9.2MHz - 10.0MHz)

SW2(6.8MHz - 7.6MHz)

8

9

R14

20k 1%

10

11

12

13

C4

AOUT

4.7u

For Si4824 only

R9

20k 1%

C19

0.1u

C6

C15

4u7

R6

SW1 (5.6MHz - 6.4MHz)

AM1 (520kHz - 1710kHz)

0.1u

R8

100k

50k 1%

Y1

R7

32.768KHz

20k 1%

C2

C3

22p

FM3 (64MHz - 87MHz)

R28

40k 1%

FM2 (76MHz - 90MHz)

FM1 (87MHz - 108MHz)

optional

R29

120k 1%

R33

20k 1%

R44

47k 1%

Figure 6. Si4820/24 Basic Volume Mode Applications Circuit

12

Rev. 0.2

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3.2. Si483x-B Applications Circuits with 9-level Bass/Treble Control via 2 Push Buttons

Figure 7 sets Si483x-B in Bass/Treble mode by removing the pull-up resistor of pin 2 STATION. Pushing button S3

once increases bass effect by one level, and pushing button S4 once increases treble effect by one level. By

pressing and holding one of the buttons, the bass or treble effect will automatically step through all levels until

reaching their maximums. There are nine levels for bass/treble control.

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Figure 7. Si483x-B Applications Circuit with 9-Level Bass/Treble Control

Rev. 0.2

13

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3.3. Si483x-B Applications Circuits with 3-level Bass/Treble Control via Slide Switch

Figure 8 sets Si483x-B in Bass/Treble mode by removing the pull-up resistor of pin 2 STATION. Slide switch S5

controls bass/treble effect in three levels, bass/normal/treble.

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Figure 8. Si483x-B 3-Level Bass/Treble Mode Applications Circuits

14

Rev. 0.2

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3.4. Si48x-B/Si4820/24 Application Circuits with 32-Level Volume Control via 2 Push

Buttons

Figure 9 sets Si483x-B in "Volume" mode by adding the pull-up resistor R42 of 10K at pin 2 STATION. Figure 10

illustrates the application circuit for Si4820/24. Pressing button S3 once decreases the volume level by 2 dB;

pressing button S4 once increases the volume level by 2 dB. A total of 32 steps (2 dB per step) are available for the

push button volume control. If pressing and holding S3 or S4, tuner volume will step through all levels until

reaching the minimum or maximum, respectively.

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Figure 9. Si483x-B Applications Circuits with 32-Level Volume Control

Rev. 0.2

15

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[1]

TUNE1

R36

33k 1%

R43

30k 1%

ANT2

SW8 (21.2MHz - 22MHz)

SW7 (17.1MHz - 18MHz)

[1]

TUNE1

FM/SW

VR1

50k 10%

R35

20k 1%

C13 C1

47u 0.1u

VCC

R15

20k 1%

R27

C36

0.47u

100R

R32

10R

SW6 (15MHz - 15.9MHz)

SW5 (13.4MHz - 14.2MHz)

C34

33p

R10

20k 1%

L2

C31

33n

270nH

R31

1k

LNA_EN

[1]

C33

10p

C5

R12

20k 1%

R41

LNA_EN

[1]

120k

0.47u

S2

C30

SW4(11.45MHz - 12.25MHz)

B6

1

2

BAND

[1]

2.5k/100M

R11

20k 1%

3

33n

Q1

4

2SC9018

5

R34

100k

U1

Si482x-A

6

7

SW3(9.2MHz - 10.0MHz)

SW2(6.8MHz - 7.6MHz)

8

9

R14

20k 1%

10

11

12

13

C4

AOUT

4.7u

For Si4824 only

R9

20k 1%

C19

0.1u

C6

C15

4u7

R6

VCC

SW1 (5.6MHz - 6.4MHz)

AM1 (520kHz - 1710kHz)

0.1u

R8

100k

50k 1%

Y1

R7

32.768KHz

20k 1%

C2

C3

22p

FM3 (64MHz - 87MHz)

R28

40k 1%

R38

56k

R37

56k

FM2 (76MHz - 90MHz)

FM1 (87MHz - 108MHz)

optional

R29

120k 1%

R33

20k 1%

R44

47k 1%

Figure 10. Si4820/24 Applications Circuit with 32-Level Volume Control

At the device power up, Si483x-B/Si4820/24 will put the output volume at some default levels according to the push

button configurations as shown in Figure 11. There are four default volume level choices. Adding pull-down

resistors to both pin 16 and 17 sets the default volume to maximum, typically 80 mVrms for FM and 60 mVrms for

AM. Different pin 16 and 17 pull-up/down resistor combinations can set the default volume to either Max, Max-6dB,

Max-12dB or Max-18dB. For example, in Figure 9, two pull-up resistors are connected to pin 16 and pin 17, which

sets the default volume to Max-18dB.

16

Rev. 0.2

AN555

Figure 11. Si483x-B/Si4820/24 Default Volume Selection in Volume Mode

3.5. Application Circuits for Memorization of User Settings

Si483x-B/Si4820/24 has high retention memory (HRM) built-in that can memorize the last volume and bass/treble

settings so that at the next power up, the unit will automatically restore the volume and bass/treble settings before

the last power off. The unit requires pin 20 Vdd1 to be connected to an always-on power source such as battery

terminals.

During power off/on cycling, there is a low probability that the user setting data in HRM can be corrupted by

transient. If the tuner finds that the stored data in HRM is corrupted at power on, it will switch to use the default

volume or bass/treble setting. To safeguard the integrity of HRM data, users are advised to ensure that the Reset

pin (RSTB) voltage goes down to 0.3*VDD before the VDD2 voltage drops to 1.65 V during the power off process.

A 2P2T, power on/off switch S3 in Figure 12 is recommended, with one pole of S3 short pin15 RSTB to GND

immediately at the power off event.

Applying always-on power supply voltage to Vdd1 and using 2P2T power on/off switch to connect RSTB will also

improve the tuned channel consistency before power off and after power on. Si483x-B/Si4820/24 memorizes the

last tuned station before power off and restores the original tuned station at power up after confirming that there is

not a large enough position change on PVR during the power off/on cycle.

Rev. 0.2

17

AN555

ꢀ ꢁ ꢂ ꢃ ꢄ ꢅ ꢆ ꢇ ꢈ ꢉ ꢃ ꢁ ꢊ ꢋ ꢌ

ꢙ ꢑ ꢑ

ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ

ꢁ ꢂ ꢇ ꢂ ꢈ ꢅ ꢉ

ꢂ ꢋ ꢉ ꢃ ꢀ

ꢚ ꢅ ꢋ ꢂ

ꢄ ꢅ ꢋ ꢂ

ꢏ ꢎ ! "

ꢙ ꢏ ꢏ ꢆ

ꢙ ꢏ ꢏ ꢀ

ꢀ

ꢆ ꢌ

ꢆ ꢊ

ꢆ ꢆ

ꢆ ꢀ

ꢆ ꢘ

ꢆ

ꢊ

ꢂ ꢋ ꢉ ꢃ ꢆ

ꢌ

ꢎ ꢇ ꢉ ꢏ 1 ꢀ 2

ꢎ ꢇ ꢉ ꢏ

ꢍ

ꢉ ꢑ

ꢂ ꢇ ꢚ ꢈ

ꢀ ꢖ

ꢐ

ꢂ ꢇ ꢚ ꢘ

ꢀ ꢓ

ꢒ

ꢔ ꢕ ꢈ

ꢄ ꢔ ꢗ ꢉ ꢏ

ꢙ ꢅ ꢚ ꢝ ꢜ ꢎ ꢇ ꢁ ꢁ

ꢀ ꢒ

ꢓ

ꢙ ꢅ ꢚ ꢛ ꢜ ꢂ ꢄ ꢃ ꢎ ꢚ ꢃ

ꢀ ꢐ

ꢖ

ꢉ ꢑ

ꢄ ꢁ ꢂ

ꢀ ꢍ

ꢀ ꢘ

ꢀ ꢀ

ꢀ ꢆ

ꢗ ꢉ ꢏ

ꢀ ꢌ

ꢇ ꢕ ꢈ

ꢗ ꢉ ꢏ

ꢀ ꢊ

ꢙ ꢑ ꢑ

, - . / 0 & $ ꢝ

ꢕ # $ % & ' ' ( ) & $ * + ) & + + *

ꢁ ꢌ

ꢇ ꢉ ꢂ ꢀ

, - . / 0 & $ ꢛ

ꢁ ꢊ

Figure 12. Si483x-B Applications Circuits with User Setting Memory

18

Rev. 0.2

AN555

3.6. Si483x-B/Si4820/24 Bill of Materials

3.6.1. Si483x-B/Si4820/24 Basic Volume Mode Applications Circuit BOM

Table 6. Si483x-B Basic Volume Mode Applications Circuit BOM

Component(s)

C4,C7,C15

C13

Value/Description

Capacitor 4.7 µF, ±20%, Z5U/X7R

Capacitor 47 µF, ±20%, Z5U/X7R

Supplier

Murata

Venkel

Kennon

C1,C6,C19

C36

Supply bypass capacitor, 0.1 µF, ±20%, Z5U/X7R

Supply bypass capacitor, 0.47 µF, ±20%, Z5U/X7R

RF coupling capacitors, 33 pF, ±5%, COG

Inductor 270 nH.

C34

L2

R5,R21

VR1

LED biasing resistors, 200 , ±5%

Variable resistor (POT), 100 k, , ±10% 

Station and Stereo indicating LEDs

D1,D3

Any, depends on

customer

U1

R6

Si483xB AM/FM/SW Analog Tune Analog Display Radio Tuner

Resistor, 100 k, ±5%

Silicon Laboratories

Venkel

R27

Resistor, 100 ,, ±5%

Venkel

R28

Band switching resistor, 40 k,, ±1%

Band switching resistor, 47 k,, ±1%

Band switching resistor, 33 k,, ±1%

Band switching resistor, 30 k,, ±1%

Band switching resistor, 20 k,, ±1%

Band switching resistor, 120 k,, ±1%

Band switch

Venkel

R44

Venkel

R36

Venkel

R43

Venkel

R7,R33

R29

Venkel

S2

Shengda

Venkel

C2, C3

Crystal load capacitors, 22 pF, ±5%, COG

(Optional: for crystal oscillator option)

Y1

32.768 kHz crystal (Optional: for crystal oscillator option)

Whip antenna

Epson

Various

ANT2

ANT1

MW ferrite antenna 220 µH

Jiaxin Electronics

Rev. 0.2

19

AN555

Table 7. Si4820/24 Basic Volume Mode Applications Circuit BOM

Component(s)

C4,C7,C15

C13

Value/Description

Capacitor 4.7 µF, ±20%, Z5U/X7R

Supplier

Murata

Capacitor 4.7 µF, ±20%, Z5U/X7R

C1,C6,C19

C36

Supply bypass capacitor, 0.1 µF, ±20%, Z5U/X7R

Supply bypass capacitor, 0.47 µF, ±20%, Z5U/X7R

RF coupling capacitors, 33 pF, ±5%, COG

Inductor 270 nH

Murata

C34

L2

Murata

VR1

Variable resistor (POT), 100 k, ±10%

Kennon

U1

Si4820/24 AM/FM/SW Analog Tune Analog Display Radio Tuner

Resistor, 100 k, ±5%

Silicon Laboratories

Venkel

R6

R27

Venkel

Resistor, 100 , ±5%

R28

Band switching resistor, 40 k, ±1%

Band switching resistor, 47 k, ±1%

Band switching resistor, 33 k, ±1%

Band switching resistor, 30 k, ±1%

Band switching resistor, 20 k, ±1%

Band switching resistor, 120 k, ±1%

Band switch

Venkel

R44

Venkel

R36

Venkel

R43

Venkel

R7,R33

R29

Venkel

S2

Shengda

Venkel

C2, C3

Crystal load capacitors, 22 pF, ±5%, COG

(Optional: for crystal oscillator option)

Y1

32.768 kHz crystal (Optional: for crystal oscillator option)

Whip antenna

Epson

Various

ANT2

ANT1

MW ferrite antenna 220 µH.

Jiaxin Electronics

20

Rev. 0.2

AN555

Table 8. Si4835-B/Si4824 Additional BOM (for 8 SW Bands)

Component(s)

Value/Description

Capacitor, 0.47 µF, ±20%, Z5U/X7R

Capacitor capacitors, 10 pF, ±5%, COG

Capacitor capacitors, 33 nF, ±5%, COG

Ferrite bead,2.5k, 100 MHz

RF transistor, 2SC9018.

Supplier

Murata

ETC

C36

C33

C30-31

B6

Q1

R34

Resistor, 100 k, ±5%

Venkel

R41

Resistor, 120 k, ±5%

R32

Resistor, 10R, ±5%

R31

R9-12,R14-15,R35

R8

Resistor, 1k,, ±5%

Band switching resistor, 20 k,, ±1%

Band switching resistor, 50 k, ±1%

3.6.2. Additional BOM for Applications Circuit with 9-level Bass/Treble Control via Push Buttons

Table 9. Si483x-B Additional BOM for 9-Level Bass/Treble Control

Component(s)

R1-2

Value/Description

Resistor, 56 k, ±5%

Button switch

Supplier

Venkel

S3-4

Various

3.6.3. Additional BOM for Application Circuit with 3-level Bass/Treble Control via Slide Switch

Table 10. Si483x-B Additional BOM for 3-Level Bass/Treble Control

Component(s)

R37-38

Value/Description

Resistor, 56 k, ±5%

Slide switch

Supplier

Venkel

S5

Shengda

3.6.4. Additional BOM for Application Circuit with 32-level Volume Control via Push Buttons

Table 11. Si483x-B Additional BOM for 32-Level Volume Control

Component(s)

R1-2

Value/Description

Resistor, 56 k, ±5%

Button switch

Supplier

Venkel

S3-4

Various

Rev. 0.2

21

AN555

Table 12. Si4820/24 Addtional BOM for 32-Level Volume Control

Component(s)

R37-38

Value/Description

Resistor, 56 k, ±5%

Button switch

Supplier

Venkel

Various

S3-4

3.6.5. Additional BOM for Application Circuit with Memorization of User Settings

Table 13. Si483x-B Additional BOM for User Setting Memory

Component(s)

Value/Description

Resistor, 56 k, ±5%

Component(s)

Venkel

R1-2

S3-4

S1

Button switch

Various

Shengda

Venkel

2P2T slide switch

R16

C40

C39

Resistor, 200R, ±5%

Supply bypass electrolytic capacitor, 100 µF, 4 V

Supply bypass capacitor, 0.1 µF, ±20%, Z5U/X7R

Any

Murata

22

Rev. 0.2

AN555

3.7. Si483x-B/Si4820/24 PCB Layout Guidelines

1-layer PCB is used for Si483x-B/Si4820/24

GND routed by large plane

Power routed with traces

0402 component size or larger

10 mil traces width

20 mil trace spacing

15 mil component spacing

Recommended to keep the AM ferrite loop antenna at least 5 cm away from the tuner chip

Keep the AM ferrite loop antenna at least 5 cm away from MCU, audio AMP, and other circuits which have

AM interference

Place Vdd1/Vdd2 bypass capacitor C6, C15 as close as possible to the supply (pin 20/pin 21) and DBYP (pin 22).

Do not connect the DBYP (pin 22) to the board GND.

Place the crystal as close to XTALO (pin 18) and XTALI (pin 19) as possible.

Route all GND (including RFGND) pins to the GND plane underneath the chip. Try to create a large GND plane

underneath and around the chip.

Do not route pin 6 and 7. These pins must be left floating to guarantee proper operation.

Keep the Tune1 and Tune2 traces away from pin 6 and pin 7. Route Tune1 and Tune2 traces in parallel and the

same way.

Place C1, C13 as close to pin3 TUNE1 as possible.

For Si4820/24, do not route pin 23, leave it floating to guarantee proper operation.

Copy the Si483x-B layout example as much as possible when doing PCB layout.

Figure 13. Si483x-B PCB Layout Example

Rev. 0.2

23

AN555

4. Headphone Antenna for FM Receive

The Si483x-B/Si4820/24 FM Receiver component supports a headphone antenna interface through the FMI pin. A

headphone antenna with a length between 1.1 and 1.45 m suits the FM application very well because it is

approximately half the FM wavelength (FM wavelength is ~3 m).

4.1. Headphone Antenna Design

A typical headphone cable will contain three or more conductors. The left and right audio channels are driven by a

headphone amplifier onto left and right audio conductors and the common audio conductor is used for the audio

return path and FM antenna. Additional conductors may be used for microphone audio, switching, or other

functions, and in some applications the FM antenna will be a separate conductor within the cable. A representation

of a typical application is shown in Figure 14.

Figure 14. Typical Headphone Antenna Application

24

Rev. 0.2

AN555

4.2. Headphone Antenna Schematic

Figure 15. Headphone Antenna Schematic

The headphone antenna implementation requires components LMATCH, C4, F1, and F2 for a minimal

implementation. The ESD protection diodes and headphone amplifier components are system components that will

be required for proper implementation of any tuner.

Inductor LMATCH is selected to maximize the voltage gain across the FM band. LMATCH should be selected with

a Q of 15 or greater at 100 MHz and minimal dc resistance.

AC-coupling capacitor C4 is used to remove a dc offset on the FMI input. This capacitor must be chosen to be large

enough to cause negligible loss with an LNA input capacitance of 4 to 6 pF. The recommended value is 100 pF to

1 nF.

Ferrite beads F1 and F2 provide a low-impedance audio path and high-impedance RF path between the

headphone amplifier and the headphone. Ferrite beads should be placed on each antenna conductor connected to

nodes other than the FMIP such as left and right audio, microphone audio, switching, etc. In the example shown in

Figure 15, these nodes are the left and right audio conductors. Ferrite beads should be 2.5 k or greater at

100 MHz, such as the Murata BLM18BD252SN1. High resistance at 100 MHz is desirable to maximize RSHUNT,

and therefore, RP. Refer to “AN383: Si47xx Antenna, Schematic, Layout, and Design Guidelines,” Appendix A–FM

Receive Headphone Antenna Interface Model for a complete description of RSHUNT, RP, etc.

ESD diodes D1, D2, and D3 are recommended if design requirements exceed the ESD rating of the headphone

amplifier and the Si483x-B/Si4820/24. Diodes should be chosen with no more than 1 pF parasitic capacitance,

such as the California Micro Devices CM1210. Diode capacitance should be minimized to reduce CSHUNT and,

therefore, CP. If D1 and D2 must be chosen with a capacitance greater than 1 pF, they should be placed between

the ferrite beads F1 and F2 and the headphone amplifier to minimize CSHUNT. This placement will, however,

reduce the effectiveness of the ESD protection devices. Diode D3 may not be relocated and must therefore have a

capacitance less than 1 pF. Note that each diode package contains two devices to protect against positive and

negative polarity ESD events.

C9 and C10 are 125 uF ac coupling capacitors required when the audio amplifier does not have a common mode

output voltage and the audio output is swinging above and below ground.

Optional bleed resistors R5 and R6 may be desirable to discharge the ac-coupling capacitors when the headphone

cable is removed.

Rev. 0.2

25

AN555

Optional RF shunt capacitors C5 and C6 may be placed on the left and right audio traces at the headphone

amplifier output to reduce the level of digital noise passed to the antenna. The recommended value is 100 pF or

greater, however, the designer should confirm that the headphone amplifier is capable of driving the selected shunt

capacitance.

The schematic example in Figure 15 uses the National Semiconductor LM4910 headphone amplifier. Passive

components R1 R4 and C7 C8 are required for the LM4910 headphone amplifier as described in the LM4910 data

sheet. The gain of the right and left amplifiers is R3/R1 and R4/R2, respectively. These gains can be adjusted by

changing the values of resistors R3 and R4. As a general guide, gain between 0.6 and 1.0 is recommended for the

headphone amplifier, depending on the gain of the headphone elements. Capacitors C7 and C8 are ac-coupling

capacitors required for the LM4910 interface. These capacitors, in conjunction with resistors R1 and R2, create a

high-pass filter that sets the audio amplifier's lower frequency limit. The high-pass corner frequencies for the right

and left amplifiers are:

1

-----------------------------------

f_CRIGHT

=

 f_CLEFT

=

2  R1  C7

2  R2  C8

Equation 2.

With the specified BOM components, the corner frequency of the headphone amplifier is approximately 20 Hz.

Capacitor C1 is the supply bypass capacitor for the audio amplifier. The LM4910 can also be shut down by

applying a logic low voltage to the number 3 pin. The maximum logic low level is 0.4 V and the minimum logic high

level is 1.5 V.

The bill of materials for the typical application schematic shown in Figure 15 is provided in Table 14. Note that

manufacturer is not critical for resistors and capacitors.

4.3. Headphone Antenna Bill of Materials

Table 14. Headphone Antenna Bill of Materials

Designator

LMATCH

C4

Description

IND, 0603, SM, 270 nH, MURATA, LQW18ANR27J00D

AC coupling cap, SM, 0402, X7R, 100 pF

IC, SM, ESD DIODE, SOT23-3, California Micro Devices, CM1210-01ST

IC, SM, HEADPHONE AMP, National Semiconductor, LM4910MA

RES, SM, 0603, 20 k

D1, D2, D3

U3

R1, R2, R3, R4

C7, C8

C5, C6

R5, R6

F1, F2

CAP, SM, 0603, 0.39 UF, X7R

CAP, SM, 0402, C0G, 100 pF

RES, SM, 0603, 100 k

FERRITE BEAD, SM, 0603, 2.5 k, Murata, BLM18BD252SN1D

CAP, SM, 0402, X7R, 0.1 µF

C1

R7

RES, SM, 0402, 10 k

26

Rev. 0.2

AN555

4.4. Headphone Antenna Layout

To minimize inductive and capacitive coupling, inductor LMATCH and headphone jack J24 should be placed

together and as far from noise sources such as clocks and digital circuits as possible. LMATCH should be placed

near the headphone connector to keep audio currents away from the chip.

To minimize CSHUNT and CP, place ferrite beads F1 and F2 as close as possible to the headphone connector.

To maximize ESD protection diode effectiveness, place diodes D1, D2, and D3 as close as possible to the

headphone connector. If capacitance larger than 1 pF is required for D1 and D2, both components should be

placed between FB1, FB2, and the headphone amplifier to minimize CSHUNT.

Place the chip as close as possible to the headphone connector to minimize antenna trace capacitance,

CPCBANT. Keep the trace length short and narrow and as far above the reference plane as possible, restrict the

trace to a microstrip topology (trace routes on the top or bottom PCB layers only), minimize trace vias, and relieve

ground fill on the trace layer. Note that minimizing capacitance has the effect of maximizing characteristic

impedance. It is not necessary to design for 50  transmission lines.

To reduce the level of digital noise passed to the antenna, RF shunt capacitors C5 and C6 may be placed on the

left and right audio traces close to the headphone amplifier audio output pins. The recommended value is 100 pF

or greater; however, the designer should confirm that the headphone amplifier is capable of driving the selected

shunt capacitance.

4.5. Headphone Antenna Design Checklist

Select an antenna length of 1.1 to 1.45 m.

Select matching inductor LMATCH to maximize signal strength across the FM band.

Select matching inductor LMATCH with a Q of 15 or greater at 100 MHz and minimal dc resistance.

Place inductor LMATCH and headphone connector together and as far from potential noise sources as

possible to reduce capacitive and inductive coupling.

Place the chip close to the headphone connector to minimize antenna trace length. Minimizing trace length

reduces CP and the possibility for inductive and capacitive coupling into the antenna by noise sources.

This recommendation must be followed for optimal device performance.

Select ferrite beads F1-F2 with 2.5 k or greater resistance at 100 MHz to maximize RSHUNT and,

therefore, RP.

Place ferrite beads F1-F2 close to the headphone connector.

Select ESD diodes D1-D3 with minimum capacitance.

Place ESD diodes D1-D3 as close as possible to the headphone connector for maximum effectiveness.

Place optional RF shunt capacitors near the headphone amplifier’s left and right audio output pins to

reduce the level of digital noise passed to the antenna.

Rev. 0.2

27

AN555

5. Whip Antenna for FM Receiver

A whip antenna is a typical monopole antenna.

5.1. FM Whip Antenna Design

A whip antenna is a monopole antenna with a stiff but flexible wire mounted vertically with one end adjacent to the

ground plane.

There are various types of whip antennas including long, non-telescopic metal whip antennas, telescopic metal

whip antennas, and rubber whip antennas. Figure 16 shows the telescopic whip antenna.

Figure 16. Telescopic Whip Antennas

The whip antenna is capacitive, and its output capacitance depends on the length of the antenna (maximum length

~56 cm). At 56 cm length, the capacitance of the whip antenna ranges from 18 to 32 pF for the US FM band. The

antenna capacitance is about 22 pF in the center of the US FM band (98 MHz).

5.2. FM Whip Antenna Schematic

Figure 17. FM Whip Antenna Schematic

L1 (56 nH) is the matching inductor and it combines with the antenna impedance and the FMI impedance to

resonate in the FM band.

C5 (1nF) is the ac coupling cap going to the FMI pin.

U3 is a required ESD diode since the antenna is exposed. The diode should be chosen with no more than 1 pF

parasitic capacitance, such as the California Micro Device CM1213.

28

Rev. 0.2

AN555

5.3. FM Whip Antenna Bill of Materials

Table 15. FM Whip Antenna Bill of Materials

Designator

WIP_ANTENNA

L1

Description

Whip Antenna

Tuning Inductor, 0603, SM, 56 nH, MURATA, LQW18AN56nJ00D

C5

U3

AC coupling capacitor,

1 nF, 10%, COG

IC, SM, ESD DIODE, SOT23-3, California Micro Devices, CM1213-01ST

5.4. FM Whip Antenna Layout

Place the chip as close as possible to the whip antenna. This will minimize the trace length between the device and

whip antenna, which will minimize parasitic capacitance and the possibility of noise coupling. Place inductor L1 and

the antenna connector together and as far from potential noise sources as possible. Place the ac coupling

capacitor, C5, as close to the FMI pin as possible. Place ESD diode U3 as close as possible to the whip antenna

input connector for maximum effectiveness.

5.5. FM Whip Antenna Design Checklist

Maximize whip antenna length for optimal performance.

Select matching inductor L1 with a Q of 15 or greater at 100 MHz and minimal dc resistance.

Select L1 inductor value to maximize resonance gain from FM frequency (64 MHz) to FM frequency

(109 MHz)

Place L1 and whip antenna close together and as far from potential noise sources as possible to reduce

capacitive and inductive coupling.

Place the chip as close as possible to the whip antenna to minimize the antenna trace length. This reduces

parasitic capacitance and hence reduces coupling into the antenna by noise sources. This

recommendation must be followed for optimal device performance.

Place ESD U3 as close as possible to the whip antenna for maximum effectiveness.

Select ESD diode U3 with minimum capacitance.

Place the ac coupling capacitor, C5, as close to the FMI pin as possible.

Rev. 0.2

29

AN555

6. Ferrite Loop Antenna for AM Receive

Two types of antenna will work well for an AM receiver: a ferrite loop antenna or an air loop antenna. A ferrite loop

antenna can be placed internally on the device or connected externally to the device with a wire connection. When

the ferrite loop antenna is placed internally on the device, it is more susceptible to picking up any noise within the

device. When the ferrite loop antenna is placed outside a device, e.g., at the end of an extension cable, it is less

prone to device noise activity and may result in better AM reception.

6.1. Ferrite Loop Antenna Design

The following figure shows an example of ferrite loop antennas. The left figure is the standard size ferrite loop

antenna, which is usually used in products with a lot of space, such as desktop radios. The right figure is the

miniature size of the loop antenna compared with a U.S. 10-cent piece (dime). It is usually used in small products

where space is at a premium, such as cell phones. If possible, use the standard size ferrite loop antenna as it has

a better sensitivity than the miniature one.

Figure 18. Standard and Miniature Ferrite Loop Antennas

A loop antenna with a ferrite inside should be designed such that the inductance of the ferrite loop is between 180

and 450 uH for the Si483x-B/Si4820/24 AM Receiver.

Table 16 lists the recommended ferrite loop antenna for the Si483x-B/Si4820/24 AM Receiver.

Table 16. Recommended Ferrite Loop Antenna

Part #

Diameter

Length

Turns

Ui

Type

Application

SL8X50MW70T

8 mm

50 mm

70

400

Mn-Zn

Desktop Radios

SL4X30MW100T

4 mm

30 mm

100

300

Ni-Zn

Portable Radios

(MP3, Cell, GPS)

SL3X30MW105T

SL3X25MW100T

3 mm

30 mm

25 mm

100 mm

105

110

70

300

400

Ni-Zn

Ni-An

Mn-Zn

SL5X7X100MW70T 5x7 mm

Desktop Radios

The following is the vendor information for the ferrite loop antennas:

Jiaxin Electronics

Shenzhen Sales Office

email:

Web:

sales@firstantenna.com

www.firstantenna.com

30

Rev. 0.2

AN555

6.2. Ferrite Loop Antenna Schematic

Figure 19. AM Ferrite Loop Antenna Schematic

C1 is the ac coupling cap going to the AMI pin and its value should be 0.47 µF.

D1 is an optional ESD diode if there is an exposed pad going to the AMI pin.

6.3. Ferrite Loop Antenna Bill of Materials

Table 17. Ferrite Loop Antenna Bill of Materials

Designator

ANT1

Description

Ferrite loop antenna, 180–450 H

C1

AC coupling capacitor, 0.47 µF, 10%, Z5U/X7R

D1*

ESD diode, IC, SM, SOT23-3,

California Micro Devices, CM1213-01ST

*Note: Optional; only needed if there is any exposed pad going to the AMI pin.

6.4. Ferrite Loop Antenna Layout

Place the chip as close as possible to the ferrite loop antenna feedline. This will minimize the trace going to the

ferrite antenna, which will minimize parasitic capacitance as well as the possibility of noise sources coupling to the

trace.

The placement of the AM antenna is critical because AM is susceptible to noise sources causing interference in the

AM band. Noise sources can come from clock signals, switching power supply, and digital activities (e.g., MCU).

When the AM input is interfaced to a ferrite loop stick antenna, the placement of the ferrite loop stick antenna is

critical to minimize inductive coupling. Place the ferrite loop stick antenna as far away from interference sources as

possible. In particular, make sure the ferrite loop stick antenna is away from signals on the PCB and away from

even the I/O signals of the chip. Do not route any signal under or near the ferrite loop stick. Route digital traces in

between ground plane for best performance. If that is not possible, route digital traces on the opposite side of the

chip. This will minimize capacitive coupling between the plane(s) and the antenna.

To tune correctly, the total capacitance seen at the AMI input needs to be minimized and kept under a certain value.

The total acceptable capacitance depends on the inductance seen by the chip at its AM input. The acceptable

capacitance at the AM input can be calculated using the formula shown in Equation 3.

Rev. 0.2

31

AN555

C_Total

=

1

--------------------------------------------------

2f_max²L_effective

Where:

C_Total= Total capacitance at the AMI input

L_effective= Effective inductance at the AMI input

f_max= Highest frequency in AM band

Equation 3. Expected Total Capacitance at AMI

The total allowable capacitance, when interfacing a ferrite loop stick antenna, is the effective capacitance resulting

from the AMI input pin, the capacitance from the PCB, and the capacitance from the ferrite loop stick antenna. The

inductance seen at the AMI in this case is primarily the inductance of the ferrite loop stick antenna. The total

allowable capacitance in the case of an air loop antenna is the effective capacitance resulting from the AMI input

pin, the capacitance of the PCB, the capacitance of the transformer, and the capacitance of the air loop antenna.

The inductance in this case should also take all the elements of the circuit into account. The input capacitance of

the AMI input is 8 pF. The formula shown in Equation 3 gives a total capacitance of 29 pF when a 300 uH ferrite

loop stick antenna is used for an AM band with 10 kHz spacing, where the highest frequency in the band is

1750 kHz.

6.5. Ferrite Loop Antenna Design Checklist

Place the chip as close as possible to the ferrite loop antenna feedline to minimize parasitic capacitance

and the possibility of noise coupling.

Place the ferrite loop stick antenna away from any sources of interference and even away from the I/O

signals of the chip. Make sure that the AM antenna is as far away as possible from circuits that switch at a

rate which falls in the AM band (504–1750 kHz).

Recommend keeping the AM ferrite loop antenna at least 5 cm away from the tuner chip.

Place optional component D1 if the antenna is exposed.

Select ESD diode D1 with minimum capacitance.

Do Not Place any ground plane under the ferrite loop stick antenna if the ferrite loop stick antenna is

mounted on the PCB. The recommended ground separation is 1/4 inch or the width of the ferrite.

Route traces from the ferrite loop stick connectors to the AMI input via the ac coupling cap C1 such that the

capacitance from the traces and the pads is minimized.

32

Rev. 0.2

AN555

7. Air Loop Antenna for AM

An air loop antenna is an external AM antenna (because of its large size) typically found on home audio

equipment. An air loop antenna is placed external to the product enclosure making it more immune to system noise

sources. It also will have a better sensitivity compared to a ferrite loop antenna.

7.1. Air Loop Antenna Design

Figure 20 shows an example of an air loop antenna.

Figure 20. Air Loop Antenna

Unlike a ferrite loop, an air loop antenna will have a smaller equivalent inductance because of the absence of ferrite

material. A typical inductance is on the order of 10 to 20 uH. Therefore, in order to interface with the air loop

antenna properly, a transformer is required to raise the inductance into the 180 to 450 uH range.

T1 is the transformer to raise the inductance to within 180 to 450 uH range. A simple formula to use is as follows:

Typically a transformer with a turn ratio of 1:5 to 1:7 is good for an air loop antenna of 10 to 20 uH to bring the

inductance within the 180 to 450 uH range.

Choose a high-Q transformer with a coupling coefficient as close to 1 as possible and use a multiple strands Litz

wire for the transformer winding to reduce the skin effect. All of this will ensure that the transformer will be a low

loss transformer.

Finally, consider using a shielded enclosure to house the transformer or using a torroidal shape core to prevent

noise pickup from interfering sources.

A few recommended transformers are listed in Table 18.

Rev. 0.2

33

AN555

Table 18. Recommended Transformers

Transformer 1

Jiaxin Electronics

SL9x5x4MWTF1

Surface Mount

12T

Transformer 2

UMEC

Transformer 3

UMEC

Vendor

Part Number

Type

TG-UTB01527S

Surface Mount

10T

TG-UTB01526

Through Hole

10T

Primary Coil Turns (L1)

Secondary Coil Turns

(L2)

70T

55T

58T

Wire Gauge

ULSA / 0.07 mm x 3

n/a

Inductance (L2)

380 µH ±10% @ 796 kHz 184 µH min, 245 µH typ @ 179 µH min, 263 µH typ @

100 kHz

Q

130

50

75

The following is the vendor information for the above transformer:

Vendor #1:

Jiaxin Electronics

Shenzhen Sales Office

email:

sales@firstantenna.com

www.firstantenna.com

Web:

Vendor #2:

UMEC USA, Inc.

Website:

www.umec-usa.com

www.umec.com.tw

34

Rev. 0.2

AN555

7.2. Air Loop Antenna Schematic

Figure 21. AM Air Loop Antenna Schematic

C1 is the ac coupling cap going to the AMI pin and its value should be 0.47 uF.

D1 is a required ESD diode since the antenna is exposed.

7.3. Air Loop Antenna Bill of Materials

Table 19. Air Loop Antenna Bill of Materials

Designator

LOOP_ANTENNA

T1

Description

Air loop antenna

Transformer, 1:6 turns ratio

C1

D1

AC coupling capacitor, 0.47 µF, 10%, Z5U/X7R

ESD diode, IC, SM, SOT23-3,

California Micro Devices, CM1213-01ST

7.4. Air Loop Antenna Layout

Place the chip and the transformer as close as possible to the air loop antenna feedline. This will minimize the

trace going to the air loop antenna, which will minimize parasitic capacitance and the possibility of noise coupling.

When an air loop antenna with a transformer is used with the Si483x-B/Si4820/24, minimize inductive coupling by

making sure that the transformer is placed away from all sources of interference. Keep the transformer away from

signals on the PCB and away from even the I/O signals of the Si483x-B/Si4820/24. Do not route any signals under

or near the transformer. Use a shielded transformer if possible.

7.5. Air Loop Antenna Design Checklist

Select a shielded transformer or a torroidal shape transformer to prevent noise pickup from interfering

sources

Select a high-Q transformer with coupling coefficient as close to 1 as possible

Use multiple strands Litz wire for the transformer winding

Place the transformer away from any sources of interference and even away from the I/O signals of the

chip. Make sure that the AM antenna is as far away as possible from circuits that switch at a rate which

falls in the AM band (504–1750 kHz).

Route traces from the transformer to the AMI input via the ac coupling cap C1 such that the capacitance

from the traces and the pads is minimized.

Select ESD diode D1 with minimum capacitance.

Rev. 0.2

35

AN555

8. Whip Antenna for SW Receiver

SW reception usually uses whip antennas, the same as FM.

8.1. SW Whip Antenna Design

A whip antenna is a monopole antenna with a stiff but flexible wire mounted vertically with one end adjacent to the

ground plane.

There are various types of whip antennas, including long non-telescopic metal whip antennas, telescopic metal

whip antennas, and rubber whip antennas. Figure 22 shows the telescopic whip antenna.

Figure 22. Telescopic Whip Antenna for SW

8.2. SW Whip Antenna Schematic

Figure 23. SW Whip Antenna Schematic

Q1 2SC9018 is a low noise RF transistor and it constitutes a LNA to amplify the SW signal coming from the whip

antenna.

C30 (33nF) is the ac couplijng cap between whip antenna and LNA input.

C33 (0.47uF) is the ac coupling cap going to the AMI pin.

R31, R41 are bias resistors of the transistor.

36

Rev. 0.2

AN555

8.3. SW Whip Antenna Bill of Materials

Table 20. SW Whip Antenna Bill of Materials

Designator

WHIP_ANTENNA

Q1

Description

Whip Antenna

Low noise RF transistor, 2SC9018

C30

AC coupling capacitor,

33 nF, 10%, COG

C33

R31

R41

Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R

Resistor, 1 k, ±5%

Resistor, 200 k, ±5%

8.4. SW Whip Antenna Layout

Place the chip and 2SC9018 as close as possible to the whip antenna feedline. This will minimize the trace going

to the whip antenna, which will minimize parasitic capacitance as well as the possibility of noise sources coupling to

the trace.

8.5. SW Whip Antenna Design Checklist

Maximize whip antenna length for optimal performance.

Place Q1 and whip antenna close together and as far from potential noise sources as possible to reduce

capacitive and inductive coupling.

Place the chip as close as possible to the whip antenna to minimize the antenna trace length. This reduces

parasitic capacitance and hence reduces coupling into the antenna by noise sources. This

recommendation must be followed for optimal device performance.

Place the ac coupling capacitor C33, as close to the AMI pin as possible.

Rev. 0.2

37

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型号：	SI4835-B31
厂家：	SILICON
描述：	Si483X-B/Si4820/24 ANTENNA, SCHEMATIC, LAYOUT, AND DESIGN GUIDELINES
文件：	总38页 (文件大小：1845K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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