SP3223E_技术文档

®

SP3249E

Intelligent +3.0V to +5.5V RS-232 Transceivers

ꢀ Meets true EIA/TIA-232-F Standards

from a +3.0V to +5.5V power supply

ꢀ Interoperable with EIA/TIA-232 and

adheres to EIA/TIA-562 down to a +2.7V

power source

ꢀ Minimum 250Kbps data rate under load

ꢀ Regulated Charge Pump Yields Stable

RS-232 Outputs Regardless of V_CC

Variations

ꢀ Enhanced ESD Specifications:

+15KV Human Body Model

+15KV IEC1000-4-2 Air Discharge

+8KV IEC1000-4-2 Contact Discharge

DESCRIPTION

The SP3249E device is an RS-232 transceiver solution intended for portable or hand-held

applications such as notebook and palmtop computers. The SP3249E uses an internal

high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V

operation. This charge pump and Sipex's driver architecture allow the SP3249E device to

deliver compliant RS-232 performance from a single power supply ranging from +3.0V to

+5.0V. The SP3249E is a 5-driver/3-receiver device, ideal for laptop/notebook computer and

PDA applications.

SELECTION TABLE

Part

Power

RS-232

Drivers

RS-232

External

AUTO ON-LINE™

Circuitry

TTL

Number

of Pins

Number

Supplies

Receivers Components

3-State

SP3223E +3.0V to +5.5V

SP3243E +3.0V to +5.5V

SP3238E +3.0V to +5.5V

SP3239E +3.0V to +5.5V

SP3249E +3.0V to +5.5V

2

3

5

2

5

3

4 capacitors

YES

NO

YES

NO

20

28

24

NO

Applicable U.S. Patents - 5,306,954; and other patents pending.

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

1

ABSOLUTE MAXIMUM RATINGS

These are stress ratings only and functional operation

of the device at these ratings or any other above those

indicated in the operation sections of the specifications

below is not implied. Exposure to absolute maximum

rating conditions for extended periods of time may

affect reliability and cause permanent damage to the

device.

Input Voltages

TxIN ...................................................-0.3V to +6.0V

RxIN...................................................................+25V

Output Voltages

TxOUT.............................................................+13.2V

RxOUT,......................................-0.3V to (V_CC+ 0.3V)

Short-Circuit Duration

TxOUT.....................................................Continuous

Storage Temperature......................-65°C to +150°C

V

_CC.......................................................-0.3V to +6.0V

V+ (NOTE 1).......................................-0.3V to +7.0V

V- (NOTE 1)........................................+0.3V to -7.0V

V+ + |V-| (NOTE 1)...........................................+13V

I

_CC(DC V_CCor GND current).........................+100mA

Note 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.

SPECIFICATIONS

V_CC= +3.0 to +5.5, C1 -C4 = 0.1µF (tested at 3.3V + 5%), C1-C4 = 0.22µF (tested at 3.3V + 10%), C1 = 0.047µF, and C2-C4 = 0.33µF (tested at 5.0V

+ 10%), T_A= T_MINto T_MAX, unless otherwise noted. Typical values are at T_A= +25°C.)

PARAMETER

MIN.

TYP.

MAX.

UNITS CONDITIONS

Supply Current

0.3

1.0

mA

V_CC, no load

LOGIC INPUTS AND RECEIVER OUTPUTS

Input Logic Threshold

LOW

HIGH

0.8

V

V_CC= +3.3V or +5.0V, TxIN

2.4

Input Leakage Current

Output Voltage LOW

Output Voltage HIGH

DRIVER OUTPUTS

Output Voltage Swing

±0.01

V_CC- 0.1

±5.4

±1.0

µA

V

TxIN, T_A= 25°C

I_OUT= 1.6mA

I_OUT= -1.0mA

0.4

V_CC- 0.6

V

±5.0

V

All driver outputs loaded with

3KΩ to GND

Output Resistance

300

Ω

V_CC= V+ = V- = 0V, V_OUT= ±2V

Output Short-Circuit Current

RECEIVER INPUTS

Input Voltage Range

Input Threshold LOW

Input Threshold HIGH

Input Hysteresis

±35

±60

mA

V_OUT= GND

-25

0.6

0.8

25

V

1.2

1.5

1.8

0.5

5

V_CC= 3.3V

V_CC= 5.0V

V_CC= 3.3V

V_CC= 5.0V

V

2.4

V

Input Resistance

3

7

kΩ

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

2

SPECIFICATIONS

V_CC= +3.0 to +5.5, C1 -C4 = 0.1µF (tested at 3.3V + 5%), C1-C4 = 0.22µF (tested at 3.3V + 10%), C1 = 0.047µF, and C2-C4 = 0.33µF (tested at 5.0V

+ 10%), T_A= T_MINto T_MAX, unless otherwise noted. Typical values are at T_A= +25°C.)

PARAMETER

MIN.

TYP.

MAX.

UNITS CONDITIONS

TIMING CHARACTERISTICS

Maximum Data Rate

250

kbps

R_L= 3kΩ, C_L= 1000pF, one

driver switching

Receiver Propagation Delay

t_PHL

0.15

µs

Receiver input to receiver

output, C_L= 150pF

Receiver input to receiver

output, C_L= 150pF

t_PLH

Receiver Output Enable Time

Receiver Output Disable Time

Driver Skew

200

100

50

ns

Normal operation

ns

I t_PLH- t_PLHI,T_A= 25°C

Receiver Skew

ns

I t_PLH- t_PLHI

Transition-Region Slew Rate

30

V/µs

V_CC= 3.3V, R_L= 3kΩ,

T_AMB=25°C, measurements

taken from -3.0V to +3.0V or

+3.0V to -3.0V

TYPICAL PERFORMANCE CHARACTERISTICS

Unless otherwise noted, the following performance characteristics apply for V_CC= +3.3V, 250kbps data rate, all drivers loaded with 3kΩ, 0.1µF charge

pump capacitors, and T_AMB= +25°C.

SLEW RATE vs. LOAD CAPACITANCE

TRANSMITTER OUTPUT vs. LOAD CAPACITANCE

25

20

15

10

5

6

4

2

POS. SR

NEG SR

VOH

VOL

0

1000

2000

3000

4000

5000

-2

-4

-6

0

1000

2000

3000

4000

5000

pF

Figure 2. Slew Rate vs. Load Capacitance

Figure 1. Transmitter Output vs. Load Capacitance

SUPPLY CURRENT vs LOAD CAPACITANCE

60

50

40

250Kbps

120Kbps

20Kbps

30

20

10

0

1000

2000

3000

4000

5000

pF

Figure 3. Supply Current vs. Load Capacitance when

Transmitting Data

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

3

PIN DESCRIPTION

NO.

NAME

FUNCTION

C2+

GND

C2-

Positive terminal of the inverting charge-pump capacitor.

Ground.

1

2

Negative terminal of the inverting charge-pump capacitor.

Regulated -5.5V output generated by the charge pump.

RS-232 driver output.

3

V-

4

T₁OUT

T₂OUT

T₃OUT

R₁IN

5

RS-232 driver output.

6

RS-232 driver output.

7

RS-232 receiver input.

8

R₂IN

RS-232 receiver input.

9

T₄OUT

R₃IN

RS-232 driver output.

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

RS-232 receiver input.

T₅OUT

T₅IN

RS-232 driver output.

TTL/CMOS driver input.

R₃OUT

T₄IN

TTL/CMOS receiver output.

TTL/CMOS driver input.

R₂OUT

R₁OUT

T₃IN

TTL/CMOS receiver output.

TTL/CMOS driver input.

T₂IN

TTL/CMOS driver input.

T₁IN

TTL/CMOS driver input.

C1-

Negative terminal of the voltage doubler charge-pump capacitor.

+3.0V to +5.5V supply voltage.

Regulated +5.5V output generated by the charge pump.

Positive terminal of the voltage doubler charge-pump capacitor.

V_CC

V+

C1+

Table 1. Device Pin Description

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

4

1

2

3

4

5

6

7

C2+

GND

C2-

V-

24 C1+

V+

23

22

21

20

19

18

V

CC

C1-

T IN

1

T OUT

1

SP3249E

T IN

2

T OUT

2

T OUT

3

T IN

3

R IN

1

R OUT

1

8

9

17

16

15

R IN

2

R OUT

2

10

T OUT

4

T IN

4

R3IN 11

14 R OUT

3

T OUT

5

T IN

5

12

13

Figure 4. SP3249E Pinout Configuration

VCC

+

22

CC

0.1µF

C5

C1

V

24

23

C1+

V+

V-

+

0.1µF

C3

C4

0.1µF

21

1

C1-

SP3249E

4

C2+

C2

3

C2-

T₁IN

T₂IN

T₃IN

T₁OUT

T₂OUT

T₃OUT

T₄OUT

T₅OUT

5

20

19

6

18

15

13

7

RS-232

OUTPUTS

TTL/CMOS

INPUTS

T₄IN

T₅IN

10

12

R₁IN

R₂IN

R₃IN

R₁OUT

R₂OUT

R₃OUT

8

17

16

14

5kΩ

TTL/CMOS

OUTPUTS

9

RS-232

INPUTS

5kΩ

11

GND

2

Figure 5. SP3249E Typical Operating Circuit

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

5

DESCRIPTION

output voltage swing is +5.4V with no load and

+5V minimum fully loaded. The driver outputs

are protected against infinite short-circuits to

ground without degradation in reliability. These

drivers comply with the EIA-TIA-232F and all

previous RS-232 versions. Unused driver inputs

should be connected to GND or V_CC.

TheSP3249EdevicemeetstheEIA/TIA-232and

ITU-T V.28/V.24 communication protocols and

can be implemented in battery-powered, por-

table, or hand-held applications such as

notebook or palmtop computers. The SP3249E

device features Sipex's proprietary and patented

(U.S. #5,306,954) on-board charge pump

circuitry that generates ±5.5V RS-232 voltage

levels from a single +3.0V to +5.5V power

supply. The SP3249E device can operate at

a data rate of 250kbps fully loaded.

The drivers can guarantee a data rate of 250kbps

fully loaded with 3kΩ in parallel with 1000pF,

ensuring compatibility with PC-to-PC commu-

nication software.

The SP3249E is a 5-driver/3-receiver device,

ideal for portable or hand-held applications.

The SP3249E device is an ideal choice for

power sensitive designs.

The slew rate of the driver output is internally

limited to a maximum of 30V/µs in order to

meet the EIA standards (EIA RS-232D 2.1.7,

Paragraph 5). The transition of the loaded

output from HIGH to LOW also meets the

monotonicity requirements of the standard.

THEORY OF OPERATION

The SP3249E device is made up of three basic

circuit blocks: 1. Drivers, 2. Receivers, and

3. the Sipex proprietary charge pump.

Figure7showsaloopbacktestcircuitusedtotest

the RS-232 Drivers. Figure 8 shows the test

results of the loopback circuit with all five driv-

ers active at 120kbps with typical RS-232 loads

in parallel with 1000pF capacitors. Figure 6 shows

the test results where one driver was active at

250kbps and all five drivers loaded with an RS-

232 receiver in parallel with a 1000pF capacitor.

AsolidRS-232datatransmissionrateof120kbps

provides compatibility with many designs in

personal computer peripherals and LAN appli-

cations.

Drivers

The drivers are inverting level transmitters that

convert TTL or CMOS logic levels to 5.0V EIA/

TIA-232 levels with an inverted sense relative to

the input logic levels. Typically, the RS-232

VCC

22

V^CC

+

0.1µF

C5

C1

23

4

24

C1+

V+

+

C3

C4

0.1µF

21

1

C1-

C2+

SP3249E

Receivers

V-

+

C2

0.1µF

3

20

19

18

C2-

The receivers convert ±5.0V EIA/TIA-232

levels to TTL or CMOS logic output levels.

T₁OUT

T₁IN

5

RxD

CTS

DSR

T

₂OUT

₃OUT

T₂IN

6

T

₃IN

7

RS-232

OUTPUTS

T₄OUT

15 T₄IN

10

12

DCD

RI

Sincereceiverinputisusuallyfromatransmission

line where long cable lengths and system

interference can degrade the signal, the inputs

haveatypicalhysteresismarginof500mV. This

ensures that the receiver is virtually immune to

noisy transmission lines. Should an input be left

unconnected, an internal 5kΩ pulldown resistor

to ground will commit the output of the receiver

to a HIGH state.

UART

or

13

T₅OUT

T

₅IN

Serial µC

R

₁IN

₂IN

17

R

₁OUT

TxD

RTS

DTR

8

5kΩ

R

16

14

R₂OUT

9

RS-232

INPUTS

R₃IN

R

₃OUT

11

GND

2

Figure 6. Interface Circuitry Controlled by

Microprocessor Supervisory Circuit

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

6

Charge Pump

V

CC

The charge pump is a Sipex–patented design

(U.S. #5,306,954) and uses a unique approach

compared to older less–efficient designs. The

charge pump still requires four external

capacitors, but uses a four–phase voltage

shifting technique to attain symmetrical 5.5V

power supplies. The internal power supply

consists of a regulated dual charge pump that

provides output voltages 5.5V regardless of the

input voltage (V_CC) over the +3.0V to +5.5V

range. This is important to maintain compliant

RS-232 levels regardless of power supply

fluctuations.

+

0.1µF

C5

C1

V

CC

C1+

V+

V-

+

C3

C4

0.1µF

C1-

C2+

SP3249E

+

C2

0.1µF

C2-

TxOUT

RxIN

TxIN

LOGIC

INPUTS

1000pF

RxOUT

LOGIC

OUTPUTS

5kΩ

GND

The charge pump operates in a discontinuous

mode using an internal oscillator. If the output

voltages are less than a magnitude of 5.5V, the

charge pump is enabled. If the output voltages

exceed a magnitude of 5.5V, the charge pump is

disabled. Thisoscillatorcontrolsthefourphases

of the voltage shifting (Figure 13). A descrip-

tion of each phase follows.

Figure 7. Loopback Test Circuit for RS-232 Driver Data

Transmission Rates

Phase 2 (Figure 12)

— V_SStransfer — Phase two of the clock

connects the negative terminal of C₂to the V_SS

storage capacitor and the positive terminal of C₂

to GND. This transfers a negative generated

voltage to C₃. This generated voltage is

regulated to a minimum voltage of -5.5V.

Simultaneous with the transfer of the voltage to

C₃, the positive side of capacitor C₁is switched

to V_CCand the negative side is connected to

GND.

Phase 1 (Figure 11)

— V_SScharge storage — During this phase of

the clock cycle, the positive side of capacitors

C₁and C₂are initially charged to V_CC. C_l⁺is

then switched to GND and the charge in C₁^–is

–

+

transferred to C₂. Since C₂is connected to

V_CC, the voltage potential across capacitor C₂is

now 2 times V_CC

.

Phase 3 (Figure 14)

Figure 8. Loopback Test Circuit Result at 120kbps

(All Drivers Fully Loaded)

Figure 9. Loopback Test Circuit result at 250kbps

(All Drivers Fully Loaded)

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

7

— V_DDcharge storage — The third phase of the

clock is identical to the first phase — the charge

transferred in C₁produces –V_CCin the negative

terminal of C₁, which is applied to the negative

allowing the charge pump cycle to begin again.

The charge pump cycle will continue as long as

the operational conditions for the internal

oscillator are present.

+

side of capacitor C₂. Since C₂is at V_CC, the

voltage potential across C₂is 2 times V_CC

.

Since both V⁺and V^–are separately generated

from V_CC, in a no–load condition V⁺and V^–will

besymmetrical. Olderchargepumpapproaches

that generate V^–from V⁺will show a decrease in

the magnitude of V^–compared to V⁺due to the

inherent inefficiencies in the design.

Phase 4 (Figure 15)

— V_DDtransfer — The fourth phase of the clock

connects the negative terminal of C₂to GND,

and transfers this positive generated voltage

across C₂to C₄, the V_DDstorage capacitor. This

voltage is regulated to +5.5V. At this voltage,

the internal oscillator is disabled. Simultaneous

with the transfer of the voltage to C₄, the

positive side of capacitor C₁is switched to V_CC

and the negative side is connected to GND,

The clock rate for the charge pump typically

operatesat500kHz. Theexternalcapacitorscan

be as low as 0.1µF with a 16V breakdown

voltage rating.

V

= +5V

CC

C

+5V

4

+

–

V

Storage Capacitor

DD

+

C

2

1

–

+

–

SS

C

–5V

3

Figure 10. Charge Pump — Phase 1

V

= +5V

CC

C

4

+

–

V

Storage Capacitor

DD

+

C

2

1

–

+

–

SS

C

–10V

3

Figure 11. Charge Pump — Phase 2

[

T

]

+6V

a) C²⁺

T

0V

1

2

b) C2-

-6V

Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 1.96V

Figure 12. Charge Pump Waveforms

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

8

V

= +5V

CC

C

+5V

4

+

–

V

Storage Capacitor

DD

+

C

2

1

–

+

–

SS

C

–5V

3

Figure 13. Charge Pump — Phase 3

V

= +5V

CC

C

+10V

4

+

–

V

Storage Capacitor

DD

+

C

2

1

–

+

–

SS

C

3

Figure 14. Charge Pump — Phase 4

VCC

+

22

0.1µF

C5

C1

V

CC

24

C1+

+

21

1

23

4

C1-

V+

+

C3

C4

0.1µF

C2+

SP3249E

C2

0.1µF

3

V-

R₁IN

R₂IN

R₃IN

C2-

R₁OUT

R₂OUT

R₃OUT

17

16

8

5kΩ

9

11

14

T₁OUT

T₂OUT

T₃OUT

T₄OUT

T₅OUT

20

19

18

15

13

T₁IN

T₂IN

T₃IN

T₄IN

T₅IN

5

6

7

10

12

DB-9

Connector

1

2

3

4

5

6

7

8

9

GND

2

DB-9 Connector Pins:

1. Received Line Signal Detector 6. DCE Ready

2. Received Data

7. Request to Send

8. Clear to Send

9. Ring Indicator

3. Transmitted Data

4. Data Terminal Ready

5. Signal Ground (Common)

Figure 15. Circuit for the connectivity of the SP3249E with a DB-9 connector

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

9

normal usage. The transceiver IC receives most

of the ESD current when the ESD source is

applied to the connector pins. The test circuit for

IEC1000-4-2 is shown on Figure 20. There are

two methods within IEC1000-4-2, the Air

Discharge method and the Contact Discharge

method.

ESD TOLERANCE

The SP3249E device incorporates ruggedized

ESD cells on all driver output and receiver input

pins. The ESD structure is improved over our

previous family for more rugged applications

and environments sensitive to electrostatic

discharges and associated transients. The

improved ESD tolerance is at least +15kV

without damage nor latch-up.

With the Air Discharge Method, an ESD voltage

is applied to the equipment under test (EUT)

throughair. Thissimulatesanelectricallycharged

person ready to connect a cable onto the rear of

the system only to find an unpleasant zap just

before the person touches the back panel. The

high energy potential on the person discharges

through an arcing path to the rear panel of the

system before he or she even touches the system.

This energy, whether discharged directly or

through air, is predominantly a function of the

discharge current rather than the discharge

voltage. Variables with an air discharge such as

approach speed of the object carrying the ESD

potential to the system and humidity will tend to

change the discharge current. For example, the

rise time of the discharge current varies with the

approach speed.

There are different methods of ESD testing

applied:

a) MIL-STD-883, Method 3015.7

b) IEC1000-4-2 Air-Discharge

c) IEC1000-4-2 Direct Contact

The Human Body Model has been the generally

acceptedESDtestingmethodforsemiconductors.

This method is also specified in MIL-STD-883,

Method 3015.7 for ESD testing. The premise of

this ESD test is to simulate the human body’s

potential to store electro-static energy and

discharge it to an integrated circuit. The

simulation is performed by using a test model as

shown in Figure 16. This method will test the

IC’s capability to withstand an ESD transient

duringnormalhandlingsuchasinmanufacturing

areaswheretheICstendtobehandledfrequently.

The Contact Discharge Method applies the ESD

current directly to the EUT. This method was

devised to reduce the unpredictability of the

ESD arc. The discharge current rise time is

constant since the energy is directly transferred

without the air-gap arc. In situations such as

handheldsystems,theESDchargecanbedirectly

dischargedtotheequipmentfromapersonalready

holdingtheequipment. Thecurrentistransferred

ontothekeypadortheserialportoftheequipment

directly andthentravelsthroughthePCBandfinally

to the IC.

The IEC-1000-4-2, formerly IEC801-2, is

generallyusedfortestingESDonequipmentand

systems. For system manufacturers, they must

guarantee a certain amount of ESD protection

since the system itself is exposed to the outside

environment and human presence. The premise

with IEC1000-4-2 is that the system is required

to withstand an amount of static electricity when

ESD is applied to points and surfaces of the

equipmentthatareaccessibletopersonnelduring

R

S

R

C

SW2

SW1

Device

Under

Test

DC Power

Source

C

S

Figure 16. ESD Test Circuit for Human Body Model

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

10

CCoonnttaacctt--DDiisscchhaarrggee MMoodduullee

R

S

R

V

C

SW2

SW1

Device

Under

Test

DC Power

Source

C

S

R

and R add up to 330Ω for IEC1000-4-2.

S

V

Figure 17. ESD Test Circuit for IEC1000-4-2

The circuit model in Figures 16 and 17 represent

the typical ESD testing circuit used for all three

methods. TheC_SisinitiallychargedwiththeDC

power supply when the first switch (SW1) is on.

Now that the capacitor is charged, the second

switch(SW2)isonwhileSW1switchesoff. The

voltage stored in the capacitor is then applied

throughR_S, thecurrentlimitingresistor, ontothe

device under test (DUT). In ESD tests, the SW2

switch is pulsed so that the device under test

receives a duration of voltage.

30A

15A

0A

FortheHumanBodyModel, thecurrentlimiting

resistor (R_S) and the source capacitor (C ) are

1.5kWan100pF, respectively. ForIEC-10^S00-4-

2,thecurrentlimitingresistor(R_S)andthesource

capacitor (C_S) are 330W an 150pF, respectively.

t=0ns

t=30ns

t ꢀ

Figure 18. ESD Test Waveform for IEC1000-4-2

The higher C value and lower R_Svalue in the

IEC1000-4-2^Smodel are more stringent than the

HumanBodyModel. Thelargerstoragecapacitor

injects a higher voltage to the test point when

SW2 is switched on. The lower current limiting

resistor increases the current charge onto the test

point.

DEVICE PIN

TESTED

HUMAN BODY

MODEL

IEC1000-4-2

Air Discharge Direct Contact

Level

Driver Outputs

Receiver Inputs

±15kV

±8kV

4

Table 2. Transceiver ESD Tolerance Levels

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

11

PACKAGE: PLASTIC SHRINK

SMALL OUTLINE

(SSOP)

E

H

D

A

Ø

A1

L

e

B

DIMENSIONS (Inches)

24–PIN

Minimum/Maximum

(mm)

0.068/0.078

(1.73/1.99)

A

A1

B

D

E

0.002/0.008

(0.05/0.21)

0.010/0.015

(0.25/0.38)

0.317/0.328

(8.07/8.33)

0.205/0.212

(5.20/5.38)

0.0256 BSC

(0.65 BSC)

e

0.301/0.311

(7.65/7.90)

H

L

0.022/0.037

(0.55/0.95)

0°/8°

(0°/8°)

Ø

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

12

PACKAGE: PLASTIC THIN SMALL

OUTLINE (TSSOP)

e

DIMENSIONS

in inches (mm)

Minimum/Maximum

0.126 BSC (3.2 BSC)

0.252 BSC (6.4 BSC)

Symbol

24 Lead

0.303/0.311

(7.70/7.90)

1.0 OIA

0.169 (4.30)

0.177 (4.50)

D

e

0.026 BSC

(0.65 BSC)

0.039 (1.0)

0’-8’ 12’REF

e/2

0.039 (1.0)

0.043 (1.10) Max

D

0.033 (0.85)

0.037 (0.95)

0.007 (0.19)

0.012 (0.30)

0.002 (0.05)

0.006 (0.15)

(θ2)

0.008 (0.20)

0.004 (0.09) Min

Gage

Plane

(θ3)

0.020 (0.50)

0.026 (0.75)

(θ1)

0.010 (0.25)

1.0 REF

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

13

ORDERING INFORMATION

Model

SP3249ECA

SP3249ECY

Temperature Range

0°C to +70°C

Package Types

24-pin SSOP

24-pin TSSOP

0°C to +70°C

SP3249EEA

SP3249EEY

-40°C to +85°C

24-pin SSOP

24 -pin TSSOP

Please consult the factory for pricing and availability on a Tape-On-Reel option.

Co rp o ra tio n

SIGNAL PROCESSING EXCELLENCE

Sipex Corporation

Headquarters and

Sales Office

22 Linnell Circle

Billerica, MA 01821

TEL: (978) 667-8700

FAX: (978) 670-9001

e-mail: sales@sipex.com

Sales Office

233 South Hillview Drive

Milpitas, CA 95035

TEL: (408) 934-7500

FAX: (408) 935-7600

Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the

application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.

Rev.4/08/02

SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers

14


型号：	SP3223E
厂家：	SIPEX CORPORATION
描述：	Intelligent +3.0V to +5.5V RS-232 Transceivers 智能+ 3.0V至+ 5.5V的RS - 232收发器
文件：	总14页 (文件大小：130K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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