SP6652EU-L [SIPEX]
1A, High Efficiency, Fixed 1.4 MHz Current Mode PWM Buck Regulator; 1A ，高效率，固定1.4 MHz的电流模式PWM降压稳压器
| 型号： | SP6652EU-L |
| 厂家： | 
SIPEX CORPORATION |
| 描述： | 1A, High Efficiency, Fixed 1.4 MHz Current Mode PWM Buck Regulator |
| 文件： | 总16页 (文件大小：1049K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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sp6652
TM
1A, High Efficiency, Fixed 1.4 MHz
Current Mode PWM Buck Regulator
Features
■ꢀ1A Output Current
■ꢀ1.4MHz Constant Frequency Operation
■ꢀ97% Efficiency Possible
■ꢀ0.5µA (Max.) Shutdown Current
■ꢀAdjustable Output Voltage
10
1
2
3
4
5
PGND
SGND
FB
LX
9
8
7
6
P
VIN
SP6652
SVIN
10 Pin DFN
SYNC
MODE
COMP
SD
■ꢀNo External FETs or Schottky Diode Required
■ Uses Small Value Inductors and Ceramic
Output Capacitors
■ Low Dropout Operation: 100% Duty Cycle
■ꢀSoft Start and Thermal Shutdown Protection
■ Easy Frequency Synchonization
■ꢀLead Free, RoHS Compliant package: l
Small (3mm X 3mm) 10 Pin DFN or MSOP
applications
■ Mobile Phones
■ PDAs
■ DSCs
■ MP3 Players
■ USB Devices
■ꢀ Point of Use Power
Description
The SP6652 is a high efficiency, synchronous buck regulator ideal for portable applications
using one Li-Ion cell, with up to 1A of output current. The 1.4MHz switching frequency and
PWM control loop are optimized for a small value inductor and ceramic output capacitor,
for space constrained portable designs. In addition, the input voltage range of 2.7V to 5.5V;
excellent transient response, output accuracy, and ability to transition into 100% duty cycle
operation -- further extending useful battery life -- make the SP6652 a superior choice for
a wide range of portable power applications. A logic level shutdown control, external clock
synchronization, and forced-PWM or automatic control inputs are provided. Other features
include soft-start, over current protection and 140ºC over-temperature shutdown.
typical application circuit
V
OUT
4.7µH
3.3V at 1A
1
LX
10
P
GND
2 S
3.6V - 5.5V
340kΩ
100kΩ
P
S
GND
VIN 9
8
V
IN
3 FB
SP6652
10Ω
VIN
10µF
COMP
4
SYNC
7
4kΩ
10µF
1µF
5 SD
MODE 6
10nF
ENABLE
SHUTDOWN
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
ꢀ
ABSOLUTE MAXIMUM RATINGS
PVIN,SVIN ...........................................................................-0.3V to 6.0V
PGND to SGND .....................................................................-0.3V to 0.3V
LX to PGND ..............................................................- 0.3V to PVIN+0.3V
Storage Temperature....................................................-65 °C to 150 °C
Operating Temperature.................................................. -40°C to +85°C
These are stress ratings only and functional operation of the device at
these ratings or any other above those indicated in the operation sec-
tions of the specifications below is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect
reliability.
electrical cHaracteristics
VIN = UVIN = VSDN = 3.6V, IO = 0mA, TAMB = -40°C to +85°C, typical values at 27°C unless otherwise noted.
The ♦ denotes the specifications which apply over the full temperature range, unless otherwise specified.
PARAMETER
Input Operating Voltage
MIN typ MAX units
conDitions
Result of IQ measurement at VIN = PVIN
2.85
5.5
V
V
♦
= 5.5V
FB Set Voltage
0.784
0.8 0.816
♦
♦
♦
FB Set Current
-ꢀ
-4
0.0ꢀ
ꢀ
4
VFB = 0.8V
µA
%
Overall FB Accuracy
Switching Frequency
FB = COMP
ꢀ.ꢁ
ꢀ.4
ꢀ.6
MHz
Mode = SD = VIN
Minimum On-Time-Duration
SYNC Tracking Frequency
ꢀ00
ꢁ00
ꢁ.0
ns
VFB = 1.0V, VCOMP = 0.2V
ꢀ.0
-ꢀ
MHz
Mode = SD = VIN, VFB =1.0V
♦
♦
♦
SYNC Input Current
0.0ꢀ
ꢀ
µA
SYNC Logic Threshold Low
0.3
0.6
V
High to Low Transition
Low to High Transition
IPMOS = 200mA
SYNC Logic Threshold High
PMOS Switch Resistance
ꢀ.7
V
♦
♦
0.4
0.4
ꢀ.5
0.ꢀ
0.6
0.6
ꢀ.7
3
Ω
NMOS Switch Resistance
Inductor Current Limit
LX Leakage Current
Ω
INMOS = 200mA
♦
♦
♦
1.3
-3
A
VFB = 0.4V, Mode = SD = VIN
SD = ZeroV
µA
mA
mA
VIN = 3.6V, Mode = SD = VIN
VIN = 5.5V, Mode = SD = VIN
ꢀ
5
VIN Quiecent Current
3
ꢀ0
UVLO Undervoltage Lockout Threshold,
VIN falling
ꢁ.55
ꢁ.7
2.85
V
SD = VIN
♦
6
ꢁ
%
UVLO hysteresis
Soft Start Current
ꢀ
4
ꢀ
SD = VIN, VCOMP = 1V
µA
♦
♦
-ꢀ
0.0ꢀ
SD MODE Input Current
µA
0.9
V
V
High to Low Transition
Low to High Transition
♦
♦
0.6
SD MODE Input Threshold Voltage
Slope Compensation
ꢀ.ꢁ5
1.8
700
ꢀ40
mA/µS
°C
Rising Over-Temperature Trip Point
ꢀ4
ꢀ
Over-Temperature Hysteresis
°C
mA/V
Error Amplifier Transconductance
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
ꢁ
pin Description
Pin
pin
Description
Number NAME
Power Ground Pin. Synchronous rectifier current returns through
this pin.
ꢀ
ꢁ
PGND
SGND
Internal Ground Pin. Control circuitry returns current to this pin.
External feedback network input connection. Connect a resistor from
FB to ground and from FB to VOUT to control the output voltage.
Regulation point at FB = 0.8V Typical.
3
FB
Compensation pin for error loop. Connect an R and C in series to
ground to control open loop pole and zero.
4
COMP
SD
Shutdown control input. Tie pin to VIN for normal operation, tie to
ground for shutdown. TTL input threshold.
5
6
7
MODE Connect this pin to VIN.
An external clock signal can be connected to this pin to synchronize
the switching frequency.
SYNC
SVIN
PVIN
LX
Internal supply voltage. Control circuitry is powered from from this
pin. Use an RC filter close to the pin to cut down supply noise.
8
9
Supply voltage for the output driver stage. Inductor charging current
passes through this pin.
Inductor switching node. Inductor tied between this pin and the
output capacitor to create regulated output voltage.
ꢀ0
PGND
SGND
FB
10
1
2
3
4
5
LX
10
9
1
2
3
4
5
PGND
SGND
FB
LX
P
9
8
7
6
PVIN
VIN
SP6652
SP6652
8
SVIN
SVIN
10 Pin DFN
7
SYNC
MODE
COMP
SD
10 Pin MSOP
COMP
SD
SYNC
MODE
6
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
3
FUNCTIONAL DIAGRAM
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
4
DetaileD Description
rent ramp times the resistance of the PMOS
chargingswitch.Tokeeptheeffectivecurrent
slopecompensationconstant(remembering
current is being compensated, not voltage)
the voltage slope must be proportional to
RPMOS. To account for this, the slope com-
pensation voltage is internally generated
with a bias current that is also proportional
Current Mode Control and Slope
Compensation
The SP6652 is designed to use low value
ceramic capacitors and low value inductors
to reduce the converter’s volume and cost
in portable devices. Current mode PWM
control was, therefore, chosen for the ease
ofcompensationwhenusingceramicoutput
capacitors and better transient line rejec-
tion, which is important in battery powered
applications. Current mode control spreads
the two poles of the output power train filter
far apart so that the modulator gain crosses
over at -20dB/decade instead of the usual
-40dB/decade. The external compensation
network is, simply, a series RC circuit con-
nectedbetweengroundandtheoutputofthe
internal transconductance error amplifier.
to RPMOS
.
Over Current Protection
In steady state closed loop operation the
voltage at the COMP pin controls the duty
cycle.Duetothecurrentmodecontrolandthe
slope compensation, this voltage will be:
V(COMP)•
{
ILPK
•
RPMOS + MCV
•
TON + VBE(Q1)
}
It is well known that an unconditional insta-
bility exists for any fixed frequency current-
mode converter operating above 50% duty
cycle. A simple, constant-slope compensa-
tionischosentoachievestabilityunderthese
conditions. The most common high duty
cycle application is a Li-Ion battery powered
regulatorwitha3.3Voutput(D≥90%).Since
thecurrentloopiscriticallydampedwhenthe
compensation slope (denoted MCV) equals
thenegativedischargeslope(denotedM2V),
the amount of slope compensation chosen
is, therefore:
The COMP node will be clamped when its
voltage tries to exceed V(BLIM) + VBE(Q1).
The VBE(Q1) term is cancelled by VBE(Q2)
at the output of the translator. The correct
value of clamp voltage is, therefore:
V(BLIM) = IL(MAX)• RPMOS + MCV •TON
The IL(MAX) term is generated with a bias
current that is proportional to RPMOS, to
keepthevalueofcurrentlimitapproximately
constant over process and temperature
variations, while the MCV •TON is generated
by a peak-holding circuit that senses the
amplitude of the slope compensation ramp
M2 = dIL/dTOFF =-VOUT/L = -3.3V/4.7µH =
-702mA/µs
at the end of TON
.
MꢁV = Mꢁ•RPMOS
There is minimum on-time (TON) generated
even if the COMP node is at zeroV, since
the peak current comparator is reset at the
end of a charge cycle and is held low during
a blanking time after the start of the next
charge cycle. This is necessary to swamp
the transients in the inductor current ramp
around switching times. The minimum TON
(100ns, nominally) is not sufficient for the
COMP node to keep control of the current
MCV = -MꢁV = 702mA/µs•0.2Ω = 140mV/µs,
for RPMOS = 0.20Ω
The inductor current is sensed as a voltage
across the PMOS charging switch and the
NMOS synchronous rectifier (see BLOCK
DIAGRAM). Duringinductorcurrentcharge,
V(PVIN)-V(LX) represents the charging cur-
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
5
DetaileD Description
when the output voltage is low. The inductor
current tends to rise until the energy loss
from the discharge resistances are equal to
the energy gained during the charge phase.
For this reason, the clock frequency is cut in
halfwhenthefeedbackpinisbelow0.3V, ef-
fectively reducing the minimum duty cycle in
half.Above V(FB) = 0.3V the clock frequency
is normal (seeTypical Operating Character-
Thetotalpowersupplyloopiscompensated
with a series RC network connected from
the COMP pin to ground. Compensation is
simple due to current-mode control. The
modulatorhastwodominantpoles: oneata
lowfrequency,andoneabovethecrossover
frequency of the loop, as seen in the graph
below, Linearized Modulator Frequency
Response vs. Inductor Value.
istics: Inductor Current vs. VOUT
)
The low frequency pole for L1= 5µH is
4kHz, the second pole is 500kHz, and the
gain-bandwidth is 20kHz. The total loop
crossoverfrequencyischosentobe200kHz,
Voltage Loop and Compensation
in PWM Mode
The voltage loop section of the circuit con-
sists of the error amplifier and the translator
circuits (see functional diagram). The input
ofthevoltageloopisthe0.8Vreferencevolt-
age minus the divided down output voltage
at the feedback pin. The output of the error
amplifieristranslatedfromagroundreferred
signal (the COMP node) to a power input
voltage referred signal. The output of the
voltage loop is fed to the positive terminal
of the Current Loop comparator, and repre-
sents the peak inductor current necessary
to close the loop.
th
which is 1/6 of the clock frequency. This
sets the second modulator pole at 2.5 times
thecrossoverfrequency.Thereforethegain
of the error amplifier can be 200kHz/20kHz
= 10 at the first modulator pole of 4kHz. The
error amp transconductance is 1mA/V, so
this sets the RZ resistor value in the com-
pensation network at 10/1mA/V = 10kΩ.
The zero frequency is placed at the first
pole to provide at total system response of
-20dB/decade (the zero from the error amp
cancels the first modulator pole, leaving the
20K 2.0M 50K
1
2
3
16K 1.6M 40K
12K 1.2M 30K
8K 0.8M 20K
4K 0.4M 10K
>>
0
0
0
3u
Mod_pole1
2u
4u
Mod_pole2 Gbw_modfb
L1VAL
5u
6u
7u
8u
9u
10u
1
3
2
Conditions: VIN=5V, VOUT=3.3V, fCLK=1.4MHz, COUT=10µF, and MCV=132mV/µs. The inductor is varied from
2µH to 10µH
Linearized Modulator Frequency Response vs. Inductor
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
6
DetaileD Description
1 pole rolloff from the error amp pole). The
compensation capacitor becomes:
The switching frequency will be reduced to
half the normal frequency as long as V(FB)
isbelow0.3V, aspreviouslydiscussedinthe
Over Current Protection section.
ꢀ
ꢀ
=
=
Cc
(2π•Rz•pole1) (6.28•10kΩ•4kHz)
= 4nF
100% Duty Cycle in Dropout
Soft Start
Soft-start is accomplished by disconnect-
ing the error amp and inserting a constant
2μA current to charge the compensation
capacitor.
To extend the battery life in portable applica-
tions, the PWM control logic is set up such
that if the output SR latch has not been reset
by the Current Loop comparator at the end
ofaclockcycle, thechargesignalcontinues
to stay high into the beginning of the next
cycle. This will happen naturally when the
converterstartstogointodropout.Theslope
compensation ramp is reset every cycle.
Whenpowerisfirstappliedandthereference
establishes, the clamp circuit at the COMP
node sets its voltage at one VBE, which is
thebottomoftheinductorcurrentrange.The
soft-start current continues to charge up the
COMPnode, slowly raising the inductor cur-
rent level. The inductor current will increase
at approximately:
External Clock Synchronization
(IREFSS / CC)• RPMOS
The SP6652 has an internal 1.4MHz clock
that can be defeated by connecting an ex-
ternalclockpulseontheSYNC.Thecapture
range for clock synchronization is 1.0 to
2.0MHz. When a clock pulse is present on
the SYNC pin, the internal oscillator bias
current is scaled back, handing control of
the clock pulses to the faster external clock.
Thepulsewidthoftheclockisapproximately
50 ns, whether internally generated or ex-
ternally applied.
where:
IREFSS = Soft start constant current
= 2μA nominally
CC
= Compensation capacitor
RPMOS = Charging PMOS resistance
For typical circuit values of CC=6.8nF and
RZ=8kΩ, the soft start period is TBD ms.
Thermal Shutdown
The inductor current will eventually rise
above the required load current and the out-
put voltage will charge up. During soft-start
the error amp is disconnected and acts as
a comparator. When V(FB) rises above the
reference, the error amp switches to logic
high and ends soft-start, at which point the
error amp output is connected to the capaci-
tated COMP node.
Theinternaldietemperatureismonitoredby
a comparator that issues a “TOO HOT” sig-
nal when the junction temperature reaches
140˚C, nominally. This signal that inhibits
all internal circuits until the temperature
has decreased to approximately 135˚C, at
which point a normal soft start sequence is
initiated.
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
7
APPLICATIONS INFORMATION
L1
VOUT
4.7µH
1
10
9
PGND
SGND
FB
LX
PVIN
RFBH
2
3
4
5
VIN
R1
8
SVIN
C3
10µF
10Ω
7
COMP
SD
SYNC
MODE
RFBL
Rz
4kΩ
6
C1
10µF
C2
1µF
SP6652
Cc
10nF
SD
V
IN
Complete Application Circuit.
SYNC
COMPONENT SELECTION
PVIN. This will keep the SP6652 internal
reference and other sensitive circuits noise
free and ensure better output regulation.
The GND returns for the PVIN capacitor and
the output capacitor should be connected
directly to the PGND pin, which should con-
nect to the thermal pad ground located un-
der the SP6652. The GND return for the
1µF SVIN capacitor should be connected to
the SGND pin, which should be connected
separately to the PGND pin to avoid adding
PGND noise to the SP6652 SGND pin. See
the Typical SP6652 Circuit Layout for de-
tails on the recommended layout.
The SP6652 PWM buck regulator circuit
requires 3 capacitors: 10µF for the PVIN input,
1µF input bypass for the SVIN and 10µF
for the output are typically recommended.
For the input capacitor, a value even larger
than 10µF will help reduce input voltage
ripple for applications sensitive to ripple on
the battery voltage. See the Typical Per-
formance Characteristics section for wave-
forms on input and output ripple with 10µF
capacitors. All the capacitors should be
surface mount ceramic for low lead induc-
tance necessary at the 1.4MHz switching
frequency of the SP6652 and to obtain low
ESR. This also helps improve bypassing
on the input pin and ripple on the output.
Ceramic capacitors with X5R or X7R tem-
perature grade are recommended for most
applications. A selection of recommended
capacitors is included in Table 1. The 1µF
SVIN input capacitor should have a series
resistor of about 10Ω value connected
from the input to the SVIN pin to form an RC
low pass filter to remove high frequency
spikes present on the input switching pin
Output Voltage Selection
T
o set the output voltage for the SP6652,
a pair of resistors, RF and RI are used as a
voltage divider between the output voltage
at the output capacitor and the FB pin and
GND, as shown in the typical application cir-
cuit. The recommended value for the RI re-
sistor is 100KΩ to 200KΩ to keep the quies-
centcurrentlow, butnothavetheimpedance
too high at the FB pin for good regulation.
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
8
APPLICATIONS INFORMATION
Manufacturers/ Website
Part Number
Capacitance/
Voltage
Capacitor
Size/Type/Thickness
ESR at
100KHz
TDK/www.tdk.com
TDK/www.tdk.com
TDK/www.tdk.com
C1005X5R0J105M
C1608X5R0J475K
C2012X5R0J106M
1uF/6.3V
4.7uF/6.3V
10uF/6.3V
1uF/6.3V
4.7uF/6.3V
10uF/6.3V
0402/X5R/0.5mm
0603/X5R/0.9mm
0805/X5R/1.35mm
0402/X5R/0.55mm
0603/X5R/0.9mm
0805/X5R/1.35mm
0.03
0.02
0.02
0.03
0.02
0.02
Murata/www.murata.com
Murata/www.murata.com
Murata/www.murata.com
GRM155R60J105KE19B
GRM188R60J475KE19
GRM21BR60J106KE19L
Table 1. Capacitor Selection
Note: Component highlighted in bold is used on the SP6652EB Evaluation Board.
The range of typical inductor values and sizes are shown here in Table 2.
Manufacturers/ Website
Part Number
Inductance/ Isat
Rating
Inductor
Length/Width/Thickness
DCR Max
ohms
Coilcraft/ www.coilcraft
Coilcraft/ www.coilcraft
Sumida/ www.sumida.com
MSS5131-332MX
MSS5131-332MX
CDRH3D28-3R3
CDRH3D28-4R7
WE-TPC #744042003
WE-TPC #744042004
3.3uH/1.6A
4.7uH/1.4A
3.3uH/2.0A
4.7uH/1.65A
3.3uH/1.8A
4.7uH/1.65A
5.1x5.1x3.1mm
5.1x5.1x3.1mm
4.0x4.0x3.0mm
4.0x4.0x3.0mm
4.8/4.8/1.8mm
4.8/4.8/1.8mm
0.032
0.045
0.058
0.071
0.065
0.082
Sumida/ www.sumida.com
Wurth Elektronik/ www.we-online.de
Wurth Elektronik/ www.we-online.de
Note: Component highlighted in bold is used on the SP6652EB Evaluation Board.
Table 2. Inductor Selection
SP6652 Bode Plot
.
60
50
40
180
150
120
90
The output voltage can be set using the
formula:
VOUT = VFB*(ꢀ + RF/RI)
A
t 0dB Loop Gain
Fo = 80kHz
Loop Phase = 50deg
30
20
10
0
-10
-20
-30
-40
-50
-60
60
30
0
-30
-60
-90
-120
-150
-180
pole1 -3dB
at 4kHz
Where VFB = 0.8V typically, and for no-load
Ton is kept within 200nsec Minimum:
Ton(min) = VOUT/(VIN *Freq).
-20dB/dec
3.3Vout
Rz = 4K Ω
Cc = 10nF
Compensation Component Selection
For simplicity in compensation with ce-
ramic output capacitors, the SP6652 uses
current mode PWM control, so all that is
needed for stability is a series RZ and CC
at the COMP pin to compensate the error
amplifier. To see the actual SP6652 re-
sponse with frequency, in figure 3 we have
taken a bode plot of gain and frequency re-
sponse of the SP6652 circuit with 3.3Vout.
Looking first at the SP6652 Modulator Gain
at low frequency you see a constant gain
of about 26dB and the first pole or -3dB
point at about 4 kHz, where the slope of
the gain curve becomes about -20dB/de-
cade. At high frequency on the SP6652
Modulator Gain curve one can see the
modulator curve slope increase down-
100
1000
10000
100000
1000000
Log
Frequency (Hz)
SP6652 Loop Gain
SP6652 Modulator Gain
SP6652 Loop Phase
SP6652 Modulator Phase
Figure 3. SP6652 Gain and Frequency
Response 3.3V output voltage
ward for a high frequency pole at about
150KHz, which is widely separated in
frequency from the low frequency 4kHz
pole, so that the SP6652 can be compen-
sated by a zero at the low frequency pole
where the gain slope is only -20dB/decade.
The gain for the error amplifier is the cross-
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
9
APPLICATIONS INFORMATION
The zero for loop compensation is placed
at the first modulator pole of 4 kHz to pro-
vide a loop response of -20/dB/decade at
the crossover frequency. The compensa-
tion capacitor Cc can be calculated from
the crossover frequency pole1 and the RZ
value:
over frequency fzero = 80kHz (from the
Bode plot) divided by the loop gain band-
width, given as 20kHz, which is used in the
following equation:
Error Amp Gain
= fzero / (loop gain bandwidth)
= 80kHz / 20kHz
= 4
CC = 1/(2π• RZ •pole1) = 1/(2π•4K•4kHz)
= 10nF
The error amp transconductance is about
From the Typical Performance Charac-
teristics load step curves, the 2.5V output
and 3.3V output are stable with RZ = 4KΩ
and CC = 10nF. For 1.8V to 0.85V output,
the values RZ = 2KΩ and CC = 10nF are
recommended.
1mS, so this sets the RZ resistor to be:
Rz = 4/1mS = 4KΩ
We will use RZ = 4KΩ for the 3.3V output
compensation.
Figure 4. Typical SP6652 circuit layout.
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
ꢀ0
TYPICAL PERFORMANCE CHARACTERISTICS
SP6652 Efficiency vs Load Vout = 3.3V
SP6652 Efficiency vs Load (Vout = 1.5V)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
Vi=3.0V
Vi=3.6V
Vi=3.9V
Vi=4.2V
Vi=3.6V
Vi=3.9V
Vi=4.2V
Vi=5.0V
1
10
100
1000
1
10
100
1000
ILoad (mA)
ILoad (mA)
Figure 6. Efficiency vs. Load, Vout= 1.5V
Figure 5. Efficiency vs. Load, Vout= 3.3V
SP6652 Line/Load Rejection Vout = 3.3V
OUT
SP6652 Line/Load Rejection V
= 1.5V
3.40
1.520
1.510
1.500
1.490
1.480
3.35
3.30
Vi=3.6V
Vi=4.2V
Vi=3.9V
Vi=3.6V
Vi=3.0V
Vi=3.9V
3.25
Vi=4.2V
Vi=5.0V
3.20
0
200
400
600
800
1000
0
200
400
600
800
1000
ILoad (mA)
ILoad (mA)
Figure 8: Line/Load Rejection , Vout = 1.5V
Figure 7: Line/Load Rejection , Vout = 3.3V
SP6652 Line/Load Regulation, Vout = 3.3V
OUT
SP6652 Line/Load Rejection V
= 1.5V
3.340
1.520
1.510
1.500
1.490
1.480
3.330
3.320
3.310
Vi=4.2V
Vi=3.9V
Vi=3.6V
Vi=3.0V
Vi=3.6V
3.300
Vi=3.9V
Vi=4.2V
3.290
Vi=5.0V
3.280
1
10
100
1000
1
10
100
1000
ILoad (mA)
ILoad (mA)
Figure 10: Line/Load Regulation , Log Scale,
Vout = 1.5V
Figure 9: Line/Load Regulation , Log Scale,
Vout = 3.3V
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
ꢀꢀ
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 11. 0mA to 600mA
Load Step Data
Vin=4.2V, Vo=3.3V
Rz=4kW, Cz=10nF, L1=4.7uH
Figure 12. 0mA to 600mA
Load Step Data
Vo(AC)
200mV/div
Vin=4.2V, Vo=1.5V
Rz=2kW, Cz=10nF,
L1=4.7uH
IL1
(0.5A/div)
Iout
(1.0A/div)
Vo(AC)
200mV/div Figure 13. 0mA to 600mA
Load Step Data
IL1
(0.5A/div)
Vin=4.2V, Vo=2.5V
Rz=4kW, Cz=10nF,
L1=4.7uH
Iout
(0.5A/div)
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
ꢀꢁ
TYPICAL PERFORMANCE CHARACTERISTICS
EN
Vout
Figure 14. SP6652 600mA
Start-up from Enable
Vin=4.2V, Vo=3.3V, Iout =
600mA, Rz=4kW, Cz=10nF,
L1=4.7uH
ILX
0.5A/div
EN
Figure 15. SP6652 600mA
Start-up from Enable
Vin=4.2V, Vo=1.5V, Iout =
600mA, Rz=2kW, Cz=10nF,
L1=4.7uH
Vout
ILX
0.5A/div
Figure 16. SP6652 600mA
Input/Output Ripple
Vin=4.2V, Vo=3.3V, Iout =
600mA, Rz=4kW, Cz=10nF,
L1=4.7uH
Vin
(AC)
Vout
(AC)
Vin
Figure 17. SP6652 600mA
Input/Output Ripple
Vin=4.2V, Vo=1.5V, Iout =
600mA, Rz=2kW, Cz=10nF,
L1=4.7uH
(AC)
Vout
(AC)
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
13
PACKAGE: 10 PIN MSOP
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
ꢀ4
PACKAGE: 3X3 10 PIN DFN
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
ꢀ5
Ordering Information
Min
Temp
-40
0
Quantity
Part Number
SP6652ER-L
MSL Level
RoHS
Max Temp Package
Pack Type
L1 @ 260ºC
L1 @ 260ºC
L1 @ 260ºC
L1 @ 260ºC
L1 @ 240ºC
L1 @ 240ºC
L1 @ 240ºC
L1 @ 240ºC
L1 @ 240ºC
Yes
Yes
Yes
Yes
No
85
70
70
70
85
85
70
70
70
DFN10
DFN10
Canister
Tape & Reel
Tape & Reel
TUBE
Any
3000
2500
50
SP6652ER-L/TR
SP6652EU-L/TR
SP6652EU-L
SP6652ER
0
MSOP10
MSOP10
DFN10
0
-40
-40
0
Canister
Any
3000
50
SP6652ER/TR
SP6652EU
No
DFN10
Tape & Reel
TUBE
No
MSOP10
MSOP10
MSOP10
SP6652EU-ES
SP6652EU/TR
No
0
TUBE
50
No
0
Tape & Reel
2500
Evaluation Boards
Not Applicable to
Board
Not Available in
Bulk
SP6652EB
No
No
0
0
70
70
Board
Board
Not Applicable to
Board
Not Available in
Bulk
SP6652LEDEB
Note: The SP6652EB is for regular SP6652 users, the SP652LEDEB is for LED driver users.
For latest information on ordering status, go to the Sipex Web Landing Page for this product
http://www.sipex.com/productDetails.aspx?part=SP6652&keyword=sp6652
For further assistance:
Email:
Sipexsupport@sipex.com
WWW Support page:
Sipex Application Notes:
http://www.sipex.com/content.aspx?p=support
http://www.sipex.com/applicationNotes.aspx
Solved by
Sipex Corporation
Headquarters and
Sales Office
TM
233 South Hillview Drive
Milpitas, CA 95035
tel: (408) 934-7500
fax: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not
assume any liability arising out of the application or use of any product or circuit described herein; neither
does it convey any license under its patent rights nor the rights of others.
May25-07 RevH
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
© 2007 Sipex Corporation
ꢀ6
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