SP6654ER-L/TR_技术文档

®

SP6654

High Efficiency 800mA Synchronous Buck Regulator

Ideal for portable designs powered with Li Ion battery

FEATURES

■ Ultra-low 20µA Quiescent Current

■ 98% Efficiency Possible

PV_IN

V_IN

10

9

1

2

3

4

5

LX

P_GND

GND

V_OUT

FB

SP6654

■ 800mA Output Current

PWR_GD

D1

8

10 Pin DFN

■ 2.7V to 5.5V Input Voltage Range

■ Output Adjustable Down to 1.0V

■ No External FET’s Required

■ 1.25A Inductor Peak Current Limit

■ 100% Duty Ratio Low Dropout Operation

■ 80µA Light Load Quiescent Current

in Dropout

■ Logic Shutdown Control

■ Programmable UVLO

■ Small 10 pin MSOP Package

■ Power Good Indicator

■ Industry Standard 10 Pin MSOP and

and Small DFN Package

7

6

D0

Now Available in Lead Free Packaging

APPLICATIONS

■ PDA's

■ DSC's

■ MP3 Players

■ USB Devices

■ Point of Use Power

DESCRIPTION

The SP6654 is a 800mA synchronous buck regulator which is ideal for portable applications that

useaLi-Ionor3cellalkaline/NiCD/NiMHinput. TheSP6654’sproprietarycontrolloop, 20µAlight

loadquiescentcurrent,and0.3Ωpowerswitchesprovideexcellentefficiencyacrossawiderange

of output currents. As the input battery supply decreases towards the output voltage the SP6654

seamlessly transitions into 100% duty ratio operation further extending useful battery life. The

SP6654 is protected against overload and short circuit conditions with a precise inductor peak

current limit. Other features include programmable under voltage lockout, externally pro-

grammed output voltage down to 1.0V, logic level shutdown control, and an open drain power

good indicator when V_OUTis above 94% of its programmed value.

TYPICAL APPLICATION SCHEMATIC

2.7V to 5.5V Input

VI

L1

10µH

V_OUT

800mA

10Ω

VO

C_IN

R_VIN

SP6654

C_OUT

LX

P_VIN

22µF

CV_IN

22µF

P_GND

V_IN

1M

1µF

CF

22pF

GND

V_OUT

PWR_GD

D1

R_F

PWR_GD

D1

D0

FB

R_I

200K

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

1

ABSOLUTE MAXIMUM RATINGS

These are stress ratings only and functional operation of the device at

these ratings or any other above those indicated in the operation

sections of the specifications below is not implied. Exposure to

absolute maximum rating conditions for extended periods of time may

affect reliability.

PV_IN,V_IN.............................................................................................. 6V

All other pins .............................................................. -0.3V to V_IN+0.3V

PV_IN, P_GND, LX current ........................................................................ 2A

Storage Temperature .................................................. -65 °C to 150 °C

Operating Temperature ................................................. -40°C to +85°C

Junction Temperature ................................................................. 125°C

Theta JA (10 Pin MSOP) .......................................................... 214°C/w

Theta JA (10 Pin DFN) ............................................................ 48.7°C/w

ELECTRICAL CHARACTERISTICS

V_IN=PV_IN=V_SDN=3.6V, V_OUT=V_FB, I_O= 0mA, T_AMB= -40°C to +85°C, The ♦ denotes the specifications which

apply over the full operating temperature range, unless otherwise specified.

PARAMETER

MIN

TYP

MAX

UNITS

CONDITIONS

Result of I_Qmeasurement at

V_IN= PV_IN= 5.5V

♦

Input Voltage Operating

UVLO

5.5

V

Minimum Output Voltage

FB Set Voltage, Vr

1.0

V

FB Set Voltage, Vr

25° C, IO = 200mA Close

Loop. LI = 10µH,

0.784

0.800 0.816

±4

Measured at V_IN= 5.5V, no

load, T_AMB= 0° C to 70° C

Overall Accuracy

%

Measured at V_IN= 3.6V, 200mA

load, Close Loop

♦

±5

On-Time Constant - KON Min,

T_ON= KON/(V_IN-V_OUT

Close Loop, LI = 10µH, C_OUT

22µF

=

1.5

1.6

2.25

2.4

3.0

3.2

V*µs

)

Off-Time Min, T_OFF= K_OFF/V_OUT

Constant - K_OFF

Inductor current limit tripped,

V_FB= 0.5V Measured at V_'= 2V

V*µs

ns

Off-Time Blanking

100

T_AMB=27° C

♦

PMOS Switch Resistance

NMOS Switch Resistance

Inductor Current Limit

LX Leakage Current

0.3

0.6

1.50

3

IPMOS = 200mA

INMOS = 200mA

V_FB= 0.5V

1.0

1.25

0.01

A

µA

D0 = D1 = 0

V_OUT= 2.5V, IO = 200mA

T_AMB= 27° C

96

Power Efficiency

%

V_OUT= 3.3V, IO = 800mA

T_AMB=27° C

92

900

20

♦

Minimum Guaranteed Load Current

V_INQuiescent Current

800

mA

µA

V_OUT= 3.3V, V_IN= 3.6V and

V_IN= 5.5V

30

♦

V_INShutdown Current

V_OUTQuiescent Current

V_OUTShutdown Current

1

2

1

500

5

nA

µA

nA

D1 = D0 = 0V

V_OUT= 3.3V

500

D1 = D0 = 0V

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

2

ELECTRICAL CHARACTERISTICS

V_IN=PV_IN=V_SDN=3.6V, V_OUT=V_FB, I_O= 0mA, T_AMB= -40°C to +85°C, The ♦ denotes the specifications wich apply over

the full operating temperature range, unless otherwise specified.

PARAMETER

MIN

TYP

MAX

UNITS

CONDITIONS

♦

2.55

2.70

2.85

D1 = 0V, D0 = V_IN

UVLO Undervoltage Lockout

Threshold, V_INfalling

2.70

2.85

3.00

3.15

V

D1 = V_IN, D0 = 0V

3.00

40

D1 = V_IN, D0 = V_IN

T_AMB= 27° C

UVLO hysteresis

mV

V

♦

PWRGD Low Output Voltage

PWRGD Leakage Current

0.4

1

V_IN= 3.3V, I_SINK= 1mA

VPWRGD =3.6V

µA

FB Set Voltage -6%,

T_AMB=27° C

PWRGD Rising Threshold

-6

%

PWRGD Hysterisis

80

1

mV

nA

T_AMB=27° C

♦

D1,D0 Leakage Current

500

0.60

0.90

High to Low Transition

D1,D0 Input Threshold Voltage

FB Leakage Current

V

♦

1.25

1

1.8

Low to High Transition

FB = 1V

100

nA

D1

0

D0

0

Shutdown. All internal circuitry is disabled and the power switches are opened.

Device enabled, falling UVLO threshold =2.70V

0

1

0

Device enabled, falling UVLO threshold =2.85V

1

Device enabled, falling UVLO threshold =3.00V

Table 1. Operating Mode Definition

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

3

PIN DESCRIPTION

PIN NUMBER

PIN NAME

PV_IN

DESCRIPTION

1

2

3

Input voltage power pin. Inductor charging current passes through this pin.

Internal supply voltage. Control circuitry powered from this pin.

V_IN

PWR_GD

Open drain Power Good indicator. If V_FBis less than 750mV this pin is

pulled to ground. When V_FBis above 750mV this pin is open. Connect

a resistor from this pin to V_INor V_OUTto create a logic signal.

4

5

6

D1

D0

FB

Digital mode control input. See table I for definition.

External feedback network input connection. Connect a resistor from

FB to ground and FB to V_OUTto set the output voltage. This pin

regulates to the internal bandgap reference voltage of 0.8V.

7

V_OUT

Output voltage sense pin. Used by the timing circuit to set minimum on

and off times.

8

9

GND

P_GND

LX

Internal ground pin. Control circuitry returns current to this pin.

Power ground pin. Synchronous rectifier current returns through this pin.

10

Inductor switching node. Inductor tied between this pin and the output

capacitor to create regulated output voltage.

FUNCTIONAL DIAGRAM

PV_IN

V_OUT

Vin

DRVON

VOLOW

Internal Supply

MIN Ton

TONOVER

Min Ton = K_ON/(V_IN

-

V_OUT

)

TONOVER

Min Ton

OVR_I

M

1

Vos

+

VOLOW

REF'

DRVON

+

-

REF

-

+

C

ILIM/M

R

S

Q

_

Q

C

DRIVER

-

V_RAMP

FB'

+

-

FB

OVR_I

RST

DRVON

LX

+

REF

UVLO

Zero_X

D0

D1

C

One-Shot

=100ns

Ref

-

TSD

ILIM/M

Block

P_GND

BLANK

T_OFF

=

K_OFF/V_OUT

OVR_I

PWR_GD

+

-

750mV

GND

C

DRVON

BLANK

BLANK = Tblank(=100ns) or Toff = Koff/Vout

FB

UVLO

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

4

TYPICAL PERFORMANCE CHARACTERISTICS

Refer to the typical application schematic, T_AMB= +27°C

100

95

100

95

90

85

80

90

85

80

75

70

65

60

75

70

Vi=3.6V

Vi=3.9V

Vi=4.2V

Vi=5.0V

Vi=3.6V

Vi=3.9V

Vi=4.2V

Vi=5.0V

65

60

0.

1.0

10.0

100.0

1000.0

0.1

1.0

10.0

100.0

1000.0

ILoad (mA)

Figure 2. Efficiency vs Load, V_OUT= 1.5V

Figure 1. Efficiency vs Load, V_OUT= 3.3V

3.40

1.55

Vi=3.6V

Vi=3.9V

Vi=4.2V

Vi=5.0V

Vi=3.6V

Vi=3.9V

Vi=4.2V

Vi=5.0V

1.53

3.35

3.30

3.25

3.20

1.51

1.49

1.47

1.45

0

200

400

600

800

1000

0

200

400

600

800

1000

ILoad (mA)

Figure 3. Line/Load Rejection, V_OUT= 3.3V

Figure 4. Line/Load Rejection, V_OUT= 1.5V

50

500

Tamb = 85°C

Tamb = 25°C

Tamb = -40°C

Tamb = 85°C

Tamb = 25°C

Tamb = -40°C

40

30

20

10

400

300

200

100

0

3.0

3.3

3.6

3.9

4.2

3.3

3.6

3.9

4.2

Vin (V)

Figure 5. No Load Battery Current, V_OUT=3.3V

Figure 6. No Load Battery Current, V_OUT=1.5V

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

5

TYPICAL PERFORMANCE CHARATERISTICS

Refer to the typical application schematic, T_AMB= +27°C

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

3.6

3.9

4.2

4.5

4.8

5.1

5.4

3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4

Vin (V)

Figure 7. K_ONvs V_IN, V_OUT=3.3V

Figure 8. K_ONvs V_IN, V_OUT=1.5V

3.5

3.0

2.5

2.0

3.5

3.0

2.5

2.0

1.5

1.0

1.5

1.0

0.5

0.0

0.5

0.0

3.6

3.9

4.2

4.5

4.8

5.1

5.4

3.0

3.3

3.6

3.9

4.2

4.5

4.8

5.1

5.4

Vin (V)

Figure 9. K_OFFvs V_IN, V_OUT=3.3V

Figure 10. K_OFFvs V_IN, V_OUT=1.5V

700.0

600.0

500.0

700.0

600.0

500.0

400.0

300.0

400.0

300.0

200.0

100.0

0.0

200.0

100.0

0.0

Vout = 3.3V

Measured

Vout = 1.5V

Measured

Vout = 1.5V

Calculated

Vout = 3.3V

Calculated

3.5

4.0

4.5

5.0

3.4

3.8

4.2

4.6

5.0

Vin (V)

Figure 11. Ripple Frequency vs. V_IN, I_OUT=600mA,

V_OUT=3.3V

Figure 12. Ripple Frequency vs. V_IN, I_OUT=600mA,

V_OUT=1.5V

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

6

TYPICAL PERFORMANCE CHARATERISTICS

Refer to the typical application schematic, T_AMB= +27°C

CH.1=VIN

2.5V/div

CH.1=VIN

2.5V/div

CH.2=V_OUT

5.0V/div

CH.2=V_OUT

2.0V/div

CH.4=I_IN

0.5A/div

CH.4=I_IN

0.5A/div

Figure 14. V_INStart up, I_OUT=0.6A, V_OUT=1.5V

Figure 13. V_INStart up, I_OUT=0.6A, V_OUT=3.3V

CH.2=V_OUT

50mV/div. AC

CH.2=V_OUT

50mV/div. AC

CH.4=I_IN

0.5A/div

CH.4=I_OUT

0.5A/div

Figure 15. Load Step, I_OUT=0.4A to 0.8A, V_OUT=3.3V

Figure 16. Load Step, I_OUT=0.4A to 0.8A, V_OUT=1.5V

CH.1=V_SHDN

10V/div.

CH.1=V_SHDN

10V/div.

CH.2=V_OUT

2V/div. AC

CH.2=V_OUT

1V/div. AC

CH.4=ILx

0.5A/div

CH.4=ILx

0.5A/div

Figure 17. Start up from SHDN, I_OUT=0.6A, V_OUT=3.3V

Figure 18. Start up from SHDN, I_OUT=0.6A, V_OUT=1.5V

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

7

OPERATION

RAMP: CCM OPERATION

The SP6654 is a high efficiency synchronous

buck regulator with an input voltage range of

+2.7V to +5.5V and an output that is adjustable

between +1.0V and V_IN. The SP6654 features a

unique on-time control loop that runs in discon-

tinuous conduction mode (DCM) or continuous

conduction mode (CCM) using synchronous

rectification. Other features include, over-cur-

rent protection, digitally controlled enable and

under-voltagelockout,anexternalfeedbackpin,

and a power good indicator.

DRVON

I(L1)

FB’

REF, FB

V

OS

REF’

The SP6654 operates with a light load quiescent

current of 20µA using a 0.3Ω PMOS main

switch and a 0.3Ω NMOS synchronous switch.

It operates with excellent efficiency across the

entire load range, making it an ideal solution for

battery powered applications and low current

step-down conversions. The part smoothly tran-

sitionsintoa 100%dutycycle underheavyload/

low input voltage conditions.

RAMP: DCM OPERATION

DRVON

I(L1)

FB’

On-Time Control - Charge Phase

REF, FB

OS

The SP6654 uses a precision comparator and a

minimum on-time to regulate the output voltage

and control the inductor current under normal

load conditions. As the feedback pin drops be-

low the regulation point, the loop comparator

output goes high and closes the main switch.

The minimum on-timer is triggered, setting a

logic high for the duration defined by:

V

REF’

is added to FB and this creates the FB's signal.

This FB signal is applied to the negative termi-

nal of the loop comparator. To the positive

terminal of the loop comparator is applied the

REF voltage of 0.8V plus an offset voltage Vos

to compensate for the DC level of V_RAMPap-

plied to the negative terminal. The result is an

internal ramp with enough negative going offset

(approximately 50mV) to trip the loop com-

parator whenever FB falls below regulation.

K_ON

T_ON

=

V_IN- V_OUT

where:

K_ON= 2.25V*µsec constant

V_IN= V_INpin voltage

V_OUT= V_OUTpin voltage

To accommodate the use of ceramic and other

low ESR capacitors, an open loop ramp is added

to the feedback signal to mimic the inductor

current ripple. The following waveforms de-

scribetheidealrampoperationinbothCCMand

DCM operation.

The output of the loop comparator, a rising

VOLOW, causes a SET if BLANK = 0 and

OVR_I = 0. This starts inductor charging

(DRVON = 1) and starts the minimum on-timer.

The minimum on-timer times out and indicates

DRVON can be reset if the voltage loop is

satisfied. If V_OUTis still below the regulation

point RESET is held low until V_OUTis above

In either CCM or DCM, the negative going

ramp voltage (V_RAMPin the functional diagram)

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

8

OPERATION: Continued

L = Inductor value

regulation. Once RESET occurs T_ONminimum

is reset, and the T_OFFone-shot is triggered to

blank the loop comparator from starting a new

charge cycle for a minimum period. This blank-

ing period occurs during the noisy LX transition

to discharge, where spurious comparator states

may occur. For T_OFF> T_BLANKthe loop is in a

discharge or wait state until the loop comparator

starts the next charge cycle by DRVON going

high.

I_OUT= Load current

R_CH= PMOS on resistance, 0.3Ω typ.

If the I_OUT* R_CHterm is negligible compared

with(V_IN-V_OUT), theaboveequationsimplifies

to:

K_ON

I_LR

≈

L

Formostapplications,theinductorcurrentripple

controlled by the SP6654 is constant regardless

of input and output voltage. Because the output

voltage ripple is equal to:

If an over current occurs during charge the loop

is interrupted and DRVON is RESET. The off-

time one-shot pulse width is widened to T_OFF

=

K

_OFF/ V_OUT, which holds the loop in discharge

V

_OUT(ripple) = I_LR* R_ESR

where:

_ESR= ESR of the output capacitor

for that time. At the end of the off-time the loop

is released and controlled by VOLOW. In this

mannermaximuminductorcurrentiscontrolled

onacycle-by-cyclebasis.AnassertionofUVLO

(undervoltage lockout) or TSD (thermal shut-

down) holds the loop in no-charge until the fault

has ended.

R

the output ripple of the SP6654 regulator is

independent of the input and output voltages.

For battery powered applications, where the

batteryvoltagechangessignificantly,theSP6654

providesconstantoutputvoltageripplethrough-

out the battery lifetime. This greatly simplifies

the LC filter design.

On-Time Control - Discharge Phase

The discharge phase follows with the high side

PMOS switch opening and the low side NMOS

switch closing to provide a discharge path for

the inductor current. The decreasing inductor

current and the load current cause the output

voltage to drop. Under normal load conditions

when the inductor current is below the pro-

grammed limit, the off-time will continue until

the output voltage falls below the regulation

threshold, whichinitiatesanewchargecyclevia

the loop comparator.

The maximum loop frequency in CCM is de-

fined by the equation:

(V_IN- V_OUT

)

(V_OUT+ I_OUTR_DC)

*

F_LP

≈

K_ON[V_IN+ I_OUT(R_DC- R_CH)]

*

where:

F_LP= CCM loop frequency

R_DC= NMOS on resistance, 0.3Ω typ.

The inductor current “floats” in continuous con-

duction mode. During this mode the inductor

peak current is below the programmed limit and

thevalleycurrentisabovezero. Thisistosatisfy

load currents that are greater than half the mini-

mum current ripple. The current ripple, I_LR, is

defined by the equation:

Ignoring conduction losses simplifies the loop

frequency to:

1

V_OUT

V_IN

F_LP

≈

*

* (V_IN- V_OUT)

K_ON

AND’ing the loop comparator and the on-timer

reduces the switching frequency for load cur-

rentsbelowhalftheinductorripplecurrent. This

increases light load efficiency. The minimum

on-time insures that the inductor current ripple

is a minimum of K_ON/L, more than the load

K_ON

L

V_IN- V_OUT- I_OUTR_CH

*

I_LR

≈

*

V_IN- V_OUT

where:

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

9

OPERATION

with a second voltage drop representing the

maximum allowable inductor current. As the

two voltages become equal, the over-current

comparator triggers a minimum off-time one

shot. The off-time one shot forces the loop into

the discharge phase for a minimum T_OFFtime

causing the inductor current to decrease. At the

end of the off-time, loop control is handed back

to the AND’d on-time signal. If the output

voltage is still low, charging begins until the

output is in regulation or the current limit has

been reached again. During startup and over-

load conditions, the converter behaves like a

current source at the programmed limit minus

half the current ripple. The minimum T_OFFis

controlled by the equation:

current demands. The converter goes in to a

standard pulse frequency modulation (PFM)

mode where the switching frequency is propor-

tional to the load current.

Low Dropout and Load Transient Operation

AND’ingtheloopcomparatoralsoincreasesthe

duty ratio past the ideal D= V_OUT/V_INup to and

including 100%. Under a light to heavy load

transient, the loop comparator will hold the

main switch on longer than the minimum on

timer until the output is brought back into regu-

lation.

Also, as the input voltage supply drops down

close to the output voltage, the main MOSFET

resistance loss will dictate a much higher duty

ratio to regulate the output. Eventually as the

input voltage drops low enough, the output

voltage will follow, causing the loop compara-

tor to hold the converter at 100% duty cycle.

K_OFF

T_{OFF (MIN)}

=

V_OUT

Under-Voltage Lockout

This mode is critical in extending battery life

when the output voltage is at or above the

minimum usable input voltage. The dropout

voltage is the minimum (V_IN-V_OUT) below

which the output regulation cannot be main-

tained. The dropout voltage of SP6654 is equal

to I_L* (0.3Ω+ R_L1) where 0.3Ω is the typical

R_DS(ON)of the P-Channel MOSFET and R_Lis

the DC resistance of the inductor.

The SP6654 is equipped with a programmable

under-voltage lockout to protect the input bat-

tery source from excessive currents when sub-

stantially discharged. When the input supply is

belowtheUVLOthresholdbothpowerswitches

are open to prevent inductor current from flow-

ing. The three levels of falling input voltage

UVLO threshold are shown in Table 1, with a

typical hysteresis of 120mV to prevent chatter-

ing due to the impedance of the input source.

During UVLO, PWR_GDis forced low.

The SP6654 has been designed to operate in

dropout with a light load Iq of only 80µA. The

on-time control circuit seamlessly operates the

converter between CCM, DCM, and low drop-

out modes without the need for compensation.

Theconverter’stransientresponseisquicksince

thereisnocompensatederroramplifierintheloop.

Under-Current Detection

The synchronous rectifier is comprised of an

inductor discharge switch, a voltage compara-

tor, and a driver latch. During the off-time,

positive inductor current flows into the PGND

pin 9 through the low side NMOS switch to LX

pin 10, through the inductor and the output

capacitor, and back to pin 9. The comparator

monitors the voltage drop across the discharge

NMOS.Astheinductorcurrentapproacheszero,

the channel voltage sign goes from negative to

positive, causing the comparator to trigger the

driver latch and open the switch to prevent

Inductor Over-Current Protection

To reduce the light load dropout Iq, the SP6654

over-current system is only enabled when I_L1

>

400mA. The inductor over-current protection

circuitry is programmed to limit the peak induc-

tor current to 1.25A. This is done during the on-

time by comparing the source to drain voltage

drop of the PMOS passing the inductor current

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

10

OPERATION: Continued

inductor current reversal. This circuit along

with the on-timer puts the converter into PFM

mode and improves light load efficiency when

the load current is less than half the inductor

ripple current defined by K_ON/L.

current to ground. Tying a resistor from pin 3 to

V_INor V_OUTcreates a logic level power good

indicator. PWR_GDisforcedlowwheninUVLO.

External Feedback Pin

The FB pin 6 is compared to an internal refer-

ence voltage of 0.8V to regulate the SP6654

output. The output voltage can be externally

programmed within the range +1.0V to +5.0V

by tying a resistor from FB to ground and FB to

V_OUT(pin7). See the applications section for

resistor selection information.

Shutdown/Enable Control

The D0, D1 pins 4,5 of the device are logic level

control pins that according to Table 1 shut down

the converter when both are a logic low, or

enables the converter when either are a logic

high. When the converter is shut down, the

power switches are opened and all circuit bias-

ing is extinguished leaving only junction leak-

age currents on supply pins 1 and 2. After pins

4 or 5 are brought high to enable the converter,

there is a turn on delay to allow the regulator

circuitry to reestablish itself. Power conversion

begins with the assertion of the internal refer-

ence ready signal which occurs approximately

150µs after the enable signal is received.

Power Good Indicator

A power good indicator looks at the voltage on

the feedback node. When this voltage is below

0.75V, the open drain NMOS on pin 3 sinks

APPLICATION INFORMATION

Inductor Selection

would be fairly constant for different input and

output voltages, simplifying the selection of com-

ponents for the SP6654 power circuit. Other

inductor values could be selected, as shown in

Table 2 Components Selection. Using a larger

value than 10µH in an attempt to reduce output

voltageripplewouldreduceinductorcurrentripple

and may not produce as stable an output ripple.

For larger inductors with the SP6654, which has

a peak inductor current of 1.25A, most 15µH or

22µH inductors would have to be larger physi-

cal sizes, limiting their use in small portable

applications. Smaller values like 6.8µH would

more easily meet the 1.25A limit and come in

small case sizes, and the increased inductor

The SP6654 uses a specially adapted minimum

on-time control of regulation utilizing a preci-

sion comparator and bandgap reference. This

adaptive minimum on-time control has the ad-

vantage of setting a constant current ripple for a

giveninductorsize. Fromtheoperationssection

it has been shown:

K_ON

Inductor Current Ripple, I_LR

≈

L

For the typical SP6654 application circuit with

inductor size of 10µH, and K_ONof 2V*µsec, the

SP6654currentripplewouldbeabout200mA,and

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

11

APPLICATION INFORMATION

current ripple of almost 300mA would produce

very stable regulation and fast load transient

response at the expense of slightly reduced

efficiency.

For the 22µF POSCAP with 0.04Ω ESR, and a

10µH inductor yielding 200mA inductor current

ripple I_LR, the V_OUTripple would be 8mVpp.

Since 8mV is a very small signal level, the actual

value would probably be larger due to noise and

layout issues, but this illustrates that the SP6654

output ripple can be very low indeed. To improve

stability, a small ceramic capacitor, C_F= 22pF

should be paralleled with the feedback voltage

divider RF, as shown on the typical application

schematic on page 1. Another function of the

output capacitance is to hold up the output voltage

during the load transients and prevent excessive

overshoot and undershoot. The typical perfor-

mance characteristics curves show very good load

step transient response for the SP6654 with the

recommended output capacitance of 22µF ce-

ramic.

Other inductor parameters are important: the in-

ductorcurrentratingandtheDCresistance. When

the current through the inductor reaches the level

of I_SAT, the inductance drops to 70% of the

nominal value. This non-linear change can cause

stability problems or excessive fluctuation in in-

ductor current ripple. To avoid this, the inductor

should be selected with saturation current at least

equal to the maximum output current of the con-

verter plus half the inductor current ripple. To

provide the best performance in dynamic condi-

tionssuchasstart-upandloadtransients,inductors

should be chosen with saturation current close to

the SP6654 inductor current limit of 1.25A.

The input capacitor will reduce the peak current

drawn from the battery, improve efficiency and

significantly reduce high frequency noises in-

duced by a switching power supply. The typical

input capacitor for the SP6654 is 22µF ceramic,

POSCAP or Aluminum Polymer. These capaci-

tors will provide good high frequency bypassing

and their low ESR will reduce resistive losses for

higher efficiency. An RC filter is recommended

for the V_INpin 2 to effectively reduce the noise for

the ICs analog supply rail which powers sensitive

circuits. This time constant needs to be at least 5

times greater than the switching period, which is

calculated as 1/FLP during the CCM mode. The

typical application schematic uses the values of

R_VIN= 10Ω and C_VIN= 1µF to meet these require-

ments.

DC resistance, another important inductor charac-

teristic, directly affects the efficiency of the con-

verter, so inductors with minimum DC resistance

should be chosen for high efficiency designs.

Recommended inductors with low DC resistance

are listed in table 2. Preferred inductors for on

board power supplies with the SP6654 are mag-

neticallyshieldedtypestominimizeradiatedmag-

netic field emissions.

Capacitor Selection

The SP6654 has been designed to work with very

low ESR output capacitors (listed in Table 2

ComponentSelection)whichforthetypicalappli-

cation circuit are 22µF ceramic, POSCAP or Alu-

minum Polymer. These capacitors combine small

size, low ESR and good value. To regulate the

output with low ESR capacitors of 0.01Ω or less,

an internal ramp voltage V_RAMPhas been added to

the FB signal to reliably trip the loop comparator

(as described in the Operations section).

Output ripple for a buck regulator is determined

mostly by output capacitor ESR, which for the

SP6654withaconstantinductorcurrentripplecan

be expressed as:

V_OUT(ripple) = I_LRR_ESR

*

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

12

APPLICATION INFORMATION

INDUCTORS SURFACE MOUNT

Inductor Specification

Inductance

(µH)

Manufacturer/Part No.

Series R Ω

I_SAT(A)

Size

Inductor Type

Manufacturer

Website

LxW(mm)

5.7 x 5.5

5.6 x 5.2

6.6 x 4.5

6.0 x 5.4

4.7 x 4.5

5.6 x 5.2

6.6 x 4.5

6.0 x 5.4

Ht. (mm)

3.0

10

Sumida CDRH5D28-100

TDK RLF5018T-100MR94

Coilcraft DO1608C-103

Coilcraft LPO6013-103

Sumida CDRH5D28-6R8

TDK RLF5018T-6R8M1R1

Coilcraft DO1608C-682

Coilcraft LPO6013-103

0.048

0.056

0.160

0.300

0.081

0.47

1.30

0.94

1.10

0.70

1.12

1.10

1.20

0.60

Shielded Ferrite Core sumida.com

Shielded Ferrite Core tdk.com

2.0

10

2.9

Unshielded Ferrite Core coilcraft.com

10

1.3

6.8

3.0

Shielded Ferrite Core

sumida.com

tdk.com

2.0

0.130

0.200

2.9

Unshielded Ferrite Core coilcraft.com

1.3

CAPACITORS - SURFACE MOUNT

Capacitor Specification

Capacitance

Manufacturer/Part No.

ESR

RippleCurrent

Size

Voltage

(V)

Capacitor Type

Manufacturer

Website

(µF)

Ω (max) (A) @ 45°C LxW(mm) Ht. (mm)

22

47

TDK C3216X5R0J226M

SANYO 6APA22M

0.002

0.040

0.002

0.040

3.00

1.90

4.00

1.90

3.2 x 1.6

7.3 x 4.3

3.2 x 1.6

6.0 x 3.2

1.6

2.0

1.6

2.8

6.3

X5R Ceramic

POSCAP

tdk.com

sanyovideo.com

tdk.com

TDK C3225X5R0J46M

SANYO 6TPA47M

X5R Ceramic

POSCAP

sanyovideo.com

Note: Components highlighted in bold are those used on the SP6654 Evaluation Board.

Table 2 Component Selection

thetypical10µHinductorapplicationon100mA

is half the 200mA inductor current ripple), the

output ripple frequency will be fairly constant.

Fromtheoperationssection,thismaximumloop

frequency in continuous conduction mode is:

Output Voltage Program

The output voltage is programmed by the external

divider, as shown in the typical application circuit

on page 1. First pick a value for R_Ithat is no larger

than 300K. Too large a value of R_Iwill reduce the

AC voltage seen by the loop comparator since the

internal FB pin capacitance can form a low pass

filter with R_Fin parallel with R_I. The formula for

R_Fwith a given R_Iand output voltage is:

1

V_OUT

V_IN

_*(V_IN- V_OUT

)

F_LP

≈

*

K_ON

Data for loop frequency, as measured from

output voltage ripple frequency, can be found in

the typical performance curves.

V_OUT

R_F= (

- 1 ) • R_I

0.8V

Layout Considerations

Output Voltage Ripple Frequency

Proper layout of the power and control circuits is

necessary in a switching power supply to obtain

good output regulation with stability and a mini-

mum of output noise. The SP6654 application

circuit can be made very small and reside close to

the IC for best performance and solution size, as

long as some layout techniques are taken into

consideration. To avoid excessive interference

betweentheSP6654highfrequencyconverterand

An important consideration in a power supply

application is the frequency value of the output

ripple.GiventhecontroltechniqueoftheSP6654

(as described in the operations section), the

frequency of the output ripple will vary when in

light to moderate load in the discontinuous or

PFM mode. For moderate to heavy loads greater

than about 100mA inductor current ripple, (for

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

13

APPLICATION INFORMATION

the other active components on the board, some

rules should be followed. Refer to the typical

application schematic on page 1 and the sample

PCB layout shown in the following figures to

illustrate how to layout a SP6654 power supply.

Power loops on the input and output of the con-

verter should be laid out with the shortest and

widest traces possible. The longer and narrower

the trace, the higher the resistance and inductance

it will have. The length of traces in series with the

capacitors increases its ESR and ESL and reduces

their effectiveness at high frequencies. Therefore,

putthe1µFbypasscapacitorasclosetotheV_INand

GND pins of the converter as possible, the 22µF

Avoid injecting noise into the sensitive part of

circuit via the ground plane. Input and output

capacitorsconducthighfrequencycurrentthrough

the ground plane. Separate the control and power

grounds and connect them together at a single

point. Power ground plane is shown in the figure

titled PCB top sample layout and connects the

ground of the C_OUTcapacitor to the ground of the

C_INclose to the P_VINpin and the 22µF output

capacitor as close to the inductor as possible. The

external voltage feedback network R_F, R_Iand

feedforward capacitor C_Fshould be placed very

close to the FB pin. Any noise traces like the LX

pinshouldbekeptawayfromthevoltagefeedback

network and separated from it by using power

ground copper to minimize EMI.

C_INcapacitor and then to the PGND pin 10. The

control ground plane connects from pin 9 GND to

ground of the C_VINcapacitor and the R_Iground

returnofthefeedbackresistor. Thesetwoseparate

control and power ground planes come together in

the figure titled PCB top sample layout where

SP6654 pin 9 GND is connected to pin 10 PGND.

SP6654EB

PWRGD

Figure 19. SP6654 PCB Component Sample Layout

Figure 20. SP6654 PCB Top Sample Layout

Figure 21. SP6654 PCB Bottom Sample Layout

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

14

PACKAGE: 10 PIN MSOP

D

e1

Ø1

R1

R

E/2

Gauge Plane

L2

E

E1

Ø

Ø1

Seating Plane

L

L1

1

2

e

Pin #1 indentifier must be indicated within this shaded area (D/2 * E1/2)

B

10 Pin MSOP JEDEC MO-187 (BA) Variation

MIN

NOM

MAX

SYMBOL

A

A1

A2

b

-

0

0.75

0.17

0.08

-

1.1

0.15

0.95

0.27

0.23

0.85

-

c

D

3.00 BSC

A2

A

E

4.90 BSC

E1

e

3.00 BSC

0.50 BSC

b

A1

e1

L

2.00 BSC

0.4

0.6

0.8

L1

L2

N

R

R1

ø

0.95 REF

0.25 BSC

b

-

10

-

8º

15º

WITH PLATING

0.07

0º

ø1

0º

c

Note: Dimensions in (mm)

BASE METAL

Section B-B

1

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

15

PACKAGE: 10 PIN DFN

D

A3

D/2

E/2

E

A1

Top View

A

Side View

3x3 10 Pin DFN JEDEC MO-229 (VEED-5)

VARIATION

D2

2

1

MIN

0.8

0

NOM

0.9

0.02

0.65

0.20 REF

0.25

3.00 BSC

MAX

1

0.05

0.8

SYMBOL

A

A1

A2

A3

b

D

D2

e

0.55

0.18

2.2

0.3

2.7

E2

0.5 PITCH

E

3.00 BSC

E2

K

L

1.4

0.2

0.3

-

0.4

1.75

-

0.5

K

L

b

e

Note: Dimensions in (mm)

Bottom View

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

16

ORDERING INFORMATION

Part Number

Operating Temperature Range

Top Mark

Package Type

SP6654EU..............................-40°C to +85°C.............................SP6654EU........................10 Pin MSOP

SP6654EU/TR........................-40°C to +85°C.............................SP6654EU........................10 Pin MSOP

SP6654ER..............................-40°C to +85°C.............................SP6654ER........................10 Pin DFN

SP6654ER/TR........................-40°C to +85°C.............................SP6654ER........................10 Pin DFN

Available in lead free packaging. To order add "-L" suffix to part number.

Example: SP6654EU/TR = standard; SP6654EU-L/TR = lead free

/TR = Tape and Reel

Pack quantity is 2,500 for MSOP and 3,000 for DFN

Corporation

ANALOGEXCELLENCE

Sipex Corporation

Headquarters and

Sales Office

233 South Hillview Drive

Milpitas, CA 95035

TEL: (408) 934-7500

FAX: (408) 935-7600

Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the

application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.

Date: 2/1/05

SP6654 High Efficiency 800mA Synchronous Buck Regulator

17


型号：	SP6654ER-L/TR
厂家：	SIPEX CORPORATION
描述：	Switching Regulator, 2A, PDSO10, LEAD FREE, MO-229-VEED, DFN-10 开关光电二极管
文件：	总17页 (文件大小：180K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SP6654ER-L/TR [SIPEX]

相关型号：

SP6654ER/TR

SP6654EU

SP6654EU-L

SP6654EU-L/TR

SP6654EU/TR

SP6654_05

SP6655

SP6655EB

SP6655ER

SP6655ER-L

SP6655ER/TR

SP6655ER2