CXG1091TN [SONY]

SP4T GSM Dualband Antenna Switch 5V + Logic; SP4T GSM双频天线开关+ 5V逻辑
CXG1091TN
型号: CXG1091TN
厂家: SONY CORPORATION    SONY CORPORATION
描述:

SP4T GSM Dualband Antenna Switch 5V + Logic
SP4T GSM双频天线开关+ 5V逻辑

开关 GSM
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中文:  中文翻译
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CXG1091TN  
SP4T GSM Dualband Antenna Switch 5V + Logic  
For the availability of this product, please contact the sales office.  
Description  
16 pin TSSOP (Plastic)  
The SP4T + logic is a high power antenna switch  
MMIC for use in dualband GSM handsets.  
One Antenna can be routed to either of the 2 Tx or  
2 Rx ports. It operates from 3 CMOS control lines (Tx  
ON/OFF and GSM900/1800 and Standby).  
The Sony's J-FET process is used for low insertion  
loss.  
Features  
3 CMOS compatible control lines  
34dBm power handling at 5.0V (GSM900)  
Low second harmonic < – 30dBm at 34dBm  
Small package size: 16-pin TSSOP (3.9 × 4.1mm)  
Applications  
Dualband handsets using combinations of GSM900/GSM1800/GSM1900 and DECT  
Structure  
GaAs J-FET MMIC  
Truth Table  
On Pass  
Ant.-Tx1 GSM900  
Ant.-Tx2 GSM1800  
Ant.-Rx1 GSM900/1800  
Ant.-Rx2 GSM900/1800  
OFF  
Band select Tx (H)/Rx (L)  
Standby  
H
L
H
H
L
H
H
H
H
L
L
H
L
Absolute Maximum Ratings (Ta = 25°C)  
Bias voltage  
VDD  
Vctl  
7
V
V
Control voltage  
5
Operating temperature Topr  
Storage temperature Tstg  
–35 to +85  
–65 to +150  
°C  
°C  
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.  
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by  
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the  
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.  
– 1 –  
E99758A9Y-PS  
CXG1091TN  
Electrical Characteristics  
(Ta = 25°C)  
Item  
Symbol  
Port  
Condition  
Min. Typ. Max. Unit  
1
0.5  
0.6  
0.55  
0.7  
25  
0.75  
0.85  
0.75  
0.9  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
Ant-Tx1, Tx2  
2
3
4
1
2
3
4
Insertion loss  
Isolation  
IL  
Ant-Rx1, Rx2  
Ant-Tx1, Tx2  
Ant-Rx1, Rx2  
20  
17  
24  
20  
20  
ISO.  
28  
24  
VSWR  
VSWR  
2fo  
1.2  
1,  
1,  
1,  
2
2
2
–30 dBm  
–30 dBm  
dBm  
Harmonics Note)  
Ant-Tx1, Tx2  
Ant-Tx1, Tx2  
3fo  
P1dB compression input power  
Switching speed  
P1dB  
TSW  
ICTL  
IDD  
36  
1
µs  
Control current  
100  
0.5  
µA  
Supply current  
STBY = H  
STBY = L  
1
mA  
µA  
Leakage current  
IIK  
50  
1
Pin = 34dBm, 880 to 915MHz, VDD = 5.0V  
Pin = 32dBm, 1710 to 1785MHz, VDD = 5.0V  
Pin = 10dBm, 925 to 960MHz  
2
3
4
Pin = 10dBm, 1805 to 1880MHz  
Note) Harmonics measured with Tx inputs harmonically matched.  
CMOS Logic Values  
Logic  
Min.  
High  
2.4V  
Low  
(Ta = 25°C)  
Max.  
Typ.  
3.0V  
0.0V  
0.8V  
– 2 –  
CXG1091TN  
Recommended Circuit  
100pF  
100pF  
100pF  
100pF  
9
GND  
8
7
6
5
4
3
2
1
Tx1  
GND  
Tx2  
10 GND  
100pF  
11 ANT  
RRF  
(
)
12 GND  
GND  
Rx1  
13 VDD  
100pF  
14 GND  
GND  
Rx2  
15 Band Select  
100pF  
100pF  
Tx/Rx  
STDBY  
16  
100pF  
PCB Layout Recommendations  
• As indicated in the diagram AC coupling capacitors are necessary to the Ant, Tx1, Tx2, Rx1, Rx2 pins.  
• Ground plane should be included under the device and all ground pins connected to this.  
• RRF (68k) is used to be stabilized the electrical characteristics at high power signal input.  
– 3 –  
CXG1091TN  
Package Outline  
Unit: mm  
16PIN TSSOP(PLASTIC)  
1.2MAX  
S
4.1  
2.05  
16  
A
0.08  
S
B
X2  
9
0.2 S A  
B
X
0.1 ± 0.05  
0.25  
X
1
8
X4  
0.1 S A  
B
0° to 8°  
0.5  
M
0.08  
S A  
B
0.2 ± 0.02  
+ 0.036  
0.22 – 0.03  
B
DETAIL  
PACKAGE STRUCTURE  
EPOXY RESIN  
PACKAGE MATERIAL  
LEAD TREATMENT  
LEAD MATERIAL  
PACKAGE MASS  
SOLDER PLATING  
SONY CODE  
TSSOP-16P-L01  
EIAJ CODE  
COPPER ALLOY  
0.03g  
JEDEC CODE  
– 4 –  

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