CXK58257ATM-70L [SONY]

Standard SRAM, 32KX8, 70ns, CMOS, PDSO28, 8 X 13.4 MM, PLASTIC, TSOP-28;
CXK58257ATM-70L
型号: CXK58257ATM-70L
厂家: SONY CORPORATION    SONY CORPORATION
描述:

Standard SRAM, 32KX8, 70ns, CMOS, PDSO28, 8 X 13.4 MM, PLASTIC, TSOP-28

静态存储器 光电二极管
文件: 总10页 (文件大小:67K)
中文:  中文翻译
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-70L/10L  
CXK58257ATM/AYM  
-70LL/10LL  
32768-word x 8-bit High Speed CMOS Static RAM  
Block Diagram  
Description  
CXK58257ATM/AYM is a 256K-bit, 32,768-word-by-  
8-bit, CMOS static RAM.  
A14  
A13  
A12  
A11  
A9  
A8  
A7  
A6  
A5  
It is suitable for portable and battery back-up systems  
which require extremely small packages and low  
stand-by current.  
VCC  
Memory  
Row  
Decoder  
Matrix  
512x512  
Buffer  
GND  
Features  
• Thin small-outline package:  
CXK58257ATM:  
CXK58257AYM:  
8mm x 13.4mm, 28 pin TSOP  
8mm x 13.4mm, 28 pin TSOP  
A10  
A4  
A3  
A2  
A1  
A0  
(Mirror image pinout)  
• Low stand-by current:  
L-Version:  
I/O Gate  
Column  
Decoder  
Buffer  
Buffer  
25µA (max.) @VCC = 5.5V, Ta = 0 to +70°C  
LL-Version:  
OE  
5µA (max.) @VCC = 5.5V, Ta = 0 to +70°C  
• Low voltage data retention: 2.0V (min.)  
WE  
I/O Buffer  
• Fast access time:  
(Access time)  
CE  
I/O1  
I/O8  
CXK58257ATM/AYM-70L, -70LL  
CXK58257ATM/AYM-10L, -10LL  
• Single + 5V supply: 5V ± 10 %  
70ns (max.)  
100ns (max.)  
Function  
32768-word-x-8-bit static RAM  
Structure  
Silicon gate CMOS IC  
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication  
or otherwise under any patents or other rights. Application circuits shown, if any, are typical examples illustrating the operation of the devices.  
Sony cannot assume responsibility for any problems arising out of the use of these circuits.  
–1–  
E9044A46-ST  
CXK58257ATM/AYM  
Pin Configuration (Top View)  
Pin Description  
Symbol  
Description  
Address input  
OE  
A11  
A9  
22  
23  
24  
25  
26  
27  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
A10  
CE  
A0 to A14  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
GND  
I/O3  
I/O2  
I/O1  
A0  
I/O1 to l/O8 Data input/output  
A8  
A13  
WE  
VCC  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
CE  
Chip enable input  
Write enable input  
Output enable input  
+5V power supply  
Ground  
28  
CXK5V8257ATM  
WE  
OE  
1
2
3
4
5
6
7
VCC  
GND  
A1  
A2  
8
A3  
A4  
A5  
A6  
A7  
A12  
A14  
VCC  
WE  
A13  
A8  
A9  
A11  
OE  
7
6
5
4
3
2
1
28  
27  
26  
25  
24  
23  
22  
8
9
A2  
A1  
A0  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
I/O1  
I/O2  
I/O3  
GND  
I/O4  
I/O5  
I/O6  
I/O7  
I/O8  
CE  
CXK5V8257AYM  
(Mirror Image Pinout)  
A10  
Absolute Maximum Ratings  
(Ta = +25°C, GND = 0V)  
Item  
Symbol  
VCC  
VIN  
Rating  
Unit  
Supply voltage  
–0.5 to +7.0  
V
Input voltage  
–0.5(1) to VCC +0.5  
–0.5(1) to VCC +0.5  
0.7  
V
V
Input and output voltage  
Allowable power dissipation  
Operating temperature  
Storage temperature  
Soldering temperature  
NOTE:  
Vl/O  
PD  
W
Topr  
0 to +70  
°C  
Tstg  
–55 to +150  
235 • 10  
°C  
Tsolder  
°C • sec  
1. VIN,VI/O = –3.0V min. for pulse width less than 50ns.  
–2–  
CXK58257ATM/AYM  
Truth Table  
CE  
H
L
OE  
X
WE  
X
Mode  
Not selected  
Output disable  
Read  
I/O1 to l/O8  
High Z  
VCC Current  
ISB1, ISB2  
ICC1, ICC2  
ICC1, ICC2  
ICC1, ICC2  
H
H
High Z  
L
L
H
Data out  
Data in  
L
X
L
Write  
NOTE:  
X: “H” or “L”  
DC Recommended Operating Conditions  
(Ta = 0 to +70°C, GND = 0V)  
Item  
Symbol  
VCC  
VIH  
Min.  
4.5  
Typ.  
5.0  
Max.  
5.5  
Unit  
V
Supply voltage  
Input high voltage  
Input low voltage  
2.2  
–0.3(1)  
VCC +0.3  
0.8  
V
VIL  
V
NOTE:  
1. VIL = –3.0V min. for pulse width less than 50ns.  
Electrical Characteristics  
DC Characteristics  
(VCC = 5V ±10V%, GND = 0V, Ta = 0 to = +70°C)  
-70L/10L -70LL/10LL  
Min. Typ.(1) Max. Min. Typ.(1) Max. Unit  
Item  
Symbol  
ILI  
Test Conditions  
Input leakage current  
Output leakage current  
VIN = GND to VCC  
–0.5  
–0.5  
0.5 –0.5  
0.5 –0.5  
0.5  
0.5  
µA  
µA  
ILO  
CE = VIH or OE = VIH  
Vl/O = GND to VCC  
Operating power  
supply current  
ICC1  
CE = VIL, VIN = VIH or VIL,  
IOUT = 0mA  
3
1
10  
5
3
1
10  
5
mA  
CE 0.2V  
VIN 0.2V or VCC – 0.2V  
Average operating  
current  
ICC2  
ISB1  
Cycle = Min.,  
Duty = 100%  
IOUT = 0mA  
70L/70LL  
30  
23  
50  
50  
30  
23  
50  
50  
10L/10LL  
mA  
µA  
Standby current  
CE VCC – 0.2V  
0 to +70°C  
0 to +40°C  
+25°C  
2.4  
25  
5
2.4  
5
1
0.5  
0.4  
2
0.2  
0.4  
0.5  
2
ISB2  
VOH  
VOL  
CE = VIH  
2
mA  
V
Output high voltage  
Output low voltage  
IOH = –1.0mA  
IOL = 2.1mA  
0.4  
0.4  
V
NOTE:  
1. VCC = 5V, Ta = +25°C  
–3–  
CXK58257ATM/AYM  
I/O Capacitance  
(Ta = +25°C, f = 1MHz)  
Item  
Symbol  
CIN  
Test Conditions  
VIN = 0V  
Min.  
Max.  
Unit  
pF  
Input capacitance  
I/O capacitance  
6
8
CI/O  
Vl/O = 0V  
pF  
NOTE: This parameter is sampled and is not 100% tested.  
AC Characteristics  
AC Test Conditions  
(VCC = 5V ±10V, Ta = 0 to +70°C)  
Conditions  
VIH = 2.2V  
Item  
Input pulse high level  
Input pulse low level  
Input rise time  
TTL  
VIL = 0.8V  
tr = 5ns  
CL  
Input fall time  
tf = 5ns  
Input and output reference level  
Output load conditions 10L/10LL  
70L/70LL  
1.5V  
CL(1) = 100pF, 1TTL  
CL(1) = 30pF, 1TTL  
NOTE:  
1. CL includes scope and jig capacitances.  
–4–  
CXK58257ATM/AYM  
Read Cycle  
-70L/70LL  
-10L/10LL  
Item  
Symbol  
tRC  
Min.  
70  
20  
10  
5
Max.  
Min.  
100  
20  
10  
5
Max.  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Read cycle time  
70  
70  
35  
30  
30  
100  
100  
50  
Address access time  
tAA  
Chip enable access time  
tCO  
Output enable to output valid  
tOE  
Output hold from address change  
Chip enable to output in low Z (CE)  
Output enable to output in low Z (OE)  
Chip disable to output in high Z (CE)  
Output disable to output in high Z (OE)  
tOH  
tLZ  
tOLZ  
(1)  
tHZ  
0
0
30  
35  
(1)  
tOHZ  
0
0
NOTE:  
1. tHZ, tOHZ are defined as the time required for outputs to turn to high impedance state and are not referred to as output voltage  
levels.  
Write Cycle  
-70L/70LL  
-10L/10LL  
Item  
Symbol  
tWC  
tAW  
Min.  
70  
65  
65  
30  
0
Max.  
Min.  
100  
80  
80  
35  
0
Max.  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Write cycle time  
25  
25  
Address valid to end of write  
Chip enable to end of write  
Data to write time overlap  
Data hold from write time  
Write pulse width  
tCW  
tDW  
tDH  
tWP  
50  
0
60  
0
Address setup time  
tAS  
Write recovery time (WE)  
Write recovery time (CE)  
Output active from end of write  
Write to output in high Z  
tWR  
tWR1  
tOW  
0
0
0
0
10  
0
10  
0
(1)  
tWHZ  
NOTE:  
1. tWHZ is defined as the time required for outputs to turn to high impedance state and is not referred to as output voltage level.  
–5–  
CXK58257ATM/AYM  
Timing Waveform  
Read Cycle (1): CE = OE = VIL, WE = VIH  
tRC  
Address  
tAA  
tOH  
Data out Previous data valid  
Data valid  
Read Cycle (2): WE = VIH  
tRC  
Address  
CE  
tAA  
tCO  
tHZ  
tLZ  
OE  
tOE  
tOHZ  
tOLZ  
Data out  
Data valid  
High impedance  
Write Cycle (1): WE Control  
tWC  
Address  
OE  
tWR  
tAW  
tCW  
CE  
tAS  
tWP  
WE  
tDW  
Data valid  
tDH  
Data in  
tWHZ  
tOW  
Data out  
High impedance  
–6–  
CXK58257ATM/AYM  
Write Cycle (2): CE Control  
tWC  
Address  
OE  
tAW  
tWR1  
tAS  
tCW  
CE  
tWP  
WE  
tDW  
Data valid  
tDH  
Data in  
tWHZ  
tLZ  
Data out  
High impedance  
NOTE:  
If the I/O pins are in the output state, the data input signals of the opposite phase to the output must not be applied.  
Data Retention Characteristics  
(Ta = 0 to +70°C )  
-70L/10L  
-70LL/10LL  
Item  
Symbol  
VDR  
Test Conditions  
CE VCC – 2.0V  
Min.  
2.0  
Typ.  
Max.  
5.5  
10  
2
Min.  
2.0  
Typ.  
Max.  
5.5  
3
Unit  
V
Data retention voltage  
Data retention current  
ICCDR1  
VCC = 3.0V  
0 to +70°C  
0 to +40°C  
+25°C  
µA  
CE 2.8V  
0.6  
0.3  
5
0.25  
0.5  
1
0.1  
0.2  
ICCDR2  
VCC = 2.0V to 5.5V  
25  
µA  
CE VCC –2.0V  
Data retention setup time  
tCDRS  
tR  
Chip disable to data  
retention mode  
0
0
ns  
(1)  
(1)  
Recovery time  
NOTE:  
tRC  
tRC  
ms  
1. tRC: Read cycle time  
Data Retention Waveform  
Data retention mode  
tCDRS  
tR  
VCC  
4.5V  
2.2V  
VDR  
CE  
CE VCC – 0.2V  
GND  
–7–  
CXK58257ATM/AYM  
Example of Representative Characteristics  
Supply Current vs. Supply Voltage  
Supply Current vs. Ambient Temperature  
1.4  
1.4  
ICC1  
1.2  
1.0  
1.2  
1.0  
0.8  
0.8  
ICC2  
ICC2  
ICC1  
0.8  
Ta = +25°C  
VCC = 5.0V  
0.6  
4.5  
4.75  
5.0  
5.25  
5.5  
0
20  
40  
60  
80  
VCC—Supply Voltage (V)  
Ta—Ambient Temperature (°C)  
Supply Current vs. Frequency  
Access Time vs. Load Capacitance  
120 100  
70 ns  
1.0  
1.6  
1.4  
1.2  
tOE  
Write  
0.75  
0.5  
Read  
tAA, tCO  
VCC = 5.0V  
Ta = +25°C  
0.25  
0
1.0  
0.8  
0
4
8
12  
16  
0
100  
200  
300  
400  
CL—Load Capacitance (pF)  
Frequency (1/tRC, 1/tWC) (MHz)  
Access Time vs. Ambient Temperature  
Access Time vs. Supply Voltage  
1.4  
1.4  
1.2  
1.0  
1.2  
1.0  
tAA, tCO  
tOE  
,
tAA, tCO  
tOE  
0.8  
0.6  
0.8  
0.6  
VCC = 5.0V  
Ta = +25°C  
4.5  
4.75  
5.0  
5.25  
5.5  
0
20  
40  
60  
80  
VCC—Supply Voltage (V)  
Ta—Ambient Temperature (°C)  
–8–  
CXK58257ATM/AYM  
Standby Current vs. Ambient Temperature  
Standby Current vs. Supply Voltage  
20  
1.4  
10  
5
1.0  
0.6  
0.2  
ISB1  
2
1
ISB2  
VCC = 5.0V  
Ta = +25°C  
0.5  
0.2  
2.0  
3.0  
4.0  
5.0  
6.0  
0
20  
40  
60  
80  
VCC—Supply Voltage (V)  
Ta—Ambient Temperature (°C)  
Input Voltage Level vs. Supply Voltage  
Standby Current vs. Ambient Temperature  
1.2  
1.1  
1.0  
1.4  
1.2  
1.0  
0.8  
0.6  
VIL, VIH  
0.9  
0.8  
VCC = 5.0V  
Ta = +25°C  
4.5  
4.75  
5.0  
5.25  
5.5  
0
20  
40  
60  
80  
VCC—Supply Voltage (V)  
Ta—Ambient Temperature (°C)  
Output Low Current vs. Output Low Voltage  
Output High Current vs. Output High Voltage  
1.4  
1.8  
1.2  
1.0  
1.4  
1.0  
0.8  
VCC = 5.0V  
VCC = 5.0V  
0.6  
0.6  
1
2
3
4
5
0
0.2  
0.4  
0.6  
0.8  
VOH—Output High Voltage (V)  
VOL—Output Low Voltage (V)  
–9–  
CXK58257ATM/AYM  
Package Dimensions  
Unit: mm  
CXK58257ATM  
28 PIN TSOP (PLASTIC)  
*8.0 ± 0.1  
1.2 Max  
0.10  
21  
8
A
22  
281  
7
+0.1  
-0.05  
0.2  
0.55±0.1  
+0.01  
-0.05  
0.05  
0°-10°  
Detail diagram of A  
SONY NAME TSOP-28P-L01  
Note: Dimensions marked with *  
do not include resin residue.  
EIAJ NAME  
TSOP028-P-0000-A  
JEDEC CODE  
CXK58257AYM  
28 PIN TSOP (PLASTIC)  
*8.0 ± 0.1  
1.2 Max  
8
21  
0.10  
A
7
128  
22  
0.55±0.1  
+0.1  
-0.05  
0.2  
+0.01  
-0.05  
0.05  
0°-10°  
Detail diagram of A  
SONY NAME TSOP-28P-L01R  
Note) Dimensions marked with *  
do not include resin residue.  
EIAJ NAME  
TSOP028-P-0000-B  
JEDEC CODE  
–10–  

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