CXK5T8257BYM-12LLX [SONY]

32768-word X 8-bit High Speed CMOS Static RAM; 32768字×8位高速CMOS静态RAM
CXK5T8257BYM-12LLX
型号: CXK5T8257BYM-12LLX
厂家: SONY CORPORATION    SONY CORPORATION
描述:

32768-word X 8-bit High Speed CMOS Static RAM
32768字×8位高速CMOS静态RAM

存储 内存集成电路 静态存储器 光电二极管
文件: 总10页 (文件大小:211K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CXK5T8257BTM/BYM/BM -10LLX/12LLX  
Preliminary  
32768-word × 8-bit High Speed CMOS Static RAM  
For the availability of this product, please contact the sales office.  
Description  
CXK5T8257BTM  
CXK5T8257BYM  
The CXK5T8257BTM/BYM/BM is 262,144 bits high  
speed CMOS static RAM organized as 32768-words  
by 8 bits.  
28 pin TSOP (Plastic)  
28 pin TSOP (Plastic)  
Special feature are low power consumption and  
high speed.  
The CXK5T8257BTM/BYM/BM is a suitable RAM  
for portable equipment with battery back up.  
CXK5T8257BM  
Features  
28 pin SOP (Plastic)  
Extended operating temperature range: –25 to +85°C  
Wide supply voltage range operation: 2.7 to 3.6V  
Fast access time:  
3.0V operation -10LLX  
-12LLX  
(Access time)  
100ns (Max.)  
120ns (Max.)  
85ns (Max.)  
100ns (Max.)  
3.3V operation -10LLX  
-12LLX  
Low standby current: 7.0µA (Max.)  
Low power data retention: 2.0V (Min.)  
Available in many packages  
CXK5T8257BTM/BYM  
Block Diagram  
A14  
A13  
A12  
A11  
A9  
8mm × 13.4mm 28 pin TSOP Package  
VCC  
CXK5T8257BM  
Memory  
Matrix  
Row  
Decoder  
Buffer  
450mil 28 pin SOP Package  
A8  
A7  
GND  
512 × 512  
Function  
A6  
A5  
32768-word × 8 bit static RAM  
Structure  
A10  
A4  
A3  
A2  
A1  
A0  
Silicon gate CMOS IC  
I/O Gate  
Column  
Decoder  
Buffer  
Buffer  
OE  
WE  
I/O Buffer  
CE  
I/O1  
I/O8  
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by  
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the  
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.  
– 1 –  
PE96509-ST  
CXK5T8257BTM/BYM/BM  
Pin Configuration (Top View)  
Pin Description  
A10  
CE  
Symbol  
A0 to A14  
I/O1 to I/O8  
CE  
Description  
Address input  
OE  
A11  
A9  
A8  
A13  
WE  
22  
23  
24  
25  
26  
27  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
A14  
A12  
A7  
VCC  
WE  
A13  
A8  
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
GND  
I/O3  
I/O2  
I/O1  
A0  
3
A6  
Data input/output  
Chip enable input  
Write enable input  
Output enable input  
Power supply  
4
CXK5T8257BTM  
(Standard Pinout)  
VCC 28  
A5  
A9  
5
A14  
A12  
A7  
A6  
A5  
1
2
3
4
5
6
7
A11  
A4  
6
A3  
7
OE  
WE  
A10  
A2  
8
A4  
A3  
A1  
A2  
A1  
9
CE  
8
OE  
I/O8  
A0  
10  
11  
12  
13  
14  
I/O1  
I/O2  
I/O3  
GND  
I/O7  
I/O6  
I/O5  
I/O4  
A2  
A1  
A0  
I/O1  
I/O2  
I/O3  
GND  
I/O4  
I/O5  
I/O6  
A3  
A4  
A5  
A6  
A7  
A12  
A14  
VCC  
WE  
7
6
5
4
3
2
1
28  
27  
8
9
VCC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
GND  
Ground  
CXK5T8257BYM  
(Standard Pinout)  
CXK5T8257BM  
A13 26  
A8  
I/O7  
I/O8  
25  
A9 24  
A11  
OE  
CE  
A10  
23  
22  
Absolute Maximum Ratings  
(Ta = 25°C, GND = 0V)  
Item  
Symbol  
VCC  
Rating  
Unit  
V
Supply voltage  
–0.5 to +4.6  
Input voltage  
VIN  
–0.5 1 to VCC + 0.5  
–0.5 1 to VCC + 0.5  
0.7  
V
Input and output voltage  
Allowable power dissipation  
Operating temperature  
Storage temperature  
VI/O  
V
PD  
W
Topr  
Tstg  
–25 to +85  
°C  
°C  
°C · s  
–55 to +150  
235 · 10  
Soldering temperature · time Tsolder  
1
VIN, VI/O = –3.0V Min. for pulse width less than 50ns.  
Truth Table  
CE OE WE  
Mode  
Not selected  
Output disable  
Read  
I/O1 to I/O8  
High Z  
VCC Current  
ISB1, ISB2  
H
L
L
L
×
H
L
×
H
H
L
High Z  
ICC1, ICC2  
ICC1, ICC2  
ICC1, ICC2  
Data out  
Data in  
×
Write  
×: "H" or "L"  
– 2 –  
CXK5T8257BTM/BYM/BM  
DC Recommended Operating Conditions  
(Ta = –25 to +85°C, GND = 0V)  
VCC = 2.7 to 3.6V  
Typ.  
VCC = 3.3V ± 0.3V  
Unit  
Item  
Symbol  
Min.  
3.0  
Typ.  
3.3  
Max.  
Min.  
2.7  
Max.  
3.6  
Supply voltage  
VCC  
VIH  
VIL  
3.6  
3.3  
Input high voltage  
Input low voltage  
V
VCC + 0.3  
0.6  
VCC + 0.3  
0.4  
2.2  
2.4  
1
1
–0.3  
–0.3  
1
VIL=–3.0V Min. for pulse width less than 50ns.  
Electrical Characteristics  
• DC characteristics  
(VCC = 2.7 to 3.6V, GND = 0V, Ta = –25 to +85°C)  
2
Item  
Symbol  
Test Conditions  
Min. Typ.  
Max. Unit  
0.5  
Input leakage current ILI  
VIN = GND to VCC  
–0.5  
CE = VIH  
OE = VIH or WE = VIL  
VI/O = GND to VCC  
Output leakage  
current  
µA  
ILO  
–0.5  
0.5  
CE = VIL  
VIN = VIH or VIL  
IOUT = 0mA  
Operating power  
supply current  
ICC1  
ICC2  
ISB1  
0.9  
2
mA  
3
4
18  
35  
10LLX  
Average operating  
current  
Min. cycle  
duty = 100%, IOUT = 0mA  
18  
35  
12LLX  
7.0  
–25 to +85°C  
–25 to +70°C  
+25°C  
CE VCC – 0.2V  
3.5  
µA  
Standby current  
0.12  
0.06  
0.7  
ISB2  
VOH  
CE = VIH  
mA  
Output high  
voltage  
IOH = –2mA  
2.4  
V
Output low  
voltage  
0.4  
VOL  
IOL = 2.0mA  
2 VCC = 3.3V, Ta = 25°C  
3 ICC2 = 21mA for 3.3V operation (VCC = 3.3V ± 0.3V)  
4 ICC3 = 40mA for 3.3V operation (VCC = 3.3V ± 0.3V)  
– 3 –  
CXK5T8257BTM/BYM/BM  
I/O capacitance  
Item  
(Ta = 25°C, f = 1MHz)  
Symbol Test condition Min.  
Typ.  
Max. Unit  
VIN = 0V  
VI/O = 0V  
8
pF  
pF  
Input capacitance  
I/O capacitance  
CIN  
10  
CI/O  
Note) This parameter is sampled and is not 100% tested.  
AC Characteristics  
• AC test conditions  
(Ta = –25 to +85°C)  
Conditions  
Item  
VCC = 2.7 to 3.6V  
VIH = 2.4V  
VIL = 0.4V  
tr = 5ns  
VCC = 3.3V ± 0.3V  
VIH = 2.2V  
VIL = 0.6V  
tr = 5ns  
Input pulse high level  
Input pulse low level  
Input rise time  
TTL  
CL  
Input fall time  
tf = 5ns  
tf = 5ns  
Input and output reference level  
1.4V  
1.4V  
CL 1 = 100pF, 1TTL CL 1 = 30pF, 1TTL  
CL 1 = 100pF, 1TTL CL 1 = 100pF, 1TTL  
-10LLX  
Output load conditions  
-12LLX  
1
CL includes scope and jig capacitances.  
– 4 –  
CXK5T8257BTM/BYM/BM  
• Read cycle (WE = H”)  
VCC = 2.7 to 3.6V  
-10LLX -12LLX  
VCC = 3.3V ± 0.3V  
-10LLX -12LLX  
Item  
Symbol  
Unit  
Min. Max. Min. Max.  
Min. Max. Min. Max.  
120  
120  
120  
60  
100  
100  
100  
50  
t
t
t
t
t
t
t
t
RC  
AA  
CO  
OE  
OH  
LZ  
85  
20  
10  
10  
85  
85  
50  
35  
35  
100  
100  
100  
50  
Read cycle time  
Address access time  
Chip enable access time (CE)  
Chip enable to output valid  
20  
10  
10  
20  
10  
10  
ns  
20  
10  
10  
Chip hold from address change  
Chip enable to output in low Z (CE)  
Output enable to output in low Z (OE)  
Chip disable to output in high Z (CE)  
Output disable to output in high Z (OE)  
OLZ  
HZ  
1
40  
35  
35  
35  
35  
35  
1
tOHZ  
1
tHZ and tOHZ are defined as the time required for outputs to turn to high impedance state and are not referred  
to as output voltage levels.  
• Write cycle  
VCC = 2.7 to 3.6V  
-10LLX -12LLX  
VCC = 3.3V ± 0.3V  
-10LLX -12LLX  
Item  
Symbol  
Unit  
Min. Max. Min. Max.  
Min. Max. Min. Max.  
100  
80  
80  
35  
0
35  
120  
100  
100  
50  
0
40  
85  
80  
80  
35  
0
35  
100  
80  
80  
35  
0
35  
Write cycle time  
t
t
t
t
t
t
t
t
t
t
WC  
AW  
CW  
DW  
DH  
Address valid to end of write  
Chip enable to end of write  
Data to write time overlap  
Data hold from write time  
Write pulse width  
60  
0
70  
0
60  
0
60  
0
ns  
WP  
AS  
Address setup time  
0
0
0
0
Write recovery time (WE)  
Write recovery time (CE)  
Output active from end of write  
Write to output in high Z  
WR  
WR1  
OW  
0
0
0
0
10  
10  
10  
10  
2
tWHZ  
2
tWHZ is defined as the time requied for outputs to turn to high impedance state and is not referred to as  
output voltage level.  
– 5 –  
CXK5T8257BTM/BYM/BM  
Timing waveform  
• Read cycle (1) : CE = OE =VIL, WE = VIH  
tRC  
Address  
tAA  
tOH  
Data out  
Previous data valid  
Data valid  
• Read cycle (2): WE = VIH  
tRC  
Address  
tAA  
CE  
tCO  
tHZ  
tLZ  
OE  
tOE  
tOHZ  
tOLZ  
Data out  
Data valid  
High impedance  
• Write cycle (1) : WE contorl  
tWC  
Address  
tWR  
tAW  
OE  
CE  
tCW  
1
[
]
tAS  
tWP  
WE  
tDW  
tDH  
Data in  
Data out  
Data valid  
tWHZ  
tOW  
High impedance  
2
2
[
]
[ ]  
– 6 –  
CXK5T8257BTM/BYM/BM  
• Write cycle (2): CE control  
tWC  
Address  
OE  
tAW  
tAS  
tCW  
tWR1  
CE  
tWP  
WE  
tDW  
tDH  
Data in  
Data valid  
Data out  
High impedance  
1
Write is executed when both CE and WE are at low simultaneously.  
2
Do not apply the data input voltage of the opposite phase to the output while I/O pin is output condition.  
– 7 –  
CXK5T8257BTM/BYM/BM  
Data Retention Waveform  
Low supply voltage data retention waveform  
Data retention mode  
tCDRS  
tR  
VCC  
2.7V  
2.2V  
VDR  
CE  
CE VCC – 0.2V  
GND  
Data Retention Characteristics  
(Ta = –25 to +85°C)  
Item  
Symbol  
VDR  
Test conditions  
CE VCC – 0.2V  
Min.  
2
Typ.  
Max. Unit  
Data retention voltage  
3.6  
6
V
–25 to +85°C  
–25 to +70°C  
+25°C  
VCC = 3.0V  
CE 2.8V  
ICCDR1  
ICCDR2  
3
Data retention current  
µA  
0.1  
VCC = 2.0 to 3.6V  
CE VCC – 0.2V  
1
0.12  
7.0  
Data retention  
setup time  
Chip disable to data  
retention mode  
t
t
CDRS  
R
0
5
ns  
Recovery time  
ms  
1
VCC = 3.3V, Ta = 25°C  
– 8 –  
CXK5T8257BTM/BYM/BM  
Package Outline  
Unit: mm  
CXK5T8257BTM  
28PIN TSOP (Plastic)  
1.2 MAX  
0.1  
8.0 ± 0.1  
21  
8
A
22  
28 1  
7
+ 0.1  
0.2 – 0.05  
0.55 ± 0.1  
+ 0.1  
0.05 – 0.05  
0° to 10°  
DETAIL  
A
NOTE: Dimension “ ” does not include mold protrusion.  
PACKAGE STRUCTURE  
PACKAGE MATERIAL  
LEAD TREATMENT  
LEAD MATERIAL  
EPOXY RESIN  
SOLDER PLATING  
COPPER / 42 ALLOY  
0.2g  
SONY CODE  
EIAJ CODE  
TSOP-28P-L01  
TSOP028-P-0000-A  
JEDEC CODE  
PACKAGE WEIGHT  
CXK5T8257BYM  
28PIN TSOP (Plastic)  
8.0 ± 0.1  
1.2 MAX  
0.1  
8
21  
A
1 28  
22  
0.55 ± 0.1  
7
+ 0.1  
0.2 – 0.05  
+ 0.1  
0.05 – 0.05  
0° to 10°  
DETAIL  
A
NOTE: Dimension “ ” does not include mold protrusion.  
PACKAGE STRUCTURE  
EPOXY RESIN  
PACKAGE MATERIAL  
LEAD TREATMENT  
LEAD MATERIAL  
SOLDER PLATING  
COPPER / 42 ALLOY  
0.2g  
SONY CODE  
EIAJ CODE  
TSOP-28P-L01R  
TSOP028-P-0000-B  
JEDEC CODE  
PACKAGE WEIGHT  
– 9 –  
CXK5T8257BTM/BYM/BM  
CXK5T8257BM  
28PIN SOP (PLASTIC)  
+ 0.4  
18.0 – 0.1  
+ 0.4  
2.3 – 0.15  
28  
15  
0.15  
+ 0.2  
0.1 – 0.05  
14  
1
0° to 10°  
0.4 ± 0.1  
1.27  
0.24  
M
PACKAGE STRUCTURE  
PACKAGE MATERIAL  
LEAD TREATMENT  
LEAD MATERIAL  
EPOXY RESIN  
SONY CODE  
EIAJ CODE  
SOP-28P-L05  
SOP028-P-0450  
SOLDER PLATING  
42 ALLOY  
JEDEC CODE  
PACKAGE WEIGHT  
0.7g  
– 10 –  

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