CXP84700 [SONY]
CMOS 8-bit Single Chip Microcomputer; CMOS 8位单片机
| 型号： | CXP84700 |
| 厂家： | 
SONY CORPORATION |
| 描述： | CMOS 8-bit Single Chip Microcomputer |
| 文件： | 总8页 (文件大小：558K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CXP84700
Piggyback/
evaluator
CMOS 8-bit Single Chip Microcomputer
Description
100 pin PQFP (Ceramic)
The CXP84700 is a CMOS 8-bit single chip micro-
computer of piggyback/evaluator combined type,
which is developed for evaluating the function of the
CXP84716/84720/84724.
Features
• A wide instruction set (213 instructions) which
covers various types of data.
QFP supported
LQFP supported
—16-bit operation/multiplication and division/
Boolean bit operation instructions
• Minimum instruction cycle
333ns at 12MHz operation (3.0 to 5.5V)
250ns at 16MHz operation (4.5 to 5.5V)
LCC type 27C512
• Applicable EPROM
(Maximum 60K bytes are available.)
2144 bytes
• Incorporated RAM capacity
• Peripheral functions
— A/D converter
8 bits, 8 channels, successive approximation method
(Conversion time of 1.6µs/16MHz)
Start-stop sync type (UART), 1 channel
Incorporated buffer RAM
— Serial interface
(Auto transfer for 1 to 32 bytes), 2 channels
8-bit clock sync type (MSB/LSB first selectable), 1 channel
8-bit timer, 8-bit timer/counter,
— Timer
19-bit time base timer, 16-bit capture timer/counter
— High precision timing pattern generator PPG: maximum of 11-pins, 16-stages programmable, 2 channels
— PWM output
— FRC capture unit
• Interruption
8 bits, 8 channels
Incorporated 24-bit and 6-stage FIFO
19 factors, 15 vectors, multi-interruption possible
Sleep/stop
• Standby mode
• Package
100-pin ceramic PQFP
Note) Mask option depends on the type of the CXP84700. Refer to the Products List for details.
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E96Z12-PS
CXP84700
Pin Assignment in Piggyback Mode (QFP package)
100
98
95
93
89 88 87
92 91 90
86
99
96
94
85 84 83 82 81
97
PF3
PF4
1
2
PI1/INT1
PI0/INT0
PE7/TO
PE6
80
79
78
77
76
75
74
PF5
3
4
5
6
PF6/TxD
PF7/RxD
PD0/PPO0
PD1/PPO1
PD2/PPO2
PD3/PPO3
PD4/PPO4
PD5/PPO5
PD6/PPO6
PD7/PPO7
PC0
PE5
PE4
7
8
PE3/NMI
PE2
73
9
PE1/EC1
PE0/EC0
PB7/SO1
PB6/SI1
PB5/SCK1
PB4/CS1
PB3
72
71
70
69
68
10
3
2
1
32
4
31
30
11
12
29
A6
5
6
7
8
9
A8
A5
A4
A3
A2
A1
A0
NC
D0
28
27
26
25
24
23
22
21
A9
13
14
15
16
17
18
19
20
21
A11
NC
OE
A10
CE
D7
67
66
65
64
63
62
61
60
59
PC1
PC2
PB2
10
11
12
13
PC3
PB1
PC4
PB0/CINT
SO0
PC5
D6
PC6
SI0
16 17 18 19
14 15
20
PC7
SCK0
PH0/PPO8
PH1/PPO9
PH2/PPO10
PH3/PPO11
PH4/PPO12
PH5/PPO13
PH6/PPO14
PH7/PPO15
PJ0/PPO16
CS0
22
23
24
25
58
57
56
PA7
PA6
PA5
55
54
53
52
51
PA4
26
27
28
29
30
PA3/AN7
PA2/AN6
PA1/AN5
PA0/AN4
35
37
39
42 43 44
40 41
45
46
50
47 48 49
31 32
36
34
33
38
Note) 1. NC (Pin 90) is left open.
2. VSS (Pins 41 and 88) are both connected to GND.
– 2 –
CXP84700
Pin Assignment in Piggyback Mode (LQFP package)
100
99 98
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
97
PE6
PE5
PE4
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
PF5
PF6/TxD
PF7/RxD
PD0/PPO0
PD1/PPO1
PD2/PPO2
PD3/PPO3
PD4/PPO4
PD5/PPO5
PD6/PPO6
PD7/PPO7
PC0
1
2
3
PE3/NMI
PE2
4
5
PE1/EC1
PE0/EC0
PB7/SO1
PB6/SI1
PB5/SCK1
PB4/CS1
PB3
6
A15
A12
A7
VDD
A14
A13
A8
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
7
8
3
9
A6
4
10
11
12
13
14
15
16
17
18
19
20
21
A5
A9
5
A4
A11
OE
A10
CE
D7
6
A3
7
PB2
PC1
A2
8
PB1
PC2
A1
9
PB0/CINT
SO0
PC3
A0
10
11
12
13
14
PC4
D0
D6
SI0
PC5
D1
D5
SCK0
PC6
D2
D4
CS0
PC7
GND
D3
PA7
PH0/PPO8
PH1/PPO9
PH2/PPO10
PH3/PPO11
PH4/PPO12
PH5/PPO13
PA6
PA5
22
23
24
25
PA4
PA3/AN7
PA2/AN6
26 27 28 29 30 31
32
33 34
35
36 37 38 39 40
41 42 43 44 45 46 47 48 49
50
Note) 1. NC (Pin 88) is left open.
2. VSS (Pins 39 and 86) are both connected to GND.
– 3 –
CXP84700
Pin Assignment in Evaluator Mode (QFP package)
100
98
95
93
89 88
92 91 90 87 86
99
96
94
85 84 83 82 81
97
PF3
PF4
1
2
PI1/INT1
PI0/INT0
PE7/TO
PE6
80
79
78
77
76
PF5
3
4
5
6
PF6/TxD
PF7/RxD
PD0/PPO0
PD1/PPO1
PD2/PPO2
PD3/PPO3
PD4/PPO4
PD5/PPO5
PD6/PPO6
PD7/PPO7
PC0
PE5
75
74
PE4
7
8
PE3/NMI
PE2
73
9
72
71
70
69
68
PE1/EC1
PE0/EC0
PB7/SO1
PB6/SI1
10
3
2
1
32
4
31
30
11
12
A6/D6
A5/D5
A4/D4
A3/D3
A2/D2
A1/D1
A0/D0
NC
29
28
27
26
25
24
23
22
21
A8
5
6
7
8
9
A9
13
14
15
16
17
18
19
20
21
PB5/SCK1
PB4/CS1
PB3
A11
NC
67
66
65
64
63
62
61
60
59
PC1
HALT
A10
E/P
I/T
PC2
PB2
10
11
12
13
PC3
PB1
PC4
PB0/CINT
SO0
PC5
RD
MON
PC6
SI0
16 17 18 19
14 15
20
PC7
SCK0
CS0
PH0/PPO8
PH1/PPO9
PH2/PPO10
PH3/PPO11
PH4/PPO12
PH5/PPO13
PH6/PPO14
PH7/PPO15
PJ0/PPO16
22
23
24
25
58
57
56
PA7
PA6
PA5
55
54
53
52
51
PA4
26
27
28
29
30
PA3/AN7
PA2/AN6
PA1/AN5
PA0/AN4
35
37
39
42 43 44
40 41
45
46
50
47 48 49
31 32
36
34
33
38
Note) 1. NC (Pin 90) is left open.
2. VSS (Pins 41 and 88) are both connected to GND.
– 4 –
CXP84700
Pin Assignment in Evaluator Mode (LQFP package)
100
99 98
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
97
PF5
PF6/TxD
PF7/RxD
PD0/PPO0
PD1/PPO1
PD2/PPO2
PD3/PPO3
PD4/PPO4
PD5/PPO5
PD6/PPO6
PD7/PPO7
PC0
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
PE6
PE5
PE4
1
2
3
4
PE3/NMI
PE2
5
6
PE1/EC1
PE0/EC0
PB7/SO1
PB6/SI1
PB5/SCK1
PB4/CS1
PB3
A15
A12
1
2
VDD
A14
A13
A8
28
27
26
25
24
23
22
21
20
19
18
17
16
15
7
8
A7/D7
A6/D6
A5/D5
A4/D4
A3/D3
A2/D2
A1/D1
A0/D0
RD
3
9
4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
5
A9
6
A11
HALT
A10
E/P
I/T
7
PC1
PB2
8
PC2
PB1
9
PC3
PB0/CINT
SO0
10
11
12
13
14
PC4
MON
RST
C1
PC5
SI0
WR
PC6
SCK0
SYNC
GND
PC7
CS0
C2
PH0/PPO8
PH1/PPO9
PH2/PPO10
PH3/PPO11
PH4/PPO12
PH5/PPO13
PA7
PA6
PA5
PA4
PA3/AN7
PA2/AN6
26 27 28 29 30 31
32
33 34
35
36 37 38 39 40
41 42 43 44 45 46 47 48 49
50
Note) 1. NC (Pin 88) is left open.
2. VSS (Pins 39 and 86) are both connected to GND.
– 5 –
CXP84700
EPROM Read Timing (Ta = –20 to +75°C, VDD = 3.0 to 5.5V, Vss = 0V reference)
Item
Symbol
Pin
Min.
Max.
Unit
ns
1
100
75
Address → data
input delay time
A0 to A15
D0 to D7
tACC
2
Address → data
hold time
A0 to A15
D0 to D7
0
ns
tIH
1
At 12MHz operation (VDD = 4.5 to 5.5V)
2
At 12MHz operation (VDD = 3.0 to 5.5V), at 16MHz operation (VDD = 4.5 to 5.5V)
0.8VDD
A0 to A15
Address data
0.2VDD
tACC
tIH
0.8VDD
0.2VDD
D0 to D7
Input data
Products List
Products
Mask product
CXP84720 CXP84724
Piggyback/evaluator product
Option item
CXP84700-U01Q
CXP84700-U01R
CXP84716
100-pin plastic QFP/LQFP
16K bytes 20K bytes
100-pin ceramic PQFP
EPROM 60K bytes
27C512 × 1
Package
ROM capacity
24K bytes
Existent/Non-existent
Existent/Non-existent
Existent
Pull-up resistor for reset pin
Power-on-reset circuit
Existent
– 6 –
CXP84700
Piggyback mode/evaluator mode can be switched as shown below.
Piggyback mode
Piggyback/evaluator product
Evaluator mode
Pin 1 marking
Pin 1 index
LCC type EPROM
Pin 1 marking
Note)
CPU probe
EPROM adaptor
Pin 1 marking
Evaluation cap should be
connected to CPU probe.
Note)
Pin 1 index
CPU probe for LQFP
– 7 –
CXP84700
Package Outline
Unit: mm
100PIN PQFP (CERAMIC)
18.7
PIN NO. 1 INDEX
INDEX
16.3 ± 0.2
81
100
PIN No. 1 INDEX
1
100
81
80
1
80
4.5
30
51
30
51
31
50
50
31
9.48
11.66
0.45
15.58 ± 0.2
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
CERAMIC
GOLD PLATING
42 ALLOY
5.7g
SONY CODE
EIAJ CODE
PQFP-100C-L01
AQFP100-C-0000-A
JEDEC CODE
PACKAGE WEIGHT
100PIN PQFP (CERAMIC)
16.0 ± 0.4
14.0 ± 0.2
12.4
75
51
76
50
0.8 ± 0.2
26
100
1
25
12.8 ± 0.2
INDEX
INDEX
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
CERAMIC
SONY CODE
EIAJ CODE
PQFP-100C-L02
GOLD PLATING
42 ALLOY
2.2g
AQFP100-C-1414-A
JEDEC CODE
PACKAGE WEIGHT
– 8 –
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