MB89125APFM [SPANSION]
Microcontroller, 8-Bit, MROM, 4.2MHz, CMOS, PQFP48, 10 X 10 MM, 2.35 MM HEIGHT, 0.80 MM PITCH, PLASTIC, QFP-48;
| 型号： | MB89125APFM |
| 厂家： | 
SPANSION |
| 描述： | Microcontroller, 8-Bit, MROM, 4.2MHz, CMOS, PQFP48, 10 X 10 MM, 2.35 MM HEIGHT, 0.80 MM PITCH, PLASTIC, QFP-48 时钟 微控制器 外围集成电路 |
| 文件： | 总41页 (文件大小：1047K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Spansion® Analog and Microcontroller
Products
The following document contains information on Spansion analog and microcontroller products. Although the
document is marked with the name “Fujitsu”, the company that originally developed the specification, Spansion
will continue to offer these products to new and existing customers.
Continuity of Specifications
There is no change to this document as a result of offering the device as a Spansion product. Any changes that
have been made are the result of normal document improvements and are noted in the document revision
summary, where supported. Future routine revisions will occur when appropriate, and changes will be noted in a
revision summary.
Continuity of Ordering Part Numbers
Spansion continues to support existing part numbers beginning with “MB”. To order these products, please use
only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local sales office for additional information about Spansion memory, analog, and
microcontroller products and solutions.
FUJITSU MICROELECTRONICS
DATA SHEET
DS07-12509-8E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89120/120A Series
MB89121/123A/125A/P131/P133A/P135A
MB89PV130A
■ DESCRIPTION
The MB89120 series is a line of single-chip microcontrollers containing a compact instruction set and a great
variety of peripheral functions such as a timer, serial interface, and external interrupt. The MB89120A series is
an extended variant of the MB89120, with a remote control transmission function and wake-up interrupt function.
■ FEATURES
• F2MC-8L family CPU core
• Low-voltage operation
• Low current consumption (allowing for dual clock)
• Minimum execution time : 0.95 µs at 4.2 MHz
• 21-bit time-base counter
• I/O ports : Max. 36 ports
• External interrupts : 3 channels
• External interrupts (wake-up function) : 8 channels (only for the MB89120A series)
• 8-bit serial I/O : 1 channel
• 8/16-bit timer/counter : 1 channel
• Built-in remote-control transmitting frequency generator (only for the MB89120A series)
• Low-power consumption modes (stop mode, sleep mode, watch mode)
• Package : QFP-48
• CMOS technology
For the information for microcontroller supports, see the following web site.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.12
MBMB89120/120A Series
■ PRODUCT LINEUP
Part number
MB89121
MB89123A
MB89125A
MB89P133A
MB89P131
Item
Mass-produced products
(Mask ROM products)
Classification
One-time products
8 K × 8 bits
4 K × 8 bits
(InternalPROMto (Internal PROM
be programmed tobeprogrammed
4 K × 8 bits
8 K × 8 bits
16 K × 8 bits
ROM size
(internal mask (internal mask (internal mask
with a general-
with a general-
ROM)
ROM)
ROM)
purpose EPROM purpose EPROM
programmer)
programmer)
RAM size
128 × 8 bits
256 × 8 bits
128 × 8 bits
The number of instructions
Instruction bit length
: 136
: 8 bits
Instruction length
Data bit length
: 1 to 3 bytes
: 1, 8, 16 bits
CPU functions
Minimum execution time
Minimum interrupt processing time
: 0.95 µs at 4.2 MHz
: 8.57 µs at 4.2 MHz
Output ports (N-ch open-drain)
Output ports (CMOS)
I/O ports (CMOS)
Total
: 4 (All also serves as peripherals.)
: 8
: 24 (8 ports also serve as peripherals.)
: 36
Ports
Timer/counter
Serial I/O
8-bit timer/counter × 2 channels or 16-bit event counter × 1 channel
8 bits
LSB/MSB first selectable
3 independent channels (edge selection, interrupt vector, source flag)
Rising edge/falling edge/both edges selectable
External interrupt 1
Also for wake-up from stop/sleep mode (edge detection is also permitted in stop mode)
External interrupt 2
(wake-up function)
⎯
⎯
8 channels (only for level detection)
⎯
⎯
Remote control
transmitting frequen-
cy generator
1 channel
(pulse width and frequency selectable
by program)
Standby mode
Process
Sleep mode, stop mode, watch mode
CMOS
2.2 V to 4.0 V (with the dual clock option)
2.2 V to 6.0 V (with the single clock option)
Operating voltage*
EPROM for use
2.7 V to 6.0 V
⎯
* : Varies with conditions such as operating frequencies. (See “■ ELECTRICAL CHARACTERISTICS”.)
(Continued)
2
DS07-12509-8E
MBMB89120/120A Series
(Continued)
Part number
MB89P135A
MB89PV130A
Item
Classification
One-time PROM product
Piggyback/evaluation product
16 K × 8 bits
(internal PROM, to be programmed with
general-purpose EPROM programmer)
32 K × 8 bits
ROM size
RAM size
(external ROM)
512 × 8 bits
1 K × 8 bits
The number of instructions
Instruction bit length
: 136
: 8 bits
Instruction length
Data bit length
: 1 to 3 bytes
: 1, 8, 16 bits
CPU functions
Minimum instruction execution time
Minimum interrupt processing time
: 0.95 µs at 4.2 MHz
: 8.57 µs at 4.2 MHz
Output ports (N-ch open-drain ports)
Output ports (CMOS)
I/O ports (CMOS)
: 4 (All also serve as peripherals.)
: 8
: 24 (8 ports also serve as peripherals.)
: 36
Ports
Total
Timer/counter
Serial I/O
8-bit timer/counter × 2 channels or 16-bit event counter × 1 channel
8 bits
LSB/MSB first selectable
3 independent channels (edge selection, interrupt vector, source flag)
Rising/falling/both edges selectable
Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in stop
mode.)
External interrupt 1
External interrupt 2
(wake-up function)
8 channels (only for level detection)
Remote control
transmitting fre-
quency generator
1 channel (Pulse width and cycle selectable by program)
Standby mode
Process
Sleep mode, stop mode, and watch mode
CMOS
Operating voltage
EPROM for use
2.7 V to 6.0 V
2.7 V to 6.0 V
⎯
MBM27C256A-20TVM
DS07-12509-8E
3
MBMB89120/120A Series
■ PACKAGE AND CORRESPONDING PRODUCTS
Package
FPT-48P-M13
MQP-48C-P01
MB89121
MB89123A
MB89125A
MB89P133A
MB89P131
×
×
×
×
×
Package
FPT-48P-M13
MQP-48C-P01
MB89P135A
MB89PV130A
×
×
×
: Available,
: Not available
Note : Package details of OTPROM products and piggyback/evaluation products are common to those of MB89130/
130A series. Refer to the MB89130/130A series data sheet for details.
■ DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the one-time ROM product, verify its difference from the product that will actually be
used. Take particular care on the following points :
• The available number of register banks is different among the MB89121, the MB89123A/125A, and P135A/
PV130A.
• The stack area, etc., is set at the upper limit of the RAM.
2. Current Consumption
• When operated at low-speed, a product with an OTPROM (EPROM) will consume more current than a product
with a mask ROM. However, the current consumption in the sleep/stop mode is the same. (For more infor-
mation, see “■ ELECTRICAL CHARACTERISTICS”.)
• In the case of the MB89PV130A, added is the current consumed by the EPROM which is connected to the
top socket.
3. Mask Options
Functions that can be selected as options and how to designate these options vary with product.
Before using options, check “■ MASK OPTIONS”.
Take particular care on the following point :
• Pull-up resistor cannot be set for P40 to P43 on the MB89P135A.
• Options are fixed on the MB89PV130A.
4
DS07-12509-8E
MBMB89120/120A Series
■ PIN ASSIGNMENT
(TOP VIEW)
AVCC
RST
MOD0
MOD1
X0
X1
VCC
X0A
X1A
P27
1
2
3
4
5
6
7
8
36
35
34
33
32
31
30
29
28
27
26
25
P36/INT2
P37/BZ/(RCO)
P00/(INT20)
P01/(INT21)
P02/(INT22)
P03/(INT23)
P04/(INT24)
P05/(INT25)
P06/(INT26)
P07/(INT27)
P10
9
10
11
12
P26
P25
P11
-
-
(FPT 48P M13)
Note : Parenthesized function is available only for the MB89120A series.
DS07-12509-8E
5
MBMB89120/120A Series
■ PIN DESCRIPTION
Pin no.
Pin name
X0
Circuit type
Function
5
6
8
9
3
4
A
Main clock crystal oscillator pins (max. 4.2 MHz)
X1
X0A
B
C
Sub clock crystal oscillator pins (for 32.768 kHz)
X1A
MOD0
MOD1
Operation mode select pins
Connect these pins directly to VSS.
Reset I/O pin
This port is of N-ch open-drain output type with pull-up re-
sistor and a hysteresis input type. The internal circuit is ini-
tialized by the input of “L”. “L” is output from this pin by an
internal reset source as optional setting.
2
RST
D
I
General-purpose I/O ports
On the MB89120A series, these pins also serve as exter-
nal interrupt input.
P07/ (INT27) to
P00/ (INT20)
27 to 34
External interrupt input pins are hysteresis input.
18, 20 to 26
10 to 17
P17 to P10
P27 to P20
E
General-purpose I/O ports
G
General-purpose output-only ports
General-purpose I/O port
42
41
40
P30/SCK
P31/SO
P32/SI
F
F
F
Also serves as clock I/O for the 8-bit serial I/O interface.
This port is of hysteresis input type.
General-purpose I/O port
Also serves as a serial I/O data output. This port is hys-
teresis input type.
General-purpose I/O port
Also serves as a serial I/O data input. This port is hyster-
esis input type.
General-purpose I/O port
Also serves as the external clock input for the 8-bit timer/
counter. This port is hysteresis input type.
System clock output is optional.
39
38
P33/EC/SCO
P34/TO/INT0
F
General-purpose I/O port
Also serves as the overflow output and external
interrupt input for the 8-bit timer/counter. This port is
hysteresis input type.
F
F
F
General-purpose I/O ports
Also serve as an external interrupt input. These ports are
hysteresis input type.
36,
37
P36/INT2,
P35/INT1
General-purpose I/O port
Also serves as a buzzer output. This port is hysteresis
input type. On the MB89120A series, the pin also serves
as a remote control output.
35
P37/BZ/ (RCO)
(Continued)
6
DS07-12509-8E
MBMB89120/120A Series
(Continued)
Pin no.
Pin name
P43 to P40
VCC
Circuit type
Function
N-ch open-drain output ports
Power supply pin
45 to 48
H
7
—
—
19
VSS
Power supply (GND) pin
Power supply pin
Use this pin at the same voltage as VCC.
1
AVCC
AVR
AVSS
—
—
—
44
43
Reference voltage input pin
Power supply (GND) pin
Use this pin at the same voltage as VSS.
DS07-12509-8E
7
MBMB89120/120A Series
■ I/O CIRCUIT TYPE
Type
Circuit
Remarks
A
• Crystal and ceramic oscillation type (main clock)
Cricuit for the MB89P133A/P131/P135A/PV130A
• External clock input select versions of MB89121/
123A/125A
X1
X0
At an oscillation feedback resistor of approximately
1 MΩ / 5 V
Standby control signal
• Crystal and ceramic oscillation type (main clock)
• Crystal or ceramic oscillator select versions of
MB89121/123A/125A
At an oscillation feedback resistor of approximately
1 MΩ / 5 V
X1
X0
Standby control signal
B
• Crystal and ceramic oscillation type (sub clock)
Circuit for the MB89121/123A/125A
At an oscillation feedback resistor of approximately
4.5 MΩ / 5 V
X1A
X0A
Standby control signal
• Crystal and ceramic oscillation type (sub clock)
Circuit for the MB89P131/P133A/P135A/PV130A
At an oscillation feedback resistor of approximately
4.5 MΩ / 5 V
X1A
X0A
Standby control signal
C
D
• Output pull-up resistor (P-ch) of approximately
50 kΩ / 5 V
R
• Hysteresis input
P-ch
N-ch
(Continued)
8
DS07-12509-8E
MBMB89120/120A Series
(Continued)
Type
Circuit
Remarks
E
• CMOS output
R
• CMOS input
• Pull-up resistor optional
P-ch
P-ch
N-ch
F
• CMOS output
R
• Hysteresis input
• Pull-up resistor optional
P-ch
P-ch
N-ch
G
H
• CMOS output
P-ch
N-ch
P-ch
• N-ch open-drain output
• Pull-up resistor optional
R
P-ch
N-ch
I
• CMOS output
R
• CMOS input
P-ch
• The interrupt input is a hysteresis input (available
only for the MB89120A series) .
• Pull-up resistor optional
P-ch
N-ch
Interrupt input
Only for the MB89120A series
DS07-12509-8E
9
MBMB89120/120A Series
■ HANDLING DEVICES
1. Preventing Latchup
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins
other than medium- and high- withstand voltage pins, or if higher than the voltage which shows on “1. Absolute
Maximum Ratings” in “■ ELECTRICAL CHARACTERISTICS” is applied between VCC and VSS.
When latchup occurs, power supply current increases rapidly, and might thermally damage elements. When
using, take great care not to exceed the absolute maximum ratings.
Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital
power supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to pull-up or pull-down
resistor.
3. Treatment of N.C. Pins
Be sure to leave N.C. (internally connected) pins open.
4. Power Supply Voltage Fluctuations
Although operation is assured within the rated range of VCC power supply voltage, a rapid fluctuation of the
voltage could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC
is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctu-
ations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz)
and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when
power is switched.
5. Precautions when Using an External Clock
When an external clock is used, oscillation stabilization time is required even for power-on reset (optional) and
release from stop mode.
6. Turning on the supply voltage (only for the MB89P135A)
When the power supply is turned on if MB89P135A is used, power on sharply up to 2.0 V within 13 clock cycles
after starting of oscillation.
Further, various options may not be set , if power supply is turned on without the above condition.
10
DS07-12509-8E
MBMB89120/120A Series
■ PROGRAMMING TO THE PROM ON THE MB89P131
The MB89P131 is a one-time PROM version of the MB89121.
1. Features
• 4-Kbyte PROM on chip
• Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below :
Address
0000H
Single chip
EPROM mode
(Corresponding addresses in the EPROM programmer)
I/O
Not available
RAM
0000H
Not available
Not available
7000H
F000H
PROM
4 KB
EPROM
4 KB
FFFFH
7FFFH
3. Programming to the PROM
In EPROM mode the MB89P131 functions equivalent to the MBM27C256A. This allows the PROM to be
programmed with a general-purpose EPROM programmer by using the dedicated socket adapter. Note, how-
ever, that the electronic signature mode cannot be used.
• Programming procedure
(1) Set the EPROM programmer to MBM27C256A.
(2) Load program data into the EPROM programmer at 7000H to 7FFFH (note that addresses F000H to
FFFFH while operating as a single chip correspond to 7000H to 7FFFH in EPROM mode) .
(3) Program with the EPROM programmer.
DS07-12509-8E
11
MBMB89120/120A Series
■ PROGRAMMING TO THE PROM ON THE MB89P133A
The MB89P133A is a one-time PROM version of the MP89123A.
1. Features
• 8-Kbyte PROM on chip
• Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below :
Address
0000H
Single chip
EPROM mode
(Corresponding addresses in the EPROM programmer)
I/O
RAM
0000H
Not available
Not available
E000H
FFFFH
6000H
PROM
8 KB
EPROM
8 KB
7FFFH
3. Programming to the PROM
In EPROM mode the MB89P133A functions equivalent to the MBM27C256A, This allows the PROM to be
programmed with a general-purpose EPROM programmer by using the dedicated socket adapter. Note, how-
ever, that the MB89P133A cannot use the electronic signature mode.
• Programming procedure
(1) Set the EPROM programmer to MBM27C256A.
(2) Load program data into the EPROM programmer at 6000H to 7FFFH (note that addresses E000H to
FFFFH while operating as a single chip correspond to 6000H to 7FFFH in EPROM mode) .
(3) Program with the EPROM programmer.
12
DS07-12509-8E
MBMB89120/120A Series
■ PROGRAMMING TO THE PROM ON THE MB89P135A
The MB89P135A is an OTPROM version of the MB89123A/125A.
1. Features
• 16-Kbyte PROM on chip
• Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below.
Address
0000H
Single chip
I/O
EPROM mode
(Corresponding addresses on the EPROM programmer)
0080H
0280H
RAM
Not available
Not available
8000H
0000H
Vacancy
(Read value FFH)
BFF0H
BFF6H
3FF0H
Option area
3FF6H
Not available
Not available
Vacancy
(Read value FFH)
C000H
4000H
PROM
16 KB
EPROM
16 KB
7FFFH
FFFFH
3. Programming to the PROM
In EPROM mode, the MB89P135A functions equivalent to the MBM27C256A. This allows the PROM to be
programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by
using the dedicated socket adapter.
• Programming procedure
(1) Set the EPROM programmer to the MBM27C256A.
(2) Load program data into the EPROM programmer at 4000H to 7FFFH (note that addresses C000H to
FFFFH while operating as a single chip correspond to 4000H to 7FFFH in EPROM mode) .
(3) Load option data into the EPROM programmer at 3FF0H to 3FF6H.
(4) Program with the EPROM programmer.
DS07-12509-8E
13
MBMB89120/120A Series
4. Setting PROM Options (MB89P135A Only)
The programming procedure is the same as that for the PROM. Options can be set by programming values at
the addresses shown on the memory map. The relationship between bits and options is shown on the following
bit map :
• PROM option bit map
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Clock mode
Oscillation
Vacancy Vacancy Vacancy selection
Reset pin
output
Power-on
reset
stabilization time
3FF0H Readable Readable Readable 1 : Single
00 : 22/FCH 10 : 216/FCH
01 : 212/FCH 11 : 218/FCH
and
and
and
clock
1 : Yes
0 : No
1 : Yes
0 : No
writable
writable
writable
0 : Dual
clock
P07
P06
P05
P04
P03
P02
P01
P00
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
3FF1H
3FF2H
3FF3H
P17
P16
P15
P14
P13
P12
P11
P10
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
P37
P36
P35
P34
P33
P32
P31
P30
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Pull-up
1 : Yes
0 : No
Vacancy Vacancy Vacancy Vacancy
Vacancy
Vacancy
Vacancy
Vacancy
3FF4H Readable Readable Readable Readable
Readable Readable Readable Readable
and
and
and
and
and
and
and
and
writable
writable
writable
writable
writable
writable
writable
writable
Vacancy Vacancy Vacancy Vacancy
Vacancy
Vacancy
Vacancy
Vacancy
3FF5H Readable Readable Readable Readable
Readable Readable Readable Readable
and
and
and
and
and
and
and
and
writable
writable
writable
writable
writable
writable
writable
writable
Vacancy Vacancy Vacancy Vacancy
Vacancy
Vacancy
Vacancy
Vacancy
3FF6H Readable Readable Readable Readable
Readable Readable Readable Readable
and
and
and
and
and
and
and
and
writable
writable
writable
writable
writable
writable
writable
writable
Note : Each bit is set to “1” as the initialized value, therefore the pull-up option is selected.
14
DS07-12509-8E
MBMB89120/120A Series
■ HANDLING MB89P131/P133A/P135A
1. Recommended Screening Conditions
High-temperature aging is recommended as the pre-assembly screening procedure.
Program, verify
Aging
+150 °C, 48 h
Data verification
Assembly
2. Programming Yield
Due to its nature, bit programming test cannot be conducted as Fujitsu delivery test. For this reason, a pro-
gramming yeild of 100% cannot be assured at all times.
DS07-12509-8E
15
MBMB89120/120A Series
■ PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TVM
2. Memory Space
Memory space in each mode, such as 32-Kbyte EPROM is diagrammed below.
Address
Single chip
Corresponding addresses on the EPROM programmer
0000
H
I/O
0080
0480
H
H
RAM
Not available
8000
H
0000H
PROM
32 KB
EPROM
32 KB
7FFF
H
FFFF
H
3. Programming to the EPROM
(1) Set the EPROM programmer for the MBM27C256A.
(2) Load program data into the EPROM programmer at 0000H to 7FFFH.
(3) Program with the EPROM programmer.
16
DS07-12509-8E
MBMB89120/120A Series
■ BLOCK DIAGRAM
X0
X1
Time-base timer
Reset circuit
Main clock oscillator
Clock controller
RST
(WDT)
X0A
X1A
Sub clock oscillator
(32.768 kHz)
8-bit timer/counter
8-bit timer/counter
P34/TO/INT0
P33/EC/SCO
CMOS I/O port
P00/(INT20) to
P07/(INT27)
8
8
∗
External interrupt
(Wake-up)
P30/SCK
P32/SI
8-bit serial I/O
P10 to P17
P31/SO
External interrupt
P35/INT1
P36/INT2
8
Remote control
transmission
frequency generator
P20 to P27
∗
Buzzer output
CMOS output port
P37/BZ/(RCO)
CMOS I/O port
N-ch open-drain output port
RAM
4
P40 to P43
F2MC-8L
CPU
ROM
The other pins
MOD0, MOD1, VCC, VSS
AVCC, AVR, AVSS
* : Only the MB89120A series has wake-up interrupt inputs and remote control transmission.
Note : Parenthesized pins are available only with the MB89120A series.
DS07-12509-8E
17
MBMB89120/120A Series
■ CPU CORE
1. Memory Space
The microcontrollers of the MB89120/120A series offer 64 Kbytes of memory for storing all of I/O, data, and
program areas. The I/O area is allocated from the lowest address. The data area is allocated immediately above
the I/O area. The data area can be divided into register, stack, and direct areas according to the application.
The program area is allocated from exactly the opposite end of I/O area, that is, near the highest address. The
tables of interrupt reset vectors and vector call instructions are allocated from the highest address with the
program area. The memory space of the MB89120/120A series is structured as illustrated below :
Memory Space
MB89123A
MB89125A
MB89P135A
MB89PV130A
MB89121
MB89P133A
MB89P131
0000
H
0000
H
0000
H
0000
H
0000
H
I/O
I/O
I/O
I/O
I/O
007F
0080
H
H
007F
0080
H
H
007F
0080
H
H
007F
0080
H
H
007F
0080
H
H
Not available
RAM
RAM
RAM
RAM
512 B
RAM
1 KB
00BF
00C0
0100
H
H
H
00FF
0100
H
H
00FF
0100
H
H
0100
H
0100
H
Register
Register
Register
Register
Register
01FF
0200
H
H
01FF
0200
H
H
013F
0140
H
H
017F
0180
H
H
017F
0180
H
H
027F
0280
H
H
047F
0480
H
H
Not available
Vacancy
Not available
Vacancy
7FFF
8000
H
H
BFFF
H
H
BFFF
C000
H
H
Not available
C000
DFFF
E000
H
H
External
ROM
32 KB
ROM
16 KB
EFFF
F000
H
ROM
ROM
H
ROM
FFFF
H
FFFF
H
FFFF
H
FFFF
H
FFFF
H
18
DS07-12509-8E
MBMB89120/120A Series
2. Registers
The F2MC-8L family has two types of registers; dedicated hardware registers and general-purpose memory
registers. The following dedicated registers are provided :
Program counter (PC) :
Accumulator (A) :
A 16-bit register for indicating the instruction storage positions
A 16-bi temporary register for arithmetic operations, etc. When the
instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T) : A 16-bit register which is used for arithmetic operations with the accumulator
When the instruction is an 8-bit data processing instruction, the lower byte is
used.
Index register (IX) :
Extra pointer (EP) :
Stack pointer (SP) :
Program status (PS) :
A 16-bit register for index modification
A 16-bit pointer for indicating a memory address
A 16-bit pointer for indicating a stack area
A 16-bit register for storing a register pointer, a condition code
Initial value
16 bits
PC
A
: Program counter
: Accumulator
FFFDH
Indeterminate
T
: Temporary accumulator Indeterminate
IX
: Index register
: Extra pointer
: Stack pointer
: Program status
Indeterminate
Indeterminate
Indeterminate
EP
SP
PS
I-flag = 0, IL1, IL0 = 11
The other bit values are Indeterminate.
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for
use as a condition code register (CCR) (see the diagram below) .
Structure of the Program Status Register
15
14
13
12
11
10
9
8
7
6
I
5
4
3
2
Z
1
0
Vacancy Vacancy Vacancy
PS
RP
H
IL1, IL0
N
V
C
RP
CCR
DS07-12509-8E
19
MBMB89120/120A Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
Rule for Conversion of Actual Addresses of the General-purpose Register Area
RP
Lower OP codes
"0" "0" "0" "0" "0" "0" "0" "1" R4 R3 R2 R1 R0 b2 b1 b0
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data, and
bits for control of CPU operations at the time of an interrupt.
H-flag : Set to “1” when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation.
Cleared “0” otherwise. This flag is for decimal adjustment instructions.
I-flag : Interrupt is enabled when this flag is set to “1”. Interrupt is disabled when the flag is cleared to “0”.
Cleared to “0” at the reset.
IL1, IL0 : Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level
is higher than the value indicated by this bit.
IL1
0
IL0
0
Interrupt level
High-low
High
1
0
1
1
0
2
3
1
1
Low
N-flag : Set to “1” if the MSB becomes “1” as the result of an arithmetic operation. Cleared to “0” otherwise.
Z-flag : Set to “1” when an arithmetic operation results in 0. Cleared to “0” otherwise.
V-flag : Set to “1” if the twos complement overflows as a result of an arithmetic operation. Cleared to “0” if
the overflow does not occur.
C-flag : Set to “1” when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to
“0” otherwise. Set to the shift-out value in the case of a shift instruction.
20
DS07-12509-8E
MBMB89120/120A Series
The following general-purpose registers are provided :
General-purpose registers : 8-bit registers for storing data
The general-purpose registers are of 8 bits and located in the register banks of the memory. One bank contains
8 registers and up to a total of 8 banks can be used on the MB89121/P131, and a total of 16 banks can be used
on the MB89123A/125A/P133A and a total of 32 banks can be used on the MB89P135A/PV130A.
The bank currently in use is indicated by the register bank pointer (RP) .
Register Bank Configuration
This address = 0100H + 8 × (RP)
R 0
R 1
R 2
R 3
R 4
R 5
R 6
R 7
8 banks (MB89121/P131)
16 banks (MB89123A/125A/133A)
32 banks (MB89P135A/PV130A)
Memory area
DS07-12509-8E
21
MBMB89120/120A Series
■ I/O MAP
Address
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
Read/Write
(R/W)
(W)
Register name
PDR0
Register description
Port 0 data register
DDR0
Port 0 data direction register
Port 1 data register
Port 1 data direction register
Port 2 data register
Vacancy
(R/W)
(W)
PDR1
DDR1
(R/W)
PDR2
Vacancy
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
(W)
SYCC
STBC
WDTC
TBTC
WPCR
PDR3
DDR3
PDR4
BZCR
System clock control register
Standby control register
Watchdog control register
Time-base timer control register
Watch prescaler control register
Port 3 data register
Port 3 data direction register
Port 4 data register
Buzzer register
(R/W)
(R/W)
Vacancy
Vacancy
(R/W)
SCGC
Peripheral control clock register
Vacancy
(R/W)
(R/W)
RCR1
RCR2
Remote control transmission control register 1*
Remote control transmission control register 2*
Vacancy
Vacancy
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
T2CR
T1CR
T2DR
T1DR
SMR1
SDR1
Timer 2 control register
Timer 1 control register
Timer 2 data register
Timer 1 data register
Serial mode register
Serial data register
Vacancy
Vacancy
(Continued)
22
DS07-12509-8E
MBMB89120/120A Series
(Continued)
Address
Read/write
Register name
Register description
20H
21H
Vacancy
Vacancy
Vacancy
22H
23H
(R/W)
(R/W)
EIC1
EIC2
External interrupt control register 1
External interrupt control register 2
Vacancy
24H
25H
26H to 31H
32H
Vacancy
(R/W)
(R/W)
EIE2
EIF2
External interrupt 2 enable register*
External interrupt 2 flag register*
Vacancy
33H
34H to 7BH
7CH
(W)
(W)
(W)
ILR1
ILR2
ILR3
Interrupt level register 1
Interrupt level register 2
Interrupt level register 3
Vacancy
7DH
7EH
7FH
* : Only in the MB89120A series
Note : Do not use vacancies.
DS07-12509-8E
23
MBMB89120/120A Series
■ ELECTRICAL CARACTERISTICS
1. Absolute Maximum Ratings
(AVSS = VSS = 0.0 V)
Rating
Symbol
Unit
Remarks
Parameter
Min.
Max.
VCC
AVCC
AVR
Use VCC, AVCC , and AVR
set to the same voltage.
Power supply voltage
VSS − 0.3
VSS + 7.2
V
V
MOD1 pin on the
MB89P131/P133A/P135A
Program voltage
VPP
VSS − 0.6
VSS + 13.0
Input voltage
VI
VO
IOL
VSS − 0.3
VSS − 0.3
⎯
VCC + 0.3
VCC + 0.3
10
V
V
Output voltage
“L” level maximum output current
mA
Avarage value (operating
current × operating rate)
“L” level average output current
IOLAV
⎯
⎯
4
mA
mA
“L” level total maximum output cur-
rent
ΣIOL
100
Avarage value (operating
current × operating rate)
“L” level total average output current
“H” level maximum output current
“H” level average output current
ΣIOLAV
IOH
⎯
⎯
⎯
20
−10
−2
mA
mA
mA
Avarage value (operating
current × operating rate)
IOHAV
“H” level total maximum output cur-
rent
ΣIOH
⎯
⎯
−30
−10
mA
mA
Avarage value (operating
current × operating rate)
“H” level total average output current
ΣIOHAV
Power consumption
Operating temperature
Storage temperature
PD
TA
⎯
200
+85
mW
°C
−40
−55
Tstg
+150
°C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
24
DS07-12509-8E
MBMB89120/120A Series
2. Recommended Operating Conditions
Value
(AVSS = VSS = 0.0 V)
Symbol
Unit
Remarks
Parameter
Min.
Max.
Normal operation assurance range *
Applied to “Single-clock MB89121/123A/125A”
2.2
6.0
V
V
V
Normal operation assurance range *
Applied to “Dual-clock MB89121/123A/125A”
2.2
2.7
4.0
6.0
Power supply voltage
Operating temperature
VCC
Normal operation assurance range *
Applied to “MB89P131/P133A/P135A/PV130A”
1.5
6.0
V
Retains the RAM state in stop mode
TA
−40
+85
°C
* : These values vary with the operating conditions. See “Operating Voltage vs. Main Clock Operating Frequency.”
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
DS07-12509-8E
25
MBMB89120/120A Series
• Operating Voltage vs. Main Clock Operating Frequency
Dual-clock MB89121/123A/125A
6
5
4
Operation assurance range
3
2
1
1
2
3
4
Main clock operating frequency (MHz) (Instruction cycle time of 4/FCH
)
4.0
2.0
1.0
Minimum execution time (µs)
MB89P131/P133A/P135A/PV130A, and single-clock MB89121/123A/125A
6
5
Operation assurance range
4
3
2
1
1
2
3
4
Main clock oprating frequency (MHz) (Instruction cycle time of 4/FCH
)
4.0
2.0
1.0
Minimum execution time (µs)
Note : The shaded area is assured only for the MB89121/123A/125A (instruction cycle time of 4/FCH) .
26
DS07-12509-8E
MBMB89120/120A Series
3. DC Characteristics
(AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Parameter
Symbol
Pin
Condition
Unit Remarks
Min.
Typ.
Max.
P00 to P07,
P10 to P17
VCC +
0.3
VIH
⎯
0.7 VCC
⎯
V
INT20 to
INT27 are
available
only for the
MB89120A
series.
“H” level input
voltage
RST,
P30 to P37,
INT20 to INT27
VCC +
VIHS
⎯
⎯
⎯
0.8 VCC
⎯
⎯
⎯
V
0.3
P00 to P07,
P10 to P17
VSS −
0.3
VIL
0.3 VCC
0.2 VCC
V
INT20 to
INT27 are
available
only for the
MB89120A
series.
“L” level input
voltage
RST,
P30 to P37,
INT20 to INT27
VSS −
0.3
VILS
V
Open-drain
output pin
applied voltage
VSS −
VCC +
VD
P40 to P43
⎯
⎯
⎯
V
V
0.3
0.3
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37
“H” level output
voltage
VOH
IOH = −2.0 mA
2.4
⎯
P00 to P07,
P10 to P17
P20 to P27,
P30 to P37,
P40 to P43
VOL
IOL = 1.8 mA
IOL = 4.0 mA
⎯
⎯
⎯
⎯
0.4
0.6
V
V
“L” level output
voltage
VOL2
RST
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37,
P40 to P43,
MOD0, MOD1
Input leakage
current
(Hi-Z output
leakage current)
Without
µA pull-up
resistor
ILI
0.45 V < VI < VCC
⎯
⎯
5
P00 to P07,
P10 to P17,
P30 to P37,
P40 to P43,
RST
Pull-up resistance
RPULL
VI = 0.0 V
25
50
100
kΩ
(Continued)
DS07-12509-8E
27
MBMB89120/120A Series
(Continued)
(AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Parameter
Symbol
Pin
Condition
Unit Remarks
Min.
Typ.
Max.
MB89121/
mA
⎯
4
6
7
123A/125A
VCC = 5.0 V
ICC1
FCH = 4.00 MHz
MB89P131/
mA P133A/
P135A
*2
tinst = 1.0 µs
⎯
⎯
10
5
VCC = 5.0 V
FCH = 4.00 MHz
Main sleep mode
ICCS1
2
mA
*2
tinst = 1.0 µs
MB89121/
µA
⎯
⎯
50
1
100
3
123A/125A
VCC = 3.0 V
FCL = 32.768 kHz
Sub clock mode
ICCL
MB89P131/
mA P133A/
P135A
VCC
Power supply
current*1
(External clock
operation)
VCC = 3.0 V
FCL = 32.768 kHz
Sub clock sleep
mode
ICCLS
⎯
⎯
25
50
15
µA
VCC = 3.0 V
FCL = 32.768 kHz
• Watch mode
• Main clock stop
mode at dual
ICCT
⎯
µA
clock product
TA = +25 °C
• Sub clock stop
mode
• Main clock stop
mode at single
clock product
ICCH
⎯
⎯
⎯
1
µA
Other than
AVCC, AVSS,
VCC, and VSS
Input capacitance
CIN
f = 1 MHz
10
⎯
pF
*1 : The measurement conditions of power supply current is external clock. (VCC = 5.0 V, VCC = 3.0 V)
*2 : For information on tinst, see “ (4) Instruction Cycle” in “4. AC Characteristics.”
28
DS07-12509-8E
MBMB89120/120A Series
4. AC Characteristics
(1) Reset Timing
(VCC = +5.0 V 10%, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Symbol
Condition
Unit
Remarks
Parameter
Min.
Max.
RST “L” pulse width
tZLZH
⎯
48 tHCYL*
⎯
ns
* : tHCYL is the oscillation cycle (1/FCH) input to the X0.
tZLZH
RST
0.8 VCC
0.2 VCC
0.2 VCC
(2) Power-on Reset
(AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Symbol
Condition
Unit
Remarks
Parameter
Min.
Max.
Power-on reset
function only
Power supply rising time
Power supply cut-off time
tR
⎯
50
ms
ms
⎯
Due to repeated
operations
tOFF
1
⎯
Note : Make sure that power supply rises within the oscillation stabilization time selected.
For example, when the main clock is operating at FCH = 3 MHz and the oscillation stabilization time select
option has been set to 212/FCH, the oscillation stabilization wait time is 1.4 ms and accordingly the maximum
value of power supply rising time is about 1.4 ms.
Keep in mind that rapid changes in power supply voltage may cause a power-on reset. If power supply
voltage needs to be varied in the course of operation, a smooth voltage rise is recommended.
tR
tOFF
2.0 V
0.2 V
0.2 V
0.2 V
VCC
DS07-12509-8E
29
MBMB89120/120A Series
(3) Clock Timings
(VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Typ.
⎯
Symbol
Pin
Unit
Remarks
Parameter
Min.
1
Max.
4.2
FCH
FCL
X0, X1
X0A, X1A
X0, X1
MHz Main clock
kHz Sub clock
ns Main clock
µs Sub clock
Clock frequency
⎯
32.768
⎯
⎯
tHCYL
tLCYL
238
⎯
1000
⎯
Clock cycle time
X0A, X1A
30.5
PWH1
PWL1
Input clock pulse width
X0
X0
72
⎯
⎯
⎯
ns External clock
ns External clock
tCR1
tCF1
Input clock rising/falling time
⎯
24
X0, X1 Timings and Conditions of Applied Voltage
t
HCYL
0.8 VCC
0.2 VCC
X0
P
WH1
P
WL1
tCF1
t
CR1
Main Clock Conditions of Applied Voltage
When a crystal
or
ceramic resonator is used
When an external clock is used
X0
X1
X0
X1
F
CH
Open
C0
C1
F
CH
30
DS07-12509-8E
MBMB89120/120A Series
X0A, X1A Timings and Conditions of Applied Voltage
tLCYL
0.8 VCC
X0A
Sub clock Conditions of Applied Voltage
When a crystal
or
ceramic resonator is used
Single-clock option is used
X0A
X1A
X0A
X1A
Open
Rd
FCL
C0
C1
(4) Instruction Cycles
Parameter
(VSS = 0.0 V, TA = −40 °C to +85 °C)
Symbol
Value (typical)
Unit
Remarks
4/FCH, 8/FCH, 16/FCH,
64/FCH
(4/FCH) tinst = 1.0 µs when operating at
µs
µs
FCH = 4 MHz
Instruction cycle
(minimum execution time)
tinst
tinst = 61.036 µs when operating at
FCL = 32.768 kHz
2/FCL
DS07-12509-8E
31
MBMB89120/120A Series
(5) Serial I/O Timings
(VCC = +5.0 V 10%, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Min.
Symbol
Pin
Condition
Unit Remarks
Parameter
Max.
⎯
Serial clock cycle time
SCK ↓ → SO time
tSCYC
tSLOV
tIVSH
tSHIX
tSHSL
tSLSH
tSLOV
tIVSH
tSHIX
SCK
2 tinst*
−200
200
200
tinst*
tinst*
0
µs
ns
ns
ns
µs
µs
ns
ns
ns
SCK, SO
SI, SCK
SCK, SI
200
⎯
Internal clock
operation
Valid SI → SCK ↑
SCK ↑ → Valid SI hold time
Serial clock “H” pulse width
Serial clock “L” pulse width
SCK ↓ → SO time
⎯
⎯
SCK
⎯
External clock
operation
SCK, SO
SI, SCK
SCK, SI
200
⎯
Valid SI → SCK ↑
200
200
SCK ↑ → Valid SI hold time
⎯
* : For information on tinst, see “ (4) Instruction Cycles.”
Internal Shift Clock Mode
tSCYC
SCK
2.4 V
0.8 V
0.8 V
tSLOV
2.4 V
SO
0.8 V
tIVSH
tSHIX
0.8 VCC
0.2 VCC
0.8 VCC
SI
0.2 VCC
External Shift Clock Mode
tSLSH
tSHSL
SCK
0.8 VCC
0.8 VCC
0.2 VCC
tSLOV
0.2 VCC
2.4 V
0.8 V
SO
SI
tIVSH
0.8 VCC
0.2 VCC
tSHIX
0.8 VCC
0.2 VCC
32
DS07-12509-8E
MBMB89120/120A Series
(6) Peripheral Input Timings
Parameter
(VCC = +5.0 V 10%, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Symbol
Pin
Unit Remarks
Min.
2 tinst*
2 tinst*
Max.
⎯
Peripheral input “H” pulse width
Peripheral input “L” pulse width
tILIH
tIHIL
µs
µs
EC, INT0 to INT2
⎯
* : For information on tinst, see “ (4) Instruction Cycle.”
tIHIL
tILIH
EC
INT0 to INT2
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
DS07-12509-8E
33
MBMB89120/120A Series
■ EXAMPLE CHARACTERISTICS
(1) “L” Level Output Voltage
(2) “H” Level Output Voltage
VCC − VOH vs. IOH
VCC − VOH (V)
V
OL vs. IOL
V
OL (V)
VCC = 2.5 V
1.1
1.0
VCC = 2.5 V
TA = +25 °C
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
T = +25 °C
A
V
CC = 2.2 V
VCC = 2.2 V
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
V
CC = 3.0 V
VCC = 3.0 V
VCC = 4.0 V
VCC = 4.0 V
VCC = 5.0 V
VCC = 6.0 V
V
CCCC = 6.0 V
V
= 5.0 V
0.0
−.5
−1.0 −1.5 −2.0 −2.5 −3.0
IOH (mA)
0
1
2
3
4
5
6
7
8
9
I
10
OL (mA)
(3) “H” Level Input Voltage/“L” Level Input
Voltage (CMOS Input)
(4) “H” Level Input Voltage/“L” Level Input
Voltage (Hysteresis Input)
V
IN vs. VCC
V
IN vs. VCC
VIN (V)
5.0
VIN (V)
5.0
TA = +25 °C
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
TA = +25 °C
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
VIHS
VILS
.00 1.00 2.00 3.00 4.00 5.00 6.00 7.00
VCC (V)
.00
1.00 2.00 3.00 4.00 5.00 6.00 7.00
VCC (V)
VIHS : Threshold when input voltage in hysteresis
characteristics is set to “H” level
VILS : Threshold when input voltage in hysteresis
characteristics is set to “L” level
(5) Pull-up Resistance
RPULL vs. VCC
R
1000
PULL (kΩ)
TA = +25 °C
300
100
50
10
0
2
3
4
5
6
7
1
VCC (V)
34
DS07-12509-8E
MBMB89120/120A Series
(6) Power Supply Current
ICC1 vs. VCC
ICCS1 vs. VCC
ICC (mA)
5.0
ICCS (mA)
3.0
Divide by 4
(ICC1)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
FCH = 4.0 MHz
TA = +25 °C
Divide by 4 (ICCS1)
Divide by 64
FCH = 4.0 MHz
TA = +25 °C
2.5
2.0
1.5
1.0
0.5
0.0
Divide by 64
1.0
0.5
0.0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
6.5
VCC (V)
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
6.5
VCC (V)
ICCLS vs. VCC
ICCL vs. VCC
I
CCL (µA)
I
CCLS (µA)
200
180
160
50
T = +25 °C
A
T = +25 °C
A
45
40
35
30
25
20
15
140
120
100
80
60
40
10
5
20
0
0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
6.5
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
V
CC (V)
V
CC (V)
ICCH vs. VCC
ICCT vs. VCC
ICCH (µA)
ICCT (µA)
30
2.0
1.8
1.6
TA = +25 °C
TA = +25 °C
25
20
15
10
5
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
VCC (V)
6.5
VCC (V)
DS07-12509-8E
35
MBMB89120/120A Series
■ MASK OPTIONS
MB89121
MB89123A
MB89125A
MB89P131
MB89P133A
Part number
MB89P135A
MB89PV130A
No.
Specify when ordering
masking
Set with EPROM Specification
Specifying procedure
programmer
impossible
Pull-up resistors
Selectable by pin
All pins fixed to
1
2
• P00 to P07, P10 to P17,
• P30 to P37, P40 to P43
Selectable by pin (P40 to P43 must be set without a no pull-up resis-
pull-up resistor.)
tor optional
Power-on reset
With power-on
reset
Power-on reset provided
No power-on reset
Selectable
Selectable
Selectable
Selectable
Selectable
Selection of oscillation stabiliza-
tion wait time
• The oscillation stabilization wait
time initial value is selectable
from 4 types given below.
0 : Oscillation stabilization 22/FCH
1 : Oscillation stabilization 212/FCH
2 : Oscillation stabilization 216/FCH
3 : Oscillation stabilization 218/FCH
Oscillation sta-
bilization
218/FCH
3
Selectable
Reset pin output
With reset out-
put
4
5
6
• Reset output provided
• No reset output
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Clock mode selection
• Single-clock mode
• Dual-clock mode
Dual-clock
mode
Selectable
Main clock oscillation circuit type
• External clock input
Not required*1
• Oscillation resonator
Peripheral control clock
output function*2
• Not used
7
Selectable
Not required*3
• Used
*1 : Can be used as either crystal or ceramics oscillation.
*2 : “Used” must be selected when P33 (39 pin) is used as SCO for the peripheral control clock output.
*3 : The peripheral control clock function can be used only by software.
36
DS07-12509-8E
MBMB89120/120A Series
■ MB89P131/P133A STANDARD OPTIONS
No.
1
Product option
Pull-up resistor
MB89P131-101
MB89P133A-201
Not provided for any port
Provided
Not provided for any port
Provided
2
Power-on reset
Selection of oscillation stabilization
time
3
2 : Oscillation stabilization 216/FCH 2 : Oscillation stabilization 216/FCH
4
5
Reset pin output
Provided
Provided
Clock mode selection
Dual-clock mode
Dual-clock mode
■ ORDERING INFORMATION
Part number
Package
Remarks
MB89121PFM
MB89123APFM
MB89125APFM
48-pin Plastic QFP
(FPT-48P-M13)
MB89P131-101PFM
MB89P133A-201PFM
MB89P135A-101PFM
48-pin Ceramic MQFP
(MQP-48C-P01)
MB89PV130ACF-ES
DS07-12509-8E
37
MBMB89120/120A Series
■ PACKAGE DIMENSION
48-pin plastic QFP
Lead pitch
0.80 mm
10 × 10 mm
Package width ×
package length
Lead shape
Sealing method
Mounting height
Gullwing
Plastic mold
2.35 mm MAX
P-QFP44-10×10-0.80
Code
(Reference)
(FPT-48P-M13)
48-pin plastic QFP
(FPT-48P-M13)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
13.10±0.40(.516±.016)SQ
*
10.00±0.20(.394±.008)SQ
0.17±0.06
(.007±.002)
36
25
37
24
Details of "A" part
1.95 +–00..2400
(Mounting height)
0.10(.004)
.077 +–..000186
0.25(.010)
INDEX
0~8
°
48
13
0.80±0.20
(.031±.008)
0.20 +–00..2100
.008 +–..000084
"A"
1
12
(Stand off)
0.88±0.15
(.035±.006)
0.80(.031)
0.32±0.05
(.013±.002)
M
0.20(.008)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
2003-2008 FUJITSU MICROELECTRONICS LIMITED F48023S-c-3-5
Please check the latest package dimensions at the following URL.
http://edevice.fujitsu.com/package/en-search/
38
DS07-12509-8E
MBMB89120/120A Series
■ MAIN CHANGES IN THIS EDITION
Page
Section
Change Results
7
■ PIN DESCRIPTION
Changed the function description of AVCC pin (pin no. 1).
Power supply(GND) pin → Power supply pin
15
16
■ HANDLING MB89P131/P133A/
Deleted the item of “3. EPROM Programmer Socket
Adapter”.
P135A
■ PROGRAMMING TO THE EPROM Deleted the item of “2. Programming Socket Adapter”.
WITH PIGGYBACK/EVALUATION
DEVICE
31
37
■ ELECTRICAL CARACTERISTICS Deleted the item of “(5) Recommended Resonator
4. AC Characteristics
Manufacturers”.
■ ORDERING INFORMATION
Changed the ordering information.
MB89P131PFM-101 → MB89P131-101PFM
MB89P133APFM-201 → MB89P133A-201PFM
MB89P135APFM
→ MB89P135A-101PFM
The vertical lines marked in the left side of the page show the changes.
DS07-12509-8E
39
MBMB89120/120A Series
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,
Shinjuku-ku, Tokyo 163-0722, Japan
Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
Asia Pacific
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151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://www.fmal.fujitsu.com/
Europe
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Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
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Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
FUJITSU MICROELECTRONICS KOREA LTD.
206 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fmk/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to
the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear
facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon
system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited: Sales Promotion Department
相关型号：
MB89133AP-SH
Microcontroller, 8-Bit, MROM, F2MC-8L CPU, 4.2MHz, CMOS, PDIP48, 1.778 MM PITCH, PLASTIC, SHDIP-48
FUJITSU
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