MB90F347CESPMC_技术文档

FUJITSU SEMICONDUCTOR

DATA SHEET

DS07-13747-4E

16-bit Microcontroller

CMOS

F²MC-16LX MB90340E Series

MB90341E(S)/341CE(S)/342E(S)/342CE(S)/F342E(S)/F342CE(S)/F345E(S)/F345CE(S)/346E(S)/

MB90346CE(S)/F346E(S)/F346CE(S)/347E(S)/347CE(S)/F347E(S)/F347CE(S)/348E(S)/348CE(S)/

MB90349E(S)/349CE(S)/F349E(S)/F349CE(S)/V340E-101/V340E-102

■ DESCRIPTION

The MB90340E series with up to 2 FULL-CAN interfaces is especially designed for automotive and other industrial

applications. Its main feature are the on-board CAN Interfaces, which conform to V2.0 Part A and Part B, while

supporting a very flexible message buffer scheme and so offering more functions than a normal full CAN approach.

The power to the MCU core (3 V) is supplied by a built-in regulator circuit, giving these microcontrollers superior

performance in terms of power consumption and tolerance to EMI.

Note : F²MC is the abbreviation of FUJITSU Flexible Microcontroller.

For the information for microcontroller supports, see the following web site.

This web site includes the "Customer Design Review Supplement" which provides the latest cautions on

system development and the minimal requirements to be checked to prevent problems before the system

development.

http://edevice.fujitsu.com/micom/en-support/

2010.8

MB90340E Series

■ FEATURES

• CPU

• Instruction system best suited to controller

- Wide choice of data types (bit, byte, word, and long word)

- Wide choice of addressing modes (23 types)

- Enhanced functionality with signed multiply and divide instructions and the RETI instruction

- Enhanced high-precision computing with 32-bit accumulator

• Instruction system compatible with high-level language (C language) and multitask

- Employing system stack pointer

- Various enhanced pointer indirect instructions

- Barrel shift instructions

• Increased processing speed

- 4-byte instruction queue

• Serial interface

• LIN-UART : 4 channels

- Equipped with full-duplex double buffer

- Clock-asynchronous or clock-synchronous serial transmission is available

• I²C interface : 2 channels (only for devices with a C suffix in the part number)

- Up to 400 kbps transfer rate

• Interrupt controller

• Powerful 8-level, 34-condition interrupt feature

• Up to 16 external interrupts are supported

• Automatic data transfer function independent of CPU

- Expanded intelligent I/O service function (EI²OS) : up to 16 channels

• I/O ports

• General-purpose input/output port (CMOS output)

- 80 ports (for devices without an S suffix in the part number - i.e. devices that support the sub clock)

- 82 ports (for devices with an S suffix in the part number - i.e. devices that do not support the sub clock)

• 8/10-bit A/D converter

• 16 channels (only for devices without a C suffix in the part number)

• 24 channels (only for devices with a C suffix in the part number)

• Resolution is selectable between 8-bit and 10-bit.

• Activation by external trigger input is allowed.

• Conversion time : 3 μs (at 24 MHz machine clock, including sampling time)

• Address match detection (program patch) function

• Detects address matches against 6 address pointers

• Timer

• Time-base timer, watch timer, watchdog timer : 1 channel

• 8/16-bit PPG timer : 8-bit × 16 channels, or 16-bit × 8 channels

• 16-bit reload timer : 4 channels

• 16-bit input/output timer

- 16-bit free-run timer : 2 channels

(FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)

- 16-bit input capture: (ICU): 8 channels

- 16-bit output compare: (OCU): 8 channels

(Continued)

2

DS07-13747-4E

MB90340E Series

(Continued)

• Full-CAN controller

• Up to 2 channels

• Compliant with Ver2.0A and Ver2.0B CAN specifications

• 16 built-in message buffers

• CAN wake-up function

• Low power consumption (standby) mode

• Sleep mode (a mode that halts CPU operating clock)

• Timebase timer mode (a mode where only the oscillation clock, sub clock, timebase timer and watch timer

operate)

• Watch mode (a mode that operates sub clock and watch timer only)

• Stop mode (a mode that stops oscillation clock and sub clock)

• CPU intermittent operation mode

• Clock modulation circuit

• Technology

• CMOS technology

DS07-13747-4E

3

MB90340E Series

■ PRODUCT LINEUP

Part Number

MB90341E(S), MB90341CE(S),

MB90342E(S), MB90342CE(S),

MB90346E(S), MB90346CE(S),

MB90347E(S), MB90347CE(S),

MB90348E(S), MB90348CE(S),

MB90349E(S), MB90349CE(S)

MB90F342E(S), MB90F342CE(S),

MB90F345E(S), MB90F345CE(S),

MB90F346E(S), MB90F346CE(S),

MB90F347E(S), MB90F347CE(S),

MB90F349E(S), MB90F349CE(S)

MB90V340E-101,

MB90V340E-102

Parameter

Type

CPU

Evaluation products

Flash memory products

F²MC-16LX CPU

MASK ROM products

On-chip PLL clock multiplier (×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops)

Minimum instruction execution time : 42 ns (4 MHz osc. PLL × 6)

System clock

512 Kbytes :

256 Kbytes :

MB90F345E(S), MB90F345CE(S)

256 Kbytes :

MB90F342E(S), MB90F342CE(S),

MB90F349E(S), MB90F349CE(S)

128 Kbytes :

MB90342E(S), MB90342CE(S),

MB90349E(S), MB90349CE(S)

128 Kbytes :

MB90341E(S), MB90341CE(S),

MB90347E(S), MB90347CE(S),

MB90348E(S), MB90348CE(S)

64 Kbytes :

ROM

External

MB90F347E(S), MB90F347CE(S)

64 Kbytes :

MB90F346E(S), MB90F346CE(S)

MB90346E(S), MB90346CE(S)

20 Kbytes :

16 Kbytes :

MB90F345E(S), MB90F345CE(S)

16 Kbytes :

MB90F342E(S), MB90F342CE(S),

MB90F349E(S), MB90F349CE(S)

6 Kbytes :

MB90341E(S), MB90341CE(S),

MB90342E(S), MB90342CE(S),

MB90348E(S), MB90348CE(S),

MB90349E(S), MB90349CE(S)

6 Kbytes :

RAM

30 Kbytes

MB90F347E(S), MB90F347CE(S)

2 Kbytes :

MB90347E(S), MB90347CE(S)

2 Kbytes :

MB90F346E(S), MB90F346CE(S)

MB90346E(S), MB90346CE(S)

Emulator-specific

power supply*

Yes

⎯

0.35 μm CMOS with

regulator for built-in

power supply

0.35 μm CMOS with built-in power supply regulator +

Flash memory with Charge pump for programming voltage

Technology

3.5 V to 5.5 V : When normal operating (not using A/D converter)

4.0 V to 5.5 V : When using the A/D converter/Flash programming

4.5 V to 5.5 V : When using the external bus

Operating

voltage range

5 V 10%

Temperature range

Package

⎯

−40 °C to +105 °C

QFP-100, LQFP-100

4 channels

PGA-299

5 channels

Wide range of baud rate settings using a dedicated baud rate generator (reload timer)

Special synchronous options for adapting to different synchronous serial protocols

LIN functionality working either as master or slave LIN device

LIN-UART

Devices with a C suffix in the part number : 2 channels

2 channels

I²C (400 kbps)

Devices without a C suffix in the part number : ⎯

(Continued)

4

DS07-13747-4E

MB90340E Series

Part Number

MB90341E(S), MB90341CE(S),

MB90342E(S), MB90342CE(S),

MB90346E(S), MB90346CE(S),

MB90347E(S), MB90347CE(S),

MB90348E(S), MB90348CE(S),

MB90349E(S), MB90349CE(S)

MB90F342E(S), MB90F342CE(S),

MB90F345E(S), MB90F345CE(S),

MB90F346E(S), MB90F346CE(S),

MB90F347E(S), MB90F347CE(S),

MB90F349E(S), MB90F349CE(S)

MB90V340E-101,

MB90V340E-102

Parameter

Devices with a C suffix in the part number

Devices without a C suffix in the part number : 16 channels

: 24 channels

24 input channels

A/D Converter

10-bit or 8-bit resolution

Conversion time : Min 3 μs include sample time (per one channel)

16-bit Reload Timer Operation clock frequency : fsys/2¹, fsys/2³, fsys/2⁵(fsys = Machine clock frequency)

(4 channels)

Supports External Event Count function

Generates an interrupt signal on overflow

Supports Timer Clear when the output compare finds a match

Operation clock freq. : fsys, fsys/2¹, fsys/2², fsys/2³, fsys/2⁴, fsys/2⁵, fsys/2⁶, fsys/2⁷

(fsys = Machine clock freq.)

Free-run Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3

Free-run Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7

16-bit Free-run

Timer (2 channels)

16-bit Output

Compare

Generates an interrupt signal when one of the 16-bit free-run timer matches the output com-

pare register

(8 channels)

A pair of compare registers can be used to generate an output signal.

16-bit Input Capture Captures the value of the 16-bit free-run timer and generates an interrupt when triggered by

(8 channels)

a pin input (rising edge, falling edge, or both rising and falling edges).

8 channels (16-bit) /16 channels (8-bit)

Sixteen 8-bit reload counters

Sixteen 8-bit reload registers for L pulse width

Sixteen 8-bit reload registers for H pulse width

8/16-bit

Programmable

Pulse Generator

Supports 8-bit and 16-bit operation modes

A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as

8-bit prescaler plus 8-bit reload counter

Operating clock freq. : fsys, fsys/2¹, fsys/2², fsys/2³, fsys/2⁴or 128 μs@fosc = 4 MHz

(fsys = Machine clock frequency, fosc = Oscillation clock frequency)

2 channels :

MB90341E(S), MB90341CE(S),

MB90F342E(S), MB90F342CE(S),

MB90342E(S), MB90342CE(S)

MB90F345E(S), MB90F345CE(S)

1 channel :

3 channels

MB90346E(S), MB90346CE(S),

MB90347E(S), MB90347CE(S),

MB90348E(S), MB90348CE(S),

MB90349E(S), MB90349CE(S)

MB90F346E(S), MB90F346CE(S),

MB90F347E(S), MB90F347CE(S),

MB90F349E(S), MB90F349CE(S)

CAN Interface

Conforms to CAN Specification Version 2.0 Part A and B

Automatic re-transmission in case of error

Automatic transmission in response to Remote Frames

Prioritized 16 message buffers for data and ID’s

Supports multiple messages

Flexible configuration of acceptance filtering :

Full bit compare/Full bit mask/Two partial bit masks

Supports up to 1 Mbps

(Continued)

DS07-13747-4E

5

MB90340E Series

(Continued)

Part Number

MB90341E(S), MB90341CE(S),

MB90342E(S), MB90342CE(S),

MB90346E(S), MB90346CE(S),

MB90347E(S), MB90347CE(S),

MB90348E(S), MB90348CE(S),

MB90349E(S), MB90349CE(S)

MB90F342E(S), MB90F342CE(S),

MB90F345E(S), MB90F345CE(S),

MB90F346E(S), MB90F346CE(S),

MB90F347E(S), MB90F347CE(S),

MB90F349E(S), MB90F349CE(S)

MB90V340E-101,

MB90V340E-102

Parameter

External Interrupt

(16 channels)

Can be used rising edge, falling edge, starting up by H/L level input, external interrupt,

expanded intelligent I/O services (EI²OS) and DMA

D/A Converter

Sub clock

(maximum100kHz) MB90V340E-102

2 channels

Only for

⎯

Devices with sub clock : devices without an S suffix in the part number

Devices without sub clock : devices with an S suffix in the part number

Virtually all external pins can be used as general purpose I/O port

All ports are push-pull outputs

I/O Ports

Bit-wise settable as input/output or peripheral signal

Can be configured 8 as CMOS schmitt trigger/ automotive inputs (in blocks of 8 pins)

TTL input level settable for external bus (32-pin only for external bus)

Supports automatic programming, Embedded Algorithm

Write/Erase/Erase-Suspend/Resume commands

A flag indicating completion of the algorithm

Number of erase cycles : 10000 cycles

Data retention time : 20 years

Boot block configuration

Flash Memory

⎯

Erase can be performed on each block

Block protection with external programming voltage

Flash Security Feature for protecting the content of the Flash (except

for MB90F346E(S) and MB90F346CE (S) )

* : It is setting of Jumper switch (TOOL VCC) when Emulator (MB2147-01-E) is used.

Please refer to the Emulator operation manual for details.

6

DS07-13747-4E

MB90340E Series

■ PIN ASSIGNMENTS

• MB90341E(S), MB90342E(S), MB90F342E(S), MB90F345E(S), MB90346E(S), MB90F346E(S),

MB90347E(S), MB90F347E(S), MB90348E(S), MB90349E(S), MB90F349E(S)

(TOP VIEW)

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

P75/INT5

P74/INT4

P73/INT3

P72/INT2

P71/INT1

P70/INT0

P04/AD04/INT12

P05/AD05/INT13

P06/AD06/INT14

P07/AD07/INT15

P10/AD08/TIN1

P11/AD09/TOT1

P12/AD10/SIN3/INT11R

P13/AD11/SOT3

P14/AD12/SCK3

Vcc

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

Vss

P67/AN7/PPGE(F)

P66/AN6/PPGC(D)

P65/AN5/PPGA(B)

P64/AN4/PPG8(9)

P63/AN3/PPG6(7)

P62/AN2/PPG4(5)

P61/AN1/PPG2(3)

P60/AN0/PPG0(1)

AVss

QFP - 100

Vss

X1

X0

P15/AD13

P16/AD14

P17/AD15

P20/A16/PPG9(8)

P21/A17/PPGB(A)

P22/A18/PPGD(C)

P23/A19/PPGF(E)

AVRL

AVRH

AVcc

P57/AN15

1

2

3

4

5

6

7

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

(FPT-100P-M06)

* : X0A, X1A : devices without an S suffix in the part number

P40, P41 : devices with an S suffix in the part number

(Continued)

DS07-13747-4E

7

MB90340E Series

(Continued)

(TOP VIEW)

75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

50

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

MD1

P01/AD01/INT9

P02/AD02/INT10

P03/AD03/INT11

P04/AD04/INT12

P05/AD05/INT13

P06/AD06/INT14

P07/AD07/INT15

P10/AD08/TIN1

P11/AD09/TOT1

P12/AD10/SIN3/INT11R

P13/AD11/SOT3

P14/AD12/SCK3

Vcc

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

MD2

P75/INT5

P74/INT4

P73/INT3

P72/INT2

P71/INT1

P70/INT0

Vss

P67/AN7/PPGE(F)

P66/AN6/PPGC(D)

P65/AN5/PPGA(B)

P64/AN4/PPG8(9)

P63/AN3/PPG6(7)

P62/AN2/PPG4(5)

P61/AN1/PPG2(3)

P60/AN0/PPG0(1)

AVss

LQFP - 100

Vss

X1

X0

P15/AD13

P16/AD14

P17/AD15

AVRL

P20/A16/PPG9(8)

P21/A17/PPGB(A)

P22/A18/PPGD(C)

P23/A19/PPGF(E)

P24/A20/IN0

AVRH

AVcc

P57/AN15

P56/AN14

P55/AN13

P25/A21/IN1

P54/AN12/TOT3

1

2

3

4

5

6

7

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

(FPT-100P-M20)

* : X0A, X1A : devices without an S suffix in the part number

P40, P41 : devices with an S suffix in the part number

8

DS07-13747-4E

MB90340E Series

• MB90341CE(S), MB90342CE(S), MB90F342CE(S), MB90F345CE(S), MB90346CE(S), MB90F346CE(S),

MB90347CE(S), MB90F347CE(S), MB90348CE(S), MB90349CE(S), MB90F349CE(S)

(TOP VIEW)

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

P75/AN21/INT5

P74/AN20/INT4

P73/AN19/INT3

P72/AN18/INT2

P71/AN17/INT1

P70/AN16/INT0

Vss

P04/AD04/INT12

P05/AD05/INT13

P06/AD06/INT14

P07/AD07/INT15

P10/AD08/TIN1

P11/AD09/TOT1

P12/AD10/SIN3/INT11R

P13/AD11/SOT3

P14/AD12/SCK3

Vcc

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

P67/AN7/PPGE(F)

P66/AN6/PPGC(D)

P65/AN5/PPGA(B)

P64/AN4/PPG8(9)

P63/AN3/PPG6(7)

P62/AN2/PPG4(5)

P61/AN1/PPG2(3)

P60/AN0/PPG0(1)

QFP - 100

Vss

X1

X0

P15/AD13

P16/AD14

P17/AD15

AVss

AVRL

P20/A16/PPG9(8)

P21/A17/PPGB(A)

P22/A18/PPGD(C)

P23/A19/PPGF(E)

AVRH

AVcc

P57/AN15

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

(FPT-100P-M06)

* : X0A, X1A : devices without an S suffix in the part number

P40, P41 : devices with an S suffix in the part number

(Continued)

DS07-13747-4E

9

MB90340E Series

(Continued)

(TOP VIEW)

75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

76

P01/AD01/INT9

P02/AD02/INT10

P03/AD03/INT11

P04/AD04/INT12

P05/AD05/INT13

P06/AD06/INT14

P07/AD07/INT15

P10/AD08/TIN1

P11/AD09/TOT1

P12/AD10/SIN3/INT11R

P13/AD11/SOT3

P14/AD12/SCK3

Vcc

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

MD1

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

1

MD2

P75/AN21/INT5

P74/AN20/INT4

P73/AN19/INT3

P72/AN18/INT2

P71/AN17/INT1

P70/AN16/INT0

Vss

P67/AN7/PPGE(F)

P66/AN6/PPGC(D)

P65/AN5/PPGA(B)

P64/AN4/PPG8(9)

P63/AN3/PPG6(7)

P62/AN2/PPG4(5)

P61/AN1/PPG2(3)

P60/AN0/PPG0(1)

AVss

LQFP - 100

Vss

X1

X0

P15/AD13

P16/AD14

P17/AD15

AVRL

P20/A16/PPG9(8)

P21/A17/PPGB(A)

P22/A18/PPGD(C)

P23/A19/PPGF(E)

P24/A20/IN0

AVRH

AVcc

P57/AN15

P56/AN14

P55/AN13

P25/A21/IN1

P54/AN12/TOT3

2

3

4

5

6

7

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

(FPT-100P-M20)

* : X0A, X1A : devices without an S suffix in the part number

P40, P41 : devices with an S suffix in the part number

10

DS07-13747-4E

MB90340E Series

• MB90V340E-101/MB90V340E-102

(TOP VIEW)

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

81

P75/AN21/INT5

P74/AN20/INT4

P73/AN19/INT3

P72/AN18/INT2

P71/AN17/INT1

P70/AN16/INT0

Vss

P04/AD04/INT12

P05/AD05/INT13

P06/AD06/INT14

P07/AD07/INT15

P10/AD08/TIN1

P11/AD09/TOT1

P12/AD10/SIN3/INT11R

P13/AD11/SOT3

P14/AD12/SCK3

Vcc

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

P67/AN7/PPGE(F)

P66/AN6/PPGC(D)

P65/AN5/PPGA(B)

P64/AN4/PPG8(9)

P63/AN3/PPG6(7)

P62/AN2/PPG4(5)

P61/AN1/PPG2(3)

P60/AN0/PPG0(1)

AVss

QFP - 100

Vss

X1

X0

P15/AD13/SIN4

P16/AD14/SOT4

P17/AD15/SCK4

P20/A16/PPG9(8)

P21/A17/PPGB(A)

P22/A18/PPGD(C)

P23/A19/PPGF(E)

AVRL

AVRH

AVcc

P57/AN15/DA01

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

(FPT-100P-M06)

* : X0A, X1A : MB90V340E-102

P40, P41 : MB90V340E-101

This pin assignment is for using MB90V340E-101/102 via probecable as MB90340E.

(Continued)

DS07-13747-4E

11

MB90340E Series

(Continued)

(TOP VIEW)

75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

50

P01/AD01/INT9

P02/AD02/INT10

P03/AD03/INT11

P04/AD04/INT12

P05/AD05/INT13

P06/AD06/INT14

P07/AD07/INT15

P10/AD08/TIN1

P11/AD09/TOT1

P12/AD10/SIN3/INT11R

P13/AD11/SOT3

P14/AD12/SCK3

Vcc

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

MD1

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

MD2

P75/AN21/INT5

P74/AN20/INT4

P73/AN19/INT3

P72/AN18/INT2

P71/AN17/INT1

P70/AN16/INT0

Vss

P67/AN7/PPGE(F)

P66/AN6/PPGC(D)

P65/AN5/PPGA(B)

P64/AN4/PPG8(9)

P63/AN3/PPG6(7)

P62/AN2/PPG4(5)

P61/AN1/PPG2(3)

P60/AN0/PPG0(1)

AVss

LQFP - 100

Vss

X1

X0

P15/AD13/SIN4

P16/AD14/SOT4

P17/AD15/SCK4

P20/A16/PPG9(8)

P21/A17/PPGB(A)

P22/A18/PPGD(C)

P23/A19/PPGF(E)

P24/A20/IN0

AVRL

AVRH

AVcc

P57/AN15/DA01

P56/AN14/DA00

P55/AN13

P25/A21/IN1

P54/AN12/TOT3

1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

(FPT-100P-M20)

* : X0A, X1A : MB90V340E-102

P40, P41 : MB90V340E-101

This pin assignment is for using MB90V340E-101/102 via probecable as MB90340E.

12

DS07-13747-4E

MB90340E Series

■ PIN DESCRIPTION

Pin No.

I/O

Pin name Circuit

type*³

Function

QFP100*¹LQFP100*²

General purpose I/O pins. The register can be set to select

whether to use a pull-up resistor.In external bus mode, the pin is

enabled as a general-purpose I/O port when the corresponding bit

in the external address output control register (HACR) is 1.

P24 to P27

1 to 4

99 to 2

G

Output pins of the external address bus. When the corresponding

bit in the external address output control register (HACR) is 0, the

pins are enabled as high address output pins (A20 to A23).

A20 to A23

IN0 to IN3

P30

Trigger input pins for input captures.

General purpose I/O pin.The register can be set to select whether

to use a pull-up resistor.

This function is enabled in single-chip mode.

5

6

3

4

G

Address latch enable output pin. This function is enabled when

the external bus is enabled.

ALE

IN4

Trigger input pin for input capture.

General purpose I/O pin.The register can be set to select whether

to use a pull-up resistor.

This function is enabled in single-chip mode.

P31

External read strobe output pin. This function is enabled when the

external bus is enabled.

RD

IN5

Trigger input pin for input capture.

General purpose I/O pin. The register can be set to select whether

to use a pull-up resistor. This function is enabled either in single-

chip mode or when the WR/WRL pin output is disabled.

P32

Write strobe output pin for the external data bus. This function is

enabled when both the external bus and the WR/WRL pin output

are enabled. WRL is used to write-strobe 8 lower bits of the data

bus in 16-bit access while WR is used to write-strobe 8 bits of the

data bus in 8-bit access.

7

5

G

WR / WRL

INT10R

P33

External interrupt request input pin.

General purpose I/O pin. The register can be set to select whether

to use a pull-up resistor.This function is enabled either in single-

chip mode or when the WRH pin output is disabled.

8

6

G

Write strobe output pin for the upper 8 bits of the external data

bus. This function is enabled when the external bus is enabled,

when the external bus 16-bit mode is selected, and when the

WRH output pin is enabled.

WRH

(Continued)

DS07-13747-4E

13

MB90340E Series

Pin No.

I/O

Circuit

Pin name

Function

QFP100*¹LQFP100*²

type*³

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor. This function is enabled either

in single-chip mode or when the hold function is disabled.

P34

9

7

8

G

Hold request input pin. This function is enabled when both the

external bus and the hold function are enabled.

HRQ

OUT4

Waveform output pin for output compare.

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor. This function is enabled either

in single-chip mode or when the hold function is disabled.

P35

10

Hold acknowledge output pin. This function is enabled when

both the external bus and the hold function are enabled.

HAK

OUT5

Waveform output pin for output compare.

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor. This function is enabled either

in single-chip mode or when the external ready function is

disabled.

P36

11

9

G

External ready input pin. This function is enabled when both the

external bus and the external ready function are enabled.

RDY

OUT6

Waveform output pin for output compare.

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor. This function is enabled either

in single-chip mode or when the clock output is disabled.

P37

12

10

Clock output pin. This function is enabled when both the

external bus and clock output are enabled.

CLK

OUT7

Waveform output pin for output compare

General purpose I/O pins.

P40, P41

X0A, X1A

F

B

(devices with an S suffix in the part number and or

MB90V340E-101)

13, 14

11, 12

Oscillation pins for sub clock

(devices without an S suffix in the part number and or

MB90V340E-102)

15

16

13

14

V^CC

V^SS

⎯

Power (3.5 V to 5.5 V) input pin

GND pin

This is the power supply stabilization capacitor This pin should

be connected to a ceramic capacitor with a capacitance greater

than or equal to 0.1 μF.

17

15

C

K

P42

IN6

General purpose I/O pin.

Trigger input pin for input capture.

18

16

F

RX input pin for CAN1 Interface

(MB90341E/342E/F342E/F345E only)

RX1

INT9R

External interrupt request input pin

(Continued)

14

DS07-13747-4E

MB90340E Series

Pin No.

I/O

Pin name

Circuit

Function

QFP100*¹LQFP100*²

type*³

P43

IN7

General purpose I/O pin.

Trigger input pin for input capture.

19

20

21

17

18

19

F

H

TX Output pin for CAN1

(MB90341E/342E/F342E/F345E only)

TX1

P44

General purpose I/O pin.

Serial data I/O pin for I²C (devices with a C suffix in the part

number)

SDA0

FRCK0

P45

Input pin for the 16-bit Free-run Timer 0

General purpose I/O pin.

Serial clock I/O pin for I²C (devices with a C suffix in the part

number)

SCL0

FRCK1

P46

Input pin for the 16-bit Free-run Timer

General purpose I/O pin.

Serial data I/O pin for I²C (devices with a C suffix in the part

number)

22

23

20

21

H

SDA1

P47

General purpose I/O pin.

Serial clock I/O pin for I²C (devices with a C suffix in the part

number)

SCL1

P50

AN8

General purpose I/O pin.

24

25

26

27

22

23

24

25

O

I

Analog input pin for the A/D converter

Serial data input pin for UART2

General purpose I/O pin.

SIN2

P51

AN9

Analog input pin for the A/D converter

Serial data output pin for UART2

General purpose I/O pin.

SOT2

P52

AN10

SCK2

P53

I

Analog input pin for the A/D converter

Clock I/O pin for UART2

General purpose I/O pin.

AN11

TIN3

I

Analog input pin for the A/D converter

Event input pin for the reload timer

General purpose I/O pin.

P54

28

29

26

27

AN12

TOT3

P55

I

Analog input pin for the A/D converter

Output pin for the reload timer

General purpose I/O pin.

AN13

P56, P57

AN14, AN15

AV^CC

Analog input pin for the A/D converter

General purpose I/O pins.

30, 31

32

28, 29

30

J

Analog input pins for the A/D converter

Analog power input pin for the A/D Converter

(Continued)

K

DS07-13747-4E

15

MB90340E Series

Pin No.

I/O

Pin name

Circuit

Function

QFP100*¹LQFP100*²

type*³

Reference voltage input pin for the A/D Converter. This power

supply must be turned on or off while a voltage higher than or

equal to AVRH is applied to AV^CC.

33

31

AVRH

L

34

35

32

33

AVRL

AV^SS

K

Lower reference voltage input pin for the A/D Converter

Analog GND pin for the A/D Converter

General purpose I/O pins.

P60 to P67

AN0 to AN7

Analog input pins for the A/D converter

36 to 43

44

34 to 41

42

I

⎯

I

PPG0, 2, 4, 6,

8, A, C, E

Output pins for PPGs

V^SS

GND pin

P70 to P75

General purpose I/O pins.

Analog input pins for the A/D converter (devices with a C suffix

in the part number)

45 to 50

43 to 48 AN16 to AN21

INT0 to INT5

External interrupt request input pins

Input pin for specifying the operating mode.

Input pins for specifying the operating mode.

Reset input pin

51

52, 53

54

49

50, 51

52

MD2

MD1, MD0

RST

D

C

E

P76, P77

General purpose I/O pins.

Analog input pins for the A/D converter (devices with a C suffix

in the part number)

55, 56

57

53, 54

55

AN22, AN23

I

INT6, INT7

P80

External interrupt request input pins

General purpose I/O pin.

TIN0

Event input pin for the reload timer

Trigger input pin for the A/D converter

External interrupt request input pin

General purpose I/O pin.

F

ADTG

INT12R

P81

TOT0

CKOT

INT13R

P82

Output pin for the reload timer

Output pin for the clock monitor

External interrupt request input pin

General purpose I/O pin.

58

56

F

SIN0

Serial data input pin for UART0

Event input pin for the reload timer

External interrupt request input pin

General purpose I/O pin.

59

60

57

58

M

F

TIN2

INT14R

P83

SOT0

TOT2

Serial data output pin for UART0

Output pin for the reload timer

(Continued)

16

DS07-13747-4E

MB90340E Series

Pin No.

I/O

Pin name

Circuit

Function

QFP100*¹LQFP100*²

type*³

P84

SCK0

General purpose I/O pin.

61

59

F

Clock I/O pin for UART0

External interrupt request input pin

General purpose I/O pin.

Serial data input pin for UART1

General purpose I/O pin.

Serial data output pin for UART1

General purpose I/O pin.

Clock I/O pin for UART1

Power (3.5 V to 5.5 V) input pin

GND pin

INT15R

P85

62

63

64

60

61

62

M

F

SIN1

P86

SOT1

P87

F

SCK1

65

66

63

64

V^CC

⎯

V^SS

P90 to P93

PPG1, 3, 5, 7

P94 to P97

General purpose I/O pins

Output pins for PPGs

67 to 70

65 to 68

F

General purpose I/O pins

71 to 74

69 to 72

F

OUT0 to

OUT3

Waveform output pins for output compares. This function is

enabled when the OCU enables waveform output.

PA0

RX0

General purpose I/O pin.

75

76

73

74

F

RX input pin for CAN0 Interface

External interrupt request input pin

General purpose I/O pin.

INT8R

PA1

TX0

TX Output pin for CAN0

General purpose I/O pins. The register can be set to select

whether to use a pull-up resistor. This function is enabled in

single-chip mode.

P00 to P07

77 to 84

75 to 82

G

I/O pins for 8 lower bits of the external address/data bus.

This function is enabled when the external bus is enabled.

AD00 to AD07

INT8 to INT15

External interrupt request input pins.

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor.

This function is enabled in single-chip mode.

P10

85

83

I/O pin for the external address/data bus.

This function is enabled when the external bus is enabled.

AD08

TIN1

Event input pin for the reload timer

(Continued)

DS07-13747-4E

17

MB90340E Series

Pin No.

I/O

Circuit

Pin name

Function

QFP100*¹

LQFP100*²

type*³

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor. This function is enabled in

single-chip mode.

P11

86

84

G

N

I/O pin for the external address/data bus. This function is

enabled when the external bus is enabled.

AD09

TOT1

Output pin for the reload timer

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor.

This function is enabled in single-chip mode.

P12

I/O pin for the external address/data bus. This function is

enabled when the external bus is enabled.

87

85

AD10

SIN3

Serial data input pin for UART3

INT11R

External interrupt request input pin

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor.

P13

This function is enabled in single-chip mode.

88

89

86

87

G

I/O pin for the external address/data bus. This function is

enabled when the external bus is enabled.

AD11

SOT3

Serial data output pin for UART3

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor.

This function is enabled in single-chip mode.

P14

I/O pin for the external address/data bus. This function is

enabled when the external bus is enabled.

AD12

SCK3

V^CC

V^SS

X1

Clock I/O pin for UART3

Power (3.5 V to 5.5 V) input pin

GND pin

90

91

92

93

88

89

90

91

⎯

Main clock output pin

Main clock input pin

A

X0

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor.

This function is enabled in single-chip mode.

P15

AD13

P16

94

95

92

93

G

I/O pin for the external address/data bus. This function is

enabled when the external bus is enabled.

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor.

This function is enabled in single-chip mode.

G

I/O pin for the external address/data bus. This function is

enabled when the external bus is enabled.

AD14

(Continued)

18

DS07-13747-4E

MB90340E Series

(Continued)

Pin No.

I/O

Circuit

Pin name

Function

QFP100*¹LQFP100*²

type*³

General purpose I/O pin. The register can be set to select

whether to use a pull-up resistor.

P17

This function is enabled in single-chip mode.

96

94

G

I/O pin for the external address/data bus. This function is

enabled when the external bus is enabled.

AD15

General purpose I/O pins. The register can be set to select

whether to use a pull-up resistor.In external bus mode, the pin

is enabled as a general-purpose I/O port when the

corresponding bit in the external address output control

register (HACR) is 1.

P20 to P23

97 to 100

95 to 98

G

Output pins of the external address bus. When the

corresponding bit in the external address output control

register (HACR) is 0, the pins are enabled as high address

output pins (A16 to A19).

A16 to A19

PPG9,PPGB,

PPGD,PPGF

Output pins for PPGs

*1 : FPT-100P-M06

*2 : FPT-100P-M20

*3 : For I/O circuit type, refer to “■ I/O CIRCUIT TYPE”.

DS07-13747-4E

19

MB90340E Series

■ I/O CIRCUIT TYPE

Type

Circuit

Remarks

Oscillation circuit

High-speed oscillation feedback

resistor = approx. 1 MΩ

X1

X0

Xout

A

Standby control signal

Oscillation circuit

X1A

X0A

Low-speed oscillation feedback

resistor = approx. 10 MΩ

Xout

B

C

Standby control signal

• MASK ROM and evaluation products:

CMOS hysteresis input pin

• Flash memory products:

CMOS input pin

R

CMOS hysteresis

inputs

MASK ROM and evaluation products:

• CMOS hysteresis input pin

• Pull-down resistor value: approx. 50 kΩ

Flash memory products:

CMOS hysteresis

inputs

D

• CMOS input pin

• No pull-down

Pull-down

Resistor

CMOS hysteresis input pin

Pull-up resistor value: approx. 50 kΩ

Pull-up

E

Resistor

R

CMOS hysteresis

inputs

(Continued)

20

DS07-13747-4E

MB90340E Series

Type

Circuit

Remarks

• CMOS level output

(I^OL= 4 mA, IOH = −4 mA)

P-ch

Pout

Nout

• CMOS hysteresis input (with function to

disconnect input during standby)

• Automotive input (with function to

disconnect input during standby)

N-ch

R

F

CMOS hysteresis

input

Automotive input

Standby control for

input shutdown

• CMOS level output

Pull-up control

(I^OL= 4 mA, IOH = −4 mA)

• CMOS hysteresis input (with function to

disconnect input during standby)

• Automotive input (with function to

disconnect input during standby)

• TTL input (with function to disconnect

input during standby)

P-ch

Pout

Nout

N-ch

R

G

• Programmable pull-up resistor: 50 kΩ

approx.

CMOS hysteresis

input

Automotive input

TTL input

Standby control for

input shutdown

• CMOS level output

(I^OL= 3 mA, IOH = −3 mA)

P-ch

Pout

• CMOS hysteresis input (with function to

disconnect input during standby)

• Automotive input (with function to

disconnect input during standby)

N-ch

Nout

H

R

CMOS hysteresis

input

Automotive input

Standby control for

input shutdown

(Continued)

DS07-13747-4E

21

MB90340E Series

Type

Circuit

Remarks

• CMOS level output

(I^OL= 4 mA, IOH = −4 mA)

P-ch

N-ch

Pout

Nout

• CMOS hysteresis input (with function to

disconnect input during standby)

• Automotive input (with function to

disconnect input during standby)

• A/D converter analog input

R

I

CMOS hysteresis

input

Automotive input

Standby control for

input shutdown

Analog input

• CMOS level output

(I^OL= 4 mA, IOH = −4 mA)

• D/A analog output

P-ch

N-ch

Pout

• CMOS hysteresis input (with function to

disconnect input during standby)

• Automotive input (with function to

disconnect input during standby)

• A/D converter analog input

Nout

R

CMOS hysteresis

input

J

Automotive input

Standby control for

input shutdown

Analog input

Analog output

Power supply input protection circuit

P-ch

N-ch

K

• A/D converter reference voltage power

supply input pin, with the protection

circuit

• Flash memory devices do not have a

protection circuit against V^CCfor pin

AVRH

ANE

AVR

P-ch

N-ch

L

ANE

(Continued)

22

DS07-13747-4E

MB90340E Series

(Continued)

Type

Circuit

Remarks

• CMOS level output

(I^OL= 4 mA, IOH = −4 mA)

• CMOS input (with function to disconnect

input during standby)

• Automotive input (with function to

disconnect input during standby)

P-ch

Pout

Nout

N-ch

M

R

CMOS input

Automotive input

Standby control for

input shutdown

• CMOS level output

(I^OL= 4 mA, IOH = −4 mA)

• CMOS input (with function to disconnect

input during standby)

Pull-up control

Pout

P-ch

• Automotive input (with function to

disconnect input during standby)

• TTL input (with function to disconnect

input during standby)

Programmable pull-up resistor: 50 kΩ

approx

N-ch

Nout

R

N

CMOS input

Automotive input

TTL input

Standby control for

input shutdown

• CMOS level output

(I^OL= 4 mA, IOH = −4 mA)

• CMOS input (with function to disconnect

input during standby)

• Automotive input (with function to

disconnect input during standby)

• A/D converter analog input

P-ch

N-ch

Pout

Nout

R

O

CMOS input

Automotive input

Standby control for

input shutdown

Analog input

DS07-13747-4E

23

MB90340E Series

■ HANDLING DEVICES

1. Preventing latch-up

CMOS IC may suffer latch-up under the following conditions:

• A voltage higher than V^CCor lower than VSS is applied to an input or output pin.

• A voltage higher than the rated voltage is applied between V^CCand VSS pins.

• The AV^CCpower supply is applied before the VCC voltage.

Latch-up may increase the power supply current drastically, causing thermal damage to the device.

For the same reason, also be careful not to let the analog power-supply voltage (AV^CC, AVRH) exceed the digital

power-supply voltage.

2. Handling unused pins

Leaving unused input terminals open may lead to permanent damage due to malfunction and latch-up; pull up

or pull down the terminals through the resistors of 2 kΩ or more.

3. Power supply pins (VCC/VSS)

• If there are multiple VCC and VSS pins, from the point of view of device design, pins to be of the same potential

are connected inside of the device to prevent malfunction such as latch-up.

To reduce unnecessary radiation, prevent malfunctioning of the strobe signal due to the rise of ground level,

and observe the standard for total output current, be sure to connect the V^CCand VSS pins to the power supply

and ground externally.

Connect V^CCand VSS pins to the device from the current supply source at a possibly low impedance.

• As a measure against power supply noise, it is recommended to connect a capacitor of about 0.1 μF as a

bypass capacitor between V^CCand VSS pins in the vicinity of VCC and VSS pins of the device.

Vcc

Vss

Vcc

Vss

Vcc

MB90340E

Series

Vcc

Vss

Vcc

Vss

4. Mode Pins (MD0 to MD2)

Connect the mode pins directly to VCC or VSS pins. To prevent the device unintentionally entering test mode due

to noise, lay out the printed circuit board so as to minimize the distance from the mode pins to V^CCor VSS pins

and to provide a low-impedance connection.

24

DS07-13747-4E

MB90340E Series

5. Sequence for Turning On the Power Supply to the A/D Converter and Analog Inputs

Make sure to turn on the A/D converter power supply (AVCC, AVRH, AVRL) and analog inputs (AN0 to AN23)

after turning-on the digital power supply (V^CC).

Turn-off the digital power after turning off the A/D converter supply and analog inputs. In this case, make sure

that the voltage does not exceed AVRH or AV^CC(turning on/off the analog and digital power supplies simulta-

neously is acceptable).

6. Connection of Unused A/D Converter Pins when the A/D Converter is Used

Connect unused pins of A/D converter to AVCC = VCC, AVSS = AVRH = AVRL = VSS.

7. Crystal Oscillator Circuit

The X0, X1 pins and X0A, X1A pins may be possible causes of abnormal operation. Make sure to provide bypass

capacitors via the shortest distance from X0, X1 pins and X0A, X1A pins, crystal oscillator (or ceramic oscillator)

and ground lines, and make sure, to the utmost effort, that the oscillation circuit lines do not cross the lines of

other circuits. It is highly recommended to provide a printed circuit board art work surrounding X0, X1 pins and

X0A, X1A pins with a ground area for stabilizing the operation.

For each of the mass-production products, request an oscillator evaluation from the manufacturer of the oscillator

you are using.

8. Pull-up/down resistors

The MB90340E Series does not support internal pull-up/down resistors (except for the pull-up resistors built into

ports 0 to 3). Use external components where needed.

9. Using external clock

To use an external clock, drive the X0 pin and leave the X1 pin open.

MB90340E Series

X0

Open

X1

10. Precautions when not using a sub clock signal

If you do not connect pins X0A and X1A to an oscillator, use pull-down handling on the X0A pin, and leave the

X1A pin open.

11. Notes on operation in PLL clock mode

If PLL clock mode is selected, the microcontroller attempt to be working with the self-oscillating circuit even when

there is no external oscillator or the external clock input is stopped. Performance of this operation, however,

cannot be guaranteed.

12. Notes on Power-On

To prevent the internal regulator circuit from malfunctioning, set the voltage rise time during power-on to 50 μs

or more (0.2 V to 2.7 V)

DS07-13747-4E

25

MB90340E Series

13. Stabilization of power supply voltage

A sudden change in the supply voltage may cause the device to malfunction even within the VCC supply voltage

operating range. Therefore, the V^CCsupply voltage should be stabilized. For reference, the supply voltage should

be controlled so that V^CCripple variations (peak- to-peak values) at commercial frequencies (50 MHz/60 MHz)

fall below 10% of the standard V^CCsupply voltage and the coefficient of fluctuation does not exceed 0.1 V/ms at

instantaneous power switching.

14. Port 0 to Port 3 Output During Power-on (External-bus Mode)

As shown below, when the power is turned on in External-Bus mode, there is a possibility that output signal of

Port 0 to Port 3 might be unstable irrespective of the reset input.

1/2VCC

VCC

Port0 to Port3

Port0 to Port3 outputs

might be unstable

Port0 to Port3 outputs = Hi-Z

15. Notes on Using the CAN Function

To use the CAN function, please set the DIRECT bit of the CAN Direct Mode Register (CDMR) to 1.

16. Flash Security Function (except for MB90F346E)

A security bit is located in the area of the flash memory.

If protection code 01^His written in the security bit, the flash memory is in the protected state by security.

Therefore please do not write 01^Hin this address if you do not use the security function.

Refer to following table for the address of the security bit.

Flash memory size

Address of the security bit

MB90F347E

Embedded 1 Mbit Flash Memory

FE0001^H

MB90F342E

MB90F349E

Embedded 2 Mbits Flash Memory

Embedded 4 Mbits Flash Memory

FC0001^H

F80001H

MB90F345E

17. Serial Communication

There is a possibility to receive wrong data due to the noise or other causes on the serial communication.

Therefore, design a printed circuit board so as to avoid noise.

Retransmit the data if an error occurs because of applying the checksum to the last data in consideration of

receiving wrong data due to the noise.

26

DS07-13747-4E

MB90340E Series

■ BLOCK DIAGRAMS

• MB90V340E-101/102

X0,X1

X0A,X1A*

RST

Clock

16LX

CPU

Controller

Free-run

FRCK0

RAM

30 Kbytes

Timer 0

Input

Capture

8 channels

IN7 to IN0

OUT7 to OUT0

FRCK1

Output

Compare

8 channels

Prescaler

5 channels

Free-run

Timer 1

SOT4 to SOT0

SCK4 to SCK0

SIN4 to SIN0

CAN

Controller

3 channels

LIN-UART

5 channels

RX2 to RX0

TX2 to TX0

16-bit Reload

Timer

4 channels

AV^CC

TIN3 to TIN0

AV^SS

AN23 to AN0

AVRH

TOT3 to TOT0

8/10-bit

A/D converter

24 channels

AD15 to AD00

A23 to A16

ALE

AVRL

ADTG

RD

10-bit

D/A converter

2 channels

External

Bus

Interface

WR/WRL

WRH

DA01, DA00

HRQ

HAK

8/16-bit

PPG

16/8 channels

PPGF to PPG0

RDY

CLK

I²C

Interface

2 channels

SDA1, SDA0

SCL1, SCL0

INT15 to INT8

(INT15R to INT8R)

External

Interrupt

16 channels

INT7 to INT0

DMAC

Clock

CKOT

Monitor

* : Only for MB90V340E-102

DS07-13747-4E

27

MB90340E Series

• MB90341E(S), MB90341CE(S), MB90342E(S), MB90342CE(S), MB90F342E(S), MB90F342CE(S), MB90F345E(S),

MB90F345CE(S), MB90346E(S), MB90346CE(S), MB90F346E(S), MB90F346CE(S), MB90347E(S), MB90347CE(S),

MB90F347E(S), MB90F347CE(S), MB90348E(S), MB90348CE(S), MB90349E(S), MB90349CE(S), MB90F349E(S),

MB90F349CE(S)

X0,X1

X0A,X1A*¹

Clock

16LX

CPU

Controller

RST

Free-run

Timer 0

RAM

2 K/6 K/16 K/

20 Kbytes

FRCK0

Input

Capture

IN7 to IN0

8 channels

ROM/Flash

64 K/128 K

256 K/384 K/

512 Kbytes

Output

Compare

8 channels

OUT7 to OUT0

FRCK1

Prescaler

4 channels

Free-run

Timer 1

SOT3 to SOT0

SCK3 to SCK0

SIN3 to SIN0

CAN

Controller

1/2 channels*³

RX0, RX1*³

TX0, TX1*³

LIN-UART

4 channels

16-bit Reload

Timer

4 channels

AV^CC

TIN3 to TIN0

AVSS

TOT3 to TOT0

8/10-bit

A/D Converter

16/24

AN15 to AN0

AN23 to AN16*²

AVRH

AD15 to AD00

A23 to A16

ALE

channels

AVRL

ADTG

RD

External

Bus

Interface

WR/WRL

WRH

8/16-bit

PPG

16/8 channels

HRQ

PPGF to PPG0

HAK

RDY

CLK

I²C

Interface

2 channels

SDA1, SDA0*²

SCL1, SCL0*²

INT15 to INT8

(INT15R to INT8R)

External

Interrupt

16 channels

INT7 to INT0

DMAC

Clock

Monitor

CKOT

*1 : Only for devices with an S suffix in the part number

*2 : Only for devices with a C suffix in the part number

*3 : Only the MB90341E(S)/ 341CE(S)/ 342E(S)/ 342CE(S)/ F342E(S)/F342CE(S)/F345E(S)/ F345CE(S)

are equipped with 2 CAN channels

28

DS07-13747-4E

MB90340E Series

■ MEMORY MAP

MB90V340E-101/102

MB90F345E(S)/F345CE(S)

000000

0000EF

H

000000

0000EF

H

Peripheral

External access area

000100

H

000100

H

RAM 20 Kbytes

RAM 30 Kbytes

0050FF

007900

H

0078FF

007900

H

Peripheral

007FFF

008000

H

007FFF

H

008000

ROM

(image of FF bank)

00FFFF

F80000

H

00FFFF

H

External access area

ROM (F8 bank)

F80000

ROM (F8 bank)

F8FFFF

F90000

H

F8FFFF

H

F90000

ROM (F9 bank)

ROM (FA bank)

ROM (FB bank)

ROM (FC bank)

ROM (FD bank)

ROM (FE bank)

ROM (FF bank)

ROM (F9 bank)

ROM (FA bank)

ROM (FB bank)

ROM (FC bank)

ROM (FD bank)

ROM (FE bank)

ROM (FF bank)

F9FFFF

FA0000

H

F9FFFF

H

FA0000

FAFFFF

FB0000

H

FAFFFF

FB0000

H

FBFFFF

FC0000

H

FBFFFF

FC0000

H

FCFFFF

H

FCFFFF

FD0000

H

FD0000

FDFFFF

FE0000

H

FDFFFF

FE0000

H

FEFFFF

FF0000

H

FEFFFF

FF0000

H

FFFFFF

H

FFFFFF

H

: Not accessible

DS07-13747-4E

29

MB90340E Series

MB90342E(S)/342CE(S)

MB90F342E(S)/F342CE(S)

MB90349E(S)/349CE(S)

MB90F349E(S)/F349CE(S)

MB90341E(S)/341CE(S)

MB90348E(S)/348CE(S) MB90F347E(S)/F347CE(S)

MB90347E(S)/347CE(S)

MB90346E(S)/346CE(S)

MB90F346E(S)/F346CE(S)

000000H

0000EFH

000000H

0000EFH

000000H

0000EFH

Peripheral

0000EFH

Peripheral

External access area

RAM 2 Kbytes

External access area

000100H

External access area

000100H

0008FFH

000100H

0018FFH

RAM 6 Kbytes

RAM 16 Kbytes

003FFFH

007900H

Peripheral

007FFFH

008000H

007FFFH

008000H

007FFFH

008000H

007FFFH

008000H

ROM (image

of FF bank)

ROM (image

of FF bank)

ROM (image

of FF bank)

ROM (image

of FF bank)

00FFFFH

External

access area

FC0000H

ROM (FC bank)

FCFFFFH

FD0000H

ROM (FD bank)

FDFFFFH

FE0000H

ROM (FE bank)

FEFFFFH

ROM (FE bank)

ROM (FF bank)

ROM (FE bank)

ROM (FF bank)

FEFFFFH

FF0000H

FEFFFFH

FF0000H

FEFFFFH

FF0000H

ROM (FF bank)

FFFFFFH

ROM (FF bank)

FFFFFFH

: Not accessible

Note: An image of the data in the FF bank of ROM is visible in the upper part of bank 00, which makes it possible

for the C compiler to use the small memory model. The lower 16 bits of addresses in the FF bank are the

same as the lower 16 bits of addresses in the 00 bank so that tables stored in the ROM can be accessed

without using the far specifier in the pointer declaration.

For example, when the address 00C000^His accessed, the data at FFC000H in ROM is actually accessed.

The ROM area in bank FF exceeds 32 Kbytes, and its entire image cannot be shown in bank 00.

Asaresult, theimagebetweenFF8000^HandFFFFFFH isvisibleinbank00, whiletheimagebetweenFF0000H

and FF7FFF^His visible only in bank FF.

30

DS07-13747-4E

MB90340E Series

■ I/O MAP

Address

Register

Abbreviation Access

Resource name

Port 0

Initial value

XXXXXXXXB

11111111B

XXXXXXXXB

XXXX0XXXB

00000000B

00000100B

000000^HPort 0 Data Register

PDR0

PDR1

PDR2

PDR3

PDR4

PDR5

PDR6

PDR7

PDR8

PDR9

PDRA

ADER5

ADER6

ADER7

ILSR0

ILSR1

DDR0

DDR1

DDR2

DDR3

DDR4

DDR5

DDR6

DDR7

DDR8

DDR9

DDRA

R/W

000001H Port 1 Data Register

Port 1

000002H Port 2 Data Register

Port 2

000003H Port 3 Data Register

Port 3

000004H Port 4 Data Register

Port 4

000005H Port 5 Data Register

Port 5

000006H Port 6 Data Register

Port 6

000007H Port 7 Data Register

Port 7

000008H Port 8 Data Register

Port 8

000009H Port 9 Data Register

Port 9

00000AH Port A Data Register

Port A

00000BH Port 5 Analog Input Enable Register

00000CH Port 6 Analog Input Enable Register

00000DH Port 7 Analog Input Enable Register

00000EH Input Level Select Register 0

00000FH Input Level Select Register 1

000010H Port 0 Direction Register

000011H Port 1 Direction Register

000012H Port 2 Direction Register

000013H Port 3 Direction Register

000014H Port 4 Direction Register

000015H Port 5 Direction Register

000016H Port 6 Direction Register

000017H Port 7 Direction Register

000018H Port 8 Direction Register

000019H Port 9 Direction Register

00001AH Port A Direction Register

00001BH

Port 5, A/D

Port 6, A/D

Port 7, A/D

Ports

Port 0

Port 1

Port 2

Port 3

Port 4

Port 5

Port 6

Port 7

Port 8

Port 9

Port A

Reserved

00001C^HPort 0 Pull-up Control Register

00001DH Port 1 Pull-up Control Register

00001EH Port 2 Pull-up Control Register

00001FH Port 3 Pull-up Control Register

PUCR0

PUCR1

PUCR2

PUCR3

R/W

Port 0

Port 1

Port 2

Port 3

00000000B

R/W

W, R/W

(Continued)

DS07-13747-4E

31

MB90340E Series

Address

Register

Abbreviation Access Resource name Initial value

000020^HSerial Mode Register 0

SMR0

SCR0

W,R/W

R/W

00000000B

00001000B

000021H Serial Control Register 0

000022H Reception/Transmission Data Register 0

000023H Serial Status Register 0

RDR0/TDR0

SSR0

R,R/W

UART0

Extended Communication Control

Register 0

R,W,

R/W

000024H

ECCR0

000000XX^B

000025H Extended Status/Control Register 0

000026H Baud Rate Generator Register 00

000027H Baud Rate Generator Register 01

000028H Serial Mode Register 1

ESCR0

BGR00

BGR01

SMR1

R/W

00000100B

00000000B

00001000B

R/W

W,R/W

R/W

000029H Serial Control Register 1

SCR1

00002AH Reception/Transmission Data Register 1

00002BH Serial Status Register 1

RDR1/TDR1

SSR1

R,R/W

UART1

Extended Communication Control

Register 1

R,W,

R/W

00002CH

ECCR1

000000XX^B

00002DH Extended Status/Control Register 1

00002EH Baud Rate Generator Register 10

00002FH Baud Rate Generator Register 11

000030H PPG 0 Operation Mode Control Register

000031H PPG 1 Operation Mode Control Register

000032H PPG 0/PPG 1 Count Clock Select Register

000033H

ESCR1

BGR10

BGR11

PPGC0

PPGC1

PPG01

Reserved

PPGC2

PPGC3

PPG23

Reserved

PPGC4

PPGC5

PPG45

R/W

00000100B

00000000B

0X000XX1B

R/W

W,R/W

W,R/W 16-bit PPG 0/1 0X000001B

R/W

000000X0B

000034^HPPG 2 Operation Mode Control Register

000035H PPG 3 Operation Mode Control Register

000036H PPG 2/PPG 3 Count Clock Select Register

000037H

W,R/W

0X000XX1B

W,R/W 16-bit PPG 2/3 0X000001B

R/W

000000X0B

000038^HPPG 4 Operation Mode Control Register

000039H PPG 5 Operation Mode Control Register

00003AH PPG 4/PPG 5 Clock Select Register

W,R/W

0X000XX1B

W,R/W 16-bit PPG 4/5 0X000001B

R/W

000000X0B

00000000^B

0X000XX1B

Address Match

Detection 1

00003BH Address Detect Control Register 1

PACSR1

R/W

00003CH PPG 6 Operation Mode Control Register

00003DH PPG 7 Operation Mode Control Register

00003EH PPG 6/PPG 7 Count Clock Control Register

00003FH

PPGC6

PPGC7

W,R/W

W,R/W 16-bit PPG 6/7 0X000001B

PPG67

R/W

000000X0B

Reserved

(Continued)

32

DS07-13747-4E

MB90340E Series

Address

Register

Abbreviation Access Resource name

Initial value

0X000XX1B

0X000001B

000040^HPPG 8 Operation Mode Control Register

000041H PPG 9 Operation Mode Control Register

PPGC8

PPGC9

W,R/W

16-bit PPG 8/9

16-bit PPG A/B

16-bit PPG C/D

16-bit PPG E/F

PPG 8/PPG 9 Count Clock Control

000042H

Register

PPG89

R/W

000000X0^B

000043H

Reserved

PPGCA

000044^HPPG A Operation Mode Control Register

000045H PPG B Operation Mode Control Register

W,R/W

0X000XX1B

0X000001B

PPGCB

PPG A/PPG B Count Clock Select

000046H

Register

PPGAB

R/W

000000X0^B

000047H

Reserved

PPGCC

000048^HPPG C Operation Mode Control Register

000049H PPG D Operation Mode Control Register

W,R/W

0X000XX1B

0X000001B

PPGCD

PPG C/PPG D Count Clock Select

00004AH

Register

PPGCD

R/W

000000X0^B

00004BH

Reserved

PPGCE

00004C^HPPG E Operation Mode Control Register

00004DH PPG F Operation Mode Control Register

W,R/W

0X000XX1B

0X000001B

PPGCF

PPG E/PPG F Count Clock Select

00004EH

Register

PPGEF

R/W

000000X0^B

00004FH

Reserved

ICS01

ICE01

ICS23

ICE23

ICS45

ICE45

ICS67

ICE67

OCS0

OCS1

OCS2

OCS3

OCS4

OCS5

OCS6

OCS7

000050^HInput Capture Control Status 0/1

000051H Input Capture Edge 0/1

R/W

R/W, R

R/W

R

00000000B

XXX0X0XXB

00000000B

XXXXXXXXB

00000000B

XXXXXXXXB

00000000B

XXX000XXB

0000XX00B

0XX00000B

0000XX00B

0XX00000B

0000XX00B

0XX00000B

0000XX00B

Input Capture 0/1

Input Capture 2/3

Input Capture 4/5

Input Capture 6/7

Output Compare 0/1

Output Compare 2/3

Output Compare 4/5

Output Compare 6/7

000052H Input Capture Control Status 2/3

000053H Input Capture Edge 2/3

000054H Input Capture Control Status 4/5

000055H Input Capture Edge 4/5

R/W

R

000056H Input Capture Control Status 6/7

000057H Input Capture Edge 6/7

R/W

R/W, R

R/W

000058H Output Compare Control Status 0

000059H Output Compare Control Status 1

00005AH Output Compare Control Status 2

00005BH Output Compare Control Status 3

00005CH Output Compare Control Status 4

00005DH Output Compare Control Status 5

00005EH Output Compare Control Status 6

00005FH Output Compare Control Status 7

0XX00000B

(Continued)

DS07-13747-4E

33

MB90340E Series

Address

Register

Abbreviation Access Resource name Initial value

000060^HTimer Control Status 0

000061H Timer Control Status 0

000062H Timer Control Status 1

000063H Timer Control Status 1

000064H Timer Control Status 2

000065H Timer Control Status 2

000066H Timer Control Status 3

000067H Timer Control Status 3

000068H A/D Control Status 0

000069H A/D Control Status 1

00006AH A/D Data 0

TMCSR0

TMCSR1

TMCSR2

TMCSR3

ADCS0

R/W

R

00000000B

XXXX0000B

00000000B

XXXX0000B

00000000B

XXXX0000B

00000000B

XXXX0000B

000XXXX0B

0000000XB

00000000B

XXXXXX00B

00000000B

16-bit Reload

Timer 0

16-bit Reload

Timer 1

16-bit Reload

Timer 2

16-bit Reload

Timer 3

ADCS1

ADCR0

A/D Converter

00006BH A/D Data 1

ADCR1

R

00006CH ADC Setting 0

ADSR0

R/W

00006DH ADC Setting 1

ADSR1

00006EH

Reserved

ROMM

00006F^HROM Mirror Function Select

000070H

W

ROM Mirror

XXXXXXX1B

to

Reserved for CAN Controller 0/1. Refer to “■ CAN CONTROLLERS”

00008F^H

000090^H

to

Reserved

00009A^H

DMA Descriptor Channel Specified

Register

00009B^H

DCSR

R/W

00000000^B

DMA

00009CH DMA Status L Register

00009DH DMA Status H Register

DSRL

DSRH

R/W

00000000B

Address Match

Detection 0

00009EH Address Detect Control Register 0

PACSR0

DIRR

R/W

00000000^B

Delayed Interrupt Trigger/Release

00009FH

Register

Delayed Interrupt XXXXXXX0^B

Low Power

00011000^B

0000A0H Low-power Mode Control Register

0000A1H Clock Selection Register

LPMCR

CKSCR

W,R/W

R,R/W

Control Circuit

Low Power

11111100^B

Control Circuit

0000A2H,

0000A3^H

Reserved

DSSR

0000A4^HDMA Stop Status Register

R/W

DMA

00000000B

(Continued)

34

DS07-13747-4E

MB90340E Series

Address

Register

Abbreviation Access Resource name Initial value

Automatic Ready Function Select

Register

0000A5^H

ARSR

HACR

W

0011XX00^B

External Memory

Access

External Address Output Control

Register

0000A6H

00000000^B

0000000XB

0000A7H Bus Control Signal Selection Register

0000A8H Watchdog Control Register

0000A9H Time Base Timer Control Register

0000AAH Watch Timer Control Register

0000ABH

ECSR

WDTC

TBTC

W

R,W

Watchdog Timer XXXXX111B

W,R/W Time Base Timer 1XX00100B

WTC

R,R/W

Watch Timer

1X001000B

Reserved

DERL

0000AC^HDMA Enable L Register

0000ADH DMA Enable H Register

R/W

00000000B

DMA

DERH

Flash Control Status Register

0000AEH (Flash memory devices only.

Otherwise reserved)

FMCS

R,R/W

Flash Memory

000X0000^B

0000AFH

Reserved

ICR00

ICR01

ICR02

ICR03

ICR04

ICR05

ICR06

ICR07

ICR08

ICR09

ICR10

ICR11

ICR12

ICR13

ICR14

ICR15

DAT0

0000B0^HInterrupt Control Register 00

0000B1H Interrupt Control Register 01

0000B2H Interrupt Control Register 02

0000B3H Interrupt Control Register 03

0000B4H Interrupt Control Register 04

0000B5H Interrupt Control Register 05

0000B6H Interrupt Control Register 06

0000B7H Interrupt Control Register 07

0000B8H Interrupt Control Register 08

0000B9H Interrupt Control Register 09

0000BAH Interrupt Control Register 10

0000BBH Interrupt Control Register 11

0000BCH Interrupt Control Register 12

0000BDH Interrupt Control Register 13

0000BEH Interrupt Control Register 14

0000BFH Interrupt Control Register 15

0000C0H D/A Converter Data 0

W,R/W

R/W

00000111^B

00000111B

XXXXXXXXB

XXXXXXX0B

Interrupt Control

0000C1H D/A Converter Data 1

DAT1

R/W

D/A Converter

0000C2H D/A Control 0

DACR0

DACR1

R/W

0000C3H D/A Control 1

R/W

XXXXXXX0B

(Continued)

DS07-13747-4E

35

MB90340E Series

Address

Register

Abbreviation Access Resource name Initial value

0000C4^H,

0000C5^H

Reserved

0000C6^HExternal Interrupt Enable 0

ENIR0

EIRR0

ELVR0

ENIR1

EIRR1

ELVR1

EISSR

PSCCR

BAPL

R/W

W

00000000B

XXXXXXXXB

00000000B

XXXXXXXXB

0000C7H External Interrupt Source 0

External Interrupt 0

0000C8H External Interrupt Level Setting 0

0000C9H External Interrupt Level Setting 0

0000CAH External Interrupt Enable 1

0000CBH External Interrupt Source 1

0000CCH External Interrupt Level Setting 1

0000CDH External Interrupt Level Setting 1

0000CEH External Interrupt Source Select

0000CFH PLL/Sub clock Control Register

0000D0H DMA Buffer Address Pointer L Register

0000D1H DMA Buffer Address Pointer M Register

0000D2H DMA Buffer Address Pointer H Register

0000D3H DMA Control Register

External Interrupt 1 00000000B

00000000B

PLL

XXXX0000B

XXXXXXXXB

R/W

BAPM

BAPH

DMACS

I/O Register Address Pointer L

DMA

0000D4H

Register

IOAL

IOAH

R/W

XXXXXXXX^B

I/O Register Address Pointer H

0000D5H

Register

0000D6H Data Counter L Register

0000D7H Data Counter H Register

0000D8H Serial Mode Register 2

0000D9H Serial Control Register 2

DCTL

DCTH

SMR2

SCR2

R/W

XXXXXXXXB

00000000B

W,R/W

Reception/Transmission Data

Register 2

0000DAH

RDR2/TDR2

SSR2

R/W

00000000^B

00001000B

000000XX^B

0000DBH Serial Status Register 2

R,R/W

UART2

Extended Communication Control

Register 2

R,W,

R/W

0000DCH

ECCR2

0000DDH Extended Status Control Register 2

0000DEH Baud Rate Generator Register 20

0000DFH Baud Rate Generator Register 21

0000E0H

ESCR2

BGR20

BGR21

R/W

00000100B

00000000B

to

Reserved for CAN Controller 2. Refer to “■ CAN CONTROLLERS”

0000EF^H

0000F0^H

to

External

0000FF^H

(Continued)

36

DS07-13747-4E

MB90340E Series

Address

Register

Abbreviation Access

Resource name

Initial value

XXXXXXXXB

007900^HReload Register L0

007901H Reload Register H0

007902H Reload Register L1

007903H Reload Register H1

007904H Reload Register L2

007905H Reload Register H2

007906H Reload Register L3

007907H Reload Register H3

007908H Reload Register L4

007909H Reload Register H4

00790AH Reload Register L5

00790BH Reload Register H5

00790CH Reload Register L6

00790DH Reload Register H6

00790EH Reload Register L7

00790FH Reload Register H7

007910H Reload Register L8

007911H Reload Register H8

007912H Reload Register L9

007913H Reload Register H9

007914H Reload Register LA

007915H Reload Register HA

007916H Reload Register LB

007917H Reload Register HB

007918H Reload Register LC

007919H Reload Register HC

00791AH Reload Register LD

00791BH Reload Register HD

00791CH Reload Register LE

00791DH Reload Register HE

00791EH Reload Register LF

00791FH Reload Register HF

007920H Input Capture 0

PRLL0

PRLH0

PRLL1

PRLH1

PRLL2

PRLH2

PRLL3

PRLH3

PRLL4

PRLH4

PRLL5

PRLH5

PRLL6

PRLH6

PRLL7

PRLH7

PRLL8

PRLH8

PRLL9

PRLH9

PRLLA

PRLHA

PRLLB

PRLHB

PRLLC

PRLHC

PRLLD

PRLHD

PRLLE

PRLHE

PRLLF

PRLHF

IPCP0

IPCP1

R/W

R

16-bit PPG 0/1

16-bit PPG 2/3

16-bit PPG 4/5

16-bit PPG 6/7

16-bit PPG 8/9

16-bit PPG A/B

16-bit PPG C/D

16-bit PPG E/F

Input Capture 0/1

007921H Input Capture 0

R

007922H Input Capture 1

R

007923H Input Capture 1

R

XXXXXXXXB

(Continued)

DS07-13747-4E

37

MB90340E Series

Address

Register

Abbreviation Access

Resource name

Initial value

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

00000000B

007924^HInput Capture 2

007925H Input Capture 2

007926H Input Capture 3

007927H Input Capture 3

007928H Input Capture 4

007929H Input Capture 4

00792AH Input Capture 5

00792BH Input Capture 5

00792CH Input Capture 6

00792DH Input Capture 6

00792EH Input Capture 7

00792FH Input Capture 7

007930H Output Compare 0

007931H Output Compare 0

007932H Output Compare 1

007933H Output Compare 1

007934H Output Compare 2

007935H Output Compare 2

007936H Output Compare 3

007937H Output Compare 3

007938H Output Compare 4

007939H Output Compare 4

00793AH Output Compare 5

00793BH Output Compare 5

00793CH Output Compare 6

00793DH Output Compare 6

00793EH Output Compare 7

00793FH Output Compare 7

007940H Timer Data 0

IPCP2

R

Input Capture 2/3

IPCP3

R

IPCP3

R

IPCP4

R

IPCP4

R

Input Capture 4/5

Input Capture 6/7

Output Compare 0/1

Output Compare 2/3

Output Compare 4/5

Output Compare 6/7

Free-run Timer 0

IPCP5

R

IPCP5

R

IPCP6

R

IPCP6

R

IPCP7

R

IPCP7

R

OCCP0

OCCP1

OCCP2

OCCP3

OCCP4

OCCP5

OCCP6

OCCP7

TCDT0

TCCSL0

TCCSH0

TCDT1

TCCSL1

TCCSH1

R/W

007941H Timer Data 0

00000000B

007942H Timer Control Status 0

007943H Timer Control Status 0

007944H Timer Data 1

00000000B

0XXXXXXXB

00000000B

007945H Timer Data 1

00000000B

Free-run Timer 1

007946H Timer Control Status 1

007947H Timer Control Status 1

00000000B

0XXXXXXXB

(Continued)

38

DS07-13747-4E

MB90340E Series

Address

007948^H

007949H

00794AH

00794BH

00794CH

00794DH

00794EH

00794FH

Register

Timer 0/Reload 0

Abbreviation Access

Resource name

Initial value

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

00000000B

R/W

TMR0/

TMRLR0

16-bit Reload

Timer 0

R/W

TMR1/

16-bit Reload

Timer 1

Timer 1/Reload 1

Timer 2/Reload 2

Timer 3/Reload 3

TMRLR1

R/W

TMR2/

16-bit Reload

Timer 2

TMRLR2

R/W

TMR3/

16-bit Reload

Timer 3

TMRLR3

R/W

007950H Serial Mode Register 3

007951H Serial Control Register 3

SMR3

SCR3

W,R/W

00000000B

Reception/Transmission Data

Register 3

007952H

RDR3/TDR3

SSR3

R/W

00000000^B

00001000B

000000XX^B

007953H Serial Status Register 3

R,R/W

UART3

Extended Communication Control

Register 3

R,W,

R/W

007954H

ECCR3

007955H Extended Status Control Register

007956H Baud Rate Generator Register 30

007957H Baud Rate Generator Register 31

007958H Serial Mode Register 4

ESCR3

BGR30

BGR31

SMR4

R/W

00000100B

00000000B

R/W

W,R/W

007959H Serial Control Register 4

SCR4

Reception/Transmission Data

Register 4

00795AH

RDR4/TDR4

SSR4

R/W

00000000^B

00001000B

000000XX^B

00795BH Serial Status Register 4

R,R/W

UART4

Extended Communication Control

Register 4

R,W,

R/W

00795CH

ECCR4

00795DH Extended Status Control Register

00795EH Baud Rate Generator Register 40

00795FH Baud Rate Generator Register 41

ESCR4

BGR40

BGR41

R/W

00000100B

00000000B

007960H

to

Reserved

00796B^H

00796C^HClock Output Enable Register

00796DH

CLKR

Reserved

R/W

Clock Monitor

XXXX0000B

00796E^HCAN Direct Mode Register

00796FH CAN Switch Register

CDMR

R/W

CAN Clock sync

CAN 0/1

XXXXXXX0B

XXXXXX00B

(Continued)

CANSWR

DS07-13747-4E

39

MB90340E Series

Address

Register

Abbreviation Access Resource name Initial value

007970^HI²C Bus Status Register 0

007971H I²C Bus Control Register 0

007972H

IBSR0

IBCR0

ITBAL0

ITBAH0

ITMKL0

ITMKH0

ISBA0

R

W,R/W

R/W

00000000^B

00000000B

00000000^B

00000000B

11111111^B

00111111B

00000000B

01111111B

00000000B

I²C 10-bit Slave Address Register 0

007973H

007974H

007975H

I²C Interface 0

I²C 10-bit Slave Address Mask

Register 0

007976H I²C 7-bit Slave Address Register 0

007977H I²C 7-bit Slave Address Mask Register 0

007978H I²C Data Register 0

ISMK0

IDAR0

007979H,

00797A^H

Reserved

ICCR0

00797B^HI²C Clock Control Register 0

R/W

I²C Interface 0

00011111B

00797CH

to

Reserved

00797F^H

007980^HI²C Bus Status Register 1

007981H I²C Bus Control Register 1

IBSR1

IBCR1

ITBAL1

ITBAH1

ITMKL1

ITMKH1

ISBA1

R

W,R/W

R/W

00000000^B

00000000B

00000000^B

00000000B

11111111^B

00111111B

00000000B

01111111B

00000000B

007982H

I²C 10-bit Slave Address Register 1

007983H

007984H

I²C Interface 1

I²C 10-bit Slave Address Mask

Register 1

007985H

007986H I²C 7-bit Slave Address Register 1

007987H I²C 7-bit Slave Address Mask Register 1

007988H I²C Data Register 1

ISMK1

IDAR1

007989H,

00798A^H

Reserved

ICCR1

00798B^HI²C Clock Control Register 1

R/W

I²C Interface 1

Clock Modulator

00011111B

0001X000B

(Continued)

00798CH

to

0079C1^H

Reserved

CMCR

0079C2^HClock Modulator Control Register

R, R/W

0079C3H

to

Reserved

0079DF^H

40

DS07-13747-4E

MB90340E Series

(Continued)

Address

Register

Abbreviation Access

Resource name

Initial value

XXXXXXXXB

0079E0^HDetect Address Setting 0

0079E1H Detect Address Setting 0

0079E2H Detect Address Setting 0

0079E3H Detect Address Setting 1

0079E4H Detect Address Setting 1

0079E5H Detect Address Setting 1

0079E6H Detect Address Setting 2

0079E7H Detect Address Setting 2

0079E8H Detect Address Setting 2

PADR0

PADR1

PADR2

R/W

Address Match

Detection 0

0079E9H

to

Reserved

0079EF^H

0079F0^HDetect Address Setting 3

0079F1H Detect Address Setting 3

0079F2H Detect Address Setting 3

0079F3H Detect Address Setting 4

0079F4H Detect Address Setting 4

0079F5H Detect Address Setting 4

0079F6H Detect Address Setting 5

0079F7H Detect Address Setting 5

0079F8H Detect Address Setting 5

PADR3

PADR4

PADR5

R/W

XXXXXXXXB

Address Match

Detection 1

0079F9H

to

Reserved

0079FF^H

007A00^H

to

Reserved for CAN Controller 0. Refer to “■ CAN CONTROLLERS”

Reserved for CAN Controller 1. Refer to “■ CAN CONTROLLERS”

Reserved

007AFF^H

007B00^H

to

007BFF^H

007C00^H

to

007CFF^H

007D00^H

to

007DFF^H

007E00^H

to

007FFF^H

Notes : • Initial value of “X” represents unknown value.

• Any write access to reserved addresses in I/O map should not be performed. A read access to reserved

addresses results in reading “X”.

DS07-13747-4E

41

MB90340E Series

■ CAN CONTROLLERS

The CAN controller has the following features:

• Conforms to CAN Specification Version 2.0 Part A and B

• Supports transmission/reception in standard frame and extended frame formats

• Supports transmission of data frames by receiving remote frames

• 16 transmission/reception message buffers

• 29-bit ID and 8-byte data

• Multi-level message buffer configuration

• Provides full-bit comparison, full-bit mask, acceptance register 0/acceptance register 1 for each message

buffer as ID acceptance mask

• Two acceptance mask registers in either standard frame format or extended frame formats

• Bit rate programmable from 10 kbps to 2 Mbps (when input clock is at 16 MHz)

List of Control Registers (1)

Address

Register

Abbreviation

BVALR

TREQR

TCANR

TCR

Access

R/W

W

Initial Value

CAN0

CAN1

000070^H

000071H

000072H

000073H

000074H

000075H

000076H

000077H

000078H

000079H

00007AH

00007BH

00007CH

00007DH

00007EH

00007FH

000080H

000081H

000082H

000083H

000084H

000085H

000086H

000087H

000088H

000089H

00008AH

00008BH

00008CH

00008DH

00008EH

00008FH

Message Buffer

Valid Register

00000000^B

Transmit Request

Register

00000000^B

Transmit Cancel

Register

00000000^B

Transmission

Complete Register

00000000^B

R/W

Receive Complete

Register

00000000^B

RCR

Remote Request

Receiving Register

00000000^B

RRTRR

ROVRR

RIER

Receive Overrun

Register

00000000^B

Reception Interrupt

Enable Register

00000000^B

42

DS07-13747-4E

MB90340E Series

List of Control Registers (2)

Address

Register

Abbreviation

Access

Initial Value

CAN0

CAN1

007B00^H

007B01H

007B02H

007B03H

007B04H

007B05H

007B06H

007B07H

007B08H

007B09H

007B0AH

007B0BH

007B0CH

007D00H

007D01H

007D02H

007D03H

007D04H

007D05H

007D06H

007D07H

007D08H

007D09H

007D0AH

007D0BH

007D0CH

Control Status

Register

R/W, W

R/W, R

0XXXX0X1^B

00XXX000B

CSR

LEIR

Last Event

Indicator Register

000X0000^B

XXXXXXXXB

R/W

R

Receive And Transmit

Error Counter

00000000^B

RTEC

BTR

Bit Timing

Register

11111111^B

X1111111^B

R/W

XXXXXXXX^B

IDE Register

IDER

TRTRR

Transmit RTR

Register

00000000^B

Remote Frame

Receive Waiting

Register

XXXXXXXX^B

RFWTR

TIER

R/W

007B0DH

007D0DH

007B0EH

007B0FH

007B10H

007B11H

007B12H

007B13H

007B14H

007B15H

007B16H

007B17H

007B18H

007B19H

007B1AH

007B1BH

007D0EH

007D0FH

007D10H

007D11H

007D12H

007D13H

007D14H

007D15H

007D16H

007D17H

007D18H

007D19H

007D1AH

007D1BH

Transmit Interrupt

Enable Register

00000000^B

XXXXXXXX^B

Acceptance Mask

Select Register

AMSR

AMR0

AMR1

R/W

XXXXXXXXB

XXXXXXXX^B

Acceptance Mask

Register 0

XXXXXXXXB

XXXXXXXX^B

Acceptance Mask

Register 1

XXXXXXXXB

DS07-13747-4E

43

MB90340E Series

List of Message Buffers (ID Registers) (1)

Address

Register

Abbreviation

Access

Initial Value

CAN0

CAN1

007A00^H

to

007A1F^H

007C00H

to

007C1F^H

XXXXXXXX^B

to

XXXXXXXX^B

General-

Purpose RAM

⎯

R/W

007A20H

007A21H

007A22H

007A23H

007A24H

007A25H

007A26H

007A27H

007A28H

007A29H

007A2AH

007A2BH

007A2CH

007A2DH

007A2EH

007A2FH

007A30H

007A31H

007A32H

007A33H

007A34H

007A35H

007A36H

007A37H

007A38H

007A39H

007A3AH

007A3BH

007A3CH

007A3DH

007A3EH

007A3FH

007C20H

007C21H

007C22H

007C23H

007C24H

007C25H

007C26H

007C27H

007C28H

007C29H

007C2AH

007C2BH

007C2CH

007C2DH

007C2EH

007C2FH

007C30H

007C31H

007C32H

007C33H

007C34H

007C35H

007C36H

007C37H

007C38H

007C39H

007C3AH

007C3BH

007C3CH

007C3DH

007C3EH

007C3FH

XXXXXXXX^B

ID Register 0

ID Register 1

ID Register 2

ID Register 3

ID Register 4

ID Register 5

ID Register 6

ID Register 7

IDR0

IDR1

IDR2

IDR3

IDR4

IDR5

IDR6

IDR7

R/W

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

44

DS07-13747-4E

MB90340E Series

List of Message Buffers (ID Registers) (2)

Address

Register

Abbreviation

Access

Initial Value

CAN0

CAN1

007A40^H

007A41H

007A42H

007A43H

007A44H

007A45H

007A46H

007A47H

007A48H

007A49H

007A4AH

007A4BH

007A4CH

007A4DH

007A4EH

007A4FH

007A50H

007A51H

007A52H

007A53H

007A54H

007A55H

007A56H

007A57H

007A58H

007A59H

007A5AH

007A5BH

007A5CH

007A5DH

007A5EH

007A5FH

007C40H

007C41H

007C42H

007C43H

007C44H

007C45H

007C46H

007C47H

007C48H

007C49H

007C4AH

007C4BH

007C4CH

007C4DH

007C4EH

007C4FH

007C50H

007C51H

007C52H

007C53H

007C54H

007C55H

007C56H

007C57H

007C58H

007C59H

007C5AH

007C5BH

007C5CH

007C5DH

007C5EH

007C5FH

XXXXXXXX^B

ID Register 8

IDR8

R/W

XXXXXXXXB

XXXXXXXX^B

ID Register 9

ID Register 10

ID Register 11

ID Register 12

ID Register 13

ID Register 14

ID Register 15

IDR9

IDR10

IDR11

IDR12

IDR13

IDR14

IDR15

R/W

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

XXXXXXXXB

XXXXXXXX^B

DS07-13747-4E

45

MB90340E Series

List of Message Buffers (DLC Registers and Data Registers) (1)

Address

Register

Abbreviation

DLCR0

Access

R/W

Initial Value

XXXXXXXXB

CAN0

CAN1

007A60^H

007A61H

007A62H

007A63H

007A64H

007A65H

007A66H

007A67H

007A68H

007A69H

007A6AH

007A6BH

007A6CH

007A6DH

007A6EH

007A6FH

007A70H

007A71H

007A72H

007A73H

007A74H

007A75H

007A76H

007A77H

007A78H

007A79H

007A7AH

007A7BH

007A7CH

007A7DH

007A7EH

007A7FH

007C60H

007C61H

007C62H

007C63H

007C64H

007C65H

007C66H

007C67H

007C68H

007C69H

007C6AH

007C6BH

007C6CH

007C6DH

007C6EH

007C6FH

007C70H

007C71H

007C72H

007C73H

007C74H

007C75H

007C76H

007C77H

007C78H

007C79H

007C7AH

007C7BH

007C7CH

007C7DH

007C7EH

007C7FH

DLC Register 0

DLC Register 1

DLC Register 2

DLC Register 3

DLC Register 4

DLC Register 5

DLC Register 6

DLC Register 7

DLC Register 8

DLC Register 9

DLC Register 10

DLC Register 11

DLC Register 12

DLC Register 13

DLC Register 14

DLC Register 15

DLCR1

DLCR2

DLCR3

DLCR4

DLCR5

DLCR6

DLCR7

DLCR8

DLCR9

DLCR10

DLCR11

DLCR12

DLCR13

DLCR14

DLCR15

46

DS07-13747-4E

MB90340E Series

List of Message Buffers (DLC Registers and Data Registers) (2)

Address

Register

Abbreviation

Access

Initial Value

CAN0

CAN1

007A80^H

to

007A87^H

007C80H

to

007C87^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 0

(8 bytes)

DTR0

R/W

007A88H

to

007A8F^H

007C88H

to

007C8F^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 1

(8 bytes)

DTR1

DTR2

DTR3

DTR4

DTR5

DTR6

DTR7

DTR8

DTR9

DTR10

DTR11

DTR12

DTR13

R/W

007A90H

to

007A97^H

007C90H

to

007C97^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 2

(8 bytes)

007A98H

to

007A9F^H

007C98H

to

007C9F^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 3

(8 bytes)

007AA0H

to

007AA7^H

007CA0H

to

007CA7^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 4

(8 bytes)

007AA8H

to

007AAF^H

007CA8H

to

007CAF^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 5

(8 bytes)

007AB0H

to

007AB7^H

007CB0H

to

007CB7^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 6

(8 bytes)

007AB8H

to

007ABF^H

007CB8H

to

007CBF^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 7

(8 bytes)

007AC0H

to

007AC7^H

007CC0H

to

007CC7^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 8

(8 bytes)

007AC8H

to

007ACF^H

007CC8H

to

007CCF^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 9

(8 bytes)

007AD0H

to

007AD7^H

007CD0H

to

007CD7^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 10

(8 bytes)

007AD8H

to

007ADF^H

007CD8H

to

007CDF^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 11

(8 bytes)

007AE0H

to

007AE7^H

007CE0H

to

007CE7^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 12

(8 bytes)

007AE8H

to

007AEF^H

007CE8H

to

007CEF^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 13

(8 bytes)

DS07-13747-4E

47

MB90340E Series

List of Message Buffers (DLC Registers and Data Registers) (3)

Address

Register

Abbreviation

Access

Initial Value

CAN0

CAN1

007AF0^H

to

007AF7^H

007CF0H

to

007CF7^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 14

(8 bytes)

DTR14

R/W

007AF8H

to

007AFF^H

007CF8H

to

007CFF^H

XXXXXXXX^B

to

XXXXXXXX^B

Data Register 15

(8 bytes)

DTR15

R/W

48

DS07-13747-4E

MB90340E Series

■ INTERRUPT FACTORS, INTERRUPT VECTORS, INTERRUPT CONTROL REGISTER

Interrupt control

DMA

channel

number

Interrupt vector

Number Address

EI²OS

Support

register

Interrupt cause

Number

Address

Reset

N

⎯

0

#08

#09

#10

#11

#12

#13

#14

#15

#16

#17

#18

#19

#20

#21

#22

#23

#24

#25

#26

#27

#28

#29

#30

#31

#32

#33

#34

#35

#36

#37

#38

FFFFDC^H

FFFFD8^H

FFFFD4^H

FFFFD0^H

FFFFCCH

FFFFC8H

FFFFC4H

FFFFC0H

FFFFBCH

FFFFB8H

FFFFB4H

FFFFB0H

FFFFACH

FFFFA8H

FFFFA4H

FFFFA0H

FFFF9CH

FFFF98H

FFFF94H

FFFF90H

FFFF8CH

FFFF88H

FFFF84H

FFFF80H

FFFF7CH

FFFF78H

FFFF74H

FFFF70H

FFFF6CH

FFFF68H

FFFF64H

⎯

INT9 instruction

Exception

N

CAN 0 RX

N

ICR00

ICR01

ICR02

ICR03

ICR04

ICR05

ICR06

ICR07

ICR08

ICR09

ICR10

ICR11

ICR12

ICR13

0000B0H

0000B1H

0000B2H

0000B3H

0000B4H

0000B5H

0000B6H

0000B7H

0000B8H

0000B9H

0000BAH

0000BBH

0000BCH

CAN 0 TX/NS

N

CAN 1 RX / Input Capture 6

CAN 1 TX/NS / Input Capture 7

CAN 2 RX / I²C0

Y1

N

CAN 2 TX/NS

N

16-bit Reload Timer 0

16-bit Reload Timer 1

16-bit Reload Timer 2

16-bit Reload Timer 3

PPG 0/1/4/5

Y1

N

1

2

⎯

3

PPG 2/3/6/7

N

PPG 8/9/C/D

N

PPG A/B/E/F

N

Time Base Timer

N

External Interrupt 0 to 3, 8 to 11

Watch Timer

Y1

N

⎯

4

External Interrupt 4 to 7, 12 to 15

A/D Converter

Y1

N

5

Free-run Timer 0 / Free-run Timer 1

Input Capture 4/5 / I²C1

Output Compare 0/1/4/5

Input Capture 0 to 3

Output Compare 2/3/6/7

UART 0 RX

⎯

6

Y1

Y2

Y1

Y2

Y1

7

8

9

10

11

12

13

UART 0 TX

UART 1 RX / UART 3 RX

UART 1 TX / UART 3 TX

0000BDH

(Continued)

DS07-13747-4E

49

MB90340E Series

(Continued)

Interrupt control

register

DMA

channel

number

Interrupt vector

Number Address

EI²OS

Support

Interrupt cause

Number

Address

UART 2 RX / UART 4 RX

UART 2 TX / UART 4 TX

Flash Memory

Y2

Y1

N

14

15

⎯

#39

#40

#41

#42

FFFF60^H

FFFF5CH

FFFF58H

FFFF54H

ICR14

0000BEH

ICR15

0000BFH

Delayed Interrupt

N

Y1 : Usable

Y2 : Usable, with EI²OS stop function

N : Unusable

Notes : • The peripheral resources sharing the ICR register have the same interrupt level.

• When two peripheral resources share the ICR register, only one can use Extended Intelligent I/O Service

at a time.

• When either of the two peripheral resources sharing the ICR register specifies Extended Intelligent I/O

Service, the other one cannot use interrupts.

50

DS07-13747-4E

MB90340E Series

■ ELECTRICAL CHARACTERISTICS

1. Absolute Maximum Ratings

Rating

Parameter

Symbol

Unit

Remarks

Min

Max

VCC

VSS − 0.3 VSS + 6.0

V

AV^CC

VCC = AVCC*²

Power supply voltage*¹

AVRH,

AVRL

AV^CC≥ AVRH, AVCC ≥ AVRL,

AVRH ≥ AVRL

V^SS− 0.3 VSS + 6.0

V

Input voltage*¹

Output voltage*¹

VI

VO

VSS − 0.3 VSS + 6.0

V

*3

Maximum Clamp Current

I^CLAMP

Σ|I^CLAMP|

I^OL

−4.0

⎯

+4.0

40

mA *5

mA *4, *6

mA *4, *7

mA *4

mA *4, *8

mA *4, *6

mA *4, *7

mA *4

mA *4, *8

mW

Total Maximum Clamp Current

“L” level maximum output current

“L” level average output current

“L” level maximum overall output current

“L” level average overall output current

“H” level maximum output current

“H” level average output current

“H” level maximum overall output current

“H” level average overall output current

Power consumption

⎯

15

I^OLAV

ΣI^OL

⎯

4

⎯

100

50

ΣI^OLAV

I^OH

⎯

−15

−4

I^OHAV

ΣI^OH

ΣI^OHAV

P^D

⎯

−100

−50

450

+105

+150

⎯

Operating temperature

T^A

−40

−55

°C

Storage temperature

T^STG

°C

*1: This parameter is based on VSS = AVSS = 0 V

*2: Set AV^CCand VCC to the same voltage. Make sure that AVCC does not exceed VCC and that the voltage at the

analog inputs does not exceed AV^CCwhen the power is switched on.

*3: V^Iand VO should not exceed VCC + 0.3 V. VI should not exceed the specified ratings. However if the maximum

current to/from an input is limited by some means with external components, the I^CLAMPrating supersedes the VI

rating.

*4: Applicable to pins: P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P67,

P70 to P77, P80 to P87, P90 to P97, PA0, PA1

*5: • Applicable to pins: P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47,

P50 to P57 (Evaluation device : P50 to P55) , P60 to P67, P70 to P77, P80 to P87,

P90 to P97, PA0 to PA1

• Use within recommended operating conditions.

• Use with DC voltage (current)

• The +B signal should always be applied by using a limiting resistance placed between the +B signal and the

microcontroller.

• The value of the limiting resistance should be set so that when the +B signal is applied, the input current to

the microcontroller pin does not exceed the rated value, either instantaneously or for prolonged periods.

• Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input

potential may pass through the protective diode and increase the potential at the V^CCpin, and this may affect

other devices.

(Continued)

DS07-13747-4E

51

MB90340E Series

(Continued)

• Note that if a +B signal is input when the microcontroller power supply is off (not fixed at 0 V) , the power

supply is provided from the pins, so that incomplete operation may result.

• Note that if the +B input is applied during power-on, the power supply is provided from the pins and the

resulting supply voltage may not be sufficient to operate the power-on reset.

• Care must be taken not to leave the +B input pin open.

• Sample recommended circuits:

• Input/output equivalent circuits

Protective diode

VCC

Limiting

resistance

P-ch

+B input (0 V to 16 V)

N-ch

R

*6: The maximum output current is defined as the peak value of the current of any one of the corresponding pins.

*7: The average output current is defined as the value of the average current flowing over 100 ms at any one of the

corresponding pins.

*8: The average total output current is defined as the value of the average current flowing over 100 ms at all of the

corresponding pins.

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

52

DS07-13747-4E

MB90340E Series

2. Recommended Operating Conditions

(VSS = AVSS = 0 V)

Remarks

Value

Typ

Parameter

Symbol

Unit

Min

Max

4.0

5.0

5.5

V

Under normal operation

Under normal operation, when not using

the A/D converter and not Flash

programming.

3.5

5.0

5.5

V

V^CC,

AV^CC

Power supply voltage

4.5

3.0

5.0

5.5

V

When External bus is used.

⎯

Maintains RAM data in stop mode

Use a ceramic capacitor or capacitor of

better AC characteristics. Capacitor at

the V^CCshould be greater than this

capacitor.

Smoothing capacitor

C^S

T^A

0.1

⎯

1.0

μF

°C

Operating temperature

−40

+105

C Pin Connection Diagram

C

S

WARNING: The recommended operating conditions are required in order to ensure the normal operation of

the semiconductor device. All of the device's electrical characteristics are warranted when the

device is operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges.

Operation outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented

on the data sheet. Users considering application outside the listed conditions are advised to contact

their representatives beforehand.

DS07-13747-4E

53

MB90340E Series

3. DC Characteristics

Sym-

(TA = −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)

Value

Parameter

Condition

Unit

Remarks

bol

Min

Typ

Max

Port inputs if CMOS

hysteresis input levels are

selected (except P12, P44,

P45, P46, P47, P50, P82,

P85)

V^IHS

⎯

0.8 VCC

⎯

VCC + 0.3

V

Port inputs if

Automotive input levels are

selected

V^IHA

V^IHT

V^IHS

⎯

0.8 VCC

2.0

⎯

VCC + 0.3

V

Input H

voltage

(At V^CC=

5 V 10%)

Port inputs if TTL input levels

are selected

P12, P50, P82, P85

inputs if CMOS input levels

are selected

0.7 VCC

P44, P45, P46, P47

inputs if CMOS hysteresis

input levels are selected

V^IHI

⎯

0.7 VCC

⎯

VCC + 0.3

V

RST input pin

(CMOS hysteresis)

V^IHR

V^IHM

⎯

0.8 VCC

⎯

VCC + 0.3

V

VCC − 0.3

MD input pin

Port inputs if CMOS

hysteresis input levels are

selected (except P12, P44,

P45, P46, P47, P50, P82,

P85)

V^ILS

⎯

VSS − 0.3

⎯

0.2 VCC

V

Port inputs if

Automotive input levels are

selected

V^ILA

V^ILT

V^ILS

⎯

VSS − 0.3

⎯

0.5 VCC

0.8

V

Input L

voltage

(At V^CC=

5 V 10%)

Port inputs if TTL

input levels are selected

P12, P50, P82, P85

inputs if CMOS input levels

are selected

0.3 VCC

P44, P45, P46, P47

inputs if CMOS hysteresis

input levels are selected

V^ILI

⎯

VSS − 0.3

⎯

0.3 VCC

V

RST input pin

(CMOS hysteresis)

V^ILR

V^ILM

V^OH

⎯

Normal

outputs

I²Ccurrent VCC = 4.5 V,

outputs

⎯

VSS − 0.3

V^CC− 0.5

⎯

0.2 VCC

VSS + 0.3

⎯

V

MD input pin

Output H

voltage

V^CC= 4.5 V,

I^OH= −4.0 mA

Output H

voltage

V^OHI

V^OL

V^OLI

V^CC− 0.5

⎯

V

I^OH= −3.0 mA

VCC = 4.5 V,

I^OL= 4.0 mA

Output L

voltage

Normal

outputs

I²Ccurrent VCC = 4.5 V,

outputs

⎯

0.4

Output L

voltage

I^OL= 3.0 mA

(Continued)

54

DS07-13747-4E

MB90340E Series

(Continued)

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)

Value

Min Typ Max

Sym-

bol

Parameter

Condition

Unit Remarks

Input leak current

I^IL

⎯

VCC = 5.5 V, VSS < VI < VCC

−1

⎯

+1

μA

P00 to P07,

P10 to P17,

P20 to P27,

P30 to P37,

RST

Pull-up

resistance

R^UP

⎯

25

50

100 kΩ

Except

Flash

memory

devices

Pull-down

resistance

R^DOWN

MD2

25

50

VCC = 5.0 V,

Internal frequency : 24 MHz,

At normal operation.

⎯

55

70

75

25

0.3

70

85

90

35

0.8

mA

V^CC= 5.0 V,

Internal frequency : 24 MHz,

At writing Flash memory.

V^CC= 5.0 V,

Internal frequency : 24 MHz,

At erasing Flash memory.

Flash

I^CC

mA memory

devices

Flash

mA memory

devices

VCC = 5.0 V,

Internal frequency : 24 MHz,

In Sleep mode.

I^CCS

mA

VCC = 5.0 V,

Internal frequency : 2 MHz,

In Main Timer mode

I^CTS

VCC = 5.0 V,

Power supply

current*

Internal frequency : 24 MHz,

In PLL Timer mode,

external frequency = 4 MHz

VCC

I^CTSPLL6

⎯

4

7

mA

VCC = 5.0 V

Internal frequency : 8 kHz,

In sub operation

T^A= +25°C

VCC = 5.0 V

Internal frequency : 8 kHz,

In sub sleep

I^CCL

70

20

140 μA

I^CCLS

50

μA

T^A= +25°C

VCC = 5.0 V

Internal frequency : 8 kHz,

In watch mode

T^A= +25°C

VCC = 5.0 V,

In Stop mode,

T^A= +25°C

I^CCT

I^CCH

C^IN

⎯

10

7

35

25

15

μA

pF

Other than C,

AV^CC, AVSS,

AVRH,AVRL,

V^CC, VSS

Input capacitance

⎯

5

* : The power supply current is measured with an external clock.

DS07-13747-4E

55

MB90340E Series

4. AC Characteristics

(1) Clock Timing

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)

Value

Parameter

Symbol

Unit

Remarks

Min

Typ

Max

When using an oscillation

circuit

3

⎯

16

MHz

PLL multiplied by 1

4

⎯

16

12

8

MHz When using an oscillation

circuit

PLL multiplied by 2

MHz When using an oscillation

circuit

PLL multiplied by 3

MHz When using an oscillation

circuit

f^C

X0, X1

4

Clock frequency

PLL multiplied by 4

MHz When using an oscillation

circuit

4

6

PLL multiplied by 6

MHz When using an oscillation

circuit

⎯

4

When using an external

3

24

MHz

clock*

f^CL

X0A, X1A

X0, X1

—

32.768 100

kHz

When using an oscillation

circuit

62.5

⎯

333

ns

t^CYL

Clock cycle time

When using an external

X0, X1

41.67

ns

clock

t^CYLL

P^WH, PWL

P^WHL, PWLL

t^CR, tCF

f^CP

X0A, X1A

10

30.5

⎯

—

⎯

5

μs

X0

X0A

X0

⎯

ns

μs

ns

Duty ratio is about 30% to

70%.

Input clock pulse width

5

15.2

⎯

Input clock rise and fall time

⎯

When using external clock

1.5

⎯

24

50

666

⎯

MHz When using main clock

kHz When using sub clock

Internal operating clock

frequency (machine clock)

f^CPL

⎯

8.192

⎯

t^CP

⎯

41.67

20

ns

When using main clock

When using sub clock

Internal operating clock

cycle time (machine clock)

t^CPL

⎯

122.1

μs

* : When selecting the PLL clock, the range of clock frequency is limited. Use this product within the range as

mentioned in “Relation between the external clock frequency and machine clock frequency”.

56

DS07-13747-4E

MB90340E Series

Clock Timing

tCYL

0.8 VCC

0.2 VCC

X0

PWH

PWL

tCF

tCR

tCYLL

0.8 VCC

X0A

0.2 VCC

P

WHL

PWLL

t

CF

tCR

DS07-13747-4E

57

MB90340E Series

Guaranteed PLL operation range

Guaranteed operation range

5.5

4.0

Guaranteed A/D Converter

operation range

3.5

Guaranteed PLL operation range

1.5

24

4

Machine clock f^CP(MHz)

Guaranteed operation range of MB90340E series

Guaranteed oscillation frequency range

x 2

x 1

x 6 x 4

x 3

24

16

12

x 1/2

(PLL off)

8

4.0

1.5

12

16

3

8

4

24

External clock fC (MHz) *

* : When using a crystal oscillator or ceramic oscillator, the maximum oscillation clock frequency is 16 MHz

58

DS07-13747-4E

MB90340E Series

(2) Reset Standby Input

Parameter Symbol

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = AVSS = 0.0 V)

Value

Unit

Remarks

Min

Max

500

⎯

ns

Under normal operation

In Stop mode, Sub Clock

mode, Sub Sleep mode

and Watch mode

Reset input

t^RSTL

Oscillation time of oscillator*

RST

⎯

μs

time

+ 100 μs

100

In Time Timer mode

* : The oscillation time of the oscillator is the time it takes for the amplitude of the oscillations to reach 90%. For

crystal oscillators, this time is between several ms and several tens of ms, for ceramic oscillators the time is

between several hundred μs and several ms, and for an external clock, the time is 0 ms.

• Under normal operation:

tRSTL

RST

0.2 VCC

• In Stop mode, Sub Clock mode, Sub Sleep mode, Watch mode:

tRSTL

RST

0.2 VCC

90% of

amplitude

X0

Internal operation

clock

100 μs

Oscillation time

of oscillator

Oscillation stabilization

waiting time

Instruction execution

Internal reset

DS07-13747-4E

59

MB90340E Series

(3) Power On Reset

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = AVSS = 0.0 V)

Value

Parameter

Symbol

Condition

Unit

Remarks

Min

Max

30

Power on rise time

Power off time

t^R

VCC

0.05

1

ms

⎯

t^OFF

⎯

ms Waiting time until power-on

t

R

2.7 V

VCC

0.2 V

t

OFF

Note : If you change the power supply voltage too rapidly, a power on reset may occur. We recommend that you

startupsmoothlybyrestrainingvoltageswhenchanging the power supply voltage during operation, as shown

in the figure below. Perform while not using the PLL clock. However, if voltage drops are within 1 V/s, you

can operate while using the PLL clock.

V

CC

We recommend a rise of

50 mV/ms maximum.

3 V

Holds RAM data

V

SS

(4) Clock Output Timing

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

Value

Parameter

Symbol

CLK

Condition

Unit

Remarks

Min

62.5

41.67

20

Max

⎯

ns

f^CP= 16 MHz

Cycle time

t^CYC

⎯

f^CP= 24 MHz

f^CP= 16 MHz

f^CP= 24 MHz

⎯

CLK ↑ → CLK ↓

t^CHCL

13

⎯

t^CYC

tCHCL

2.4 V

CLK

0.8 V

60

DS07-13747-4E

MB90340E Series

(5) Bus Timing (Read)

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

Value

Parameter

Symbol

Condition

Unit

Min

Max

ALE pulse width

t^LHLL

t^AVLL

ALE

tCP/2 − 10

⎯

ns

Valid address →

ALE ↓ time

ALE, A23 to A16,

AD15 to AD00

t^CP/2 − 20

tCP/2 − 15

tCP − 15

⎯

ALE ↓ →

Address valid time

t^LLAX

t^AVRL

t^AVDV

ALE, AD15 to AD00

⎯

ns

Valid address →

RD ↓ time

A23 to A16,

AD15 to AD00, RD

Valid address →

Valid data input

A23 to A16,

AD15 to AD00

5 t^CP/2 − 60

⎯

RD pulse width

tRLRH

tRLDV

tRHDX

tRHLH

tRHAX

RD

3 tCP/2 − 20

⎯

ns

RD ↓ → Valid data input

RD ↑ → Data hold time

RD ↑ → ALE ↑ time

RD ↑ → Address valid time

RD, AD15 to AD00

RD, ALE

3 tCP/2 − 50

0

⎯

tCP/2 − 15

tCP/2 − 10

RD, A23 to A16

Valid address →

CLK ↑ time

A23 to A16,

AD15 to AD00, CLK

t^AVCH

t^CP/2 − 16

⎯

ns

RD ↓ → CLK ↑ time

ALE ↓ → RD ↓ time

tRLCH

tLLRL

RD, CLK

ALE, RD

tCP/2 − 15

⎯

ns

tRLCH

tAVCH

2.4 V

CLK

ALE

RD

0.8 V

tLLAX

tAVLL

tRHLH

2.4 V

0.8 V

2.4 V

tLHLL

tAVRL

tRLRH

2.4 V

0.8 V

tLLRL

tRHAX

2.4 V

0.8 V

2.4 V

0.8 V

A23 to A16

tRLDV

tRHDX

tAVDV

2.4 V

0.8 V

VIH

VIL

2.4 V

0.8 V

VIH

VIL

AD15 to AD00

Address

Read data

DS07-13747-4E

61

MB90340E Series

(6) Bus Timing (Write)

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

Value

Parameter

Symbol

Condition

Unit

Min

Max

A23 to A16,

AD15 to AD00,

WR

Valid address → WR ↓ time

tAVWL

t^CP−15

⎯

ns

WR pulse width

tWLWH

tDVWH

WR

3 tCP/2 − 20

⎯

ns

AD15 to AD00,

WR

Valid data output → WR ↑ time

⎯

AD15 to AD00,

WR

WR ↑ → Data hold time

tWHDX

tWHAX

15

⎯

ns

A23 to A16,

WR

WR ↑ → Address valid time

tCP/2 − 10

WR ↑ → ALE ↑ time

WR ↓ → CLK ↑ time

tWHLH

tWLCH

WR, ALE

WR, CLK

tCP/2 − 15

⎯

ns

tWLCH

2.4 V

CLK

tWHLH

2.4 V

ALE

tAVWL

tWLWH

WR (WRL, WRH)

2.4 V

0.8 V

tWHAX

2.4 V

0.8 V

2.4 V

0.8 V

A23 to A16

tDVWH

tWHDX

2.4 V

0.8 V

2.4 V

0.8 V

2.4 V

0.8 V

AD15 to AD00

Address

Write data

62

DS07-13747-4E

MB90340E Series

(7) Ready Input Timing

Parameter

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

Rated Value

Test

Symbol

Unit

Remarks

Condition

Min

45

32

0

Max

⎯

ns f^CP= 16 MHz

ns f^CP= 24 MHz

ns

RDY setup time

RDY hold time

t^RYHS

t^RYHH

RDY

⎯

Note : If the RDY setup time is insufficient, use the auto-ready function.

2.4 V

CLK

ALE

RD/WR

tRYHS

tRYHH

VIH

RDY

When WAIT is not used.

RDY

VIL

When WAIT is used.

DS07-13747-4E

63

MB90340E Series

(8) Hold Timing

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, VSS = 0.0 V, fCP ≤ 24 MHz)

Value

Parameter

Symbol

Condition

Unit

Min

30

Max

t^CP

Pin floating → HAK ↓ time

HAK ↑ time → Pin valid time

tXHAL

tHAHV

HAK

ns

⎯

tCP

2 tCP

Note : There is more than 1 cycle from when HRQ reads in until the HAK is changed.

2.4 V

HAK

0.8 V

tHAHV

tXHAL

Hi-Z

2.4 V

0.8 V

2.4 V

0.8 V

Each pin

64

DS07-13747-4E

MB90340E Series

(9) LIN-UART0/1/2/3

• Bit setting: ESCR:SCES = 0, ECCR:SCDE = 0

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = 0 V)

Value

Parameter

Symbol

Condition

Unit

Min

Max

Serial clock cycle time

t^SCYC

t^SLOVI

t^IVSHI

t^SHIXI

SCK0 to SCK3

5 t^CP

⎯

ns

SCK0 to SCK3,

SOT0 to SOT3

SCK ↓ → SOT delay time

−50

t^CP+ 80

0

+50

⎯

Internal shift clock

mode output pins are

CL = 80 pF + 1 TTL.

SCK0 to SCK3,

SIN0 to SIN3

Valid SIN → SCK ↑

ns

SCK0 to SCK3,

SIN0 to SIN3

SCK ↑ → Valid SIN hold time

⎯

Serial clock “L” pulse width

Serial clock “H” pulse width

t^SHSL

t^SLSH

SCK0 to SCK3

3 t^CP- tR

tCP + 10

⎯

ns

SCK0 to SCK3,

SOT0 to SOT3

SCK ↓ → SOT delay time

Valid SIN → SCK ↑

t^SLOVE

t^IVSHE

t^SHIXE

⎯

30

2 t^CP+ 60 ns

External shift clock

mode output pins are

CL = 80 pF + 1 TTL.

SCK0 to SCK3,

SIN0 to SIN3

⎯

ns

SCK0, SCK1,

SIN0 to SIN3

SCK ↑ → Valid SIN hold time

t^CP+ 30

SCK fall time

SCK rise time

t^F

t^R

SCK0 to SCK3

⎯

10

ns

Notes : • AC characteristic in CLK synchronized mode.

• C^Lis load capacity value of pins when testing.

• t^CPis internal operating clock cycle time (machine clock) . Refer to “ (1) Clock Timing”.

• Internal Shift Clock Mode

tSCYC

2.4 V

SCK0 to SCK3

SOT0 to SOT3

0.8 V

t

SLOVI

2.4 V

0.8 V

t

IVSHI

t

SHIXI

V

IH

IL

V

IH

IL

SIN0 to SIN3

DS07-13747-4E

65

MB90340E Series

• External Shift Clock Mode

t

SLSH

t

SHSL

V

IH

VIH

SCK0 to SCK3

V

IL

VIL

tSLOVE

t

F

tR

2.4 V

0.8 V

SOT0 to SOT3

SIN0 to SIN3

t

IVSHE

t

SHIXE

V

IH

IL

V

IH

IL

• Bit setting: ESCR:SCES = 1, ECCR:SCDE = 0

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = 0 V)

Value

Parameter

Symbol

Condition

Unit

Min

Max

Serial clock cycle time

t^SCYC

SCK0 to SCK3

5 t^CP

⎯

ns

SCK0 to SCK3,

SOT0 to SOT3

SCK ↑ → SOT delay time

t^SHOVI

−50

t^CP+ 80

0

+50

⎯

Internal shift clock

mode output pins are

CL = 80 pF + 1 TTL.

SCK0 to SCK3,

SIN0 to SIN3

Valid SIN → SCK ↓

t^IVSLI

t^SLIXI

ns

SCK0 to SCK3,

SIN0 to SIN3

SCK ↓ → Valid SIN hold time

⎯

Serial clock “H” pulse width

Serial clock “L” pulse width

t^SHSL

t^SLSH

SCK0 to SCK3

3 t^CP- tR

tCP + 10

⎯

ns

SCK0 to SCK3,

SOT0 to SOT3

SCK ↑ → SOT delay time

Valid SIN → SCK ↓

t^SHOVE

t^IVSLE

t^SLIXE

⎯

30

2 t^CP+ 60

ns

External shift clock

mode output pins are

CL = 80 pF + 1 TTL.

SCK0 to SCK3,

SIN0 to SIN3

⎯

SCK0 to SCK3,

SIN0 to SIN3

SCK ↓ → Valid SIN hold time

t^CP+ 30

SCK fall time

SCK rise time

t^F

SCK0 to SCK3

⎯

10

ns

t^R

Notes : • C^Lis load capacity value of pins when testing.

• t^CPis internal operating clock cycle time (machine clock) . Refer to “ (1) Clock Timing”.

66

DS07-13747-4E

MB90340E Series

• Internal Shift Clock Mode

t

SCYC

2.4 V

SCK0 to SCK3

0.8 V

t

SHOVI

2.4 V

0.8 V

SOT0 to SOT3

SIN0 to SIN3

t

IVSLI

tSLIXI

V

IH

IL

V

IH

IL

V

• External Shift Clock Mode

t

SHSL

tSLSH

VIH

V

IH

SCK0 to SCK3

V

IL

V

IL

t

SHOVE

t

R

t

F

2.4 V

0.8 V

SOT0 to SOT3

SIN0 to SIN3

t

IVSLE

t

SLIXE

V

IH

IL

V

IH

IL

DS07-13747-4E

67

MB90340E Series

• Bit setting: ESCR:SCES = 0, ECCR:SCDE = 1

(TA = −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = 0 V)

Value

Parameter

Symbol

Condition

Unit

Min

Max

Serial clock cycle time

t^SCYC

SCK0 to SCK3

5 t^CP

⎯

ns

SCK0 to SCK3,

SOT0 to SOT3

SCK ↑ → SOT delay time

t^SHOVI

−50

+50

⎯

SCK0 to SCK3, Internal clock operation

SIN0 to SIN3 output pins are

Valid SIN → SCK ↓

t^IVSLI

t^SLIXI

t^SOVLI

t^CP+ 80

0

ns

CL = 80 pF + 1 TTL.

SCK0 to SCK3,

SIN0 to SIN3

SCK ↓ → Valid SIN hold time

SOT → SCK ↓ delay time

⎯

SCK0 to SCK3,

SOT0 to SOT3

3 t^CP− 70

⎯

Notes : • C^Lis load capacity value of pins when testing.

• t^CPis internal operating clock cycle time (machine clock) . Refer to “ (1) Clock Timing”.

t

SCYC

2.4 V

SCK0 to SCK3

SOT0 to SOT3

0.8 V

t

SHOVI

t

SOVLI

2.4 V

0.8 V

2.4 V

0.8 V

t

IVSLI

tSLIXI

V

IH

IL

V

IH

IL

SIN0 to SIN3

V

68

DS07-13747-4E

MB90340E Series

• Bit setting: ESCR:SCES = 1, ECCR:SCDE = 1

(TA = −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = 0 V)

Value

Parameter

Symbol

Condition

Unit

Min

Max

Serial clock cycle time

t^SCYC

t^SLOVI

SCK0 to SCK3

5 t^CP

⎯

ns

SCK0 to SCK3,

SOT0 to SOT3

SCK ↓ → SOT delay time

−50

t^CP+ 80

0

+50

⎯

SCK0 to SCK3, Internalclockoperation

SIN0 to SIN3 output pins are

Valid SIN → SCK ↑

t^IVSHI

t^SHIXI

t^SOVHI

ns

C = 80 pF + 1 TTL.

L

SCK0 to SCK3,

SIN0 to SIN3

SCK ↑ → Valid SIN hold time

SOT → SCK ↑ delay time

⎯

SCK0 to SCK3,

SOT0 to SOT3

3 t^CP− 70

⎯

Notes : • C^Lis load capacity value of pins when testing.

• t^CPis internal operating clock cycle time (machine clock) . Refer to “ (1) Clock Timing”.

tSCYC

2.4 V

SCK0 to SCK3

SOT0 to SOT3

0.8 V

tSLOVI

tSOVHI

2.4 V

0.8 V

2.4 V

0.8 V

tIVSHI

tSHIXI

VIH

VIL

VIH

VIL

SIN0 to SIN3

DS07-13747-4E

69

MB90340E Series

(10) Trigger Input Timing

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = 0.0 V)

Value

Parameter

Symbol

Condition

Unit

Min

Max

INT0 to INT15,

INT0R to INT15R,

ADTG

t^TRGH

tTRGL

Input pulse width

⎯

5 t^CP

⎯

ns

VIH

INT0 to INT15,

INT0R to INT15R,

ADTG

VIL

tTRGH

tTRGL

70

DS07-13747-4E

MB90340E Series

(11) Timer Related Resource Input Timing

(T^A= −40 °C to +105 °C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = 0 V)

Value

Parameter

Symbol

Condition

Unit

Min

Max

t^TIWH

t^TIWL

TIN0 to TIN3,

IN0 to IN7

Input pulse width

⎯

4 t^CP

⎯

ns

VIH

VIL

TIN0 to TIN3,

IN0 to IN7

tTIWH

tTIWL

(12) Timer Related Resource Output Timing

(T^A= –40°C to +105°C, VCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = 0.0 V)

Value

Parameter

Symbol

Condition

Unit

Min

Max

TOT0 to TOT3,

PPG0 to PPGF

CLK ↑ → T^OUTchange time

tTO

⎯

30

⎯

ns

2.4 V

CLK

2.4 V

0.8 V

TOT0 to TOT3,

PPG0 to PPGF

tTO

DS07-13747-4E

71

MB90340E Series

(13) I²C Timing

(T^A= –40°C to +105°C, VCC = 5.0 V 10%, VSS = 0.0 V)

Fast-mode*¹

Standard-mode

Parameter

Symbol

Condition

Unit

Min

Max

Min

Max

SCL clock frequency

f^SCL

0

100

0

400

kHz

Hold time (repeated) START condition

SDA↓ → SCL ↓

t^HDSTA

4.0

⎯

0.6

⎯

μs

“L” width of the SCL clock

“H” width of the SCL clock

t^LOW

t^HIGH

4.7

4.0

⎯

1.3

0.6

⎯

μs

Set-up time (repeated) START condition

SCL ↑ → SDA ↓

t^SUSTA

t^HDDAT

t^SUDAT

t^SUSTO

t^BUS

4.7

0

⎯

3.45*³

⎯

0.6

0

⎯

0.9*⁴

⎯

μs

ns

μs

R = 1.7 kΩ,

C = 50 pF*²

Data hold time

SCL ↓ → SDA ↓ ↑

Data set-up time

SDA ↓ ↑ → SCL ↑

250

4.0

4.7

100

0.6

1.3

Set-up time for STOP condition

SCL ↑ → SDA ↑

⎯

Bus free time between a STOP and START

condition

⎯

*1: For use at over 100 kHz, set the machine clock to at least 6 MHz.

*2: R,C: Pull-up resistor and load capacitor of the SCL and SDA lines.

*3: The maximum t^HDDATmeets the requirement that it does not extend the “L” width (tLOW) of the SCL signal.

*4: A Fast-mode I²C-bus device can be used in a Standard-mode I²C-bus system, but the requirement

t^SUDAT≥ 250 ns must then be met.

V

IH

IL

V

IH

V

IH

VIH

SDA

SCL

V

IL

VIL

tBUS

t

SUDAT

t

HDSTA

t

LOW

V

IH

V

IH

VIH

V

IH

V

IH

VIH

V

IL

VIL

tHIGH

tHDSTA

tHDDAT

tSUSTA

tSUSTO

72

DS07-13747-4E

MB90340E Series

5. A/D Converter

(TA

= −40 °C to +105 °C, 3.0 V ≤ AVRH − AVRL, VCC = AVCC = 5.0 V 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V)

Value

Parameter

Symbol

Unit

Remarks

Min

⎯

Typ

⎯

Max

10

Resolution

⎯

bit

Total error

⎯

3.0

2.5

LSB

Nonlinearity error

⎯

Differential

nonlinearity error

⎯

1.9

LSB

V

Zero reading

voltage

AVRL

V^OT

V^FST

AN0 to AN23

− 1.5 × LSB + 0.5 × LSB + 2.5 × LSB

Full scale reading

voltage

AVRH AVRH AVRH

− 3.5 × LSB − 1.5 × LSB + 0.5 × LSB

V

1.0

4.5 V ≤ AV^CC≤ 5.5 V

4.0 V ≤ AV^CC< 4.5 V

4.5 V ≤ AV^CC≤ 5.5 V

4.0 V ≤ AV^CC< 4.5 V

Compare time

Sampling time

⎯

16500

μs

2.0

0.5

1.2

∞

Analog port input

current

I^AIN

AN0 to AN23

−0.3

⎯

+0.3

μA

Analog input

voltage range

V^AIN

AVRL

AVRH

V

⎯

I^A

AVRH

AVRL

AVCC

AVRL + 2.7

⎯

AV^CC

V

Reference

voltage range

0

AVRH − 2.7

⎯

3.5

⎯

7.5

5

mA

μA

Power supply

current

I^AH

I^R

AVCC

*

AVRH

600

⎯

900

5

Reference

voltage current

I^RH

Offset between

input channels

⎯

AN0 to AN23

⎯

4

LSB

*: If the A/D convertor is not operating, a current when CPU is stopped is applicable (V^CC= AVCC = AVRH = 5.0 V) .

Note: The accuracy gets worse as |AVRH − AVRL| becomes smaller.

DS07-13747-4E

73

MB90340E Series

6. Definition of A/D Converter Terms

Resolution

: Analog variation that is recognized by the A/D converter.

Non linearity

error

: The deviation between the actual conversion characteristics and a line that joins the

zero-transition line ( “00 0000 0000” ← → “00 0000 0001” ) to the full-scale transition line

( “11 1111 1110” ← → “11 1111 1111” ) .

Differential

linearity error

: Deviation of input voltage, which is required for changing output code by 1 LSB, from an

ideal value.

Total error

: Difference between the actual value and the ideal value. The total error includes zero

transition error, full-scale transition error, and linear error.

Total error

3FFH

1.5 LSB

3FEH

3FDH

Actual conversion

characteristics

{1 LSB × (N − 1) + 0.5 LSB}

004H

003H

002H

001H

V^NT

(Actually-measured value)

Actual conversion

characteristics

Ideal characteristics

0.5 LSB

AVRL

AVRH

Analog input

V^NT− {1 LSB × (N − 1) + 0.5 LSB}

[LSB]

Total error of digital output “N” =

1 LSB (Ideal value) =

1 LSB

AVRH − AVRL

[V]

1024

N : Value of the digital output from the A/D converter

VOT (Ideal value) = AVRL + 0.5 LSB [V]

V^FST(Ideal value) = AVRH − 1.5 LSB [V]

V^NT: A voltage at which the digital output transitions from (N − 1)H to NH.

(Continued)

74

DS07-13747-4E

MB90340E Series

(Continued)

Non linearity error

Differential linearity error

Ideal

characteristics

3FF

3FE

3FD

H

Actual conversion

characteristics

(N + 1)

H

Actual conversion

characteristics

{1 LSB × (N − 1)

+ VOT

}

V

FST (actual

measurement

value)

N

V

NT (actual

measurement value)

004

003

002

001

H

V

(N + 1) T

(actual measurement

Actual conversion

characteristics

(N − 1)

(N − 2)

value)

V

NT

(actual measurement value)

Ideal characteristics

Actual conversion

characteristics

V

OT (actual measurement value)

Analog input

AVRL

AVRH

AVRL

AVRH

Analog input

V^NT− {1 LSB × (N − 1) + VOT}

[LSB]

Non linearity error of digital output N =

1 LSB

V (^N+1) T − VNT

−1 LSB [LSB]

[V]

Differential linearity error of digital output N =

1 LSB =

1 LSB

VFST − VOT

1022

N

: Value of the digital output from the A/D converter

V^OT: Voltage at which digital output transits from “000H” to “001H.”

V^FST: Voltage at which digital output transits from “3FEH” to “3FFH.”

DS07-13747-4E

75

MB90340E Series

7. Notes on A/D Converter Section

Use the device with external circuits of the following output impedance for analog inputs :

Recommended output impedance of external circuits are : Approx. 1.5 kΩ or lower (4.0 V ≤ AV^CC≤ 5.5 V,

sampling period = 0.5 μs)

If an external capacitor is used, in consideration of the capacitive voltage dividing effect between the external

capacitor and the internal on-chip capacitor, it is recommended that the capacitance of the external capacitor

be several thousand times greater than the capacitance of the internal capacitor.

If the output impedance of the external circuit is too high, a sampling period for an analog voltage may be

insufficient.

• Analog input circuit model

R

Analog input

Comparator

C

4.5 V ≤ AVCC ≤ 5.5 V : R=: 2.52 kΩ, C=: 10.7 pF

4.0 V ≤ AV^CC< 4.5 V : R=: 13.6 kΩ, C=: 10.7 pF

Note : Use the values in the figure only as a guideline.

76

DS07-13747-4E

MB90340E Series

8. Flash Memory Program/Erase Characteristics

Value

Parameter

Conditions

Unit

Remarks

Min

Typ

Max

Excludes programming

prior to erasure

Sector erase time

Chip erase time

⎯

1

9

15

s

T^A= +25 °C

V^CC= 5.0 V

Excludes programming

prior to erasure

⎯

Word (16-bit width)

programming time

Except for the over head

time of the system

⎯

10000

20

16

⎯

3600

⎯

μs

Program/Erase cycle

⎯

cycle

year

Flash Data Retention

Time

Average

T^A= +85 °C

⎯

*

* : This value was converted from the results of evaluating the reliability of the technology (using Arrhenius equation

to translate high temperature measurements into normalized value at +85 °C) .

DS07-13747-4E

77

MB90340E Series

■ EXAMPLE CHARACTERISTICS

• MB90F346E, MB90F346ES, MB90F346CE, MB90F346CES

I^CC− VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCL − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

100

70

60

50

40

30

20

10

0

90

80

70

60

50

40

30

20

10

0

f = 24 MHz

f = 20 MHz

f = 16 MHz

f = 8 kHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 4 MHz

f = 2 MHz

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

V

CC (V)

ICCS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCLS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

35

50

45

40

35

30

25

20

15

10

5

30

25

20

15

10

5

f = 24 MHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 8 kHz

f = 4 MHz

f = 2 MHz

0

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

V

CC (V)

V

CC (V)

ICTS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCT − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

400

350

300

250

200

150

100

50

20

18

16

14

12

10

8

6

4

2

0

f = 2 MHz

f = 8 kHz

0

2.5

3.5

4.5

VCC (V)

5.5

6.5

2.5

3.5

4.5

V

5.5

6.5

CC (V)

ICTSPLL6 − VCC

ICCH − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

T^A= +25 °C, stopped

10

9

8

7

6

5

4

3

2

1

0

10

9

8

7

6

5

4

3

2

1

0

f = 24 MHz

2.5

3.5

4.5

VCC (V)

5.5

6.5

2.5

3.5

4.5

VCC (V)

5.5

6.5

78

DS07-13747-4E

MB90340E Series

• MB90F347E, MB90F347ES, MB90F347CE, MB90F347CES

I^CC− VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCL − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

100

70

60

50

40

30

20

10

0

90

80

70

60

50

40

30

20

10

0

f = 24 MHz

f = 20 MHz

f = 16 MHz

f = 8 kHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 4 MHz

f = 2 MHz

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

V

CC (V)

ICCS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCLS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

35

50

45

40

35

30

25

20

15

10

5

30

25

20

15

10

5

f = 24 MHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 8 kHz

f = 4 MHz

f = 2 MHz

0

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

V

CC (V)

V

CC (V)

ICTS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCT − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

400

350

300

250

200

150

100

50

20

18

16

14

12

10

8

6

4

2

0

f = 2 MHz

f = 8 kHz

0

2.5

3.5

4.5

VCC (V)

5.5

6.5

2.5

3.5

4.5

V

5.5

6.5

CC (V)

ICTSPLL6 − VCC

ICCH − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

T^A= +25 °C, stopped

10

9

8

7

6

5

4

3

2

1

0

10

9

8

7

6

5

4

3

2

1

0

f = 24 MHz

2.5

3.5

4.5

VCC (V)

5.5

6.5

2.5

3.5

4.5

VCC (V)

5.5

6.5

DS07-13747-4E

79

MB90340E Series

• MB90F349E, MB90F349ES, MB90F349CE, MB90F349CES

I^CC− VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCL − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

f = 24 MHz

f = 8 kHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 4 MHz

f = 2 MHz

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

ICCS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCLS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

35

30

25

20

15

10

5

50

45

40

35

30

25

20

15

10

5

f = 24 MHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 8 kHz

f = 4 MHz

f = 2 MHz

0

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

ICTS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCT − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

400

350

300

250

200

150

100

50

20

18

16

14

12

10

8

6

4

2

f = 2 MHz

f = 8 kHz

0

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

ICTSPLL6 − VCC

ICCH − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

T^A= +25 °C, stopped

10

9

8

7

6

5

4

3

2

1

0

10

9

8

7

6

5

4

3

2

1

0

f = 24 MHz

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

80

DS07-13747-4E

MB90340E Series

• MB90F342E, MB90F342ES, MB90F342CE, MB90F342CES

I^CC− VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCL − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

f = 24 MHz

f = 8 kHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 4 MHz

f = 2 MHz

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

ICCS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCLS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

35

30

25

20

15

10

5

50

45

40

35

30

25

20

15

10

5

f = 24 MHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 8 kHz

f = 4 MHz

f = 2 MHz

0

2.5

3.5

4.5

VCC (V)

5.5

6.5

2.5

3.5

4.5

VCC (V)

5.5

6.5

ICTS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCT − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

400

350

300

250

200

150

100

50

20

18

16

14

12

10

8

6

4

2

f = 2 MHz

f = 8 kHz

0

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

ICTSPLL6 − VCC

ICCH − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

T^A= +25 °C, stopped

10

9

8

7

6

5

4

3

2

1

0

10

9

8

7

6

5

4

3

2

1

0

f = 24 MHz

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

DS07-13747-4E

81

MB90340E Series

• MB90F345E, MB90F345ES, MB90F345CE, MB90F345CES

I^CC− VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCL − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

100

90

80

70

60

50

40

30

20

10

0

70

60

50

40

30

20

10

0

f = 24 MHz

f = 8 kHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 4 MHz

f = 2 MHz

2.5

3.5

4.5

VCC (V)

5.5

6.5

2.5

3.5

4.5

VCC (V)

5.5

6.5

ICCS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCLS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

50

45

40

35

30

25

20

15

10

5

35

30

25

20

15

10

5

f = 24 MHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 8 kHz

f = 4 MHz

f = 2 MHz

0

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

ICTS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCT − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

400

350

300

250

200

150

100

50

20

18

16

14

12

10

8

6

4

2

f = 2 MHz

f = 8 kHz

0

2.5

3.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

V

CC (V)

ICTSPLL6 − VCC

ICCH − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

T^A= +25 °C, stopped

10

9

8

7

6

5

4

3

2

1

0

10

9

8

7

6

5

4

3

2

1

0

f = 24 MHz

2.5

3.5

4.5

CC (V)

5.5

6.5

2.5

3.5

4.5

VCC (V)

5.5

6.5

V

82

DS07-13747-4E

MB90340E Series

• MB90346E, MB90346ES, MB90346CE, MB90346CES

I^CC− VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCL − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

70

100

90

80

70

60

50

40

30

20

10

0

60

f = 24 MHz

50

f = 20 MHz

f = 16 MHz

40

30

20

10

0

f = 8 kHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 4 MHz

f = 2 MHz

2.5

3.5

4.5

VCC (V)

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

ICCS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCLS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

50

35

30

25

20

15

10

5

45

40

35

30

25

20

15

10

5

f = 24 MHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 8 kHz

f = 4 MHz

f = 2 MHz

0

2.5

4.5

5.5

6.5

4.5

5.5

6.5

V

CC (V)

VCC (V)

ICCT − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICTS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

20

18

16

14

12

10

8

6

4

2

0

400

350

300

250

200

150

100

50

f = 2 MHz

f = 8 kHz

0

2.5

4.5

VCC (V)

5.5

6.5

4.5

VCC (V)

5.5

6.5

ICTSPLL6 − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCH − VCC

T^A= +25 °C, stopped

10

9

8

7

6

5

4

3

2

1

0

10

9

8

7

6

5

4

3

2

1

0

f = 24 MHz

2.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

V

CC (V)

DS07-13747-4E

83

MB90340E Series

• MB90347E, MB90347ES, MB90347CE, MB90347CES

I^CC− VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCL − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

70

100

90

80

70

60

50

40

30

20

10

0

60

f = 24 MHz

50

f = 20 MHz

f = 16 MHz

40

30

20

10

0

f = 8 kHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 4 MHz

f = 2 MHz

2.5

3.5

4.5

VCC (V)

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

ICCS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCLS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

50

35

30

25

20

15

10

5

45

40

35

30

25

20

15

10

5

f = 24 MHz

f = 20 MHz

f = 16 MHz

f = 12 MHz

f = 10 MHz

f = 8 MHz

f = 8 kHz

f = 4 MHz

f = 2 MHz

0

2.5

4.5

5.5

6.5

4.5

5.5

6.5

V

CC (V)

VCC (V)

ICCT − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICTS − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

20

18

16

14

12

10

8

6

4

2

0

400

350

300

250

200

150

100

50

f = 2 MHz

f = 8 kHz

0

2.5

4.5

VCC (V)

5.5

6.5

4.5

VCC (V)

5.5

6.5

ICTSPLL6 − VCC

TA = +25 °C, external clock operation

f = Internal operation frequency

ICCH − VCC

T^A= +25 °C, stopped

10

9

8

7

6

5

4

3

2

1

0

10

9

8

7

6

5

4

3

2

1

0

f = 24 MHz

2.5

4.5

5.5

6.5

2.5

3.5

4.5

5.5

6.5

VCC (V)

V

CC (V)

84

DS07-13747-4E

MB90340E Series

• I/O characteristics

(V^CC−VOH) − IOH

VOL − IOL

TA = +25 °C, VCC = 4.5 V

800

700

600

500

400

300

200

100

0

1000

900

800

700

600

500

400

300

200

100

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

I

OL (mA)

IOH (mA)

Automotive VIN − VCC

CMOS VIN − VCC

Other than UART-SIN pin and I²C pin

TA = +25 °C

T^A= +25 °C

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

5.0

4.5

VIHA

VILA

VIHS

VILS

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0

VCC (V)

TTL VIN − VCC

CMOS VIN − VCC

UART-SIN pin, I²C pin

TA = +25 °C

T^A= +25 °C

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

2.5

2.3

2.0

1.8

1.5

1.3

1.0

0.8

0.5

0.3

0.0

V

IHS

ILS

VIHT

VILT

V

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0

CC (V)

VCC (V)

V

DS07-13747-4E

85

MB90340E Series

■ ORDERING INFORMATION

Part number

MB90F342EPF

Package

Remarks

MB90F342ESPF

MB90F342CEPF

MB90F342CESPF

MB90F342EPMC

MB90F342ESPMC

MB90F342CEPMC

MB90F342CESPMC

MB90F345EPF

100-pin plastic QFP

(FPT-100P-M06)

100-pin plastic LQFP

(FPT-100P-M20)

MB90F345ESPF

MB90F345CEPF

MB90F345CESPF

MB90F345EPMC

MB90F345ESPMC

MB90F345CEPMC

MB90F345CESPMC

MB90F346EPF

100-pin plastic QFP

(FPT-100P-M06)

100-pin plastic LQFP

(FPT-100P-M20)

MB90F346ESPF

MB90F346CEPF

MB90F346CESPF

MB90F346EPMC

MB90F346ESPMC

MB90F346CEPMC

MB90F346CESPMC

100-pin plastic QFP

(FPT-100P-M06)

100-pin plastic LQFP

(FPT-100P-M20)

(Continued)

86

DS07-13747-4E

MB90340E Series

Part number

MB90F347EPF

Package

Remarks

MB90F347ESPF

MB90F347CEPF

MB90F347CESPF

MB90F347EPMC

MB90F347ESPMC

MB90F347CEPMC

MB90F347CESPMC

MB90F349EPF

100-pin plastic QFP

(FPT-100P-M06)

100-pin plastic LQFP

(FPT-100P-M20)

MB90F349ESPF

MB90F349CEPF

MB90F349CESPF

MB90F349EPMC

MB90F349ESPMC

MB90F349CEPMC

MB90F349CESPMC

MB90341EPF

100-pin plastic QFP

(FPT-100P-M06)

100-pin plastic LQFP

(FPT-100P-M20)

MB90341ESPF

100-pin plastic QFP

(FPT-100P-M06)

MB90341CEPF

MB90341CESPF

MB90341EPMC

MB90341ESPMC

MB90341CEPMC

MB90341CESPMC

MB90342EPF

100-pin plastic LQFP

(FPT-100P-M20)

MB90342ESPF

100-pin plastic QFP

(FPT-100P-M06)

MB90342CEPF

MB90342CESPF

MB90342EPMC

MB90342ESPMC

MB90342CEPMC

MB90342CESPMC

100-pin plastic LQFP

(FPT-100P-M20)

(Continued)

DS07-13747-4E

87

MB90340E Series

(Continued)

Part number

Package

Remarks

MB90346EPF

MB90346ESPF

MB90346CEPF

MB90346CESPF

MB90346EPMC

MB90346ESPMC

MB90346CEPMC

MB90346CESPMC

MB90347EPF

100-pin plastic QFP

(FPT-100P-M06)

100-pin plastic LQFP

(FPT-100P-M20)

MB90347ESPF

MB90347CEPF

MB90347CESPF

MB90347EPMC

MB90347ESPMC

MB90347CEPMC

MB90347CESPMC

MB90348EPF

100-pin plastic QFP

(FPT-100P-M06)

100-pin plastic LQFP

(FPT-100P-M20)

MB90348ESPF

MB90348CEPF

MB90348CESPF

MB90348EPMC

MB90348ESPMC

MB90348CEPMC

MB90348CESPMC

MB90349EPF

100-pin plastic QFP

(FPT-100P-M06)

100-pin plastic LQFP

(FPT-100P-M20)

MB90349ESPF

MB90349CEPF

MB90349CESPF

MB90349EPMC

MB90349ESPMC

MB90349CEPMC

MB90349CESPMC

MB90V340E-101CR

MB90V340E-102CR

100-pin plastic QFP

(FPT-100P-M06)

100-pin plastic LQFP

(FPT-100P-M20)

299-pin ceramic PGA

(PGA-299C-A01)

For evaluation

88

DS07-13747-4E

MB90340E Series

■ PACKAGE DIMENSIONS

100-pin plastic LQFP

Lead pitch

0.50 mm

14.0 mm × 14.0 mm

Gullwing

Package width ×

package length

Lead shape

Sealing method

Mounting height

Weight

Plastic mold

1.70 mm Max

0.65 g

Code

(Reference)

P-LFQFP100-14×14-0.50

(FPT-100P-M20)

100-pin plastic LQFP

(FPT-100P-M20)

Note 1) * : These dimensions do not include resin protrusion.

Note 2) Pins width and pins thickness include plating thickness.

Note 3) Pins width do not include tie bar cutting remainder.

16.00 0.20(.630 .008)SQ

*

14.00 0.10(.551 .004)SQ

75

51

76

50

0.08(.003)

Details of "A" part

1.50 ^+0.20

–

^0.10.059 ^+.008

–.004

INDEX

(Mounting height)

0.10 0.10

(.004 .004)

(Stand off)

100

26

0°~8

°

"A"

0.50 0.20

(.020 .008

0.25(.010)

)

1

25

0.60 0.15

(.024 .006)

0.50(.020)

0.20 0.05

(.008 .002)

0.145 0.055

(.006 .002)

M

0.08(.003)

Dimensions in mm (inches).

Note: The values in parentheses are reference values

C

2005 -2010 FUJITSU SEMICONDUCTOR LIMITED F100031S-c-3-5

Please check the latest package dimension at the following URL.

http://edevice.fujitsu.com/package/en-search/

(Continued)

89

DS07-13747-4E

MB90340E Series

(Continued)

100-pin plastic QFP

Lead pitch

0.65 mm

14.00 × 20.00 mm

Gullwing

Package width ×

package length

Lead shape

Sealing method

Mounting height

Plastic mold

3.35 mm MAX

P-QFP100-14×20-0.65

Code

(Reference)

(FPT-100P-M06)

100-pin plastic QFP

(FPT-100P-M06)

Note 1) * : These dimensions do not include resin protrusion.

Note 2) Pins width and pins thickness include plating thickness.

Note 3) Pins width do not include tie bar cutting remainder.

23.90 0.40(.941 .016)

*

20.00 0.20(.787 .008)

80

51

81

50

0.10(.004)

17.90 0.40

(.705 .016)

*14.00 0.20

(.551 .008)

INDEX

Details of "A" part

100

31

0.25(.010)

3.00 ⁺^–0⁰^.^.²³⁰⁵

.118 ⁺^–.^.⁰⁰⁰¹⁸⁴

(Mounting height)

0~8

°

1

30

0.65(.026)

0.32 0.05

(.013 .002)

0.17 0.06

(.007 .002)

M

0.13(.005)

0.25 0.20

(.010 .008)

(Stand off)

0.80 0.20

(.031 .008)

"A"

0.88 0.15

(.035 .006)

Dimensions in mm (inches).

Note: The values in parentheses are reference values.

C

2002-2010 FUJITSU SEMICONDUCTOR LIMITED F100008S-c-5-7

Please check the latest package dimension at the following URL.

http://edevice.fujitsu.com/package/en-search/

90

DS07-13747-4E

MB90340E Series

■ MAIN CHANGES IN THIS EDITION

Page

Section

Change Results

Deleted the part numbers;

MB90F343E(S), MB90F343CE(S)

⎯

■ ELECTRICAL

CHARACTERISTICS

Added “*6” in remark for “L" level maximum output current and “H”

level maximum output current.

1. Absolute Maximum Ratings

Added “*7” in remark for “L" level average output current and “H”

level average output current.

Added “*8” in remark for “L"level average overall output current and

“H” level average overall output current.

51

52

Added as follows.

“*6:The maximum output current is defined as the peak value of the

current of any one of the corresponding pins.”

“*7:The average output current is defined as the value of the aver-

age current flowing over 100 ms at any one of the corresponding

pins.”

“*8:The average total output current is defined as the value of the

average current flowing over 100 ms at all of the corresponding

pins.”

The vertical lines marked in the left side of the page show the changes.

DS07-13747-4E

91

MB90340E Series

FUJITSU SEMICONDUCTOR LIMITED

Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome,

Kohoku-ku Yokohama Kanagawa 222-0033, Japan

Tel: +81-45-415-5858

http://jp.fujitsu.com/fsl/en/

For further information please contact:

North and South America

Asia Pacific

FUJITSU SEMICONDUCTOR AMERICA, INC.

1250 E. Arques Avenue, M/S 333

Sunnyvale, CA 94085-5401, U.S.A.

Tel: +1-408-737-5600 Fax: +1-408-737-5999

http://us.fujitsu.com/micro/

FUJITSU SEMICONDUCTOR ASIA PTE. LTD.

151 Lorong Chuan,

#05-08 New Tech Park 556741 Singapore

Tel : +65-6281-0770 Fax : +65-6281-0220

http://www.fujitsu.com/sg/services/micro/semiconductor/

Europe

FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD.

Rm. 3102, Bund Center, No.222 Yan An Road (E),

Shanghai 200002, China

Tel : +86-21-6146-3688 Fax : +86-21-6335-1605

http://cn.fujitsu.com/fmc/

FUJITSU SEMICONDUCTOR EUROPE GmbH

Pittlerstrasse 47, 63225 Langen, Germany

Tel: +49-6103-690-0 Fax: +49-6103-690-122

http://emea.fujitsu.com/semiconductor/

Korea

FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD.

10/F., World Commerce Centre, 11 Canton Road,

Tsimshatsui, Kowloon, Hong Kong

Tel : +852-2377-0226 Fax : +852-2376-3269

http://cn.fujitsu.com/fmc/en/

FUJITSU SEMICONDUCTOR KOREA LTD.

206 Kosmo Tower Building, 1002 Daechi-Dong,

Gangnam-Gu, Seoul 135-280, Republic of Korea

Tel: +82-2-3484-7100 Fax: +82-2-3484-7111

http://kr.fujitsu.com/fmk/

Specifications are subject to change without notice. For further information please contact each office.

The contents of this document are subject to change without notice.

Customers are advised to consult with sales representatives before ordering.

The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose

of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does not

warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device

based on such information, you must assume any responsibility arising out of such use of the information.

FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information.

Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use

or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU SEMICONDUCTOR or

any third party or does FUJITSU SEMICONDUCTOR warrant non-infringement of any third-party's intellectual property right or other

right by using such information. FUJITSU SEMICONDUCTOR assumes no liability for any infringement of the intellectual property

rights or other rights of third parties which would result from the use of information contained herein.

The products described in this document are designed, developed and manufactured as contemplated for general use, including without

limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured

as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to

the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear

facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon

system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).

Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in

connection with above-mentioned uses of the products.

Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by

incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current

levels and other abnormal operating conditions.

Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of

the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.

The company names and brand names herein are the trademarks or registered trademarks of their respective owners.

Edited: Sales Promotion Department


型号：	MB90F347CESPMC
厂家：	SPANSION
描述：	Microcontroller, 16-Bit, FLASH, 24MHz, CMOS, PQFP100, 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100 时钟控制器微控制器微控制器和处理器外围集成电路
文件：	总93页 (文件大小：2810K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MB90F347CESPMC [SPANSION]

相关型号：

MB90F347CESPQC

MB90F347CPF

MB90F347CPFV

MB90F347CSPF

MB90F347CSPFV

MB90F347E

MB90F347EPF

MB90F347EPFV

MB90F347ES

MB90F347ESPF

MB90F347ESPFV

MB90F347ESPMC