S98WS064RB0HW0020 [SPANSION]
Flash Memory;
| 型号： | S98WS064RB0HW0020 |
| 厂家： | 
SPANSION |
| 描述： | Flash Memory |
| 文件： | 总10页 (文件大小：324K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
S98WS064RB0HI001, -002
Stacked Multi-Chip Product (MCP)
64 Megabit (4 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write,
Burst Mode Flash Memory with
S98WS064RB0HI001, -002 Cover Sheet
32 Megabit (2M x 16-Bit) CellularRAM
Data Sheet (Advance Information)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Each product described herein may be designated as Advance Information,
Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions.
Publication Number S98WS064RB0HI001-002
Revision 01
Issue Date August 20, 2010
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
Notice On Data Sheet Designations
Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of
product information or intended specifications throughout the product life cycle, including development,
qualification, initial production, and full production. In all cases, however, readers are encouraged to verify
that they have the latest information before finalizing their design. The following descriptions of Spansion data
sheet designations are presented here to highlight their presence and definitions.
Advance Information
The Advance Information designation indicates that Spansion Inc. is developing one or more specific
products, but has not committed any design to production. Information presented in a document with this
designation is likely to change, and in some cases, development on the product may discontinue. Spansion
Inc. therefore places the following conditions upon Advance Information content:
“This document contains information on one or more products under development at Spansion Inc.
The information is intended to help you evaluate this product. Do not design in this product without
contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed
product without notice.”
Preliminary
The Preliminary designation indicates that the product development has progressed such that a commitment
to production has taken place. This designation covers several aspects of the product life cycle, including
product qualification, initial production, and the subsequent phases in the manufacturing process that occur
before full production is achieved. Changes to the technical specifications presented in a Preliminary
document should be expected while keeping these aspects of production under consideration. Spansion
places the following conditions upon Preliminary content:
“This document states the current technical specifications regarding the Spansion product(s)
described herein. The Preliminary status of this document indicates that product qualification has been
completed, and that initial production has begun. Due to the phases of the manufacturing process that
require maintaining efficiency and quality, this document may be revised by subsequent versions or
modifications due to changes in technical specifications.”
Combination
Some data sheets contain a combination of products with different designations (Advance Information,
Preliminary, or Full Production). This type of document distinguishes these products and their designations
wherever necessary, typically on the first page, the ordering information page, and pages with the DC
Characteristics table and the AC Erase and Program table (in the table notes). The disclaimer on the first
page refers the reader to the notice on this page.
Full Production (No Designation on Document)
When a product has been in production for a period of time such that no changes or only nominal changes
are expected, the Preliminary designation is removed from the data sheet. Nominal changes may include
those affecting the number of ordering part numbers available, such as the addition or deletion of a speed
option, temperature range, package type, or VIO range. Changes may also include those needed to clarify a
description or to correct a typographical error or incorrect specification. Spansion Inc. applies the following
conditions to documents in this category:
“This document states the current technical specifications regarding the Spansion product(s)
described herein. Spansion Inc. deems the products to have been in sufficient production volume such
that subsequent versions of this document are not expected to change. However, typographical or
specification corrections, or modifications to the valid combinations offered may occur.”
Questions regarding these document designations may be directed to your local sales office.
2
S98WS064RB0HI001, -002
S98WS064RB0HI001-002_01 August 20, 2010
S98WS064RB0HI001, -002
Stacked Multi-Chip Product (MCP)
64 Megabit (4 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write,
Burst Mode Flash Memory with
32 Megabit (2M x 16-Bit) CellularRAM
Data Sheet (Advance Information)
Features
Single 1.8 volt read, program and erase (1.7 to 1.95 volt)
Speed
– Flash and CellularRAM: 108 MHz
Simultaneous Read/Write operation
Page Mode Read Access
– Data can be continuously read from one bank while executing
erase/program functions in other bank
– Zero latency between read and write operations
– Flash: 8-word page with page access time of 20 ns
– CellularRAM: 16-word page with page access time of 20 ns
Package
– 88-ball Thin Fine pitch BGA
– 10.0 x 8.0 x 1.2 mm
For detailed specifications, please refer to the individual data sheets:
Document
S29WS064R
Publication Identification Number (PID)
S29WS064R_00
32 Mb Async/Page/Burst CellularRAM
SWM032D133S3R
Publication Number S98WS064RB0HI001-002
Revision 01
Issue Date August 20, 2010
This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
1. Ordering Information
The order number is formed by a valid combination of the following:
S98WS
064
R
B0
H
W
001
0
Packing Type
0
3
=
=
Tray
13-inch Tape and Reel
Additional Ordering Options
See valid combinations table
Temperature Range
I
= Industrial (–40°C to +85°C)
W = Wireless (–25°C to +85°C)
Package Material
H = Low-Halogen, Lead (Pb) Free Package
DRAM Density
B0 = 32 Megabit (2M x 16-Bit)
Process Technology
R = 65 nm MirrorBit® Technology
Flash Density
064 = 64 Megabit (4M x 16-Bit)
Product Family
S98WS = Stacked Multi-Chip Product, Simultaneous Read/Write, Burst Mode
Flash Memory, 1.8-Volt Operation
1.1
Valid Combinations
The following configurations are planned to be supported for this device. Consult the local sales office to
confirm availability of specific valid combinations and to check on newly released combinations.
Table 1.1 Valid Combinations
Product
Family
Flash
Density
Process
Technology
DRAM
Density
Packing
Type
Package Material / Temperature Range
Model Number
S98WS
064
R
B0
HI, HW
001, 002
0, 3
Note:
BGA package marking omits leading S and packing type designator from ordering part number.
2. Product Selector Guide
S98WS064RB0HW001x/
S98WS064RB0HI001x
S98WS064RB0HW002x/
S98WS064RB0HI002x
Part#
Flash Burst Frequency
CellularRAM Frequency
DYB
108 MHz
108 MHz
Unlocked
Locked
108 MHz
108 MHz
Unlocked
Locked
Factory Secured Silicon Region
Customer Secured Silicon Region
Boot option
Unlocked
Top Boot
Unlocked
Bottom Boot
4
S98WS064RB0HI001, -002
S98WS064RB0HI001-002_01 August 20, 2010
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
3. MCP Block Diagram
A0-A20
A21
RDY
DQ0-DQ15
WS064R
Flash
Memory
CLK
AVD#
F-CE#
F-OE#
F-RST#
F-ACC
VSS
F-WE#
F-VCC
VCCQ
32 Mb
CellularRAM
R-CE#
R-OE#
R-LB#
R-UB#
R-WE#
R-CRE
R-VCC
August 20, 2010 S98WS064RB0HI001-002_01
S98WS064RB0HI001, -002
5
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
4. Connection Diagram
Legend
A
B
A11
A21
RFU
F-VCC
VSS
A19
A18
A4
C
A12
D
A13
E
F
A16
A14
A8
G
H
J
K
L
M
8
7
6
5
Outrigger/NC Balls
NC
NC
A15
A10
A20
AVD#
RFU
RFU
A7
RFU
RDY
DQ13
DQ5
RFU
VCCQ R-CRE
VSS
VSS
VSS
VSS
F-VCC
VCCQ
VSS
VSS
NC
NC
RFU
CLK
RFU
VSS
RFU
R-LB#
A5
A9
DQ7
DQ15
DQ6
VCCQ
RFU
Reserved for
Future Use
R-CE#
R-WE#
F-ACC
RFU
A17
DQ14
DQ12
DQ3
Shared
Flash Only
F-WE#
DQ4
R-VCC
RFU
4
3
2
F-RST# DQ10
DQ11
DQ9
CellularRAM Only
R-UB#
A6
DQ2
DQ8
A0
DQ1
RFU
NC
NC
DQ0
F-OE#
RFU
RFU
NC
NC
1
A3
A2
A1
R-OE#
F-CE#
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S98WS064RB0HI001, -002
S98WS064RB0HI001-002_01 August 20, 2010
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
5. Input/Output Descriptions
Signal
A21
Description
Flash
CellularRAM
NOR Flash only Address inputs
X
X
X
X
X
X
X
X
X
A20-A0
DQ15-DQ0
F-CE#
NOR Flash/CellularRAM Address inputs
X
X
Flash Data input/output, shared between NOR and CellularRAM
NOR Flash Chip-enable input #1. Asynchronous relative to CLK for Burst Mode
NOR Output Enable input. Asynchronous relative to CLK for Burst mode
NOR Write Enable input
F-OE#
F-WE#
F-V
NOR Flash device power supply (1.7V - 1.95V)
Input/Output Buffer power supply
CC
V
X
X
CCQ
V
Ground
SS
Flash ready output. Indicates the status of the Burst read. V = data valid. The Flash RDY
OL
pin is shared with the WAIT pin of the CellularRAM.
RDY
X
X
NOR Flash Clock, shared with CLK of burst-mode CellularRAM. The first rising edge of
CLK in conjunction with AVD# low latches the address input and activates burst mode
operation. After the initial word is output, subsequent rising edges of CLK increment the
internal address counter. CLK should remain low during asynchronous access.
CLK
X
X
NOR Flash Address Valid input. Shared with AVD# of burst-mode CellularRAM. Indicates
to device that the valid address is present on the address inputs. V = for asynchronous
mode, indicates valid address; for burst mode, causes starting address to be latched on
IL
AVD#
X
X
rising edge of CLK. V = device ignores address inputs.
IH
F-RST#
F-ACC
NOR Flash hardware reset input. V = device resets and returns to reading array data
X
X
IL
NOR Flash accelerated input. At V , accelerates programming; automatically places
HH
device in unlock bypass mode. At V , disables all program and erase functions. Should be
IL
at V for all other conditions.
IH
R-CE#
R-OE#
R-WE#
R-CRE
Chip-enable input for CellularRAM
X
X
X
X
X
X
X
CellularRAM Output Enable input. Asynchronous relative to CLK for Burst mode
CellularRAM Write Enable input
Control Register Enable (CellularRAM). For CellularRAM only.
CellularRAM Power Supply
R-V
CC
R-UB#
R-LB#
Upper Byte Control (CellularRAM)
Lower Byte Control (CellularRAM)
Not Connected. No device internal signal is connected to the package connector nor is
there any future plan to use the connector for a signal. The connection may safely be used
for routing space for a signal on a Printed Circuit Board (PCB).
NC
Do Not Use. A device internal signal may be connected to the package connector. The
connection may be used by Spansion for test or other purposes and is not intended for
connection to any host system signal. Any DNU signal related function will be inactive
DNU
when the signal is at V . The signal has an internal pull-down resistor and may be left
IL
unconnected in the host system or may be tied to V . Do not use these connections for
SS
PCB signal routing channels. Do not connect any host system signal to these connections.
Reserved for Future Use. No device internal signal is currently connected to the package
connector but there is potential future use for the connector for a signal. It is recommended
to not use RFU connectors for PCB routing channels so that the PCB may take advantage
of future enhanced features in compatible footprint devices.
RFU
August 20, 2010 S98WS064RB0HI001-002_01
S98WS064RB0HI001, -002
7
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
6. Physical Dimensions
TSE088—88-Ball Thin Fine Pitch Ball Grid Array (FBGA) 10 x 8 mm Package
A
D
D1
eD
0.10
(2X)
C
8
7
6
5
4
3
2
1
SE
7
E
B
E1
eE
L
J
H
G
F
E
D
C
B
A
M
K
PIN A1
CORNER
9
PIN A1
CORNER
7
INDEX MARK
SD
0.10
(2X)
C
TOP VIEW
SIDE VIEW
BOTTOM VIEW
0.20
0.08
C
C
A2
A
A1
C
6
88X
b
0.15
M
C
C
A B
0.08
M
NOTES:
PACKAGE
JEDEC
TSE 088
N/A
1. DIMENSIONING AND TOLERANCING METHODS PER
ASME Y14.5M-1994.
D x E
10.00 mm x 8.00 mm
PACKAGE
2. ALL DIMENSIONS ARE IN MILLIMETERS.
3. BALL POSITION DESIGNATION PER JEP95, SECTION
4.3, SPP-010.
SYMBOL
MIN
NOM
---
MAX
1.20
NOTE
A
A1
---
PROFILE
4.
e REPRESENTS THE SOLDER BALL GRID PITCH.
0.20
0.82
---
---
BALL HEIGHT
5. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D"
DIRECTION.
A2
---
0.90
BODY THICKNESS
BODY SIZE
D
10.00 BSC.
8.00 BSC.
8.80 BSC.
5.60 BSC.
12
SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE
"E" DIRECTION.
E
BODY SIZE
n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS
FOR MATRIX SIZE MD X ME.
D1
E1
MATRIX FOOTPRINT
MATRIX FOOTPRINT
6
7
DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL
DIAMETER IN A PLANE PARALLEL TO DATUM C.
MD
ME
n
MATRIX SIZE D DIRECTION
MATRIX SIZE E DIRECTION
BALL COUNT
8
SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A
AND B AND DEFINE THE POSITION OF THE CENTER SOLDER
BALL IN THE OUTER ROW.
88
Øb
eE
0.33
---
0.43
BALL DIAMETER
WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE
OUTER ROW SD OR SE = 0.000.
0.80 BSC.
0.80 BSC
0.40 BSC.
BALL PITCH
eD
SD / SE
BALL PITCH
WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE
OUTER ROW, SD OR SE = e/2
SOLDER BALL PLACEMENT
DEPOPULATED SOLDER BALLS
8. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED
BALLS.
A3,A4,A5,A6,M3,M4,M5,M6
9
A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK
MARK, METALLIZED MARK INDENTATION OR OTHER MEANS.
10 OUTLINE AND DIMENSIONS PER CUSTOMER REQUIREMENT.
3493\ 16-038.22 \ 05.12.05
8
S98WS064RB0HI001, -002
S98WS064RB0HI001-002_01 August 20, 2010
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
7. Revision History
Section
Description
Revision 01 (August 20, 2010)
Initial release
August 20, 2010 S98WS064RB0HI001-002_01
S98WS064RB0HI001, -002
9
D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
Colophon
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as
contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the
public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility,
aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for
any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to
you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor
devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design
measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal
operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under
the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country,
the prior authorization by the respective government entity will be required for export of those products.
Trademarks and Notice
The contents of this document are subject to change without notice. This document may contain information on a Spansion product under
development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this
document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose,
merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any
damages of any kind arising out of the use of the information in this document.
Copyright © 2010 Spansion Inc. All rights reserved. Spansion®, the Spansion logo, MirrorBit®, MirrorBit® Eclipse™, ORNAND™, EcoRAM™ and
combinations thereof, are trademarks and registered trademarks of Spansion LLC in the United States and other countries. Other names used
are for informational purposes only and may be trademarks of their respective owners.
10
S98WS064RB0HI001, -002
S98WS064RB0HI001-002_01 August 20, 2010
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