SSM9962GM [SSC]

DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS; 双N沟道增强型功率MOSFET


型号：	SSM9962GM
厂家：	SILICON STANDARD CORP.
描述：	DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS 双N沟道增强型功率MOSFET
文件：	总5页 (文件大小：227K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SSM9962M/GM

DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS

Simple drive requirement

Lower gate charge

BV _DSS

R _DS(ON)

I_D

40V

25mΩ

Fast switching characteristics

SO-8

Description

Advanced Power MOSFETs from Silicon Standard provide the

designer with the best combination of fast switching,

ruggedized device design, low on-resistance and cost-effectiveness.

The SSM9962M is in the SO-8 package, which is widely preferred for

commercial and industrial surface mount applications, and is well suited

for low voltage applications such as DC/DC converters.

This device is available with Pb-free lead finish (second-level interconnect) as SSM9962GM.

Absolute Maximum Ratings

Symbol

Parameter

Rating

Units

V_DS

V_GS

Drain-Source Voltage

± 20

Gate-Source Voltage

I_D@ T_A=25°C

I_D@ T_A=100°C

I_DM

Continuous Drain Current³

Pulsed Drain Current¹

5.5

P_D@ T_A=25°C

Total Power Dissipation

Linear Derating Factor

0.016

-55 to 150

W/°C

°C

T_STG

T_J

Storage Temperature Range

Operating Junction Temperature Range

Thermal Data

Symbol

Parameter

Value

62.5

Unit

Rthj-a

Thermal Resistance Junction-ambient³

Max.

°C/W

8/21/2004 Rev.2.01

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SSM9962M/GM

Electrical Characteristics @ T_j=25^oC (unless otherwise specified)

Symbol

BV_DSS

Parameter

Test Conditions

V_GS=0V, I_D=250uA

Min. Typ. Max. Units

Drain-Source Breakdown Voltage

0.1

∆BV_DSS/∆Tj

Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA

Static Drain-Source On-Resistance²V_GS=10V, I_D=7A

V/°C

mΩ

R_DS(ON)

_GS=4.5V, I_D=5A

mΩ

V_GS(th)

g_fs

Gate Threshold Voltage

Forward Transconductance

Drain-Source Leakage Current (T_j=25^oC)

Drain-Source Leakage Current (T_j=70^oC)

Gate-Source Leakage

Total Gate Charge²

V_DS=V_GS, I_D=250uA

V_DS=10V, I_D=7A

V_DS=40V, V_GS=0V

V_DS=32V ,V_GS=0V

V_GS= ± 20V

I_D=7A

I_DSS

I_GSS

Q_g

±100

25.8

4.4

9.1

10.6

6.8

26.3

Q_gs

Q_gd

t_d(on)

t_r

Gate-Source Charge

V_DS=32V

Gate-Drain ("Miller") Charge

Turn-on Delay Time²

V_GS=4.5V

V_DS=20V

Rise Time

I_D=1A

t_d(off)

t_f

Turn-off Delay Time

R_G=5.7Ω ,VGS=10V

R_D=20Ω

Fall Time

C_iss

C_oss

C_rss

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

V_GS=0V

1165

205

142

V_DS=25V

f=1.0MHz

Source-Drain Diode

Symbol

Parameter

Forward On Voltage²

Test Conditions

I_S=1.7A, V_GS=0V

Is=1.7A, VGS=0V,

dI/dt=100A/µs

Min. Typ. Max. Units

V_SD

trr

1.2

Reverse Recovery Time

Reverse Recovery Charge

21.2

Qrr

Notes:

1.Pulse width limited by max. junction temperature.

2.Pulse width <300us , duty cycle <2%.

3.Surface mounted on 1 in²copper pad of FR4 board ; 135°C/W when mounted on min. copper pad.

8/21/2004 Rev.2.01

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SSM9962M/GM

T _C=150 ^oC

10V

8.0V

5.0V

10V

T _C=25 ^oC

8.0V

5.0V

4.0V

V _G=3.0V

V _DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

1.8

I _D= 7 A

I _D=7A

1.6

1.4

1.2

1.0

0.8

0.6

_C=25 ^oC

VG=10V

-50

100

150

T _j, Junction Temperature ( ^oC)

V _GS(V)

Fig 3. On-Resistance vs. Gate Voltage

Fig 4. Normalized On-Resistance

vs. Junction Temperature

100

2.8

2.6

2.4

2.2

T _j=150 ^oC

T _j=25 ^oC

1.8

1.6

1.4

1.2

0.1

0.01

-50

100

150

0.4

0.8

1.2

1.6

V _SD(V)

Junction Temperature ( ^oC )

Fig 5. Forward Characteristic of

Reverse Diode

Fig 6. Gate Threshold Voltage vs.

Junction Temperature

8/21/2004 Rev.2.01

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SSM9962M/GM

f=1.0MHz

10000

1000

100

I _D=7A

V _DS=20V

Ciss

_DS=25V

_DS=32V

Coss

Crss

Q _G, Total Gate Charge (nC)

VDS (V)

Fig 7. Gate Charge Characteristics

Fig 8. Typical Capacitance Characteristics

100

DUTY=0.5

0.2

0.1

1ms

0.05

P_DM

10ms

0.02

0.01

Single Pulse

100ms

Duty factor = t/T

0.01

T _c=25 ^o

Peak T = P_DMx R_thja+ T_a

0.1

Rthja = 135°C/W

Single Pulse

0.001

0.01

0.0001

0.001

0.01

0.1

100

1000

0.1

100

t , Pulse Width (s)

V _DS(V)

Fig 9. Maximum Safe Operating Area

Fig 10. Effective Transient Thermal Impedance

8/21/2004 Rev.2.01

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SSM9962M/GM

V_DS

R_D

90%

V_DS

TO THE

OSCILLOSCOPE

0.5 x RATED V_DS

R_G

10%

V_GS

10 v

V_GS

t_d(off)

t_d(on)t_r

t_f

Fig 11. Switching Time Circuit

Fig 12. Switching Time Waveform

V_G

V_DS

Q_G

TO THE

OSCILLOSCOPE

4.5V

0.5 x RATED V_DS

Q_GD

Q_GS

V_GS

1~ 3 mA

I_G

Charge

Fig 13. Gate Charge Circuit

Fig 14. Gate Charge Waveform

Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no

guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no

responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its

use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including

without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to

the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of

Silicon Standard Corporation or any third parties.

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SSM9962GM [SSC]

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