5962-01-194-1738 [STMICROELECTRONICS]
IC,EPROM,16KX8,MOS,DIP,28PIN,CERAMIC;
| 型号： | 5962-01-194-1738 |
| 厂家： | 
ST |
| 描述： | IC,EPROM,16KX8,MOS,DIP,28PIN,CERAMIC 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 内存集成电路 |
| 文件： | 总10页 (文件大小：82K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M27128A
NMOS 128 Kbit (16Kb x 8) UV EPROM
NOT FOR NEW DESIGN
■ FAST ACCESS TIME: 200ns
■ EXTENDED TEMPERATURE RANGE
■ SINGLE 5 V SUPPLY VOLTAGE
■ LOW STANDBY CURRENT: 40mA max
■ TTL COMPATIBLE DURING READ and
PROGRAM
28
■ FAST PROGRAMMING ALGORITHM
■ ELECTRONIC SIGNATURE
1
■ PROGRAMMING VOLTAGE: 12V
FDIP28W (F)
DESCRIPTION
The M27128A is a 131,072 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 16,384 words by 8 bits.
The M27128A is housed in a 28 Pin Window Ce-
ramic Frit-Seal Dual-in-Line package. The trans-
parent lid allows the user to expose the chip to
ultraviolet light to erase the bit pattern. A new pat-
tern can then be written to the device by following
the programming procedure.
Figure 1. Logic Diagram
V
V
PP
CC
14
8
A0-A13
Q0-Q7
P
E
M27128A
G
V
SS
AI00769B
November 2000
1/10
This is information on a product still in production but not recommended for new designs.
M27128A
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
grade 1
grade 6
0 to 70
–40 to 85
°C
TBIAS
Temperature Under Bias
grade 1
grade 6
–10 to 80
–50 to 95
°C
TSTG
VIO
Storage Temperature
Input or Output Voltages
Supply Voltage
–65 to 125
–0.6 to 6.25
–0.6 to 6.25
–0.6 to 13.5
–0.6 to 14
°C
V
VCC
VA9
VPP
V
A9 Voltage
V
Program Supply
V
Note: Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause
permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those
indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods
may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
Figure 2. DIP Pin Connections
Read Mode
The M27128A has two control functions, both of
which must be logically satisfied in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection.
V
1
2
3
4
5
6
7
8
9
28
27
V
P
PP
CC
A12
A7
A6
A5
A4
A3
A2
A1
26 A13
25 A8
24 A9
23 A11
Assuming that the addresses are stable, address
access time (tAVQV) is equal to the delay from E to
output (tELQV). Data is available at the outputs after
the falling edge ofG, assuming thatE has been low
and the addresses have been stable for at least
22
G
M27128A
21 A10
20
tAVQV-tGLQV
.
E
Standby Mode
A0 10
Q0 11
Q1 12
Q2 13
19 Q7
18 Q6
17 Q5
16 Q4
15 Q3
The M27128A has a standby mode which reduces
the maximum active power current from 85mA to
40mA. TheM27128Aisplacedinthestandbymode
by applying a TTL high signal to the E input. When
in the standby mode, the outputs are in a high
impedance state, independent of the G input.
V
14
SS
AI00770
Two Line Output Control
Because EPROMs are usually used in larger mem-
ory arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
DEVICE OPERATION
The seven modes of operation of the M27128Aare
listed in the Operating Modes table. A single 5V
power supply is required in the read mode. All
inputs are TTL levels except for VPP and 12V on A9
for Electronic Signature.
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
2/10
M27128A
DEVICE OPERATION (cont’d)
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
between VCC andGND for every eightdevices. The
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
For the most efficient use of these two control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus.
This ensures that all deselected memory devices
are in their low power standby mode and that the
output pins are only active when data is required
from a particular memory device.
Programming
When delivered (and after each erasure for UV
EPPROM), all bits of the M27128A are in the “1"
state. Data is introduced by selectively program-
ming ”0s" into the desired bit locations. Although
only “0s” will be programmed, both “1s” and “0s”
can be present in the data word. The only way to
change a “0" to a ”1" is by ultraviolet light erasure.
System Considerations
The power switching characteristics of fast
EPROMs require carefuldecouplingofthedevices.
The supply current, ICC, has three segments that
are of interest to the system designer: the standby
current level, the active current level, and transient
current peaks that are produced by the falling and
rising edges of E. The magnitude of this transient
current peaks is dependent on the capacitive and
inductive loading of the device at the output. The
associated transient voltage peaks can be sup-
pressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 1µF ceramic
capacitor be used on every device between VCC
and VSS. This should be a high frequency capacitor
The M27128A is in the programming mode when
VPP input is at 12.5V and E and P are at TTL low.
The data to be programmed is applied 8 bits in
parallel, to the data outputpins. The levels required
for the address and data inputs are TTL.
Fast Programming Algorithm
Fast Programming Algorithm rapidly programs
M27128A EPROMs using an efficient and reliable
method suited to the production programming en-
vironment. Programming reliability is also ensured
as the incremental program margin of each byte is
Table 3. Operating Modes
Mode
E
G
VIL
VIH
VIH
VIL
X
P
VIH
A9
X
VPP
VCC
VCC
VPP
VPP
VPP
VCC
VCC
Q0 - Q7
Data Out
Hi-Z
Read
VIL
VIL
VIL
VIL
VIH
VIH
VIL
Output Disable
Program
VIH
X
VIL Pulse
VIH
X
Data In
Data Out
Hi-Z
Verify
X
Program Inhibit
Standby
X
X
X
X
X
Hi-Z
Electronic Signature
VIL
VIH
VID
Codes Out
Note: X = VIH or VIL, VID = 12V ± 0.5%.
Table 4. Electronic Signature
Identifier
Manufacturer’s Code
Device Code
A0
VIL
VIH
Q7
0
Q6
0
Q5
1
Q4
0
Q3
0
Q2
Q1
0
Q0
0
Hex Data
20h
0
0
1
0
0
0
1
0
1
89h
3/10
M27128A
Figure 4. AC Testing Load Circuit
AC MEASUREMENT CONDITIONS
Input Rise and Fall Times
≤
20ns
1.3V
Input Pulse Voltages
0.45V to 2.4V
0.8V to 2.0V
Input and Output Timing Ref. Voltages
1N914
Note that Output Hi-Z is defined as the point where data
is no longer driven.
3.3kΩ
Figure 3. AC Testing Input Output Waveforms
DEVICE
UNDER
TEST
OUT
2.4V
2.0V
C
= 100pF
L
0.8V
0.45V
AI00827
C
includes JIG capacitance
L
AI00828
Table 5. Capacitance (1) (TA = 25 °C, f = 1 MHz )
Symbol
CIN
Parameter
Input Capacitance
Output Capacitance
Test Condition
VIN = 0V
Min
=
Max
6
Unit
pF
COUT
VOUT = 0V
=
12
pF
Note: 1. Sampled only, not 100% tested.
Figure 5. Read Mode AC Waveforms
VALID
A0-A13
tAVQV
tAXQX
E
tEHQZ
tGHQZ
tGLQV
G
tELQV
Hi-Z
Q0-Q7
DATA OUT
AI00771
4/10
M27128A
Table 6. Read Mode DC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC
)
Symbol
ILI
Parameter
Input Leakage Current
Output Leakage Current
Supply Current
Test Condition
0 ≤ VIN ≤ VCC
VOUT = VCC
E = VIL, G = VIL
E = VIH
Min
Max
±10
±10
75
Unit
µA
µA
mA
mA
mA
V
ILO
ICC
ICC1
IPP
Supply Current (Standby)
Program Current
35
VPP = VCC
5
VIL
Input Low Voltage
–0.1
2
0.8
VIH
Input High Voltage
Output Low Voltage
Output High Voltage
VCC + 1
0.45
V
VOL
VOH
IOL = 2.1mA
=
V
IOH = –400µA
2.4
V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
.
Table 7. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC
)
M27128A
blank, -25 -3, -30
Test
Condition
Symbol
Alt
Parameter
Unit
-2, -20
-4
Min Max Min Max Min Max Min Max
Address Valid to
Output Valid
E = VIL,
G = VIL
tAVQV
tELQV
tGLQV
tACC
tCE
tOE
tDF
200
200
75
250
250
100
60
300
300
120
105
105
450
450
150
130
130
ns
ns
ns
ns
ns
ns
Chip Enable Low to
Output Valid
G = VIL
E = VIL
G = VIL
E = VIL
Output Enable Low
to Output Valid
Chip Enable High to
Output Hi-Z
(2)
tEHQZ
0
0
0
55
0
0
0
0
0
0
0
0
0
Output Enable High
to Output Hi-Z
(2)
tGHQZ
tDF
55
60
Address Transition to
Output Transition
E = VIL,
G = VIL
tAXQX
tOH
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
.
2. Sampled only, not 100% tested.
5/10
M27128A
Table 8. Programming Mode DC Characteristics (1)
(TA = 25 °C; VCC = 6V ± 0.25V; VPP = 12.5V ± 0.3V)
Symbol
ILI
Parameter
Input Leakage Current
Supply Current
Test Condition
Min
Max
±10
Unit
µA
mA
mA
V
VIL ≤ VIN ≤ VIH
ICC
100
IPP
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
A9 Voltage
E = VIL
50
VIL
–0.1
2
0.8
VIH
VCC + 1
0.45
V
VOL
VOH
VID
IOL = 2.1mA
V
IOH = –400µA
2.4
V
11.5
12.5
V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
.
Table 9. Programming Mode AC Characteristics (1)
(TA = 25 °C; VCC = 6V ± 0.25V; VPP = 12.5V ± 0.3V)
Symbol
tAVPL
Alt
tAS
Parameter
Test Condition
Min
2
Max
Unit
Address Valid to Program Low
Input Valid to Program Low
VPP High to Program Low
VCC High to Program Low
µs
µs
µs
µs
tQVPL
tDS
2
tVPHPL
tVCHPL
tVPS
tVCS
2
2
Chip Enable Low to Program
Low
tELPL
tPLPH
tPLPH
tCES
tPW
2
µs
ms
ms
Program Pulse Width (Initial)
Note 2
Note 3
0.95
2.85
1.05
Program Pulse Width
(Overprogram)
tOPW
78.75
Program High to Input
Transition
tPHQX
tQXGL
tGLQV
tDH
tOES
tOE
2
2
µs
µs
Input Transition to Output
Enable Low
Output Enable Low to
Output Valid
150
130
ns
Output Enable High to
Output Hi-Z
(4)
tGHQZ
tDFP
tAH
0
0
ns
Output Enable High to
Address Transition
tGHAX
n s
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
.
2. The Initial Program Pulse width tolerance is 1 ms ± 5%.
3. The length of the Over-program Pulse varies from 2.85 ms to 78.95 ms, depending on the multiplication value of the iteration counter.
4. Sampled only, not 100% tested.
6/10
M27128A
Figure 6. Programming and Verify Modes AC Waveforms
VALID
A0-A13
tAVPL
Q0-Q7
DATA IN
DATA OUT
tQVPL
tVPHPL
tVCHPL
tELPL
tPHQX
V
PP
tGLQV
tGHQZ
tGHAX
V
CC
E
P
tPLPH
tQXGL
G
PROGRAM
VERIFY
AI00772
Figure 7. Programming Flowchart
DEVICE OPERATION (cont’d)
continually monitored to determine when it has
been successfully programmed. A flowchart of the
M27128A Fast Programming Algorithm is shown
on the last page. The Fast Programming Algorithm
utilizes two different pulse types: initial and over-
program.
V
= 6V, V
= 12.5V
PP
CC
n = 1
The duration of the initial P pulse(s) is 1ms, which
will then be followed bya longer overprogrampulse
of length 3ms by n (n is equal to the number of the
initial one millisecond pulses applied to a particular
M27128A location), before a correct verify occurs.
Up to 25 one-millisecond pulses per byte are pro-
vided for before the over program pulse is applied.
P = 1ms Pulse
NO
NO
++n
> 25
VERIFY
YES
P = 3ms Pulse by n
++ Addr
YES
The entire sequence of program pulses and byte
verifications is performed at VCC = 6V and VPP
=
FAIL
12.5V. When theFast Programmingcyclehasbeen
completed, all bytes should be compared to the
original data with VCC = 5 and VPP = 5V.
Last
NO
Addr
Program Inhibit
YES
Programmingof multiple M27128A’s inparallel with
different data is also easily accomplished. Except
for E, all like inputs (including G) of the parallel
M27128A may be common. A TTL low pulse ap-
plied to a M27128A’s E input, with VPP = 12.5V, will
program that M27128A. Ahigh levelE input inhibits
the other M27128As from being programmed.
CHECK ALL BYTES
= 5V, V 5V
V
CC
PP
AI00775B
7/10
M27128A
Program Verify
ERASURE OPERATION (applies to UV EPROM)
The erasure characteristic of the M27128A is such
that erasure begins when the cells are exposed to
light with wavelengths shorter than approximately
4000 Å. It should be noted that sunlight and some
type of fluorescent lamps have wavelengths in the
3000-4000 Årange. Research shows that constant
exposure to room level fluorescent lighting could
erase a typical M27128A in about 3 years, while it
would take approximately 1 week to cause erasure
when exposed to direct sunlight. If the M27128A is
to be exposed to these types of lighting conditions
for extended periods of time, it is suggested that
opaque labels be put over the M27128A window to
prevent unintentional erasure. The recommended
erasure procedure for the M27128A is exposure to
short wave ultraviolet light which has wavelength
2537 Å. The integrated dose (i.e. UV intensity x
exposure time) for erasure should be a minimum
of15W-sec/cm2. Theerasuretimewiththisdosage
is approximately 15 to 20 minutes using an ultra-
violet lamp with 12000 µW/cm2 power rating. The
M27128A should be placed within 2.5cm (1 inch)
of the lamp tubes during the erasure. Some lamps
have a filter on their tubes which should be re-
moved before erasure.
A verify should be performed on the programmed
bits to determine that they were correctly pro-
grammed. The verify is accomplished withG = VIL,
E = VIL, P = VIH and VPP at 12.5V.
Electronic Signature
The Electronic Signature mode allows the reading
out of a binary code from an EPROM that will
identify its manufacturer and type. This mode is
intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
This mode is functional in the25°C ± 5°C ambient
temperature range that is required when program-
ming the M27128A.
To activate this mode, the programming equipment
must force 11.5V to 12.5V on address line A9 of the
M27128A. Two identifier bytes may then be se-
quenced from the device outputs by toggling ad-
dress line A0 from VIL to VIH. All other address lines
must be held at VIL during Electronic Signature
mode. Byte 0 (A0 = VIL) represents the manufac-
turercodeand byte 1 (A0=V ) the deviceidentifier
IH
code. For the STMicroelectronics M27128A, these
two identifier bytes are given below.
ORDERING INFORMATION SCHEME
Example:
M27128A
-2
F
1
Speed and VCC Tolerance
Package
FDIP28W
Temperature Range
-2
blank
-3
200 ns, 5V ±5%
250 ns, 5V ± 5%
300 ns, 5V ± 5%
450 ns, 5V ± 5%
200 ns, 5V ± 10%
250 ns, 5V ± 10%
300 ns, 5V ± 10%
F
1
6
0 to 70 °C
–40 to 85 °C
-4
-20
-25
-30
Foralist of availableoptions(Speed,VCC Tolerance, Package, etc...) refer to thecurrentMemory Shortform
catalogue.
For further information on any aspect of this device, please contact STMicroelectronics Sales Office nearest
to you.
8/10
M27128A
FDIP28W - 28 pin Ceramic Frit-seal DIP, with window
mm
Min
inches
Min
Symb
Typ
Max
5.71
1.78
5.08
0.55
1.42
0.31
38.10
15.80
13.36
–
Typ
Max
0.225
0.070
0.200
0.022
0.056
0.012
1.500
0.622
0.526
–
A
A1
A2
B
0.50
3.90
0.40
1.17
0.22
0.020
0.154
0.016
0.046
0.009
B1
C
D
E
15.40
13.05
–
0.606
0.514
–
E1
e1
e3
eA
L
2.54
0.100
1.300
33.02
–
–
–
–
16.17
3.18
1.52
–
18.32
4.10
2.49
–
0.637
0.125
0.060
–
0.721
0.161
0.098
–
S
7.11
0.280
α
4°
15°
4°
15°
N
2
8
28
A2
A
A1
e1
L
B1
B
α
C
eA
e3
D
S
N
1
E1
E
FDIPW-a
Drawing is not to scale
9/10
M27128A
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is registered trademark of STMicroelectronics
All other names are the property of their respective owners
2000 STMicroelectronics - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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10/10
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