74LVQ244_04 [STMICROELECTRONICS]

LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED); 采用低压八路总线缓冲器3态输出(非反相)
74LVQ244_04
型号: 74LVQ244_04
厂家: ST    ST
描述:

LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)
采用低压八路总线缓冲器3态输出(非反相)

输出元件
文件: 总12页 (文件大小:260K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74LVQ241  
LOW VOLTAGE OCTAL BUS BUFFER  
WITH 3 STATE OUTPUTS (NON INVERTED)  
HIGH SPEED:  
= 5.5 ns (TYP.) at V = 3.3 V  
t
PD  
CC  
COMPATIBLE WITH TTL OUTPUTS  
LOW POWER DISSIPATION:  
I
= 4 µA (MAX.) at T =25°C  
CC  
A
LOW NOISE:  
= 0.4V (TYP.) at V = 3.3V  
75TRANSMISSION LINE OUTPUT DRIVE  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOP  
TSSOP  
V
OLP  
CC  
Table 1: Order Codes  
PACKAGE  
|I | = I = 12mA (MIN) at V = 3.0 V  
T & R  
OH  
OL  
CC  
PCI BUS LEVELS GUARANTEED AT 24 mA  
BALANCED PROPAGATION DELAYS:  
SOP  
74LVQ241MTR  
74LVQ241TTR  
TSSOP  
t
t
PHL  
PLH  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 3.6V (1.2V Data Retention)  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 241  
technology. It is ideal for low power and low noise  
3.3V applications.  
1G and 2G output control governs four BUS  
BUFFERs.  
This device is designed to be used with 3 state  
memory address drivers, etc.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
V
CC  
IMPROVED LATCH-UP IMMUNITY  
DESCRIPTION  
The 74LVQ241 is a low voltage CMOS OCTAL  
BUS BUFFER fabricated with sub-micron silicon  
2
gate and double-layer metal wiring C MOS  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 7  
1/12  
August 2004  
74LVQ241  
Figure 2: Input And Output Equivalent Circuit  
Table 2: Pin Description  
PIN N°  
SYMBOL  
NAME AND FUNCTION  
1
1G  
Output Enable Input  
2, 4, 6, 8  
9, 7, 5, 3  
1A1 to 1A4 Data Inputs  
2Y1 to 2Y4 Data Outputs  
2A1 to 2A4 Data Inputs  
11, 13, 15,  
17  
18, 16, 14,  
12  
1Y1 to 1Y4 Data Outputs  
19  
10  
20  
2G  
Output Enable Input  
GND  
Ground (0V)  
V
Positive Supply Voltage  
CC  
Table 3: Truth Table  
INPUTS  
OUTPUT  
1Yn  
INPUTS  
OUTPUT  
2Yn  
1G  
1An  
2G  
2An  
L
L
L
H
X
L
H
Z
H
H
L
L
H
X
L
H
Z
H
X : Don‘t Care  
Z : High Impedance  
Table 4: Absolute Maximum Ratings  
Symbol  
Parameter  
Value  
Unit  
V
Supply Voltage  
-0.5 to +7  
V
V
CC  
V
DC Input Voltage  
-0.5 to V + 0.5  
I
CC  
V
DC Output Voltage  
DC Input Diode Current  
DC Output Diode Current  
DC Output Current  
-0.5 to V + 0.5  
V
O
CC  
I
± 20  
± 20  
mA  
mA  
mA  
mA  
°C  
°C  
IK  
I
OK  
I
± 50  
O
I
or I  
DC V or Ground Current  
±400  
CC  
GND  
CC  
T
Storage Temperature  
-65 to +150  
300  
stg  
T
Lead Temperature (10 sec)  
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is  
not implied  
Table 5: Recommended Operating Conditions  
Symbol  
Parameter  
Value  
Unit  
V
Supply Voltage (note 1)  
Input Voltage  
2 to 3.6  
V
V
CC  
V
0 to V  
I
CC  
V
Output Voltage  
0 to V  
V
O
CC  
T
Operating Temperature  
-55 to 125  
0 to 10  
°C  
ns/V  
op  
Input Rise and Fall Time V = 3.0V (note 2)  
dt/dv  
CC  
1) Truth Table guaranteed: 1.2V to 3.6V  
2) V from 0.8V to 2V  
IN  
2/12  
74LVQ241  
Table 6: DC Specifications  
Test Condition  
Value  
-40 to 85°C -55 to 125°C Unit  
Min. Typ. Max. Min. Max. Min. Max.  
T = 25°C  
Symbol  
Parameter  
A
V
CC  
(V)  
V
High Level Input  
Voltage  
IH  
2.0  
2.0  
2.0  
V
V
3.0 to  
3.6  
V
Low Level Input  
Voltage  
IL  
0.8  
0.8  
0.8  
V
High Level Output  
Voltage  
I =-50 µA  
2.9  
2.99  
2.9  
2.48  
2.2  
2.9  
2.48  
2.2  
OH  
O
I =-12 mA  
3.0  
3.0  
2.58  
V
V
O
I =-24 mA  
O
V
Low Level Output  
Voltage  
I =50 µA  
0.002 0.1  
0.1  
0.1  
OL  
O
I =12 mA  
0
0.36  
0.44  
0.55  
0.44  
0.55  
O
I =24 mA  
O
I
Input Leakage  
Current  
I
V = V or GND  
3.6  
3.6  
± 0.1  
± 0.5  
4
± 1  
± 5  
40  
± 1  
± 10  
40  
µA  
µA  
µA  
I
CC  
I
High Impedance  
Output Leakage  
Current  
OZ  
V = V or V  
IL  
I
IH  
V
= V or GND  
CC  
O
I
Quiescent Supply  
Current  
CC  
V = V or GND  
3.6  
3.6  
I
CC  
I
I
V
= 0.8 V max  
= 2 V min  
OHD  
36  
25  
mA  
mA  
OLD  
OLD  
Dynamic Output  
Current (note 1, 2)  
V
-25  
-25  
OHD  
1) Maximum test duration 2ms, one output loaded at time  
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 75  
Table 7: Dynamic Switching Characteristics  
Test Condition  
Value  
T = 25°C  
Symbol  
Parameter  
-40 to 85°C -55 to 125°C Unit  
A
V
CC  
(V)  
Min. Typ. Max. Min. Max. Min. Max.  
V
Dynamic Low  
Voltage Quiet  
Output (note 1, 2)  
0.4  
0.8  
0.8  
OLP  
3.3  
3.3  
V
V
V
-0.8  
2
-0.5  
OLV  
V
Dynamic High  
Voltage Input  
(note 1, 3)  
IHD  
C = 50 pF  
L
V
Dynamic Low  
Voltage Input  
(note 1, 3)  
3.3  
V
ILD  
1) Worst case package.  
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.  
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V ), 0V to threshold  
ILD  
(V ), f=1MHz.  
IHD  
3/12  
74LVQ241  
Table 8: AC Electrical Characteristics (C = 50 pF, R = 500 , Input t = t = 3ns)  
L
L
r
f
Test Condition  
Value  
T = 25°C  
Symbol  
Parameter  
-40 to 85°C -55 to 125°C Unit  
A
V
CC  
(V)  
Min. Typ. Max. Min. Max. Min. Max.  
t
t
t
t
Propagation Delay  
Time  
2.7  
.
6.6  
5.5  
8.3  
6.8  
7.5  
5.8  
0.5  
0.5  
11  
9
12.5  
9.5  
14  
11  
PLH PHL  
ns  
ns  
ns  
(*)  
3.3  
2.7  
t
Output Enable  
Time  
13.5  
10  
18  
18  
13  
15  
12  
1.0  
1.0  
PZL PZH  
(*)  
11.5  
13.5  
10.5  
1.0  
3.3  
2.7  
t
Output Disable  
Time  
12  
PLZ PHZ  
(*)  
9.0  
1.0  
1.0  
3.3  
2.7  
t
t
Output To Output  
Skew Time  
(note1, 2)  
OSLH  
ns  
(*)  
1.0  
OSHL  
3.3  
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-  
ing in the same direction, either HIGH or LOW (t  
2) Parameter guaranteed by design  
(*) Voltage range is 3.3V ± 0.3V  
= |t  
- t  
|, t  
= |t  
- t  
|)  
OSLH  
PLHm PLHn OSHL  
PHLm PHLn  
Table 9: Capacitive Characteristics  
Test Condition  
Value  
T = 25°C  
Symbol  
Parameter  
-40 to 85°C -55 to 125°C Unit  
A
V
CC  
(V)  
Min. Typ. Max. Min. Max. Min. Max.  
C
Input Capacitance  
3.3  
3.3  
4
pF  
pF  
IN  
Output  
Capacitance  
C
8
OUT  
C
Power Dissipation  
Capacitance  
(note 1)  
PD  
f
= 10MHz  
3.3  
10  
pF  
IN  
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without  
PD  
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I  
= C x V x f + I /8 (per circuit)  
CC(opr)  
PD CC IN CC  
4/12  
74LVQ241  
Table 10: Test Circuit  
TEST  
SWITCH  
Open  
2V  
t
t
t
, t  
PLH PHL  
, t  
PZL PLZ  
CC  
, t  
Open  
PZH PHZ  
C
R
R
= 50pF or equivalent (includes jig and probe capacitance)  
L
L
T
= R = 500or equivalent  
1
= Z  
of pulse generator (typically 50)  
OUT  
Figure 3: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)  
5/12  
74LVQ241  
Figure 4: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)  
6/12  
74LVQ241  
SO-20 MECHANICAL DATA  
mm.  
inch  
TYP.  
DIM.  
MIN.  
TYP  
MAX.  
MIN.  
MAX.  
A
A1  
B
2.35  
2.65  
0.093  
0.104  
0.1  
0.33  
0.23  
12.60  
7.4  
0.30  
0.51  
0.32  
13.00  
7.6  
0.004  
0.013  
0.009  
0.496  
0.291  
0.012  
0.020  
0.013  
0.512  
0.299  
C
D
E
e
1.27  
0.050  
H
10.00  
0.25  
0.4  
10.65  
0.75  
1.27  
8°  
0.394  
0.010  
0.016  
0°  
0.419  
0.030  
0.050  
8°  
h
L
k
0°  
ddd  
0.100  
0.004  
0016022D  
7/12  
74LVQ241  
TSSOP20 MECHANICAL DATA  
mm.  
inch  
TYP.  
DIM.  
MIN.  
TYP  
MAX.  
1.2  
MIN.  
MAX.  
0.047  
0.006  
0.041  
0.012  
0.0079  
0.260  
0.260  
0.176  
A
A1  
A2  
b
0.05  
0.8  
0.15  
1.05  
0.30  
0.20  
6.6  
0.002  
0.031  
0.007  
0.004  
0.252  
0.244  
0.169  
0.004  
0.039  
1
0.19  
0.09  
6.4  
c
D
6.5  
6.4  
0.256  
0.252  
E
6.2  
6.6  
E1  
e
4.3  
4.4  
4.48  
0.173  
0.65 BSC  
0.0256 BSC  
K
0˚  
8˚  
0˚  
8˚  
L
0.45  
0.60  
0.75  
0.018  
0.024  
0.030  
A2  
A
K
L
b
e
A1  
E
c
D
E1  
PIN 1 IDENTIFICATION  
1
0087225C  
8/12  
74LVQ241  
Tape & Reel SO-20 MECHANICAL DATA  
mm.  
TYP  
inch  
TYP.  
DIM.  
MIN.  
MAX.  
330  
MIN.  
MAX.  
12.992  
0.519  
A
C
12.8  
20.2  
60  
13.2  
0.504  
0.795  
2.362  
D
N
T
30.4  
11  
1.197  
0.433  
0.528  
0.130  
0.161  
0.476  
Ao  
Bo  
Ko  
Po  
P
10.8  
13.2  
3.1  
0.425  
0.520  
0.122  
0.153  
0.468  
13.4  
3.3  
3.9  
4.1  
11.9  
12.1  
9/12  
74LVQ241  
Tape & Reel TSSOP20 MECHANICAL DATA  
mm.  
TYP  
inch  
TYP.  
DIM.  
MIN.  
MAX.  
330  
MIN.  
MAX.  
12.992  
0.519  
A
C
12.8  
20.2  
60  
13.2  
0.504  
0.795  
2.362  
D
N
T
22.4  
7
0.882  
0.276  
0.280  
0.075  
0.161  
0.476  
Ao  
Bo  
Ko  
Po  
P
6.8  
6.9  
0.268  
0.272  
0.067  
0.153  
0.468  
7.1  
1.9  
4.1  
12.1  
1.7  
3.9  
11.9  
10/12  
74LVQ241  
Table 11: Revision History  
Date  
Revision  
Description of Changes  
Ordering Codes Revision - pag. 1.  
02-Aug-2004  
7
11/12  
74LVQ241  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted  
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject  
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not  
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics  
All other names are the property of their respective owners  
© 2004 STMicroelectronics - All Rights Reserved  
STMicroelectronics group of companies  
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Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America  
www.st.com  
12/12  

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