74VHC74MTR [STMICROELECTRONICS]
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR; 带预置和清除两个D型触发器
| 型号： | 74VHC74MTR |
| 厂家： | 
ST |
| 描述： | DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR |
| 文件： | 总14页 (文件大小：453K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74VHC74
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
■
HIGH SPEED:
= 170 MHz (TYP.) at V = 5V
f
MAX
CC
■ LOW POWER DISSIPATION:
= 2 µA (MAX.) at T =25°C
I
CC
A
■
HIGH NOISE IMMUNITY:
= V = 28% V (MIN.)
V
NIH
NIL
CC
SOP
TSSOP
■
■
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I | = I = 8 mA (MIN)
Table 1: Order Codes
PACKAGE
OH
OL
■
■
■
■
BALANCED PROPAGATION DELAYS:
T & R
t
t
PLH
PHL
OPERATING VOLTAGE RANGE:
(OPR) = 2V to 5.5V
SOP
74VHC74MTR
74VHC74TTR
V
TSSOP
CC
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
IMPROVED LATCH-UP IMMUNITY
CLR and PR are independent of the clock and
accomplished by a low setting on the appropriate
input.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The 74VHC74 is an advanced high-speed CMOS
DUAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR fabricated with sub-micron silicon gate
2
and double-layer metal wiring C MOS technology.
A signal on the D INPUT is transferred to the Q
OUTPUTS during the positive going transition of
the clock pulse.
Figure 1: Pin Connection And IEC Logic Symbols
Rev. 4
1/14
November 2004
74VHC74
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
NAME AND FUNCTION
Asynchronous Reset -
Direct Input
1, 13
1CLR, 2CLR
1D, 2D
2, 12
3, 11
Data Inputs
1CK, 2CK Clock Input
(LOW to HIGH, Edge
Triggered)
4, 10
1PR, 2PR Asynchronous Set - Direct
Input
5, 9
6, 8
1Q, 2Q
1Q, 2Q
True Flip-Flop Outputs
Complement Flip-Flop
Outputs
7
GND
Ground (0V)
14
V
Positive Supply Voltage
CC
Table 3: Truth Table
INPUTS
OUTPUTS
FUNCTION
CLR
PR
D
CK
Q
Q
L
H
L
H
L
X
X
X
L
X
X
X
L
H
H
L
H
L
CLEAR
PRESET
L
H
H
H
H
H
H
H
H
H
X
H
L
Q
Q
NO CHANGE
n
n
X : Don’t Care
Figure 3: Logic Diagram
This logic diagram has not be used to estimate propagation delays
2/14
74VHC74
Table 4: Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7.0
-0.5 to +7.0
V
V
CC
V
DC Input Voltage
I
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
-0.5 to V + 0.5
V
O
CC
I
- 20
± 20
mA
mA
mA
mA
°C
°C
IK
I
OK
I
± 25
O
I
or I
DC V or Ground Current
± 50
CC
GND
CC
T
Storage Temperature
-65 to +150
300
stg
T
Lead Temperature (10 sec)
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Table 5: Recommended Operating Conditions
Symbol
Parameter
Value
Unit
V
Supply Voltage
2 to 5.5
0 to 5.5
V
V
CC
V
Input Voltage
I
V
Output Voltage
0 to V
V
O
CC
T
Operating Temperature
-55 to 125
°C
op
Input Rise and Fall Time (note 1) (V = 3.3 ± 0.3V)
0 to 100
0 to 20
CC
dt/dv
ns/V
(V
= 5.0 ± 0.5V)
CC
1) V from 30% to 70% of V
IN
CC
3/14
74VHC74
Table 6: DC Specifications
Test Condition
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
V
High Level Input
Voltage
2.0
1.5
1.5
1.5
IH
V
V
3.0 to
5.5
0.7VCC
0.7VCC
0.7VCC
V
Low Level Input
Voltage
2.0
0.5
0.5
0.5
IL
3.0 to
5.5
0.3VCC
0.3VCC
0.3VCC
V
High Level Output
Voltage
I =-50 µA
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
1.9
2.9
2.0
3.0
4.5
1.9
2.9
1.9
2.9
4.4
2.4
3.7
OH
O
I =-50 µA
O
I =-50 µA
4.4
4.4
V
V
O
I =-4 mA
2.58
3.94
2.48
3.8
O
I =-8 mA
O
V
Low Level Output
Voltage
I =50 µA
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
OL
O
I =50 µA
O
I =50 µA
0.1
0.1
0.1
O
I =4 mA
0.36
0.36
0.44
0.44
0.55
0.55
O
I =8 mA
O
I
Input Leakage
Current
0 to
5.5
I
V = 5.5V or GND
± 0.1
± 1
± 1
µA
µA
I
I
Quiescent Supply
Current
CC
V = V or GND
5.5
2
20
20
I
CC
4/14
74VHC74
Table 7: AC Electrical Characteristics (Input t = t = 3ns)
r
f
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
T = 25°C
Symbol
Parameter
A
V
C
L
(V) (pF)
CC
(*)
t
Propagation Delay
Time CK to Q or Q
15
50
15
50
15
50
15
50
6.7
9.2
4.6
6.1
7.6
11.9
15.4
7.3
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
14.0
17.5
8.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
14.0
17.5
8.5
PLH
3.3
t
(*)
PHL
3.3
ns
ns
(**)
(**)
(*)
5.0
5.0
9.3
10.5
14.5
18.0
9.0
10.5
14.5
18.0
9.0
t
Propagation Delay
Time PR or CLR to
Q or Q
12.3
PLH
3.3
t
PHL
(*)
10.1 15.8
3.3
(**)
(**)
(*)
4.8
6.3
7.7
9.7
6.0
5.0
6.0
5.0
6.0
5.0
0.5
0.5
5.0
3.0
5.0
5.0
11.0
7.0
11.0
7.0
t
CK Pulse Width
HIGH or LOW
W
3.3
ns
ns
ns
ns
ns
(**)
5.0
5.0
5.0
(*)
t
7.0
7.0
W
3.3
PR or CLR Pulse
Width LOW
(**)
(*)
5.0
5.0
5.0
t
Setup Time D to CK
HIGH or LOW
7.0
7.0
s
3.3
(**)
5.0
5.0
5.0
3.3
(*)
t
Hold Time D to CK
HIGH or LOW
0.5
0.5
h
(**)
(*)
0.5
0.5
5.0
t
Removal Time
PR or CLR to CK
5.0
5.0
REM
3.3
(**)
3.0
3.0
5.0
3.3
3.3
(*)
(*)
f
Maximum Clock
Frequency
15
50
15
50
80
50
125
75
70
45
70
45
MAX
MHz
(**)
130
90
170
115
110
75
110
75
5.0
5.0
(**)
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
Table 8: Capacitive Characteristics
Test Condition
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
C
Input Capacitance
5.0
7
10
10
10
pF
pF
IN
C
Power Dissipation
Capacitance
(note 1)
PD
f
= 10MHz
5.0
25
IN
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
flip-flop)
= C x V x f + I /2 (per
CC(opr)
PD CC IN CC
5/14
74VHC74
Figure 4: Test Circuit
C
R
=15/50pF or equivalent (includes jig and probe capacitance)
L
T
= Z
of pulse generator (typically 50Ω)
OUT
Figure 5: Waveform - Propagation Delays, Setup And Hold Times (f=1MHz; 50% duty cycle)
6/14
74VHC74
Figure 6: WAVEFORM 2: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
Figure 7: Waveform - Recovery Times (f=1MHz; 50% duty cycle)
7/14
74VHC74
Figure 8: Waveform - Pulse Width
8/14
74VHC74
SO-14 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
A1
A2
B
1.35
1.75
0.053
0.069
0.1
1.10
0.33
0.19
8.55
3.8
0.25
1.65
0.51
0.25
8.75
4.0
0.004
0.043
0.013
0.007
0.337
0.150
0.010
0.065
0.020
0.010
0.344
0.157
C
D
E
e
1.27
0.050
H
5.8
0.25
0.4
0°
6.2
0.50
1.27
8°
0.228
0.010
0.016
0°
0.244
0.020
0.050
8°
h
L
k
ddd
0.100
0.004
0016019D
9/14
74VHC74
TSSOP14 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.2
MIN.
MAX.
0.047
0.006
0.041
0.012
0.0089
0.201
0.260
0.176
A
A1
A2
b
0.05
0.8
0.15
1.05
0.30
0.20
5.1
0.002
0.031
0.007
0.004
0.193
0.244
0.169
0.004
0.039
1
0.19
0.09
4.9
c
D
5
6.4
0.197
0.252
E
6.2
6.6
E1
e
4.3
4.4
4.48
0.173
0.65 BSC
0.0256 BSC
K
0˚
8˚
0˚
8˚
L
0.45
0.60
0.75
0.018
0.024
0.030
A2
A
K
L
b
e
A1
c
E
D
E1
PIN 1 IDENTIFICATION
1
0080337D
10/14
74VHC74
Tape & Reel SO-14 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
6.6
9.2
2.3
4.1
8.1
0.882
0.260
0.362
0.090
0.161
0.319
Ao
Bo
Ko
Po
P
6.4
9
0.252
0.354
0.082
0.153
0.311
2.1
3.9
7.9
11/14
74VHC74
Tape & Reel TSSOP14 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
6.9
5.5
1.8
4.1
8.1
0.882
0.272
0.217
0.071
0.161
0.319
Ao
Bo
Ko
Po
P
6.7
5.3
1.6
3.9
7.9
0.264
0.209
0.063
0.153
0.311
12/14
74VHC74
Table 9: Revision History
Date
Revision
Description of Changes
Order Codes Revision - pag. 1.
12-Nov-2004
4
13/14
74VHC74
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2004 STMicroelectronics - All Rights Reserved
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14/14
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