EMIF10-LCD01F3 [STMICROELECTRONICS]
10 LINES EMI FILTER AND ESD PROTECTION; 10号线EMI滤波器和ESD保护
| 型号： | EMIF10-LCD01F3 |
| 厂家： | 
ST |
| 描述： | 10 LINES EMI FILTER AND ESD PROTECTION |
| 文件： | 总6页 (文件大小：227K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EMIF10-LCD01F1
®
10 LINES EMI FILTER
AND ESD PROTECTION
IPADTM
MAIN PRODUCT CHARACTERISTICS:
Where EMI filtering in ESD sensitive equipment is
required :
■
■
■
■
LCD for Mobile phones
Computers and printers
Communication systems
MCU Boards
DESCRIPTION
The EMIF10-LCD01F1 is a 10 lines highly
integrated devices designed to suppress EMI/RFI
noise in all systems subjected to electromagnetic
interferences. The EMIF10 flip chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry,
which prevents the device from destruction when
subjected to ESD surges up 15kV.
Flip Chip package
PIN CONFIGURATION (ball side)
BENEFITS
■
■
■
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Very low PCB space consuming:
2.64mm x 2.64mm
Very thin package: 0.65 mm
High efficiency in ESD suppression on input
pins (IEC6100-4-2 level 4)
High reliability offered by monolithic integration
High reducing of parasitic elements through in-
tegration & wafer level packaging.
5
3
4
2
1
I5
I4
I3
I2
I1
A
B
C
D
E
■
■
I10
I9
I8
I7
I6
GND GND GND GND GND
■
■
O10
O5
O9
O4
O8
O3
O7
O2
O6
O1
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2
Level 4 input pins 15kV (air discharge)
8 kV (contact discharge)
Level 1 output pins 2kV (air discharge)
2kV (contact discharge)
MIL STD 883E - Method 3015-6 Class 3
BASIC CELL CONFIGURATION
Low-pass Filter
Output
Input
Ri/o = 100Ω
Cline = 35pF
GND
GND
GND
TM : IPAD is a trademark of STMicroelectronics.
November 2003 - Ed: 2A
1/6
EMIF10-LCD01F1
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C)
Symbol
Tj
Parameter and test conditions
Value
125
Unit
°C
Maximum junction temperature
Operating temperature range
Storage temperature range
Top
-40 to + 85
-55 to +150
°C
Tstg
°C
ELECTRICAL CHARACTERISTICS (Tamb = 25°C)
I
Symbol
VBR
IRM
Parameters
Breakdown voltage
IF
Leakage current @ VRM
Stand-off voltage
VRM
VCL
VF
V
CL VBR VRM
Clamping voltage
V
IRM
IR
Rd
Dynamic impedance
Peak pulse current
IPP
RI/O
Series resistance between Input &
Output
IPP
Cline
Input capacitance per line
Symbol
VBR
Test conditions
IR = 1mA
Min
Typ
Max
10
Unit
V
6
8
IRM
VRM = 3V
500
110
35
nA
Ω
RI/O
90
100
8 (1)
Cline
At 0V bias
pF
ns
Rt / Ft
Induced rise and fall time 10-90% at 26 MHz fre-
quency signal V = 1.9 V (Rt / Ft input 1 ns, 50Ω
impedance generator)
(1) guaranteed by design
Fig. 1: S21(dB) all lines attenuation measurement
and Aplac simulation.
Fig. 2: Analog crosstalk measurements.
2/6
EMIF10-LCD01F1
Fig. 3: ESD response to IEC61000-4-2 (+15kV air
discharge) on one input and one output.
Fig. 4: ESD response to IEC61000-4-2 (-15kV air
discharge) on one input and one output.
Vin
Vout
Fig. 5: Line capacitance versus applied voltage.
Fig. 6: Rise time 10-90% measurements with
1.9V signal at 26 MHz frequency (50Ω generator).
CLine(pF)
35
30
25
20
15
10
VLine(V)
2.0 3.0
5
0
0.0
1.0
4.0
5.0
Fig. 7: Fall time 10-90% measurements with 1.9V
signal at 26 MHz frequency (50Ω generator).
3/6
EMIF10-LCD01F1
Aplac model.
EMIF10-LCD01F1 model
Ground return
Aplac parameters.
ZRZ structure
aplacvar Remif10low 100
aplacvar Cemif10flow 17.5pF
Bumps
BV = 7
CJO = Cemif10low
IBV = 1u
aplacvar Lbump 50pH
aplacvar Rbump 20m
aplacvar Cbump 1.5pF
Bulk
IKF = 1000
IS = 10f
ISR = 100p
N = 1
aplacvar Rsub 100m
Gnd connections
aplacvar Rgnd 100m
aplacvar Lgnd 200pH
aplacvar Cgnd 0.15pF
M = 0.3333
RS = 0.015
VJ = 0.6
TT = 50n
ORDER CODE
EMIF
yy
-
xxx zz
F
x
1: Pitch = 500µm Bump = 315µm
2: Leadfree Pitch = 500µm Bump = 315µm
3: Leadfree Pitch = 400µm Bump = 250µm
4: Pitch = 500µm Bump = 250µm
EMI Filter
Number of lines
Flip Chip
x: resistance value (Ohms) z: capacitance value / 10(pF)
or
Application (3 letters) and Version (2 digits)
4/6
EMIF10-LCD01F1
PACKAGE MECHANICAL DATA
FLIP CHIP
650µm ± 65
500µm ± 50
315µm ± 50
250µm ± 40
2.64mm ± 50µm
FOOT PRINT RECOMMENDATIONS
Copper pad Diameter :
250µm recommended , 300µm max
Solder stencil opening : 330µm
Solder mask opening recommendation :
340µm min for 315µm copper pad diameter
MARKING
545
400
Dot, ST logo
xxx = marking
yww = datecode
(y = year
ww = week)
x x x
y
w w
All dimensions in µm
5/6
EMIF10-LCD01F1
PACKING
Dot identifying Pin A1 location
Ø 1.5 +/- 0.1
4 +/- 0.1
T
T
ST
0.73 +/- 0.05
4 +/- 0.1
User direction of unreeling
All dimensions in mm
OTHER INFORMATION
Ordering code
Marking
Package
Weight
Base qty
5000
Delivery mode
EMIF10-LCD01F1
FLT
Flip Chip
9.3 mg
Tape & reel (7”)
Note: More information are available in the application notes:
- AN1235: ''Flip-Chip: Package description and recommandations for use''
- AN1751: "EMI Filters: Recommendations and measurements"
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not au-
thorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners.
© 2003 STMicroelectronics - All rights reserved.
STMicroelectronics GROUP OF COMPANIES
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany -
Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain -
Sweden - Switzerland - United Kingdom - United States
www.st.com
6/6
相关型号：
©2020 ICPDF网 联系我们和版权申明