IPS161HF [STMICROELECTRONICS]

Single channel high-side switches;
IPS161HF
型号: IPS161HF
厂家: ST    ST
描述:

Single channel high-side switches

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IPS160HF, IPS161HF  
Datasheet  
Single channel high-side switches  
Features  
R
I
V
CC  
Part number  
DS(on)  
OUT  
IPS160HF  
IPS161HF  
2.4 A  
0.6A  
0.060 Ω  
65 V  
8 V to 60 V operating voltage range  
Minimum output current limitation: 0.7A (IPS161HF) or 2.5A (IPS160HF)  
Short propagation delay at start-up  
Fast demagnetization of inductive load  
Non-dissipative short-circuit protection (cut-off)  
Programmable cut-off delay time using external capacitor  
Ground disconnection protection  
VCC disconnection protection  
Thermal shutdown protection  
Undervoltage lock-out  
Diagnostic signalization for: open load in off-state, cut-off and junction thermal  
shutdown  
Designed to meet IEC 61131-2  
PowerSSO12 package  
Applications  
Product status  
Safety applications  
IPS160HF  
IPS161HF  
Programmable logic control  
Industrial PC peripheral input/output  
Numerical control machines  
Product summary  
IPS160HF IPS160HFTR  
IPS161HF IPS161HFTR  
PowerSSO12  
Order  
code  
Description  
The IPS160HF (Iout = 2.4A) and IPS161HF (Iout = 0.6A) are monolithic devices  
which can drive capacitive, resistive or inductive loads with one side connected to  
ground.  
Package  
Packing  
Tube  
Tape and reel  
The 60 V operating range and Ron = 60 mΩ, combined with the extended diagnostic  
(Open Load, Over Load, Overtemperature) and the < 60 us propagation delay time at  
startup (enabling Class 3 for interface types C and D), make the ICs suitable to  
address safety applications targeting higher SIL levels.  
The built-in overload and thermal shutdown protections guarantee the ICs, the  
application and the load against electrical and thermal overstress.  
Furthermore, in order to minimize the power dissipation when the output is shorted, a  
low-dissipative short-circuit protection (cut-off) is implemented to limit the output  
average current value and consequent device overheating.  
Cut-off delay time can be set by soldering an external capacitor or disabled by a  
resistor on pin 4 (CoD).  
The DIAG common diagnostic open drain pin reports the open load in off-state, cut-  
off (overload) and thermal shutdown.  
DS13271 - Rev 2 - June 2020  
For further information contact your local STMicroelectronics sales office.  
www.st.com  
IPS160HF, IPS161HF  
Block diagram  
1
Block diagram  
Figure 1. Block diagram  
Undervoltage  
detection  
Vcc  
Vcc clamp  
IN  
Output clamp  
OUT  
CoD  
Current limitation  
cut -off  
DIAG  
Open load in off-state  
Junction  
Overtemperature  
GIPG1702151307LM  
GND  
DS13271 - Rev 2  
page 2/27  
 
 
IPS160HF, IPS161HF  
Pin description  
2
Pin description  
Figure 2. Pin connection (top view)  
VCC  
IN  
1
VCC  
12  
2
3
4
5
6
11 OUT  
10  
9
DIAG  
CoD  
OUT  
OUT  
OUT  
GND  
TAB=Vcc  
8
NC  
NC  
7
GIPG1702151321LM  
Table 1. Pin configuration  
Function  
Number Name  
1, 12, TAB VCC Device supply voltage  
Type  
Supply  
2
3
IN  
Channel input  
Input  
Output open  
drain  
DIAG Common diagnostic pin for thermal shutdown, cut-off and open load  
Cut-off delay pin, cannot be left floating.  
4
CoD  
NC  
Input  
Connected to GND by 1 kΩ resistor to disable the cut-off function. Connect to a C  
capacitor to set the cut-off delay see Table 8. Protection and diagnostic  
CoD  
5, 6  
7
Not connected  
GND Device ground  
Ground  
Output  
8, 9, 10, 11 OUT Channel power stage output  
IN  
This pin drives the output stage to pin OUT. IN pin has internal weak pull-down resistors, see  
Table 7. Logic inputs.  
OUT  
Output power transistor is in high-side configuration, with active clamp for fast demagnetization.  
DIAG  
This pin is used for diagnostic purposes and is internally wired to an open drain transistor. The  
open drain transistor is turned on in case of junction thermal shutdown, cut-off, or open load in  
off-state.  
DS13271 - Rev 2  
page 3/27  
 
 
 
IPS160HF, IPS161HF  
Pin description  
CoD  
GND  
This pin cannot be left floating and can be used to program the cut-off delay time tcoff, see  
Table 8. Protection and diagnostic through an external capacitor (CCoD). The cut-off function  
can be completely disabled by connecting the CoD pin to GND through 1 kΩ resistor: in this  
condition, the output channel remains in limitation condition, supplying the current to the load  
until the input is forced LOW or the thermal shutdown threshold is triggered.  
IC ground.  
The IC can be protected against reverse polarity using two different solutions:  
1. Placing a resistor RGND between IC GND pin and load connection point to GND (RGND  
>
VCC/Icc, see Table 2. Absolute maximum rating). Note that power dissipated by RGND during  
reverse polarity condition is Vcc^2/RGND  
.
2. Placing a diode in parallel to RGND  
The diode must be selected such that its VRRM > |VCC| and power dissipation capability is  
higher than VF*IS (see Table 4).  
In normal operation (no reverse polarity), there is a voltage drop (ΔV) between GND of the  
device and GND of the module.  
Using option 1, ΔV = RGND * ICC  
.
Using option 2, ΔV = VF@(I )  
.
S
Figure 3. Reverse polarity  
VCC  
IC supply voltage.  
DS13271 - Rev 2  
page 4/27  
 
IPS160HF, IPS161HF  
Absolute maximum ratings  
3
Absolute maximum ratings  
Table 2. Absolute maximum ratings  
Symbol  
Parameter  
Value  
Unit  
V
V
V
I
Supply voltage  
-0.3 to 65  
-V  
CC  
V
to V +0.3  
cc  
Output channel voltage  
Input current  
V
OUT  
cc clamp  
-10 to +10  
mA  
V
IN  
V
V
I
V
IN voltage  
IN  
CC  
Output cut-off voltage pin  
Input current on cut-off pin  
Fault voltage  
5.5  
V
COD  
-1 to +10  
mA  
V
COD  
V
V
DIAG  
DIAG  
CC  
I
I
I
Fault current  
-5 to +10  
-250  
mA  
Maximum DC reverse current flowing through the IC  
(1)  
mA  
CC  
from GND to V  
CC  
Output stage current  
Internally limited  
5
OUT  
A
Maximum DC reverse current flowing through the IC  
(1)  
-I  
OUT  
from OUT to V  
CC  
Single pulse avalanche energy (T  
= 125 °C, V  
CC  
AMB  
(1)  
E
1000  
mJ  
W
AS  
= 24 V, I  
= 1 A)  
load  
Power dissipation at T = 25 °C (2)  
P
T
Internally limited  
-55 to 150  
TOT  
C
Storage temperature range  
Junction temperature  
STG  
J
°C  
T
-40 to 150  
1. Verified on application board with R  
= 49 °C/W  
th(ja)  
2. (T  
-T )/ R  
JSD(MAX) C th(JA)  
Note:  
Absolute maximum ratings are the values beyond which damage to the device may occur. Functional operation  
under these conditions is not implied. All voltages are referenced to GND.  
Table 3. Thermal data  
Symbol  
Parameter  
Thermal resistance junction-case  
Thermal resistance junction-ambient  
Value  
1
Unit  
R
R
th(JC)  
°C/W  
49  
th(JA)  
Note:  
Package mounted on a 2-layer application board with Cu thickness = 35 μm, total dissipation area = 1.5 cm²  
connected by 6 vias.  
DS13271 - Rev 2  
page 5/27  
 
 
 
 
 
IPS160HF, IPS161HF  
Electrical characteristics  
4
Electrical characteristics  
(8 V < VCC < 60 V; -40 °C < TJ < 125 °C, unless otherwise specified)  
Table 4. Supply  
Symbol  
Parameter  
Test conditions  
Min.  
Typ. Max. Unit  
V
V
Supply voltage  
60  
8
V
V
V
V
CC  
UVON  
6.9  
V
V
V
Undervoltage on threshold  
Undervoltage off threshold  
Undervoltage hysteresis  
UVON  
UVOFF  
UVH  
6.5  
7.8  
0.15  
0.5  
300  
350  
1
V
V
V
V
V
= 24 V  
500  
600  
1.4  
2.1  
1
CC  
CC  
CC  
CC  
Supply current in off-state  
μA  
= 60 V  
I
S
= 24 V  
Supply current in on-state  
mA  
mA  
= 60 V  
1.4  
I
= V = V  
V
= 0 V  
GND disconnection output current  
LGND  
GND  
IN  
CC, OUT  
Table 5. Output stage  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
V
= 24 V  
CC  
60  
80  
I
=1 A @ T = 25 °C  
OUT  
J
R
V
On-state resistance  
mΩ  
DS(on)  
V
= 24 V  
CC  
120  
I
=1 A @ T = 125 °C  
J
OUT  
V
V
V
V
= 0 V and I  
= 0 A  
OUT  
Off-state output voltage  
Off-state output current  
2
3
V
OUT(OFF)  
IN  
= 24 V, V = 0 V, V  
= 0 V  
CC  
CC  
IN  
OUT  
OUT  
I
OUT(OFF)  
= 60 V, V = 0 V, V  
= 0 V  
10  
0
μA  
IN  
I
= 0 V, V = 4 V  
OUT  
Off-state output current  
-35  
OUT(OFF-min)  
IN  
Table 6. Switching (VCC = 24 V; -40 °C < TJ < 125 °C, RLOAD = 48 Ω)  
Symbol  
Parameter  
Rise time  
Test conditions  
Min. Typ. Max.  
Unit  
t
t
t
t
10  
10  
20  
30  
r
Fall time  
f
I
I
= 0.5 A, (see Figure 4. Timing in normal operation )  
= 0.5 A, (see Figure 5. Propagation delay at start-  
OUT  
Propagation delay time off  
Propagation delay time on  
Power-on delay time from  
PD(H-L)  
PD(L-H)  
μs  
OUT  
t
32  
60  
D(VCC-ON)  
V
rising edge  
up)  
CC  
DS13271 - Rev 2  
page 6/27  
 
 
 
 
IPS160HF, IPS161HF  
Electrical characteristics  
Figure 4. Timing in normal operation  
DS13271 - Rev 2  
page 7/27  
 
IPS160HF, IPS161HF  
Electrical characteristics  
Figure 5. Propagation delay at start-up  
V
IN  
t
VCC  
VUVON  
t
td(Vcc-on)  
VOUT  
10%  
t
Table 7. Logic inputs  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
V
V
V
Input low level voltage  
Input high level voltage  
Input hysteresis voltage  
0.8  
IL  
2.2  
V
IH  
0.4  
I(HYST)  
V
V
= V = 36 V  
200  
550  
CC  
IN  
I
Input current  
μA  
IN  
= V = 60 V  
CC  
IN  
DS13271 - Rev 2  
page 8/27  
 
 
IPS160HF, IPS161HF  
Electrical characteristics  
Table 8. Protection and diagnostic  
Test conditions  
Symbol  
Parameter  
active clamp  
Min.  
Typ.  
Max.  
Unit  
V
V
I
I
= 10 mA  
CC  
65.5  
68.5  
71.5  
clamp  
CC  
V
= 0.5 A; load =1 mH  
V
-71.5  
V
-68.5  
CC  
V
-65.5  
CC  
Demagnetization voltage  
demag  
OUT  
CC  
V
Open load (off-state) or short to V  
detection threshold  
CC  
V
2
4
OLoff  
t
Open load blanking time  
Voltage drop on DIAG  
200  
μs  
V
BKT  
V
I
= 4 mA  
DIAG  
1
DIAG  
VCC ≤ 36 V  
110  
180  
2.1  
4.6  
1.7  
4.2  
I
DIAG pin leakage current  
μA  
DIAG  
36 V ˂ VCC ≤ 60 V  
IPS161HF  
IPS160HF  
IPS161HF  
IPS160HF  
1.3  
3.0  
0.7  
2.5  
Output current limitation  
activation threshold  
I
PK  
VCC ≤ 24 V, RLOAD ≤ 10 mΩ  
A
I
Output current limitation  
LIM  
Programmable by the external  
capacitor on CoD pin. Cut-off is  
disabled when CoD pin is connected  
to GND through 1 kΩ resistor.  
t
t
50xC  
[nf] ± 35%(1)  
Cut-off current delay time  
coff  
COD  
μs  
T ˂ T  
J
JSD  
T ˂ T  
32xt  
COFF  
[μs] ±40%  
Output stage restart delay time  
Junction temperature shutdown  
res  
J
JSD  
T
150  
170  
15  
190  
JSD  
°C  
Junction temperature thermal  
hysteresis  
T
JHYST  
1. The formula is guaranteed in the range 10 nF ≤ C  
≤ 100 nF.  
COD  
DS13271 - Rev 2  
page 9/27  
 
 
IPS160HF, IPS161HF  
Output logic  
5
Output logic  
Table 9. Output stage truth table  
Operation  
IN  
OUT  
DIAG  
L
L
H
H
Normal  
H
H
L
L
L
L
L
Cut-off  
H
L
L
L
L
L
Overtemperature  
Open load  
H
H(1)  
H
L (1)  
H
L
H
X
X
L
L
X
X
UVLO  
1. External pull-up resistor is used  
DS13271 - Rev 2  
page 10/27  
 
 
 
IPS160HF, IPS161HF  
Protection and diagnostic  
6
Protection and diagnostic  
The IC integrates several protections to ease the design of a robust application.  
6.1  
6.2  
Undervoltage lock-out  
The device turns off if the supply voltage falls below the turn-off threshold (VUV(off)). Normal operation restarts  
after VCC exceeds the turn-on threshold (VUV(on)). Turn-on and turn-off thresholds are defined in Table 4. Supply.  
Overtemperature  
The output stage turns off when its internal junction temperature (TJ) exceeds the shutdown threshold TJSD  
.
Normal operation restarts when TJ comes back below the reset threshold (TJSD - TJHYST), see Table 8. Protection  
and diagnostic. The internal fault signal is set when the channel is off due to thermal protection and it is reset  
when the junction triggers the reset threshold. This same behavior is signaled on the DIAG pin.  
6.3  
Cut-off  
The IC can limit the output current at the power stage by its embedded output current limitation circuit.  
This circuit continuously monitor the output current and, when load is increasing, at the triggering of its activation  
threshold (Ipk) it starts limiting to ILIM limitation level: while current limitation is active the IC enters an high  
dissipation status.  
The IPS160HF implements the cut-off feature which limits the duration of the current limitation condition.  
The duration of the current limitation condition (Tcoff) can be set by a capacitor (CCoD) placed between CoD and  
GND pins. The design rule for CCoD is:  
tcoff[us] ±35% = 50 x Ccod[nF]  
The ±35% drift is guaranteed in the range of 10 nF < Ccod < 100 nF; lower capacitance than 10 nF can be used.  
If ILIM threshold is triggered, the output stage remains in the current limitation condition (IOUT = ILIM) no longer  
than tCOFF. If tCOFF elapses, the output stage turns off and restarts after the tRES restart time.  
Thermal shutdown protection has higher priority than cut-off:  
IC is forced off if TJSD is triggered before tCOFF elapses  
if TJSD is triggered, IC is maintained off even after the tRES has elapsed and until the TJ falls below TJSD  
-
TJHYST  
DS13271 - Rev 2  
page 11/27  
 
 
 
 
IPS160HF, IPS161HF  
Cut-off  
Figure 6. Current limitation and cut-off  
I
OUT  
t
t
COFF  
I
LIM  
T
T
<
JSD  
J
t
t
t
PD(L-H)  
PD(H-L)  
V
IN  
t
V
DIAG  
t
The fault condition is reported on the DIAG pin. The internal cut-off flag signal is latched at output switch-off and  
released after the time tRES, the same behavior is signaled on DIAG pin.  
The status of the DIAG is independent on the IN pin status.  
If CoD pin is connected to GND through 1 kΩ resistor (cut-off feature disabled), when the output channel triggers  
the limitation threshold, it remains on, in current limitation condition, until the input becomes LOW or the thermal  
protection threshold is triggered.  
In case of low ambient temperature conditions (TAMB < -20 °C) and high supply voltage (VCC > 36 V), the cut-off  
function requires activation in order to avoid damaging the IC.  
The following table shows the suggested cut-off delay for different operating voltages.  
Table 10. Minimum cut-off delay for TAMB less than -20 °C  
V
[V]  
Cut-off delay [μs]  
Cut-off capacitance [nF]  
CC  
36-48  
48-60  
100  
50  
2.2  
1
DS13271 - Rev 2  
page 12/27  
 
 
IPS160HF, IPS161HF  
Open load in off-state  
6.4  
Open load in off-state  
The IC provides the open load detection feature which detects if the load is disconnected from the OUT pin. This  
feature can be activated by a resistor (RPU) between OUT and VCC pins.  
Figure 7. Open load off-state  
Application board  
SUPPLY RAIL  
IC  
VCC  
VCC  
EXPOSED PAD  
RPU  
Open load  
detection signal  
+
-
OUT  
VOLOFF  
RI  
RLED  
RLOAD  
PGND  
GROUND PLANE  
In case of wire break and during the OFF state (IN = low), the output voltage VOUT rises according to the  
partitioning between the external pull-up resistor and the internal impedance of the IC (130 kΩ < RI < 360 kΩ).  
The effect of the LED (if any) on the output pin has to be considered as well. In case of wire break and during the  
ON state (IN = high), the output voltage VOUT is pulled up to VCC by the low resistive integrated switch. If the load  
is not connected, in order to guarantee the correct open load signalization it must result:  
VOUT > VOLoff(max.)  
Referring to the circuit in Figure 7. Open load off-state:  
V
= V − R × I  
CC PU PU  
= V − R × I + I  
CC PU RI  
+ I  
RL  
(1)  
(2)  
OUT  
LED  
therefore:  
V
− V  
OLoff max  
CC min  
R
<
PU  
V
V
− V  
OLoff max  
OLoff max  
LED  
+
RI min  
R
LED  
If the load is connected, in order to avoid any false signalization of the open load, the following condition must  
hold:  
VOUT < VOLoff(min)  
By taking into account the circuit in figure 6:  
V
V
− V  
LED  
V
OUT  
R
L
OUT  
OUT  
V
= V − R × I  
= V − R ×  
PU  
+
+
(3)  
(4)  
OUT  
CC  
PU PU  
CC  
R
R
I
LED  
so:  
V
− V  
CC max  
OLoff min  
− V V  
OLoff min  
R
>
PU  
V
V
OLoff min  
OLoff min  
LED  
+
+
RI max  
R
R
L
LED  
The fault condition is signaled on the DIAG pin and the fault reset occurs when load is reconnected.  
If the channel is switched on by the IN pin, the fault condition is no longer detected.  
DS13271 - Rev 2  
page 13/27  
 
 
IPS160HF, IPS161HF  
VCC disconnection protection  
When an inductive load is driven, some ringing of the output voltage may be observed at the end of the  
demagnetization. In fact, the load is completely demagnetized when ILOAD = 0 A and the OUT pin remains floating  
until next turn-on. In order to avoid false detection of the open load event when driving inductive loads, the open  
load signal is masked for tBKT. So, the open load is reported on the DIAG pin with a delay of tBKT and if the open  
load event is triggered for more than tBKT  
.
6.5  
VCC disconnection protection  
The IC is protected despite the VCC disconnection event. This event is intended as the disconnection of the VCC  
wire from the application board, see figure below. When this condition happens, the IC continues working  
normally until the voltage on the VCC pin is ≥ VUVOFF. Once the VUVOFF is triggered, the output channel is turned  
off independently on the input status. In case of inductive load, if the VCC is disconnected while the output channel  
is still active, the IC allows the discharge of the energy still stored in the inductor through the integrated power  
switch.  
Figure 8. VCC disconnection  
APPLICATION BOARD  
VCC >VUVOFF  
SUPPLY RAIL  
VCC  
EXPOSED  
PAD  
ON  
DRIVING  
CIRCUITRY  
CVCC  
OUT  
IC  
GND  
GROUND PLANE  
DS13271 - Rev 2  
page 14/27  
 
 
IPS160HF, IPS161HF  
GND disconnection protection  
6.6  
GND disconnection protection  
GND disconnection is intended as the disconnection event of the application ground, see figure below. When this  
event happens, the IC continues working normally until the voltage between VCC and GND pins of the IC is  
≥ VUVOFF. The voltage on GND pin of the IC rises up to the supply rail voltage level. In case of GND  
disconnection event, a current (ILGND) flows through OUT pin. Table 4. Supply shows IOUT = ILGND for the worst  
case GND disconnection event where the output is shorted to ground.  
Figure 9. GND disconnection  
APPLICATION BOARD  
SUPPLY RAIL  
VCC  
VCC  
EXPOSED  
ON  
DRIVING  
CIRCUITRY  
PAD  
CVCC  
OUT  
IC  
LOAD  
GND  
GROUND PLANE  
DS13271 - Rev 2  
page 15/27  
 
 
IPS160HF, IPS161HF  
Active VDS clamp  
7
Active VDS clamp  
Active clamp is also known as fast demagnetization of inductive loads or fast current decay. When a high-side  
driver turns off an inductance, an undervoltage is detected on output.  
The OUT pin is pulled down to Vdemag. The conduction state is modulated by internal circuitry in order to keep the  
OUT pin voltage at about Vdemag until the load energy has been dissipated. The energy is dissipated both in the  
IC internal switch and in the load resistance.  
Figure 10. Active clamp equivalent principle schematic  
APPLICATION BOARD  
SUPPLY RAIL  
IC  
Clamp  
circuitry  
V
CC  
EXPOSED PAD  
OUT  
L
LOAD  
GND  
GROUND PLANE  
DS13271 - Rev 2  
page 16/27  
 
 
IPS160HF, IPS161HF  
Active VDS clamp  
Figure 11. Fast demag waveforms  
IOUT  
tON  
tDEMAG  
ILOAD  
t
VOUT  
VCC  
t
VCC-VDEMAG  
VIN  
t
The demagnetization of inductive load causes large electrical and thermal stress on the IC. The plot below shows  
the maximum demagnetization energy that the IC can tolerate in a single demagnetization pulse with VCC = 24 V  
and TAMB = 125 °C. If higher demagnetization energy is required, then an external free-wheeling Schottky diode  
has to be connected between OUT (cathode) and GND (anode) pins. Note that in this case the fast  
demagnetization is inhibited.  
DS13271 - Rev 2  
page 17/27  
 
IPS160HF, IPS161HF  
Active VDS clamp  
Figure 12. Typical demagnetization energy (single pulse) at VCC = 24 V and TAMB = 125 °C  
4000  
3500  
3000  
2500  
2000  
1500  
1000  
500  
0
500  
700  
900  
1100  
1300  
1500  
[mA]  
1700  
1900  
2100  
2300  
2500  
I
LOAD  
DS13271 - Rev 2  
page 18/27  
 
IPS160HF, IPS161HF  
Package information  
8
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,  
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product  
status are available at: www.st.com. ECOPACK is an ST trademark.  
DS13271 - Rev 2  
page 19/27  
 
IPS160HF, IPS161HF  
PowerSSO12 package information  
8.1  
PowerSSO12 package information  
Figure 13. PowerSSO12 package outline  
7392413 rev. D  
DS13271 - Rev 2  
page 20/27  
 
 
IPS160HF, IPS161HF  
PowerSSO12 package information  
Table 11. PowerSSO12 package mechanical data  
mm  
Dim.  
Min.  
1.250  
0.000  
1.100  
0.230  
0.190  
4.800  
3.800  
Typ.  
Max.  
1.700  
0.100  
1.600  
0.410  
0.250  
5.000  
4.000  
A
A1  
A2  
B
C
D
E
e
0.800  
H
5.800  
0.250  
0.400  
0d  
6.200  
0.55  
h
L
1.270  
8d  
k
X
1.900  
3.600  
2.500  
4.200  
0.100  
Y
ddd  
Note:  
Dimension D doesn't include mold flash protrusions or gate burrs. Mold flash protrusions or gate burrs don't  
exceed 0.15 mm in total both side.  
Figure 14. PowerSSO12 recommended footprint  
DS13271 - Rev 2  
page 21/27  
 
 
IPS160HF, IPS161HF  
PowerSSO12 package information  
Figure 15. PowerSSO12 tape packing information [mm]  
Figure 16. PowerSS012 reel packing information [mm]  
DS13271 - Rev 2  
page 22/27  
 
 
IPS160HF, IPS161HF  
Revision history  
Table 12. Document revision history  
Date  
Revision  
Changes  
23-Apr-2020  
26-Jun-2020  
1
2
Initial release.  
IPS161HF RPN added to document  
DS13271 - Rev 2  
page 23/27  
 
 
IPS160HF, IPS161HF  
Contents  
Contents  
1
2
3
4
5
6
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3  
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5  
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6  
Output logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10  
Protection and diagnostic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
6.1  
6.2  
6.3  
6.4  
6.5  
6.6  
Undervoltage lock-out. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Overtemperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Cut-off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Open load in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
VCC disconnection protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14  
GND disconnection protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15  
7
8
Active clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16  
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19  
8.1  
PowerSSO12 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23  
DS13271 - Rev 2  
page 24/27  
IPS160HF, IPS161HF  
List of tables  
List of tables  
Table 1.  
Table 2.  
Table 3.  
Table 4.  
Table 5.  
Table 6.  
Table 7.  
Table 8.  
Table 9.  
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Switching (VCC = 24 V; -40 °C < TJ < 125 °C, RLOAD = 48 Ω). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Output stage truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Table 10. Minimum cut-off delay for TAMB less than -20 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Table 11. PowerSSO12 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Table 12. Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
DS13271 - Rev 2  
page 25/27  
IPS160HF, IPS161HF  
List of figures  
List of figures  
Figure 1.  
Figure 2.  
Figure 3.  
Figure 4.  
Figure 5.  
Figure 6.  
Figure 7.  
Figure 8.  
Figure 9.  
Figure 10.  
Figure 11.  
Figure 12.  
Figure 13.  
Figure 14.  
Figure 15.  
Figure 16.  
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Reverse polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Timing in normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Propagation delay at start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Current limitation and cut-off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Open load off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
VCC disconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
GND disconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Active clamp equivalent principle schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Fast demag waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Typical demagnetization energy (single pulse) at VCC = 24 V and TAMB = 125 °C . . . . . . . . . . . . . . . . . . . . . 18  
PowerSSO12 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
PowerSSO12 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
PowerSSO12 tape packing information [mm] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
PowerSS012 reel packing information [mm] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
DS13271 - Rev 2  
page 26/27  
IPS160HF, IPS161HF  
IMPORTANT NOTICE – PLEASE READ CAREFULLY  
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST  
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST  
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of  
Purchasers’ products.  
No license, express or implied, to any intellectual property right is granted by ST herein.  
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service  
names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2020 STMicroelectronics – All rights reserved  
DS13271 - Rev 2  
page 27/27  

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