L3000SX-77 [STMICROELECTRONICS]
SUBSCRIBER LINE INTERFACE KIT; 用户线接口KIT
| 型号： | L3000SX-77 |
| 厂家： | 
ST |
| 描述： | SUBSCRIBER LINE INTERFACE KIT |
| 文件： | 总29页 (文件大小：281K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
L3000S
L3030
SUBSCRIBER LINE INTERFACE KIT
PRELIMINARY DATA
.
PROGRAMMABLE DC FEEDING RESIS-TAN-
CEAND LIMITINGCURRENT (fourvaluesavai-
lable)
THREE OPERATING MODES :
STAND-BY, CONVERSATION, RINGING
NORMAL/BOOSTBATTERY,DIRECT/REVER-
SE POLARITY
SIGNALLINGFUNCTION (off-hook/GND-key)
FILTERED OFF-HOOK DETECTION IN
STAND-BY (10ms)
.
.
.
.
PLCC44
FLEXIWATT15
.
QUICK OFF-HOOK DETECTION IN CONVER-
SATION (< 1ms) FOR LOW DIAL PULSE DE-
TECTION DISTORTION
.
HYBRID FUNCTION
.
RINGING GENERATION WITH QUASI ZERO
OUTPUT IMPEDANCE, ZERO CROSSING IN-
JECTION (no ext. relay needed) AND RING
TRIP DETECTION
PowerSO20
slug-up
slug-down
.
.
AUTOMATIC RINGING STOP WHEN OFF-
HOOK IS DETECTED
PARALLEL AND SERIAL DIGITAL INTERFA-
ORDERING NUMBERS :
L3030 (PLCC44)
L3000SX-VM (FLEXIWATT15)
L3000SX (PowerSO20 slug-up)
L3000SX-77 (PowerSO20 slug-down)
CES
.
.
TELETAXESIGNALINJECTION(2VRMS/5VRMS
)
LOW NUMBER OF EXTERNAL COMPO-
NENTS
GOOD REJECTION OF THE NOISE ON BAT-
TERY VOLTAGE (20dB at 10Hz and 35dB at
1kHz)
POSSIBILITY TO WORK ALSO WITH HIGH
COMMON MODE CURRENTS
INTEGRATED THERMAL PROTECTION WITH
THERMAL OVERLOADINDICATION
SURFACE MOUNT PACKAGE
(PLCC44 + PowerSO-20)
Additionalfunctions, such as batteryreversal, extra
batteryuse, lineovervoltagesensing andmetering-
pulse injection are also featured ; most external
characteristics,asACandDCimpedances,arepro-
grammablewithexternalcomponents.TheSLICin-
jects ringing in balanced mode and for that,as well
as for the operation in battery boosted, a positive
batteryvoltage shall be available on thesubscriber
card.As the rightringing signalamplification bothin
voltage and in currentis provided by SLIC, thering
signalgeneratorshall onlyprovidea lowlevelsignal
(0.285Vrms).
.
.
.
.
DESCRIPTION
The ST SLIC KIT (L3000S/L3030)is a set of solid
statedevicesdesignedto integratemain of the fun-
ctions needed to interface a telephoneline. It con-
sists of 2 integrated devices : the L3000S line
interfacecircuit and the L3030control unit.
Thiskit performsthe main featuresof the BORSHT
functions:
Thiskit is fabricatedusing a 140VBipolartechnolo-
gy for L3000Sand a 12VBipolar I2L technologyfor
L3030.
L3030 is available PLCC44 and L3000S in both
FLEXIWATT15andPowerSO-20forsurfacemount
application.
This kit is suitable for all the following applications:
C.O.(CentralOffice),DLC(DigitalLoopCarrier)and
high range PABX (Private Automatic Branch Ex-
change).
Batteryfeed
-
Ringing
-
Signalling
Hybrid
-
-
June 1997
1/29
L3000S - L3030
PIN CONNECTIONS (top view)
FLEXIWATT15
PLCC44
10
9
8
7
6
5
4
3
2
1
11
VB-
VBIM
VIN
VB-
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VB-
VB-
N.C.
TIP
12
13
14
15
16
17
18
19
20
AGND
REF
C1
RING
N.C.
IL
VDD
MNT
VB+
BGND
VB+
C2
IT
IT
BGND
VDD
C2
MNT
TIP
IL
C1
N.C.
RING
VB-
VIN
REF
AGND
VB-
N.C.
VB-
VBIM
VB-
D97TL290
D94TL125
PowerSO-20 (slug-down)
PowerSO-20 (slug-up)
2/29
L3000S - L3030
PIN DESCRIPTION (L3000S)
FLEX.
PSO
N
°
Name
Description
N
°
1
3
TIP
A line termination output with current capability up to 100mA (Ia is the current sourced
from this pin).
2
3
4
4
5
6
MNT
VB+
Positive Supply Voltage Monitor
Positive Battery Supply Voltage
BGND Battery ground relative to the VB+ and the VB– supply voltages.
It is also the reference ground for TIP and RING signals.
5
6
7
7
8
9
VDD
VIN
Positive Power Supply + 5V
2 wire unbalanced voltage input.
VBIM Output voltage without current capability, with the following functions :
- give an image of the total battery voltage scaled by 40 to the low voltage part.
- filter by an external capacitor the noise on VB–.
8
1, 10
11, 20
VB–
Negative Battery Supply Voltage
9
12
13
AGND Analog Ground. All input signals and the VDD supply voltage must be referred to this pin.
10
REF
Voltage reference output with very low temperature coefficient. The connected resistor
sets internal circuit bias current.
11
12
13
14
15
16
C1
C2
IT
Digital signal input (3 levels) that defines device status with pin 12.
Digital signal input (3 levels) that defines device status with pin 11.
High precision scaled transversal line current signal.
I + Ib
a
IT =
100
14
17
IL
Scaled longitudinal line current signal.
I
b − Ia
IL =
100
15
–
19
RING B line termination output with current capability up to 100mA (Ib is the current sunk into
this pin).
2, 18
N.C.
Not connected
Notes: 1) Unless otherwise specified all the diagrams in this datasheet refers to the FLEXIWATT15 pin connection.
2) All informations relative to the PowerSO-20 package option should be considered as advanced information on a new product
now in development or undergoing evaluation. Details are subject to change without notice.
3/29
L3000S - L3030
PIN DESCRIPTION (L3030)
Pin
Symbol
Function
1
TST
This pin is connected internally for test purpose. It should not be used as a tie point for
external components.
2
3
4
5
6
7
8
9
REF
AGND
VSS
VDD
N.C.
CZS
ACF
ZAC
Bias Set
Analog Ground
– 5V
+ 5V
Not connected.
AC Feedback Input
AC Line Impedance Synthesis
AC Impedance Adjustement
10
11
12
These pins are connected internally for test purpose. It should not be used as a tie point
for external components.
TST
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
VOUT
CM
Two wire unbalanced output.
Capacitor Multiplier Input
DC Feedback Input
Transversal Line Current
DC Feeding System
Read/write Command
Chip Select Command
Data Input/output
RC
IT
RDC
EIA
NCS
DIO
DCKL
DGND
N.C.
N.C.
N.C.
CI
Clock Signal
Digital Ground
Not connected.
Not connected.
Not connected.
Input/output Changing Command
State Control Signal 1
State Control Signal 2
Not connected.
C1
C2
N.C.
N.C.
IL
Not connected.
Longitudinal Line Current
Ringtrip Det. & TTX Shaping
Teletaxe Signal Input
TTX Filter Level Compensation
TTX Filter Input
CRTS
TTXIN
RGTTX
TTXF
ZB
Balancing Network
37
38
39
These pins are connected internally for test purpose. It should not be used as a tie point
for external components.
TST
40
41
42
TX
4W Sending Output
RX/RG
VBIM
4W Receiving and Ring Input
Battery Image Input
43
44
These pins are connected internally for test purpose. It should not be used as a tie point
for external components.
TST
4/29
L3000S - L3030
L3000S BLOCK DIAGRAM
L3030 BLOCK DIAGRAM
5/29
L3000S - L3030
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
Vb–
Vb+
Negative Battery Voltage
Positive Battery Voltage
– 80
80
V
|Vb–| + |Vb+| Total Battery Voltage
140
V
Vdd
Vss
Positive Supply Voltage
Negative Supply Voltage
+ 6
V
– 6
5
V
V
agnd – Vbgnd Max. Voltage between Analog Ground and Battery Ground
V
Tj
Max. Junction Temperature
Storage Temperature
+ 150
°
°
C
C
Tstg
– 55 to + 150
THERMAL DATA
Symbol
Parameter
Value
Unit
L3000S HIGH VOLTAGE
Flexiwatt
PWSO20
Typ. 2
Rth j-case
Rth j-amb
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
Max. 4
°C/W
°C/W
Max. 50
Max. 60
L3030 LOW VOLTAGE
Rth j-amb
Max. Resistance Junction to Ambient
80
°
C/W
OPERATING RANGE
Symbol
Parameter
Operating Temperature Range
Min.
0
Typ.
Max.
70
Unit
Toper
Vb–
C
°
Negative Battery Voltage
Positive Battery Voltage
Total Battery Voltage
– 70
0
– 48
+ 72
120
– 24
+ 75
130
V
Vb+
V
V
Vb– + Vb+
Vdd
Positive Supply Voltage
Negative Supply Voltage
Total Line Current (IL + IT)
+ 4.5
– 5.5
+ 5.5
– 4.5
85
V
Vss
V
Imax
mA
FUNCTIONAL DESCRIPTION
L3000S - High Voltage Circuit
Thetwo groundshouldbe shortedtogetherata low
impedancepoint.
L3030 - Control Unit
TheL3000Slineinterfaceprovidesabatteryfeeding
fortelephonelinesandringing injection.TheICcon-
tainsastatedecoderthatunderexternalcontrolcan
force the following operational modes : stand-by,
conversationand ringing.
The L3030low voltagecontrolunit controls L3000S
line interface module,giving the proper information
to set line feed characteristic, to inject ringing and
TTXsignal andsynthetizesthelineandbalanceim-
pedances.An on chip digital interfaceallows a mi-
croprocessor to control all the operations. L3030
definesworking statesof line interface and also in-
formsthe card controllerabout line status.
In addition Power down mode can be forced con-
necting the bias current resistor to VDD or leavingit
open.
Twopins,IL andIT, carryouttheinformationconcer-
ninglinestatuswhich isdetectedby sensingtheline
currentinto the outputstage.
L3000S - Working States
In order to carry out the different possible opera-
tions,the L3000Shas several differentworkingsta-
tes.Eachstateisdefinedbythevoltagerespectively
applied by pins 27 and 28 of L3030 to the pins 11
and 12 of L3000S.
The L3000Samplifies both the AC and DC signals
enteringat pin 6 (VIN) by a factorequal to 40.
Separategroundsare provided :
- Analog ground as a referencefor analog signals
- Battery ground as a reference for the output sta-
ges
Three differentvoltage levels (– 3, 0, + 3) are avai-
lable at each connection, so defining nine possible
6/29
L3000S - L3030
Table 1.
Pin 28 of L3030 / Pin 12 of L3000S (C2)
+ 3
0
– 3
+ 3
0
Stand-by
Conversation in Normal
Battery Direct Polarity
Conversation in Normal
Battery Reverse Polar
Pin 27 of L3030
Pin of L3000S
Not allowed.
Not allowed.
Conversation in Boost
Battery Direct Polarity
Conversation in Boost
Battery Reverse Polar
11
– 3
Ringing with Direct
Polarity
Not allowed.
statesas listed in Table. 1.
is inOnhookandPD statusonlyin emergencycon-
ditionwhen it is mandatory to cut any possible dis-
sipationbut no operationare requested.
Appropriate combinations of two pins define the
three modesof the ST SLIC, that are :
a) Stand-by(SBY)
b) Conversation (CVS), Normal and Reverse pola-
rity
c) Ringing (RING)
d) BoostBattery(BB), Normal and Reversepolarity
OPERATING MODES
Stand-by (SBY) Mode
In this mode, the bias currents of both L3000S and
L3030arereducedasonlysomepartsofthetwocir-
cuits are completely active, control interface and
currentsensors among them. The current supplied
tothe line is limited at 7mA,and the slope of theDC
characteristiccorresponds to :
A fifth status,Powerdown (PD), can be set discon-
nectingthebiasresistor(RH)frompin10 ofL3000S
by means of an external transistor.
The main differencebetween Stand-by and Power
down is that in SBY the power consumptionon the
voltage battery VB– (– 48V) is reduced but the
L3000SDC feedingand monitoring circuits are still
active. In PD the power consumption on VB- is re-
duced to zero, and the L3000S is completely swit-
chedoff.
2
R = x (RFS + 2RP)
3
TheLinevoltageinon Hookconditionisjustthebat-
teryvoltageminusthevoltagedrop(approx.15V)of
the outputstage amplifiers (see Fig. 1).
TheSBYstatusshouldbeusedwhenthe telephone
Figure 1 : DC Characteristics in Stand-byMode.
7/29
L3000S - L3030
The AC characteristic is just the resistance of the
two serial resistors RP.
Serial Interface.
1) Normal Battery (NB)
2) Boost Battery(BB)
InStand-bymodethe batterypolarity is just indirect
condition,thatis the TIPwiremorepositivethanthe
RING one ; boost batteryis not achievable. There
are two possible line conditions where the SLIC is
expectedto be in stand-bymode :
Itisalsopossibleto select(BIT4R)thepolarityofthe
DC line voltage and (BIT6R-BIT7R) one of the four
values of limiting current (25mA or 30mA or 45mA
or 70mA).
1) ON-HOOK (Iline < 5mA). Normal on-hook
condition.
2) OFF-HOOK (Iline > 7mA).Handset is unhooked,
the SLIC is waiting for command to activate
conversation.
Batteryreverse can take place either before or du-
ring conversation.
As far as the DC characteristicin Normal Batteryis
concerned, three different feeding conditions are
present:
When the SLICis in stand-bymode, the powerdis-
sipationof L3000Sdoes not exceed 120mW (from
-48V) eventually increased of a certain amount if
some current is flowing into the line.
a) currentlimiting region; theDC impedanceof the
SLICis very high (> 20 Kohm)and therefore the
systemworkslikeacurrentgenerator,thecurrent
value being set through the digital interface
(25/30/45/70mA).
The powerdissipation of L3030in the same condi-
tion, is typically 120mW.
b) standard feeding system region
;
the
The Stand-byMode is setwhenthe byte sentto the
L3030 Serial Digital Interface has the first two bits
(BIT0R and BIT1R) equal to ”0”.
characteristicis equal to a – 48V (– 60V)battery
(note1),inserieswithtworesistors,whosevalue
is set by external components (see external
componentlist of L3030).
Settingto 0 allthe 8bitsof thecommandsentto the
digital interface of L3030, the bias currents of both
L3000S and L3030 are reduced and only some
parts of the two circuits are active similarly to the
stand-by mode ; in this situation, named power-
down denial, the line sensors are disabled
(ON/OFF-HOOKline conditionscannotbe recogni-
zed)and the currentsuppliedto thelineis limited at
0.25mA.
c) low impedance region ; the battery value is
reducedto 33V(45V)and theserial resistanceis
reducedto the value specifiedin standby mode,
2
that is : x (RFS+ 2RP)
3
Switchingbetweenthethree regionis automaticwi-
thout discontinuity, and depends on the loop resi-
stance.Fig. 2 showstheDCcharacteristicin normal
batterycondition.
Conversation(CVS) or Active Mode
Inconversationmodeitis possibletoselectbetween
twodifferentDCCharacteristicsbythe BIT5Rofthe
Whentheboostbatteryconditionisactivatedthelow
impedanceregion can never be reached by the sy-
Figure 2 :
DCCharacteristic (n.b.) ILIM = 25/30/45/70mA.
Note : 1. This value of voltage battery, named apparent battery, is fixed internally by the control unit and is independent of the actual battery
value. So, the voltage drop in the lowimpedance regionis 15V.It is alsopossible toincrease up to 25V this valuesetting BIT3R to1.
8/29
L3000S - L3030
stem ; in this case the internal dropout voltage is
equal to 30V.
of which being:
1) the line impedance(Zline),
2) the SLIC impedance at line terminals (ZML),
3) thenetworkZAconnectedbetweenpin36and41
ofL3030(see externalcomponentlist of L3030),
4) the network ZB between pin 36 and ground that
shall copy the line impedance.
Fig. 3 shows the DC characteristic in boost battery
condition.
Inconversationmode, onrequestofcontrolproces-
sor, whatevercondition is set (normal or boostbat-
tery, direct or reverse polarity), you can inject the
12kHz(or16kHz)signal(permanentlyappliedatthe
pin 33 with 950mVrmstyp. amplitude),as metering
pulses. A patentedautomaticcontrol systemadjust
the level of the metering signal, across the line, to
2Vrmssetting BIT3 = 0, or to 5Vrms setting BIT3 =
1 ; this,regardlessof the lineimpedance.Moreover
the metering signal is rampedat the beginningand
atthe endof eachpulseto preventundesirableclic-
king noise ; the slope is determined by the value of
CINT (see the external component list of L3030).
The SLIC also provides, in the transmit direction
(fromlineto4-wireside),an amplifiertoinsertanex-
ternalnotchfilter (series resonator)for suppressing
the 12/16kHz residualsignal.
Fora perfectbalancing,the followingequationshall
be verified :
ZA ZML
=
ZB Zline
It is important to underline that ZA and ZB are not
obliged to be equal to ZML and to Zline, but they
bothmay be multiplied by a factor(up to ten)so al-
lowing use of smaller capacitors.
Inconversation,theL3000Sdissipatesabout250mW
foritsownoperation;thedissipationdependingonthe
current suppliedto the line shall be added.
Thefig5 andfig6showtheDCcharacteristicfortwo
differentFeedingresistance.
Fig.4 showsa suggestednotchFilterconfiguration.
2 x 200 Ohm and 2 x 400 respectively.
The meteringpulses can be injected with a DC line
currentequal to zero (ON-HOOK Operation).
Figure 3 : DC Characteristic (b.b.)
Ifteletaxis not used the notchfiltercan be replaced
by a 1KΩ resistor.
I
LIM = 25/30/45/70mA.
InconversationmodetheACimpedanceatthelineter-
minals,ZML,issynthetizedbytheexternalcomponents
ZACandRP, accordingto thefollowingformula:
ZML = ZAC + (RP1 + RP2)
Dependingon the characteristicof the ZACnetwork,
ZMLcanbe eithera pureresistanceoracomplexim-
pedance,soallowingSTSLICtomeetdifferentstand-
ards as far as the return loss is concerned. The
capacitorCCOMP guaranteesstabilityto the system.
The two-to-four wire conversion is achieved byme-
ansof aWheatstonebridge configuration,the sides
Figure 4 : ExternalTeletaxe Filter.
1
f
=
2π √LxC
R2 x R4 xR5
R3
L
xC2
=
9/29
L3000S - L3030
Figure 5 : DCCharacteristic for 2 x 200 ohm Feeding System.
Figure 6 : DC Characteristicfor 2 x 400 ohm Feeding System.
Figure 7 : LineCurrent Versus Loop Resistance, RFS = 200Ω, RP = 30Ω, VB– = –48V.
10/29
L3000S - L3030
Ringing Mode
tied to a voltagebetween 4 and 5V).
Whenringingis selected(BIT2R= 1,BIT0R=0),the
control unit L3030 presets the L3000S to operate
between– 48V (– 60V)and + 72V(+ 60V) battery.
Then,settingBIT1=1, alowlevelsignal(0.285Vrms
with frequencyrange 16-66Hz)appliedto pin 41, is
amplifiedand injected in balancedmode to the line
throughL3000Switha superimposedDC voltageof
24V. The impedance to the line is given by the two
external resistors and the 24V DC polarity can only
be direct.
1) Serial Mode
The five wires of the digitalinterface havethe follo-
wing functions :
- clock (DCLK), entering at pin 21
- data in/dataout (DIO), exchangedat pin 20
- input/outputselect (EIA), entering at pin 18
- chip select (NCS), entering at pin 19
- changeNCS from in to out (CI), enteringat pin26
(note1)
The maximum clock frequency is 600Khz.
Thefirstandthelastringingcyclesaresynchronized
by L3030 so that ringing always starts and stops at
zero crossing. Ring trip detection is performed au-
tonomouslybytheSLIC,withoutanyparticularcom-
mand, using a patentedsystem ; when handset is
lifted, SLIC suspends the ringing signal just remai-
ningintheringingmode.Inthiscondition,thecontrol
unit L3030 checks that the loop is closed for a time
equalto two periods of the ringingsignal ; if the clo-
sure is confirmed, a flag (BIT0T = 1) is set and the
SLICwaits the new command from the controlpro-
cessor. Whereas the loop closure is not confirmed,
theringingsignalis newlyappliedto theline,without
settingBIT0T.
WhenEIAsignalis lowdataaretransferredfromthe
card controllerinto I/O registersof the L3030selec-
ted by NCS signal tied at low level ; then data are
latchedfor execution.In thisphasea complete8 bit
wordis loadedintointernalregisterandconsequen-
tly NCS signal must remain low for the correspon-
ding 8 clock pulses (DCLK). The EIA signal must
remainat lowlevelatleastforthetimeinwhichNCS
signal remain low. Thedeviceload data in input re-
gister during the positive edge of clock signal
(DCLK)andstorethecontentsoftheregisteron the
positive edge of NCS signal.
When EIA signal is high data are transferred from
the L3030 selected by NCS tied to low level to the
card controller. The L3030 status is described by
five bits contained in the output register ; the NCS
signalcanremainlowforfiveor lessclockpulsesde-
pendingif the card controllerwant to read thecom-
pleteL3030 status or only a part of it.
DIGITAL INTERFACE
Functional Description
The L3030 states and functions are controlled by
central processorthrough five wires defininga digi-
talinterface.Itis possibletoselecttheinterfacewor-
king mode between SERIAL or PARALLEL(pin 33
Fig.8,9 showthe completewriteandreadoperation
timing. Table 1 showsthemeaning of eachbit ofan
I/O data.
11/29
L3000S - L3030
Table 1 :
Serial Mode.
Meaning
Value
Data in (note 2)
BIT0R = Impedance (note 3)
BIT1R = TTX & Ring Timing (note 4)
BIT2R = Ring (note 5)
0 - Stand-by/ringing
1 - Conversation
0 - Timing off
1 - Timing on
0 - TTX Signal Injection
1 - Ring Signal Injection
BIT3R = TTX Level
0 - Low Amplitude (2VRMS)
1 - High Amplitude (5VRMS
0 - Normal Polarity
1 - Reverse Polarity
0 - Normal Battery
)
BIT4R = Battery Polarity
BIT5R = Extra Feeding
1 - Boosted Battery
BIT6R
0
25mA
0
0
30mA
1
1
45mA
1
1
70mA
0
Current
Limiting
BIT7R
Data Out (note 6)
BIT0T = Line Supervision
0 - On Hook
1 - Off Hook
BIT1T = Ground Key
1 - Long. Line Current < 17mA
0 - Long. Line Current > 17mA
BIT2T = Internal Line Current Limiter (note7)
BIT3T = Line Voltage
0 - Off
1 - On
0 - Normal
1 - Minus of Half Battery
1 - Off
BIT4T = Thermal Overload (note 8)
0 - On
Notes : 1. When CI signal is tied to low level, NCS signal is the chip select input ; with CI signal at high level, the NCS signal
becomes an output that carry out the logical sum of the following bits : BIT0T, BIT1T.
2. The description of the commands is referred to the system L3030 + LINE INTERFACE module.
3. To set SBY mode with Ilim = 7mA : BIT0R = 0 and at least one of the two last bits (BIT6R ; BIT7R) must be set to 1.
4. TTX and RING signals are injected into the line interface module with BIT1R to ”1”.
5. To set RING mode at least one of the three last bits (BIT5R, BIT6R, BIT7R) must be set to 1, in addi tion BIT0R
must be set to 0.
6. The description of the commands is referred to the system L3030 + LINE INTERFACE module.
7. The bit BIT2T is set to 1 when the SLIC is operating in Conversation Mode and into the limiting current region (short
loop).
8. The bit BIT4T is set to 1 when the junction temperature of L3000S is about 140°C.
12/29
L3000S - L3030
Figure 8 : Writing Operation Timing (serial mode).
Figure 9 : Reading OperationTiming (serial mode).
13/29
L3000S - L3030
2) Parallel Mode
In this operating mode the signalsat the inputsare
immediatelyexecuted,without anyexternalclockti-
ming; alltheinternalregistersarebypassed.Thein-
formations sent back on pins 19 and 20, display in
real time the settingof internalcircuits, that means
line status. In the table 2 the correspondencebet-
ween the interface wires in the parallel mode and
equivalent bit in serial mode is pointed out ; where
there isn’t this correspondence,the internal setting
is shown.
This operating mode is enabled connecting pin 33
toa voltageintherangefrom4V to 5V.Thefivewire
havethe following functions:
- powerdown/feeding(EIA), entering at pin 18
- timing (CI), enteringat pin 26
- ring (DCLK), enteringat pin 21
- on-hook/off-hook(NCS), outgoingat pin19
- ground-key(DIO), outgoingat pin20
Table 2 : Parallel Mode.
Pin
Rif.
Meaning (note 1)
PD/feeding
Eq. Bit of Ser. Interf.
Value
0 : High Impedance
1 : Low Impedance
0 : Ring Timing Off
1 : Ring Timing On
0 : No Ring
18
EIA
BIT0R
BIT1R
BIT2R
26
21
CI
Timing
Ring
DCKL
1 : Ring Injection
0 : Low Amplitude
0 : Normal Polarity
0 : Normal Battery
0 :
BIT3R
BIT4R
BIT5R
BIT6R
BIT7R
BIT0T
Line Curr. = 30mA
1 :
19
20
NCS
DIO
On-hook/off-hook
Ground Key
0 : On-hook
1 : Off-hook
BIT1T
1 : Long. Curr. < 17mA
0 : Long. Curr. > 17mA
BIT2T
BIT3T
BIT4T
Note : 1. The description of the commands is referred to the system L3030 + LINEINTERFACEmodule.
DIGITAL INTERFACE ELECTRICAL CHARACTERISTICS
(VDD = + 5V, VSS = – 5V, Tamb. = 25oC) (refer to PLCC44 package)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
STATIC ELECTRICAL CHARACTERISTICS
Vil
Vih
Iil
Input Voltage at Logical ”0”
Input Voltage at Logical ”1”
Input Current at Logical ”0”
Input Current at Logical ”1”
Output Voltage at Logical ”0”
Output Voltage at Logical ”1”
Tristate Leak. Current
Pins 18, 19, 20, 21, 26
0
0.8
5
V
V
2.0
Vil = 0V
200
10
A
A
µ
µ
Iih
Vih = 5V
Vol
Voh
Ilk
Pins 19, 20 Iout = – 1mA
Pins 19, 20 Iout = 1mA
Pin 20 NCS = ”1”
0.4
V
2.4
V
10
µ
A
14/29
L3000S - L3030
DIGITAL INTERFACE ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
DYNAMIC ELECTRICAL CHARACTERISTICS
fclk
Clock Frequency
1
600
50
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Tr, Tf
Clock Rise and Fall Time
Twh, Twl Clock Impulse Width
750
300
300
300
0
Tis
Tec
Tsc
Tsd
Thd
Tcs
Tca
Tac
Tzd
Tce
Tdz
Tdd
Tsi
CI to NCS Set up Time
”0” EIA to DCKL Set up Time
DCKL to NCS Delay (+ edge)
Data in Set up Time
Data in Hold Time
800
800
900
400
0
NCS to DCKL Hold Time
”0” EIA to DCKL Hold Time
”1” EIA to DCKL Set up Time
Data out to ”0” NCS Delay
”1” EIA to DCKL Hold Time
Data out to ”1” NCS Delay
Data out to DCKL Delay
”0” CI to NCS Hold Time
600
900
500
1500
300
OPERATION DESCRIPTION
conversion). It is usuallya compleximpedance.
- the ringing signal frequency Fr (ST SLIC allows
frequencyranging from 16 to 66Hz).
- the metering pulse frequency Ft (two values are
possible : 12kHzor 16kHz).
- the value of the two resistors RP1/RP2 in series
with the line terminals ; main purpose of the a.m.
resistors is to allow primary protection to fire. ST
suggest the minimum value of 50 ohm for each
side.
To set SLIC in operation the following parameters
haveto be defined :
- the DCfeedingresistanceRFS, definedasthe re-
sistanceof each sideof the traditionalfeedingsy-
stem (most common values are 200, 400 or 500
ohm).
- theAC impedanceat lineterminals,ZML, towhich
thereturnlossmeasurementreferences.It canbe
real (typically 600 ohm) or complex.
- the equivalent AC impedance of the line Zline,
when evaluating the trans hybrid loss (2/4 wire
Onthisassumptions,the following componentlistis
defined.
15/29
L3000S - L3030
EXTERNAL COMPONENT LIST FOR THE LINE INTERFACE
Component
Pin
Involved Parameter or Function
Ref.
Value
L3000S
10
1,15
7
RREF
RP
Bias Resistance
24.9k
1%
30 to 100
Ω ±
Line Series Resistor
Ω
CDVB
CVB+
CVB–
D1
Battery Voltage Rejection
Positive Battery Filter
Negative Battery Filter
Protective Shottky Diode
47 F – 20V
µ
3
0.1 F – 100V (1)
µ
8
0.1µF – 100V (2)
8
BAT 49X
L3030 (PLCC44)
4-3
5-3
CVSS
CVDD
RR
Negative Supply Voltage Filter
Positive Supply Voltage Filter
Capacitor Multiplier Gain (8)
0.1 F – 15V
µ
0.1µF – 15V
7-8
16K (range: 10 to 50K
Ω
Ω)
15-17
7-15
RDC
2 x (RFS – RP1)
1
DC Feeding Resistor (RDC > 270Ω)
AC Path decoupling
CAC1 (3)
6.28 x 250 x (ZAC+ RDC)
CAC1
14-15
8-9
CAC2
ZAC
ZML – (RP1 + RP2)
1/(6.28 x 150000 x (RPC))
RP1 + RP2
2 Wire AC impedance
8-9
CCOMP
RPC
RREF
ZB
AC loop compensation
9-14
2-3
Rp insertion loss compensation
Bias Resistance
24.9K 1%
Ω
36-3
36-41
K x Zline (note 4)
Line Impedance Balancing Network
SLIC Impedance Balancing Network (note 5)
ZL
K x RPC in Series with
K x ZAC // (CCOMP/K)
32-3
15-16
35
CINT
Ccon
(note 6)
Ring trip detection time constant
Interface Time Constant
Teletax filter.
0.15µF (note 7)
TTx FILT.
ZTTX = 1k 1% in speech band
Ω
ZTTX
0
Ω
at TTX freq. (note 9)
≈
34
RGTTX
Teletax filter.
10kΩ 1%
Notes :
1. In case line cards with less than 7 subscribers are implemented CVB– capacitor should be equal to 680nF/N where
N is the number of subscriber per card.
2. This shottky diode or equivalent is necessary to avoid to damage to the device during hot insertion or in all those
cases when a proper power up sequence cannot be guaranteed.
In case the shottky diode is not implemented the power sequence should guarantee that VB+ is always the last
supply applied at power on and the first removed at power off.
In case an other shottky diode type is adopted it must fulfill the following characteristics:
VF < 450mV @ IF = n 15mA, Tamb = 25 C
°
VF < 350mV @ IF = n 15mA, Tamb = 50°C (TjL3000 = 90°C)
VF < 245mV @ IF = n 15mA, Tamb = 85°C (TjL3000 = 120°C)
Where n is the number of line sharing the same diode.
3. If the internal capacity multiplier stage is not used, pin 7 must be connected with pin 14 without mounting RR and
CAC2. In this case CAC1 = 1/(6.28 x 30 x RDC).
4. The structure of this network shall copy the line impedance, in case multiplied by a factor K = 1....10
5. K as fixed at note 4.
6. CINT can have the following values :
Fr. (Hz)
16/18
560
18/21
470
21/26
390
26/31
330
31/38
270
38/46
220
46/57
180
57/66
150
CINT (nF)
7. Ccon is necessary to work ”without on/off hook detection-errors” during TTX-pulses.
8. RR is used by a capacitor multiplier circuit to synthetize an higher AC/DC splitting capacitor starting from CAC1
RR + ZML
and CAC2. Supposing CAC1 = CAC2 = CAC the synthetized capacitor value will be equal
9. If Teletax is not used the TTX FILT. can be replaced by a 1kΩ resistor.
CAC.
ZML
16/29
L3000S - L3030
Figure 10 : Typical ApplicationSchematic Diagram.
L3000S
Figure 11 : Typical ApplicationSchematic Diagram without Capacitor Multiplier.
L3000S
17/29
L3000S - L3030
ELECTRICAL CHARACTERISTICS (refer to the test circuits of the Figure 12, VDD = + 5V, VSS = -
5V, VB+ = + 72V, VB– = – 48V, Tamb = + 25oC, TTX FILT = 1kΩ)
Symbol
STAND-BY
Vls
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Output Voltage at L3000S
Terminals
Iline = 0mA
Iline = 5mA
30.0
28.2
40.0
38.5
V
V
Ilcc
Iot
Short Circuit Current
DATA IN (note 1) 000X00X1
5
5
8.5
8.5
.75
mA
mA
V
On/off-hook Detection Threshold
Symmetry to Ground
Vls
Iline = 0mA
STAND BY DENIAL
Ilcc Short Circuit Current
DATA IN 000X00X0
2
mA
DC OPERATION - NORMAL BATTERY (VTTX = 2VRMS, low level)
Vlo
Output Voltage at L3000S
Terminals Ilim = 70mA Data in
1000X010
Iline = 0mA
Iline = 20mA
Iline = 50mA
31.0
24.0
2.5
35.0
28.8
17.5
V
V
V
Ilim
Current Programmed Through
the Digital Inter.
– 10%
Ilim
17
+ 15%
mA
Io
If
On-hook Detection Threshold
Off-hook Detection Threshold
8
mA
mA
mA
12
10
Ilgk
Longitudinal Line Current with
GK Detect
26
DC OPERATION - BOOST BATTERY
Vlo
Output Voltage at L3000S
Terminals
Iline = 0mA
Iline = 20mA
86
68.6
95.6
81
V
V
AC OPERATION
Ztx
Zrx
Sending Output Impedance
10
Ω
4 Wire Side
Receiving Input Impedance
4 Wire Side
100
k
Ω
THD
Signal Distorsion at 2W and 4W
Terminals
0.5
%
R1
Thl
Gs
2W Return Loss
Trans Hybrid Loss
Sending Gain
f = 300 to 3400Hz
f = 300 to 3400Hz
22
24
dB
dB
dB
Vso = 0dBm f = 1020Hz
Norm. Polarity
– 0.25
– 0.1
+ 0.25
+ 0.1
Gsf
Gsl
Sending Gain Flatness versus
Frequency
f = 300 to 3400Hz Respect
to 1020Hz
dB
dB
Sending Gain Linearity
fr = 1020Hz,
Vsoref = –10dBm
Vso = + 4 /– 40dBm
– 0.1
+ 0.1
Gr
Receiving Gain
Vri = 0dBm f = 1020Hz
Norm. Polarity
dB
dB
– 0.25
– 0.1
0
+ 0.25
+ 0.1
Grf
Receiving Gain Flatness
f = 300 to 3400Hz Respect
to 1020
Notes : 1. The data into the digital interface of L3030 are send in serial mode. The format of data is the following :
a) DATA IN : the bit at left side is BIT 0 of the writing word, while the bit at the right side is BIT 7.
b) DATA OUT : the bit at the left side is BIT0 of the reading word, while the bit at the right is BIT4.
When appear a symbol X, the value of the bit don’t care.
18/29
L3000S - L3030
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
AC OPERATION (continued)
Grl
Receiving Gain Linearity
fr = 1020Hz, Vriref = – 10dBm – 0.1
Vri = + 4 /– 40dBm
+ 0.1
dB
Np4W
Psophometric Noise at 4W-Tx
Terminals
– 75
– 75
– 70 dBmp
Np2W
SVRR
Psophometric Noise at Line Terminals
– 70 dBmp
Supply Voltage Rejection Ratio
Relative to VB–
f = 3400Hz
– 30
dB
SVRR
SVRR
Ltc
Relative to VDD
f = 3400Hz
– 30
– 32
60
– 26
– 30
dB
dB
dB
dB
Vs = 100mVrms
Relative to VSS
Longitudinal to Transversal Conversion
Transversal to Longitudinal Conversion
Propagation Time
f = 300 to 3400Hz
Iline = 30mA, ZML = 600
49 (1)
48
Ω
Tlc
51
Td
Both Direction
40
25
s
s
µ
µ
Tdd
Vttx
Propag. Time Distortion
Line Voltage of Teletaxe Signal
VTTXin = 950mVrms
Note 2 1.7
2.3
5.5
V
V
Note 3
4.5
THD
Teletaxe Signal Harmonic
5
%
Dist. ttx Filt = 0 @ 16kHz
Ω
Note 4
Zitt
Teletaxe Amplif. Input Impedance
Pin 33 of L3030
100
kΩ
AC OPERATION BOOST BATTERY
Gs
Sending Gain
Vso = 0dBm f = 1020Hz
Norm. Polarity
– 0.66 – 0.16 + 0.34
– 0.27 + 0.08 + 0.43
dB
dB
Gr
Receiving Gain
Vri = 0dBm f = 1020Hz
Norm. Polarity
Np4W
Psophometric Noise at 4W-Tx
Terminals
– 73
– 68 dBmp
Np2W
SVRR
Psophometric Noise at line Terminals
Relative to Vdd
– 73
– 68
– 23
dB
dB
f = 3400Hz
Vs = 100mVrms
SVRR
Relative to Vss
– 23
dB
RINGING PHASE
Vlr
Superimposed DC Voltage
19
17
23
21
27
25
V
V
Rloop > 100k
Ω
Rloop = 1k
Ω
Vacr
If
Ringing Signal at Line Termin.
DC Off-hook Det. Threshold
Current Limit.
56
1.5
85
Vrms
mA
Rloop = 1k /1 F
Ω
µ
3.5
130
2
Ilim
Vrs
THDr
mA
Ringing Simmetry
Vrms
%
Ringing Signal Distortion
VAC = 0.285VRMS
fRING = 30Hz
5
Notes : 1. Up to 52dB using selected L3000S.
2. The configuration of data sent to device change, every 100mS, from - 1100X010 - to - 1000X010 -
3. The configuration of data sent to device change, every 100mS, from - 1101X010 - to - 1001X010 -
4. Error generated by ttx filt 0 ohm, on the output teletax amplitude is err% = 100 x (1 + A) x B/C where A = 10
≠
Kohm/RGTTX[Kohm], B = TTXFILT[Kohm], C = (TTXFILT[Kohm] + 1 Kohm), for example 10 ohm means err% = 2 %.
19/29
L3000S - L3030
ELECTRICAL CHARACTERISTICS
(continued)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
RINGING PHASE
Zir
Vrr
Ringing Amplif. Input Impedance
Pin 41 of L3030
100
kΩ
Residual of Ringing Signal at TX
Output
600
mV
Trt
Toh
Trs
Ring Trip Detection Time
125
ms
ms
ms
(1T)
(2T)
fring = 16Hz
T = 1/fring
Off-hook Status Delay after the
Ringing Stop
125
(2T)
Cut off of Ringing
Ring Trip not Confirmed
188
(3T)
SUPPLY CURRENT
IDD
Positive Supply Current CS = 1
Stand-by
Conversation (NB/BB)
Ringing
16.0
26.0
16.5
20.0
31.0
21.0
mA
mA
mA
ISS
Negative Supply Current CS = 1
Stand-by
Conversation (NB/BB)
Ringing
9
19
9
12
23
12
mA
mA
mA
IBAT–
Negative Battery Supply Current Line
Current = 0mA
Stand-by
2
5
6.6
14
2.5
6.5
8.0
17
mA
mA
mA
mA
Conversation NB
Conversation BB
Ringing
IBAT+
Positive Battery Supply Current Line
Current = 0mA
Stand by
10
10
8
15
15
µA
Conversation NB
Conversation BB
Ringing
A
µ
10
mA
mA
12
13.5
NB = Normal Battery
BB = Boosted Battery
Figure 12 :
Slic Test Circuit Schematic.
L3000S
20/29
L3000S - L3030
Figure 13: Typical application schematic with 2nd generationCOMBO.
9D4TL216
C D V B
21/29
L3000S - L3030
Figure 14: Typical application schematic with 1st generation COMBO.
9D4T17L2A
C D V B
22/29
L3000S - L3030
APPENDIX
SLIC TEST CIRCUITS
Referring to the test circuit reported at the end of each SLIC data sheethere below you can find the proper
configurationfor each measurement.
In particular : A-B : Line terminals
C : TX sending output on 4W side
D : RX receiving input on 4W side
E : TTX teletaxe signal input
RGIN : low level ringing signal input.
TEST CIRCUITS
Figure 1 : Symmetryto Ground.
Figure 2 : 2W Return Loss.
|ZL − Z|
|ZL + Z|
|2 VS|
20 log
=
RL 20 log
=
|E|
1
<< Z
WC
Figure 3 : Trans-hybridLoss.
Figure 4 : SendingGain.
|VR|
|VS|
G
S = 20 log
10 |VSO
|
THL 20log
=
10 |VR|
23/29
L3000S - L3030
TEST CIRCUITS (continued)
Figure 5 : ReceivingGain.
Figure 6 : SVRRRelative to Battery Voltage VB–.
| VR |
| VS |
| Vn |
| VR |
G
R = 20 log
10
SVRR 20 log
=
Figure 7 :
Figure 8 :
Longitudinalto Transversal Conversion.
Transversal to LongitudinalConversion.
L
T
| VR
| E |
|
| VR |
| VS |
T
L
= 20 log
= 20 log10
Figure 9 :
Figure 10 :
RingingSimmetry.
TTX Level at Line Terminals.
24/29
L3000S - L3030
PLCC44 PACKAGE MECHANICAL DATA
mm
inch
DIM.
MIN.
17.4
16.51
3.65
4.2
TYP.
MAX.
17.65
16.65
3.7
MIN.
0.685
0.650
0.144
0.165
0.102
TYP.
MAX.
0.695
0.656
0.146
0.180
0.108
A
B
C
D
4.57
2.74
d1
d2
E
2.59
0.68
0.027
14.99
16
0.590
0.630
e
1.27
12.7
0.46
0.71
0.050
0.500
0.018
0.028
e3
F
F1
G
0.101
0.004
M
M1
1.16
1.14
0.046
0.045
25/29
L3000S - L3030
FLEXIWATT 15 PACKAGE MECHANICAL DATA
mm
inch
DIM.
MIN.
TYP.
MAX.
5.00
1.90
0.1
MIN.
TYP.
MAX.
0.196
0.074
0.004
A
B
b1
D
4 (typ.)
°
E
0.30
0.90
0.012
0.035
F
F1
G
0.57
2.03
0.022
0.080
1.77
1.9
0.070
0.075
1.054
1.142
1.102
0.669
0.031
G1
H1
H2
H3
H4
L
26.77
29.00
28.00
17.00
0.80
19.05
1.10
19.95
1.40
0.75
0.785
0.055
0.114
0.616
L1
L2
L3
N1
N3
N4
Dia1
0.043
0.102
0.604
2.60
2.90
15.35
15.65
10
6.8
0.394
0.268
0.15
3.8
13.00
0.511
H1
H2
H3
Dia.2
Dia.4
A
H4
b1
E
B
Dia.3
F1
G
F
G1
D
FLEX15
D
26/29
L3000S - L3030
PowerSO-20 (slug-up) PACKAGE MECHANICAL DATA
mm
inch
DIM.
MIN.
TYP.
MAX.
3.70
MIN.
TYP.
MAX.
0.145
0.01
A
a1
b
0
0.25
0
0.40
0.23
15.80
9.4
0.53
0.016
0.009
0.622
0.37
0.021
0.012
0.63
c
0.32
D
16.00
9.80
D1
E
0.385
0.57
13.90
14.50
0.547
e
1.27
0.05
0.45
e3
E1
E2
E3
G
h
11.43
10.90
11.10
2.90
6.20
0.10
1.10
1.10
0.429
0.437
0.114
0.244
0.004
0.043
0.043
5.80
0
0.228
0
L
0.80
0.031
N
10 (Max.)
°
S
8 (Max.)
°
E3 (slug width)
N
N
A
c
a1
b
e
DETAILA
E
e3
h x 45°
1
10
DETAILA
0.35
E2
E1
Gage Plane
- C -
SEATINGPLANE
S
L
G
C
(COPLANARITY)
D1(slug width)
20
11
PSO20DME
D
27/29
L3000S - L3030
PowerSO20 (slug-down) PACKAGE MECHANICAL DATA
mm
inch
DIM.
MIN.
TYP.
MAX.
3.60
0.30
3.30
0.10
0.53
0.32
16.00
14.50
MIN.
TYP.
MAX.
0.1417
0.0118
0.1299
0.0039
0.0209
0.0126
0.6299
0.570
A
a1
a2
a3
b
0.10
0.0039
0
0
0.40
0.23
15.80
13.90
0.0157
0.009
0.6220
0.5472
c
D (1)
E
e
1.27
0.050
0.450
e3
E1 (1)
E2
G
11.43
10.90
0
11.10
2.90
0.10
1.10
1.10
0.4291
0
0.437
0.1141
0.0039
h
L
0.80
0.0314
0.0433
N
10 (max.)
°
S
8 (max.)
°
T
10.0
0.3937
(1) ”D and E1” do not include mold flash or protrusions
- Mold flash or protrusions shall not exceed 0.15mm (0.006”)
R
N
N
a2
A
c
a1
b
e
DETAILB
DETAILA
E
e3
D
DETAILA
lead
20
11
slug
a3
DETAILB
0.35
E2
E1
Gage Plane
T
- C -
S
SEATING PLANE
L
G
C
(COPLANARITY)
1
10
PSO20MEC
h x 45°
28/29
L3000S - L3030
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for
the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its
use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifica-
tions mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information pre-
viously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of SGS-THOMSON Microelectronics.
1997 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved
PowerSO-20 is a Trademark of the SGS-THOMSON Microelectronics
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco -
The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
29/29
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SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
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