L4949ED013TR [STMICROELECTRONICS]

Multifunction very low drop voltage regulator; 多功能非常低的压差电压稳压器


型号：	L4949ED013TR
厂家：	ST
描述：	Multifunction very low drop voltage regulator 多功能非常低的压差电压稳压器线性稳压器IC 调节器电源电路光电二极管输出元件
文件：	总19页 (文件大小：501K)
中文：	中文翻译
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L4949E

Multifunction very low drop

voltage regulator

Features

■ Operating DC supply voltage range 5 V - 28 V

■ Transient supply voltage up to 40V

■ Extremely low quiescent current in standby

mode

SO-8

SO-20W (12+4+4)

■ High precision standby output voltage 5V 1ꢀ

■ Output current capability up to 100mA

■ Very low dropout voltage less than 0.5V

■ Reset circuit sensing the output voltage

■ Programmable reset pulse delay with external

capacitor

■ Voltage sense comparator

■ Thermal shutdown and short circuit protections

Description

The L4949E is a monolithic integrated 5V voltage

regulator with a very low dropout output and

additional functions as power-on reset and input

voltage sense. It is designed for supplying the

microcomputer controlled systems especially in

automotive applications.

Table 1.

Package

Device summary

Order codes

Tube

Tape and reel

SO-8

L4949ED

L4949EP

L4949ED013TR

L4949EP013TR

SO-20W

November 2009

Doc ID 4275 Rev 6

1/19

www.st.com

Contents

L4949E

Contents

Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1

2.2

2.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.1

3.2

3.3

3.4

3.5

3.6

Supply voltage transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Preregulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Sense comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.1

4.2

4.3

ECOPACK^®packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

SO-8 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

SO-20 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2/19

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L4949E

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pin definitions and functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Preregulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

SO-8 TP mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

SO-20 TP mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Doc ID 4275 Rev 6

3/19

List of figures

L4949E

List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

(1)

Application circuit

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Foldback characteristic of V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Output voltage vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Quiescent current vs supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Block circuit of reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

SO-8 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 10. SO20 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4/19

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L4949E

Block diagram and pin description

Figure 1.

Block diagram

Note:

The block diagram illustrates only a major internal device functionality and it is not intended

to mimic any details of hardware design

Figure 2.

Configuration diagram (top view)

SO-8

SO-20

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Block diagram and pin description

L4949E

Table 2.

Pin definitions and functions

Pin N°

Symbol

Function

SO-8

SO-20

Input supply voltage. Block to GND via an external

capacitor (see Figure 3).

V_S

S_I

Sense input pin to supervise input voltage. Connect via an

external voltage divider connected to V_Sand to GND.

Preregulator output voltage. For details, see Section 3.4:

Preregulator.

V_Z

Reset pulse delay adjustment. Connecting this pin via a

capacitor to GND

C_T

4, 5, 6, 7, 14,

15, 16, 17

GND

RES

Ground reference

Reset output. It is pulled down when the output voltage

goes below V_RT

Sense output. This open collector pin must be connected to

V_OUTvia an external resistor. It is pulled down whenever

the S_Ivoltage becomes lower than an internal voltage.

S_O

Output voltage. Block to GND via an external capacitor (see

Figure 3)

V_OUT

3, 8, 9, 13, 18

Not connected pins

6/19

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L4949E

Electrical specifications

2.1

Absolute maximum ratings

(1)

Table 3.

Symbol

Absolute maximum ratings

Parameter

Value

Unit

V_SDC

V_STR

I_O

DC operating supply voltage

Transient supply voltage (T < 1s)

Output current

Internally limited

V_O

Output voltage

V_RES, V_SOOutput voltage

I_RES, I_SOOutput current

V_CT

V_SIDC

V_Z

Reset delay voltage

Sense input voltage

Preregulator output voltage

Preregulator output current

Junction temperature

I_Z

°C

T_J

-40 to +150

-55 to +150

T_stg

Storage temperature range

1. The circuit is ESD protected according to MIL-STD-883C.

2.2

Thermal data

Table 4.

Symbol

Thermal data

Description

SO-8

200

SO20L

Unit

R_{th j-amb}

R_{th j-pins}

TJSD

Thermal Resistance Junction-ambient (max)

Thermal Resistance Junction-pins (max)

Thermal Shutdown Junction temperature

°C/W

°C

165

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Electrical specifications

L4949E

2.3

Electrical characteristics

V_S= 14 V; -40 °C < T_j< 125 °C unless otherwise specified

Table 5.

Symbol

Electrical characteristics

Parameter

Output voltage

Test condition

T_J= 25 °C; I_O= 1 mA

6 V < V_IN< 28 V, 1 mA < I_O< 50 mA

_IN= 40 V;

Min.

Typ.

Max.

Unit

V_O

4.95

4.90

5.05

5.10

Output voltage

V_O

4.75

5.25

T < 1 s; 5 mA < I_O< 100 mA

_O= 10 mA

0.1

0.2

0.3

0.25

0.4

0.5

V_DP

Dropout voltage

I_O= 50 mA

I_O= 100 mA

Input to output voltage

V_IO

difference in undervoltage V_IN= 4 V, I_O= 35 mA

condition

0.4

(1)

I_outh

Max output leakage

Line regulation

V_IN= 25 V, V_O= 5.5 V

6 V < V_IN< 28 V; I_O= 1 mA

1 mA < I_O< 100 mA

µA

V_OL

V_OLO

Load regulation

200

V_O= 4.5 V

105

120

400

I_LIM

Current limit

V_O= 4.5 V; T_J= 25 °C

V_O= 0 V⁽²⁾

100

200

I_QSE

I_Q

Quiescent current

I_O= 0.3 mA; T_J< 100 °C

I_O= 100 mA

300

µA

1. With this test we guarantee that with no output current the output voltage will not exceed 5.5V

2. Foldback characteristic

Table 6.

Symbol

Reset

Parameter

Test condition

Min.

Typ.

Max.

Unit

VO -

0.5V

V_RT

Reset threshold voltage

V_RTH

t_RD

Reset threshold hysteresis

Reset pulse delay

100

200

180

0.4

C_T= 100 nF; T_R≥ 100 µs

V_RL

Reset output low voltage

R_RES= 10 KΩ to V_OV_S≥ 1.5V

Reset output high leakage

current

I_RH

V_RES= 5 V

µA

V_CTth

Delay comparator threshold

hysteresis

V_{CTth, hy}

100

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L4949E

Electrical specifications

Table 7.

Symbol

Sense

Parameter

Test condition

Min.

Typ.

Max.

Unit

V_st

Sense low threshold

1.16

1.23

100

1.35

200

V_sth

Sense threshold hysteresis

V_SI≤ 1.16 V; V_S≥ 3 V

R_SO= 10 KΩ to V_O

V_SL

Sense output low voltage

0.4

I_SH

I_SI

Sense output leakage

Sense input current

V_SO= 5 V; V_SI≥ 1.5 V

µA

V_SI= 0

-20

-8

-3

Table 8.

Symbol

Preregulator

Parameter

Test condition

Min.

Typ.

Max.

Unit

V_Z

I_Z

Preregulator output voltage

Preregulator output current

I_Z= 10 µA

4.5

µA

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Application information

L4949E

Application information

(1)

Figure 3.

Application circuit

1. For stability: C_S≥ 1µF, C_O≥ 4.7µF, ESR < 10Ω at 10KHz

Recommended for application: C_S= C_O= 10 µF to 100 µF

3.1

Supply voltage transient

High supply voltage transients can cause a reset output signal disturbance. For supply

voltages greater than 8V the circuit shows a high immunity of the reset output against supply

transients of more than 100V/µs. For supply voltages less than 8V supply transients of more

than 0.4V/µs can cause a reset signal disturbance.

To improve the transient behaviour for supply voltages less than 8V a capacitor at pin V can

be used.

This capacitor (C3 ≤ 1 µF) reduces also the output noise.

3.2

Functional description

The L4949E is a monolithic integrated voltage regulator, based on the STM modular voltage

regulator approach. Several outstanding features and auxiliary functions are implemented to

meet the requirements of supplying microprocessor systems in automotive applications.

Nevertheless, it is suitable also in other applications where the present functions are

10/19

Doc ID 4275 Rev 6

L4949E

Application information

required. The modular approach of this device allows to get easily also other features and

functions when required.

3.3

Voltage regulator

The voltage regulator uses an Isolated Collector Vertical PNP transistor as a regulating

element.

Figure 4.

Foldback characteristic of V

With this structure very low dropout voltage at currents up to 100mA is obtained. The

dropout operation of the standby regulator is maintained down to 3V input supply voltage.

The output voltage is regulated up to the transient input supply voltage of 40V. With this

feature no functional interruption due to overvoltage pulses is generated. The typical curve

showing the standby output voltage as a function of the input supply voltage is shown in

Figure 5. The current consumption of the device (quiescent current) is less than 300 µA.

To reduce the quiescent current peak in the undervoltage region and to improve the

transient response in this region, the dropout voltage is controlled, the quiescent current as

a function of the supply input voltage is shown in Figure 6.

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Application information

Figure 5.

L4949E

Output voltage vs input voltage

Figure 6.

Quiescent current vs supply voltage

3.4

Preregulator

To improve the transient immunity a preregulator stabilizes the internal supply voltage to 5 V.

This internal voltage is present at Pin 3 (V ). This voltage should not be used as an output

because the output capability is very small (≤ 10 µA).

This output may be used as an option when a better transient behaviour for supply voltages

less than 8 V is required (see also application note).

In this case a capacitor (100 nF - 1 µF) must be connected between pin V and GND. If this

feature is not used pin V must be left open.

12/19

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L4949E

Application information

3.5

Reset circuit

The block circuit diagram of the reset circuit is shown in Figure 7. The reset circuit

supervises the output voltage.

The reset threshold of 4.5 V is defined with the internal reference voltage and standby

output drivider.

The reset pulse delay time t , is defined with the charge time of an external capacitor C :

C • 2V

2μA

= --------------------

The reaction time of the reset circuit originates from the discharge time limitation of the reset

capacitor CT and is proportional to the value of CT.

The reaction time of the reset circuit increases the noise immunity. Standby output voltage

drops below the reset threshold only a bit longer than the reaction time results in a shorter

reset delay time.

The nominal reset delay time is generated for standby output voltage drops longer than

approximately 50ms.

The typical reset output waveforms are shown in Figure 8.

3.6

Sense comparator

The sense comparator compares an input signal with an internal voltage reference of typical

1.23V. The use of an external voltage divider makes this comparator very flexible in the

application.

It can be used to supervise the input voltage either before or after the protection diode and

to give additional informations to the microprocessor like low voltage warnings.

Figure 7.

Block circuit of reset circuit

Doc ID 4275 Rev 6

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Application information

Figure 8.

L4949E

Waveforms

14/19

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L4949E

Package and packing information

4.1

4.2

ECOPACK^®packages

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK packages, depending on their level of environmental compliance. ECOPACK

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK is an ST trademark.

SO-8 TP package information

Table 9.

SO-8 TP mechanical data

Typ.

Dim.

Min.

Max.

1.75

0.25

1.65

0.85

0.48

0.25

0.5

0.1

0.65

0.35

0.19

0.25

D⁽¹⁾

45° (typ.)

4.8

5.8

5.0

6.2

1.27

3.81

F⁽¹⁾

3.8

0.4

4.0

1.27

0.6

8° (max.)

1. D and F do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm

(.006inch).

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Package and packing information

L4949E

Figure 9.

SO-8 TP package dimensions

4.3

SO-20 TP package information

Table 10. SO-20 TP mechanical data

Typ.

Dim.

Min.

Max.

2.35

0.1

2.65

0.3

0.33

0.23

12.6

7.4

0.51

0.32

7.6

1.27

10.65

16/19

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L4949E

Package and packing information

Table 10. SO-20 TP mechanical data (continued)

Typ.

Dim.

Min.

Max.

0.75

1.27

0.25

0.4

0 (min.)8 (max.)

Figure 10. SO20 TP package dimensions

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Revision history

L4949E

Revision history

Table 11.

Date

Document revision history

Revision

Description of changes

01-Jun-2000

Initial release.

Reformatted entire document.

Removed Minidip package.

Added Table 2: Pin definitions and functions.

Updated Table 3: Absolute maximum ratings

25-Nov-2009

Updated Figure 1: Block diagram and Figure 3: Application

circuit⁽¹⁾

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L4949E

Please Read Carefully:

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the

right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any

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Doc ID 4275 Rev 6

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L4949ED013TR [STMICROELECTRONICS]

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