L4949EP [STMICROELECTRONICS]

MULTIFUNCTION VERY LOW DROP VOLTAGE REGULATOR; 多功能非常低的压差电压稳压器


型号：	L4949EP
厂家：	ST
描述：	MULTIFUNCTION VERY LOW DROP VOLTAGE REGULATOR 多功能非常低的压差电压稳压器稳压器
文件：	总10页 (文件大小：79K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

L4949E

MULTIFUNCTION VERY LOW DROP

VOLTAGE REGULATOR

OPERATING DC SUPPLY VOLTAGE RANGE

5V - 28V

TRANSIENT SUPPLY VOLTAGE UP TO 40V

EXTREMELY LOW QUIESCENT CURRENT

IN STANDBY MODE

HIGH PRECISION STANDBY OUTPUT VOLT-

AGE 5V±1%

OUTPUT CURRENT CAPABILITY UP TO

100mA

VERY LOW DROPOUT VOLTAGE LESS

THAN 0.5V

Minidip

SO8

SO20W (12+4+4)

L4949E (Minidip)

L4949ED (SO8)

L4949EP (SO20W)

ORDERING NUMBERS:

RESET CIRCUIT SENSING THE OUTPUT

VOLTAGE

DESCRIPTION

The L4949E is a monolithic integrated 5V voltage

regulator with a very low dropout output and addi-

tional functions as power-on reset and input volt-

age sense. It is designed for supplying the micro-

computer controlled systems especially in

automotiveapplications.

PROGRAMMABLE RESET PULSE DELAY

WITH EXTERNAL CAPACITOR

VOLTAGE SENSE COMPARATOR

THERMAL SHUTDOWN AND SHORT CIR-

CUIT PROTECTIONS

BLOCK DIAGRAM

V_Z

V_OUT

V_S

PREREGULATOR 5V

2µ

RES

REG

RESET

V_S

1.23V

REF

SENSE

GND

D96AT219

June 2000

1/10

L4949E

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

DC Operating Supply Voltage

Value

Unit

V_SDC

V_STR

I_O

Transient Supply Voltage (T < 1s)

Output Current

Internally Limited

V_O

Output Voltage

V_RES, V_SOOutput Voltage

I_RES, I_SOOutput Current

V_Z

I_Z

Preregulator Output Voltage

Preregulator Output Current

Junction Temperature

T_J

-40 to +150

-55 to +150

T_stg

Storage Temperature Range

°C

Note: The circuit is ESD protected according to MIL-STD-883C

THERMAL DATA

Symbol

Description

Minidip

SO-8

SO20L

Unit

°C/W

R_{th j-amb}Thermal Resistance Junction-ambient

Max

100

200

R_{th j-pins}

TJSD

Thermal Resistance Junction-pins

Thermal Shutdown Junction temperature

165

PIN CONNECTIONS

V_Z

N.C.

GND

N.C.

RES

V_S

N.C.

V_OUT

GND

N.C.

V_OUT

V_Z

RES

GND

D95AT217

D95AT218

MINIDIP/SO8

SO20

2/10

L4949E

ELECTRICAL CHARACTERISTICS

(V_S= 14V; -40 C < T_j< 125°C unless otherwise specified)

Symbol

V_O

Parameter

Output Voltage

Test Condition

Min.

Typ.

Max.

5.05

5.10

5.25

Unit

T_J= 25°C; I_O= 1mA

4.95

V_O

Output Voltage

6V < V_IN< 28V, 1mA < I_O< 50mA 4.90

V_O

V_IN= 40V;

4.75

T< 1s5mA < I_O<100mA

V_DP

Dropout Voltage

I_O= 10mA

0.1

0.2

0.3

0.25

0.4

0.5

_O= 50mA

_O= 100mA

V_IO

Input to Output Voltage

Difference in Undervoltage

Condition

_IN= 4V, I_O= 35mA

0.4

_outh**

Max Output Leakage

Line Regulation

Load Regulation

Current Limit

V_IN= 25V, V_O= 5.5V

6V < V_IN< 28V; I_O= 1mA

1mA < I_O< 100mA

V_O= 4.5V

µA

V_OL

V_OLO

I_LIM

105

120

200

400

_O= 4.5V, T_J= 25°C

_O= 0V (note 1)

100

200

I_QSE

I_Q

Quiescent Current

I_O= 0.3mA; T < 100 C

300

I_O= 100mA

** With this test we guarantee that with no outputcurrent the output voltage will not exceed 5.5V

RESET

V_RT

V_RTH

t_RD

Reset Thereshold Voltage

V_O-0.5V

100

Reset Thereshold Hysteresis

Reset Pulse Delay

200

180

0.4

C_T= 100nF; T_R≥100µs

100

V_RL

Reset Output Low Voltage

R_RES= 10K to V V_S1.5V

Ω

≥

I_RH

Reset Output High Leakage Current V_RES= 5V

Delay Comparator Thereshold

V_CTth

V_{CTth, hy}

Delay Comparator Thereshold

Hysteresis

100

SENSE

V_st

V_sth

V_SL

Sense Low Thereshold

1.16

1.23

100

1.35

200

0.4

Sense Thereshold Hysteresis

Sense Output Low Voltage

V_SI1.16V; V

≥

≤

_SO= 10KΩ to V_O

I_SH

I_SI

Sense Output Leakage

Sense Input Current

V_SO= 5V; V_SI≥ 1.5V

µA

V_SI= 0

-20

4.5

-8

-3

PREREGULATOR

V_Z

I_Z

Preregulator Output Voltage

Preregulator Output Current

I_Z= 10µA

Note 1: Foldback characteristic

3/10

L4949E

APPLICATION CIRCUIT

V_OUT

V_Z(optional)

V_BAT

V_S

PREREGULATOR 5V

2µ

RES

V_OUT

REG

RESET

V_S

1.23V

REF

SENSE

GND

D96AT219

For stability: C_S≥ 1µF, C_O≥ 4.7µF, ESR < 10Ω at 10KHz

Recommended for application:C_S= C_O= 10µF to 100µF

APPLICATION INFORMATION

Supply Voltage Transient

proach of this device allows to get easily also

other features and functions when required.

High supply voltage transients can cause a reset

output signal disturbation.

Voltage Regulator

For supply voltages greater than 8V the circuit

shows a high immunity of the reset output against

supply transientsof more than 100V/µs.

For supply voltages less than 8V supply tran-

sients of more than 0.4V/µs can cause a reset

signal disturbation.

The voltage regulator uses an Isolated Collector

Vertical PNP transistor as a regulating element.

Figure 1: FoldbackCharacteristic of V_O

To improve the transient behaviour for supply

voltages less than 8V a capacitor at pin 3 can be

used.

A capacitor at pin 3 (C3 ≤ 1µF) reduces also the

output noise.

FUNCTIONAL DESCRIPTION

The L4949E is a monolithic integrated voltage

regulator, based on the STM modular voltage

regulator approch. Several outstanding features

and auxiliary functions are implemented to meet

the requirements of supplying microprocessor

systems in automotiveapplications. Nevertheless,

it is suitable also in other applications where the

present functions are required. The modular ap-

4/10

L4949E

With this structure very low dropout voltage at

currents up to 100mA is obtained. The dropout

operation of the standby regulator is maintained

down to 3V input supply voltage. The output volt-

age is regulated up to the transient input supply

voltage of 40V. With this feature no functional in-

terruption due to overvoltagepulses is generated.

The typical curve showing the standby output

voltage as a function of the input supply voltage is

shown in Fig. 2. The current consumption of the

device (quiescent current) is less than 300µA.

To reduce the quiescent current peak in the un-

dervoltage region and to improve the transient re-

sponse in this region, the dropout voltage is con-

trolled, the quiescent current as a function of the

supply input voltage is shown in Fig. 3.

Preregulator

To improve the transient immunity a preregulator

stabilized the internal supply voltage to 5V. This

internal voltage is present at Pin 3 (V_Z). This volt-

age should not be used as an output because the

≤

output capability is very small ( 10 A).

This output may be used as an option when a

better transient behaviour for supply voltages less

than 8V is required (see also application note).

In this case a capacitor (100nF - 1µF) must be

connected between Pin 3 and GND. If this feature

is not used Pin 3 must be left open.

Reset Circuit

The block circuit diagram of the reset circuit is

shown in Fig. 4. The reset circuit supervises the

output voltage.

Figure 2:

Output Voltage vs. Input Voltage

The reset thereshold of 4.5V is defined with the

internal reference voltage and standby output

drivider.

The reset pulse delay time t_RD, is defined with the

charge time of an external capacitor C_T:

C_T• 2V

2 A

t_RD

The reaction time of the reset circuit originates

from the discharge time limitation of the reset ca-

pacitor C_Tand is proportional to the value of C_T.

The reaction time of the reset circuit increases the

noise immunity. Standby output voltage drops be-

low the reset threshold only a bit longer than the

reaction time results in a shorter reset delay time.

40V

The nominal reset delay time will be generated for

standby output voltage drops longer than approxi-

Figure 3: QuiescentCurrent vs. Supply Voltage

mately 50 s.

The typical reset output waveforms are shown in

Fig. 5.

Sense Comparator

The sense comparator compares an input signal

with an internal voltage reference of typical 1.23V.

The use of an external voltage divider makes this

comparatorvery flexible in the application.

It can be used to supervise the input voltage

either before or after the protection diode and to

give additional informations to the microprocessor

like low voltage warnings.

5/10

L4949E

Figure 4

Figure 5

6/10

L4949E

inch

DIM.

OUTLINE AND

MECHANICAL DATA

MIN. TYP. MAX. MIN. TYP. MAX.

3.32

0.131

0.51

1.15

0.020

1.65 0.045

0.55 0.014

0.304 0.008

10.92

0.065

0.022

0.012

0.430

0.384

0.356

0.204

7.95

9.75 0.313

2.54

7.62

0.100

0.300

6.6

0.260

0.200

0.150

0.060

5.08

3.18

3.81 0.125

1.52

Minidip

7/10

L4949E

inch

DIM.

OUTLINE AND

MECHANICAL DATA

MIN. TYP. MAX. MIN. TYP. MAX.

1.75

0.069

0.010

0.065

0.033

0.019

0.010

0.020

0.1

0.25 0.004

1.65

0.65

0.35

0.19

0.25

0.85 0.026

0.48 0.014

0.25 0.007

0.5

0.010

D (1)

45° (typ.)

4.8

5.8

5.0

6.2

0.189

0.228

0.197

0.244

1.27

3.81

0.050

0.150

F (1)

3.8

0.4

4.0

0.15

0.157

0.050

0.024

1.27 0.016

0.6

SO8

8° (max.)

(1) D andF do not include mold flash or protrusions. Mold flash or

potrusions shallnot exceed 0.15mm (.006inch).

8/10

L4949E

inch

OUTLINE AND

MECHANICAL DATA

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

2.35

0.1

2.65 0.093

0.3 0.004

0.104

0.012

0.020

0.013

0.512

0.299

0.33

0.23

12.6

7.4

0.51 0.013

0.32 0.009

0.496

0.291

7.6

1.27

0.050

0.25

0.4

10.65 0.394

0.75 0.010

0.419

0.030

0.050

1.27 0.016

SO20

0°(min.)8°(max.)

h x 45°

SO20MEC

9/10

L4949E

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is

granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are

subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products

are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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10/10

L4949EP [STMICROELECTRONICS]

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