L6220 [STMICROELECTRONICS]

QUAD DARLINGTON SWITCHES; 四联复合晶体管SWITCHES


型号：	L6220
厂家：	ST
描述：	QUAD DARLINGTON SWITCHES 四联复合晶体管SWITCHES 晶体晶体管
文件：	总12页 (文件大小：233K)
中文：	中文翻译
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L6220

L6220N

QUAD DARLINGTON SWITCHES

TWO NON INVERTING+ TWO INVERTING IN-

PUTS WITH INHIBIT

OUTPUT VOLTAGE UP TO 50V

OUTPUT CURRENT UP TO 1.8A

VERY LOW SATURATION VOLTAGE

TTL COMPATIBLE INPUTS

INTEGRAL FAST RECIRCULATION DIODES

Powerdip 12 + 2 + 2

(Plastic Package)

DESCRIPTION

ORDERING NUMBER : L6220

The L6220 monolithic quad darlington switch is de-

signed forhigh current, highvoltageswitching appli-

cations. Each of the four switches is controlled by a

logic input and all four are controlled by a common

inhibit input. All inputs are TTL-compatiblefor direct

connectionto logic circuits.

Eachswitch consistsof anopen-collectordarlington

transistorplus a fast diodefor switching applications

with inductive loads. The emitters of the four

switches are commoned. Any numberof inputsand

outputsof the same device may be paralleled.

Multiwatt 15

(Plastic Package)

Two versions are available : the L6220 mounted in

a Powerdip 12 + 2 + 2 package and the L6220N

mounted in a 15-lead Multiwatt package.

ORDERING NUMBER : L6220N

PIN CONNECTIONS (top views)

L6220 (Powerdip)

L6220N (Multiwatt-15)

1/12

April 1993

L6220 - L6220N

PIN FUNCTIONS (see block diagram)

Name

Function

IN 1

IN 2

Input to Driver 1

Input to Driver 2

OUT 1

OUT 2

CLAMP A

IN 3

Output of Driver 1

Output of Driver 2

Diode Clamp to Driver 1 and Driver 2

Input to Driver 3

IN 4

Input to Driver 4

OUT 3

OUT 4

CLAMP B

INHIBIT

V_s

Output of Driver 3

Output of Driver 4

Diode Clamp to Driver 3 and Driver 4

Inhibit Input to all Drivers

Logic Supply Voltage

Common Ground

GND

BLOCK DIAGRAM

TRUTH TABLE

Inhibit

Input 1, 4

Power Out

Inhibit

Inputs 2, 3

Power Out

OFF

For each input : H = High level

L = Low level

2/12

L6220 - L6220N

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V_o

V_s

Ouput Voltage

Logic Supply Voltage

V_IN, V_INH

I_C

Input Voltage, Inhibit Voltage

V_s

Continuous Collector Current (for each channel)

Collector Peak Current (repetitive, duty cycle = 10 % t_on= 5 ms)

Collector Peak Current (non repetitive, t = 10 µs)

Operating Temperature Range (junction)

Storage Temperature Range

1.8

2.5

I_C

3.2

T_op

– 40 to + 150

– 55 to + 150

350

°C

T_stg

I_sub

P_tot

Output Substrate Current

Total Power Dissipation at T_pins

90^oC (Powerdip)

90^oC (Multiwatt)

70^oC (Powerdip)

70^oC (Multiwatt)

4.3

at T_case

at T_amb

2.3

THERMAL DATA

Symbol

Parameter

Powerdip

Multiwatt–15

Unit

^oC/W

R_{th j-pins}

R_{th j-case}

R_{th j-amb}

Thermal Resistance Junction-pins

Thermal Resistance Junction-case

Thermal Resistance Junction-ambient

Max.

ELECTRICAL CHARACTERISTICS

Refer to the test circuits Fig. 1 to Fig.9 (V_S= 5V, T_amb= 25^oC unless otherwise specified)

Symbol

Parameter

Logic Supply Voltage

Logic Supply Current

Test Conditions

Min. Typ. Max. Unit

V_S

I_s

4.5

5.5

All Outputs ON, I_C= 0.7A

All Outputs OFF

V_{CE (sus)}

I_CEX

Output Sustaining Voltage

Output Leakage Current

I_C=100mA, V_INH= V_INH

V_CE= 50V, V_{IN 1.4}= V_INH

V_{CE (sat)}

Collector Emitter Saturation Voltage

(one output on ; all others off.)

V_s= 4.5V, V_{IN 2.3}= V_INL

V_INH= V_INH

I_C= 0.6A

I_C= 1A

I_C= 1.8A

1.2

1.6

V_INL,

Input Low Voltage

0.8

V_INH

I_INL, I_INH

Input Low Current

Input High Voltage

V_IN= V_INL, V_INH= V_INH

- 100 µA

V_INH,

2.0

V_INH

I_INH, I_INH

Input High Current

V_IN= V_INH, V_INH= V_INH

± 10

µA

I_R

Clamp Diode Leakage Current

Clamp Diode Forward Voltage

V_R= 50V, V_INH= V_INH

100

V_F

I_F= 1A

I_F= 1.8A

1.6

2.0

t_{d (on)}

t_{d (off)}

∆ I_s

Turn on Delay Time

V_p= 5V, R_L= 10Ω

V_IN= 5V, V_EN= 5V

µs

Turn off Delay Time

Logic Supply Current Variation

120

I_out= – 300mA for each Channel

3/12

L6220 - L6220N

TEST CIRCUITS

(X) = Referred to Multiwatt package

X = Referred to Powerdip package

Figure 1 : Logic Supply Current.

Set V ₁= 4.5V, V ₂= 0.8V, V _INH= 4.5V or V ₁= 0.8V, V ₂= 4.5V, V _INH= 0.8 for I_S(all outputs off).

Set V ₁= 2V, V ₂= 0.8V, V _INH= 0.8V for I_S(all outputs on).

Figure 2 : Output Sustaining Voltage.

Figure 3 : Output Leakage Current.

4/12

L6220 - L6220N

Figure 4 : Collector-emitter Saturation

Figure 5 : Logic Input Characteristics.

Set S ₁, S ₂open, V _IN, V _INH= 0.8V for I _INL, I _INH

Set S ₁, S ₂open, V _IN, V _INH= 2V forI _INH, I _INH

Set S ₁, S ₂close, V _IN, V _INH= 0.8V for V _INL, V _INH

Set S ₁, S ₂close, V _IN, V _INH= 2V for V _INH, V _INHH.

Figure 6 : Clamp Diode Leakage Current.

Figure 7 : Clamp Diode Forward Voltage.

5/12

L6220 - L6220N

Figure 8 : Switching Times Test Circuit.

Figure 9 : Switching Times Waveforms.

Figure 10 : Collector SaturationVoltage versus

Figure 11 : Free- wheeling Diode ForwardVoltage

Collector Current

versus Diode Current

6/12

L6220 - L6220N

Figure 12 : Collector SaturationVoltage versus

Figure 13 : Free-wheeling Diode Forward Voltage

versus Junction Temperature

at If = 1A

Junction Temperature at IC = 1A

Figure 14 : Collector SaturationVoltage versus

Figure 15 : Free-wheeling Diode Forward Volt-

age versus Junction Temperature

at I_F= 1.8A

Junction Temperature at IC = 1.8A

Figure 16.

Figure 17 : Unipolar Stepper Motor Driver.

7/12

L6220 - L6220N

APPLICATION INFORMATION

When inductive loads are driven by L6220/N, a

zener diode in series with the integral free-wheeling

diodes increases the voltage across which energy

stored in the load is discharged and therefore

speeds the current decay (Fig. 16). For reliability it

is suggested that the zener is chosen so that V_p+

V_z< 35 V.

2) The instantaneouspower must be limited to

avoid the reverse second breakdown.

Theparticular internallogicallows an easierfullstep

driving using only two input signals.

The reasons for this are two fold :

1) The zener voltage changes in temperature and

current.

Figure 18 : Allowed Peak Collector-current versus

Duty Cycle for 1, 2, 3 or 4 Contempo-

rary Working Outputs (L6220).

Figure 19 : Allowed Peak Collector Cur-rent ver-

sus Duty Cycle for 1, 2, 3 or 4 Con-

temporary Working Outputs

(L6220N).

MOUNTING INSTRUCTION

The R_thj-ambof theL6220 canbe reduced by solder-

ing the GND pins to a suitable copper area of the

printed circuit board (Fig. 20) or to an external

heatsink(Fig. 21).

ing a thickness of 35µ (1.4 mils). During soldering

the pins temperature must not exceed 260 °C and

the soldering time must not be longer than 12 sec-

onds.

The diagram of figure 22 shows the maximum dis-

sipable power P_totand the R_{th j-amb}as a function of

the side ” α” of two equalsquare copper areas hav-

The external heatsink or printed circuit copper area

must be connectedto electrical ground.

8/12

L6220 - L6220N

Figure 20 : Example of P.C. Board Copperarea

Figure 21 : ExternalHeatsink Mounting Example

which is used as Heatsink

Figure 22 : Maximum Dissipable Power and Junc-

tion to Ambient Thermal Resistance

versus Side ”α”

Figure 23 : Maximum Allowable Power Dissipa-

tion versus Ambient Temperature

9/12

L6220 - L6220N

MULTIWATT15 PACKAGE MECHANICAL DATA

inch

TYP.

DIM.

MIN.

TYP.

MAX.

MIN.

MAX.

0.197

0.104

0.063

2.65

1.6

0.039

0.49

0.66

1.14

17.57

19.6

0.55

0.75

1.4

0.019

0.026

0.045

0.692

0.772

0.022

0.030

0.055

0.705

1.27

0.050

0.700

17.78

17.91

20.2

22.6

22.5

18.1

17.75

10.9

2.9

0.795

0.890

0.886

0.713

0.699

0.429

0.114

0.181

0.209

0.102

0.152

22.1

0.870

0.866

0.695

0.679

0.406

0.104

0.165

0.177

0.075

0.144

17.65

17.25

10.3

2.65

4.2

17.5

10.7

0.689

0.421

4.3

4.6

0.169

0.200

4.5

5.08

5.3

1.9

2.6

Dia1

1.9

2.6

3.65

3.85

10/12

L6220 - L6220N

POWERDIP16 PACKAGE MECHANICAL DATA

inch

TYP.

DIM.

MIN.

0.51

0.85

TYP.

MAX.

MIN.

0.020

0.033

MAX.

1.40

0.055

0.50

0.020

0.38

0.50

20.0

0.015

0.020

0.787

8.80

2.54

0.346

0.100

0.700

17.78

7.10

5.10

0.280

0.201

3.30

0.130

1.27

0.050

11/12

L6220 - L6220N

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for

the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its

use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifica-

tions mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information pre-

viously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or

systems without express written approval of SGS-THOMSON Microelectronics.

MULTIWATT is a Registered Trademark

SGS-THOMSON Microelectronics GROUP OF COMPANIES

Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore -

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12/12

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