L6221C_03 [STMICROELECTRONICS]

QUAD DARLINGTON SWITCH; QUAD达林顿开关管


型号：	L6221C_03
厂家：	ST
描述：	QUAD DARLINGTON SWITCH QUAD达林顿开关管开关
文件：	总15页 (文件大小：1523K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

L6221C

QUAD DARLINGTON SWITCH

FOUR NON INVERTING INPUTS WITH

ENABLE

OUTPUT VOLTAGE UP TO 60 V

OUTPUT CURRENT UP TO 1.8 A

VERY LOW SATURATION VOLTAGE

TTL COMPATIBLE INPUTS

Multiwatt 15

INTEGRAL FAST RECIRCULATION DIODES

Powerdip 12 + 2 + 2

SO16 + 2 + 2

DESCRIPTION

The L6221 monolithic quad darlington switch is de-

signed for high current, high voltage switching appli-

cations. Each of the four switches is controlled by a

logic input and all four are controlled by a common

enable input. All inputsareTTL-compatiblefordirect

connection to logic circuits.

ORDERING NUMBERS :L6221C (Powerdip 12+2+2)

L6221CN (Multiwatt 15 )

L6221CD (SO16+2+2)

outputs of the same device may be paralleled.

Three versions are available : the L6221C mounted

in a Powerdip 12 + 2 + 2 package and the L6221CN

mounted in a 15--lead Multiwatt package, the

L6221CD in SO16+2+2 package.

Each switch consists of an open-collector darlington

transistor plus a fast diode for switching applications

with inductive device loads. The emitters of the four-

switches are commoned. Any number of inputs and

BLOCK DIAGRAM

July 2003

1/15

L6221C

THERMAL DATA

Symbol

Parameter

SO20

Powerdip Multiwatt15 Unit

R_{th j-pins}

R_{th j-case}

R_{th j-amb}

Thermal Resistance Junction-pins

Thermal Resistance Junction-case

Thermal Resistance Junction-ambient

Max.

–

°C/W

PIN CONNECTIONS (top views)

OUT4

IN4

CLAMPB

N.C.

IN3

N.C.

ENABLE

GND

V_S

OUT3

GND

OUT2

N.C.

IN2

CLAMPA

OUT1

IN1

D95IN231

L6221C (Powerdip)

L6221CD (SO20)

L6221CN (Multiwatt-15)

2/15

L6221C

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V_O

V_S

Output Voltage

Logic Supply Voltage

V_IN, V_ENInput Voltage, Enable Voltage

V_S

I_C

Continuous Colllector Current (for each channel)

1.8

1.2

for L6221CD

Collector Peak Current (repetitive, duty cycle = 10% ton = 5ms)

for L6221CD

2.5

1.7

3.2

2.2

Collector Peak Current (non repetitive, t = 10µs)

for L6221CD

T_op

T_stg

I_sub

P_tot

Operating Temperature Range (junction)

Storage Temperature Range

Output Substrate Current

-40 to +150

-55 to +150

350

°C

Total Power Dissipation

4.3

3.5

2.3

at T_pins= 90°C (powerdip)

at T_case= 90°C (multiwatt)

at T_case= 90°C (SO20)

at T_amb= 70°C (powerdip)

at T_amb= 70°C (multiwatt)

at T_amb= 70°C (SO20)

TRUTH TABLE

Enable

Input

Power Out

OFF

For each input : H = High level

L = Low level

X = Don’t care

PIN FUNCTIONS (see block diagram)

Name

Function

IN 1

Input to Driver 1

Input to Driver 2

Output of Driver 1

Output of Driver 2

IN 2

OUT 1

OUT 2

CLAMP A

IN 3

Diode Clamp to Driver 1 and Driver 2

Input to Driver 3

IN 4

Input to Driver 4

OUT 3

OUT 4

CLAMP B

ENABLE

Output of Driver 3

Output of Driver 4

Diode Clamp to Driver3 and Driver 4

Enable Input to All Drivers

Logic Supply Voltage

Common Ground

GND

3/15

L6221C

ELECTRICAL CHARACTERISTICS Refer to The Test Circuit to Fig.1 to Fig.9 (V_S= 5V, T_amb= 25°C unless

otherwise specified)

Symbol

Parameter

Logic Supply Voltage

Test Condition

Min.

Typ.

Max.

Unit

V_S

I_S

4.5

5.5

Logic Supply Current

All outputs ON I_C= 0.7A

All outputs OFF

I_CEX

Output Leakage Current

V_CE= 60V V_EN= V_EN

_IN= V_INL

V_S= 4.5V V_IN= V_INH

_EN= V_EN

V_CE(sat)

Collector Emitter Saturation Voltage

(one input on; all others inputs off).

I_C= 1A

(*) I_C= 2A

1.4

1.85

V_INL, V_EN

Input Low Voltage

Input Low Current

0.8

µA

I_INL, I_EN

V_IN= V_INL V_EN= V_EN

-100

V_INH, V_ENH Input High Voltage

I_INH, I_EN

I_R

Input High Current

V_IN= V_INH V_EN= V_EN

V_R= 60V V_EN= V_EN

_IN= V_INL

100

µA

Clamp Diode Leakage Current

V_F

Clamp Diode Forward Voltage

I_F= 1A

I_F= 2A (*)

1.8

2.2

t_d(on)

t_d(off)

∆I_S

Turn on Delay Time

V_P= 5V R_L= 10Ω

V_IN= 5V V_EN= 5V

Turn off Delay Time

µs

Logic Supply Current Variation

150

_out= -500mA for Each

Channel

(*) Only for L6221C - L6221CN types

4/15

L6221C

TEST CIRCUITS

(X) = Referred to Multiwatt package

X = Referred to Powerdip package

Figure 1 : Logic supply current.

S_etV_IN= 4.5V, V _EN= 0.8V, or V _IN= 0.8V, V _EN= 4.5V, for I _S(all outputs off)

S_etV _IN= 2V, V _EN= 2V, for I _S(all outputs on)

Figure 2 : Output Sustaining Voltage.

Figure 3 : Output Leakage Current.

V_P= +60V

5/15

L6221C

Figure 4 : Collector-emitter Saturation

Figure 5 : Logic Input Characteristics.

Voltage.

S_etS₁, S₂open, V_IN, V_EN= 0.8V for I_INL, I_EN

S_etS₁, S₂open, V_IN, V_EN= 2V for I_INH, I_EN

S_etS₁, S₂close, V_IN, V_EN= 0.8V for V_INL, V_EN

S_etS₁, S₂close, V_IN, V_EN= 2V for V_INH, V_EN

Figure 6 : Clamp Diode Leakage Current.

Figure 7 : Clamp Diode Forward Voltage.

V_P= +60V

6/15

L6221C

Figure 8 : Switching Times Test Circuit.

Figure 9 : Switching TImes Waveforms.

Figure 10 : Allowed Peak Collector Cur-

rent vs. Duty Cycle for 1, 2, 3

or 4 Contemporary Working

Outputs (L6221C).

Figure 11 : Allowed Peak Collector Current

vs. Duty Cycle for 1, 2, 3 or 4

Contemporary Working Outputs

(L6221CN).

7/15

L6221C

Figure 12 : Collector Saturation Voltage

Figure 13 : Free-wheeling Diode Forward

Voltage vs. Diode Current .

vs. Collector Current.

Figure 14 : Collector Saturation Voltage

vs. Junction Temperature

at I_C= 1A.

Figure 15 : Free-wheeling Diode Forward

Voltage vs. Junction Tempera-

ture at I_F= 1A.

Figure 16 : Saturation Voltage vs. Junc-

Figure 17 : Free-wheeling Diode Forward

Voltage vs. Junction Tempera-

ture at If = 1.8A.

tion Temperature at IC = 1.8A.

8/15

L6221C

APPLICATION INFORMATION

Figure 18.

When inductive loads are driven by L6221C/CD, a

zener diode in series with the integral free-wheeling

diodes increases the voltage across which energy

stored in the load is discharged and therefore

speeds the current decay (fig. 18).

The zener has to be chosen in such a way that

V_CLAMPis limited to 60V taking into account the

zener’s voltage changes due to: spread on V_Z, tem-

perature changes, and the voltage drop due to oh-

mic resistance.

Moreover, the instantaneous power must be limited

in order to avoid the reverse second breakdown.

Figure 19 : Driver for Solenoids up to 3A.

Some care must be taken to ensure that the collec-

tors are placed close together to avoid different cur-

rent partitioning at turn-off.

electrical characteristics of the logic section (turn-on

and turn-off delay time) and the power stages (col-

lector saturation voltage, free-wheeling diode for-

ward voltage).

We suggest to put in parallel channel 1 and 4 and

channel 2 and 3 as shown in figure 19 for the similar

9/15

L6221C

Figure 20 : Saturation Voltage vs.

Figure 21 : Peak Collector Current vs.

Duty Cycle for 1 or 2 Paralleled

Outputs Driven (L6221N).

Collector Current.

Figure 22 : Peak Collector Current vs.

Duty Cycle for 1 or 2 Paralleled

Outputs Driven (L6221CN).

10/15

L6221C

MOUNTING INSTRUCTION

The R_{th j-amb}of the L6221C can be reduced by sol-

dering the GND pins to a suitable copper area of the

printed circuit board (Fig. 23) or to an external

heatsink (Fig. 24).

ing a thickness of 35µ (1.4 mils). During soldering

the pins temperature must not exceed 260 °C and

the soldering time must not be longer than 12 sec-

onds.

The diagram of figure 25 shows the maximum dis-

sipable power P_totand the R_{th j-amb}as a function of

the side " α" of two equal square copper areas hav-

The external heatsink or printed circuit copper area

must be connected to electrical ground.

Figure 24 : External Heatsink Mounting

Example.

Figure 23 : Example of P.C. Board Copper

Area Which is Used as Heatsink.

Figure 25 : Maximum Dissipable Power

and Junction to Ambient Ther-

mal Resistance vs. Side " α".

Figure 26 : Maximum Allowable Power

Dissipation vs. Ambient

Temperature.

11/15

L6221C

inch

DIM.

OUTLINE AND

MIN. TYP. MAX. MIN. TYP. MAX.

MECHANICAL DATA

0.197

0.104

0.063

2.65

1.6

0.039

0.49

0.66

1.02

0.55 0.019

0.75 0.026

0.022

0.030

1.27

1.52 0.040 0.050 0.060

17.53 17.78 18.03 0.690 0.700 0.710

19.6

0.772

20.2

0.795

21.9

21.7

22.2

22.1

22.5 0.862 0.874 0.886

22.5 0.854 0.870 0.886

17.65

18.1 0.695

0.713

17.25 17.5 17.75 0.679 0.689 0.699

10.3

2.65

4.25

4.63

1.9

10.7

10.9 0.406 0.421 0.429

2.9 0.104 0.114

4.55

5.08

4.85 0.167 0.179 0.191

5.53 0.182 0.200 0.218

2.6

0.075

0.102

0.152

Dia1

1.9

Multiwatt15 V

3.65

3.85 0.144

12/15

L6221C

inch

DIM.

OUTLINE AND

MECHANICAL DATA

MIN. TYP. MAX. MIN. TYP. MAX.

0.51

0.85

0.020

1.40 0.033

0.055

0.50

0.020

0.38

0.50 0.015

20.0

0.020

0.787

8.80

2.54

0.346

0.100

0.700

17.78

7.10

5.10

0.280

0.201

3.30

0.130

Powerdip 16

1.27

0.050

13/15

L6221C

inch

OUTLINE AND

MECHANICAL DATA

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

2.35

0.1

2.65 0.093

0.3 0.004

0.104

0.012

0.020

0.013

0.512

0.299

0.33

0.23

12.6

7.4

0.51 0.013

0.32 0.009

0.496

0.291

7.6

1.27

0.050

0.25

0.4

10.65 0.394

0.75 0.010

0.419

0.030

0.050

1.27 0.016

SO20

0˚ (min.)8˚ (max.)

h x 45˚

SO20MEC

14/15

L6221C

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the conse-

quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No

license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this

publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMi-

croelectronics products are not authorized for use as critical components in life support devices or systems without express written

approval of STMicroelectronics.

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15/15

L6221C_03 [STMICROELECTRONICS]

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