LCP02-150B1RL [STMICROELECTRONICS]
PROTECTION IC FOR RINGING SLICS; 保护IC振铃SLIC组件
| 型号： | LCP02-150B1RL |
| 厂家： | 
ST |
| 描述： | PROTECTION IC FOR RINGING SLICS |
| 文件： | 总8页 (文件大小：74K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
LCP02-150B1
PROTECTION IC
FOR RINGING SLICS
A.S.D.™
FEATURES
■
■
■
■
■
■
Protection IC recommended for ringing SLICs.
Wide firing voltage range: from -110V to +95V.
Low gate triggering current: IG = 5mA max.
Peak pulse current: IPP = 30A (10/1000µs) .
Holding current: IH = 150mA min.
UL497B approved (file E136224)
SO-8 WIDE
MAIN APPLICATIONS
■
Dual battery supply voltage SLICs
- negative battery supply configuration
- negative & positive battery supply configuration
FUNCTIONAL DIAGRAM
■
■
■
■
■
■
■
■
■
Central Office (CO)
TIP
Private Branch Exchange (PBX)
Digital Loop Carrier (DLC)
Asymmetrical Digital Subscriber Line (ADSL G.Lite)
Fiber in the Loop (FITL)
Wireless Local Loop (WLL)
Hybrid Fiber Coax (HFC)
ISDN Terminal Adapter
Gp
Gn
GND
Cable modem
DESCRIPTION
The LCP02-150B1 has been developed to protect
SLICs operating on both negative and positive bat-
tery supplies, as well as on high voltage SLICs. It
provides crowbar mode protection for both TIP and
RING lines. The surge suppression is assumed for
each wire by two thyristor structures, one dedi-
cated to positive surges the second one for nega-
tive surges. Both positive and negative threshold
levels are programmable by two gates (Gn and
Gp). The use of transistors decreases the battery
currents during surge suppression.
The LCP02-150B1 has high Bellcore Core, ITU-T
and FCC Part 68 lightning surge ratings, ensuring
rugged performance in the field. In addition, it is
also specified to assist a designer to comply with
UL1950, IEC950 and CSA C22.2. It is UL 497B
approved (file E136224), and has UL94-V0 resin
approved
RING
PIN-OUT CONFIGURATION
NC
TIP
Gn
GND
GND
NC
GP
RING
TM: ASD is trademarks of STMicroelectronics.
September 2000 - Ed: 4A
1/8
LCP02-150B1
COMPLIES WITH FOLLOWING STANDARDS
Peak surge
voltage
(V)
Voltage
Required
Current Minimum serial
waveform peak current waveform resistor to meet
(µs)
(A)
(µs)
standard ( )
4000
1000
10/700
10/700
100
25
5/310
5/310
50
0
ITU-T K20
4000
1500
10/700
10/700
100
37.5
5/310
5/310
50
0
ITU-T K21
VDE0433
VDE0878
2000
2000
10/700
1.2/50
50
50
5/310
1/20
5
0
level 3
level 4
10/700
1.2/50
50
100
5/310
8/20
5
25
IEC61000-4-5
FCC Part 68
lightning surge type A
1500
800
10/160
10/560
200
100
10/160
10/560
20
15
FCC Part 68
lightning surge type B
1000
9/720
25
5/320
0
BELLCORE
GR-1089-CORE
First level
2500
1000
2/10
10/1000
500
100
2/10
10/1000
20
25
BELLCORE
GR-1089-CORE
Second level
5000
2/10
500
2/10
40
BELLCORE
GR-1089-CORE
Intrabuilding
800
1500
2/10
2/10
100
100
2/10
2/10
0
0
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C)
Symbol
Parameter
Value
Unit
IPP
Peak pulse current
10/1000µs
5/310µs
1/20µs
30
45
65
A
ITSM
Non repetitive surge peak on-state current
(F = 50Hz)
tp = 0.2 s
tp = 1s
tp = 15 min
5.5
4.2
1.5
A
V
GN max Maximum negative battery voltage range
See fig.1
-110 to 0
0 to +95
190
V
VGP max Maximum positive battery voltage range
∆ Vbat max Total battery supply voltage
Top
Tstg
TL
Operating temperature range (see note 1)
Storage temperature range
-20 to +85
- 55 to + 150
260
°C
°C
°C
Lead solder temperature (10s duration)
% I
PP
Note 1: Within the Top range, the LCP02-150B1 keeps on operating.
The impacts of the ambient temperature are given by derating
curves.
100
50
0
t
t
t
r
p
2/8
LCP02-150B1
Fig. 1: Test circuit
TIP
Gn from -110V to +0V
1
TIP
Gn
NC
GND
GND
NC
∆ Vbat ≤ 190V
GP
Gp from +0V to +95V
RING
RING
Gn connected to negative supply voltage
Gp connected to positive supply voltage
∆ Vbat: differential voltage between VGn and VGp
THERMAL RESISTANCE
Symbol
Parameter
Value
Unit
Rth (j-a) Junction to ambient
150
°C/W
3/8
LCP02-150B1
ELECTRICAL CHARACTERISTICS (Tamb = 25°C)
1 - PARAMETERS RELATED TO THE NEGATIVE SUPPRESSOR
Symbol
Parameter
Test conditions
VGn/GND = -60V
Min. Max. Unit
IGn
Negative gate trigger
current
5
mA
mA
µA
Measured at 50Hz
IH-
Holding current
(see fig.2)
Go-No Go test, VGn = -60V
150
IRGL-
VDGL-
Reverse leakage
current Gn/Line
Tj = 25°C, VGn/line = -190V
5
Dynamic switching
voltage Gn / Line
(see note 2)
VGn/GND = -60V
10/1000µs 1kV RP = 25Ω IPP = 30A
10/700µs 2kV RP = 25Ω IPP = 30A
1.2/50µs 2kV RP = 25Ω IPP = 30A
18
8
V
15
2 - PARAMETERS RELATED TO THE POSITIVE SUPPRESSOR
Symbol
Parameter
Test conditions
VGp/GND = 60V
Min. Max. Unit
IGp
Positive gate trigger
current
5
mA
Measured at 50Hz
IRGL+
Reverse leakage
current Gp/LINE
5
µA
Tj = 25°C, VGp/line = +190V
VDGL+
Dynamic switching
voltage Gp / Line
(see note 2)
VGp/GND = +60V
18
8
35
10/1000µs 1kV RP = 25Ω IPP = 30A
10/700µs 2kV RP = 25Ω IPP = 30A
1.2/50µs 2kV RP = 25Ω IPP = 30A
V
3 - PARAMETERS RELATED TO LINE/GND
Symbol
Parameter
Reverse
Test conditions
Typ.
Max.
Unit
IR
Tj = 25°C, VLINE = +90V, VGP/LINE = +1V
Tj = 25°C, VLINE = -105V, VGN/LINE = -1V
5
5
µA
leakage current
Coff
Capacitance
LINE/GND
VR = -3V, F =1MHz, VGp = 60V, VGn = -60V
60
pF
Note 2: The VDGL value is the difference between the peak line voltage during the surge and the programmed gate voltage.
4/8
LCP02-150B1
Fig. 2: Relative variation of holding current versus
junction temperature.
Fig. 3: Maximum non repetitive surge peak on
state current versus overload duration (with 50Hz
sinusoidal wave and initial junction temperature
equal to +25°C).
IH (T) / IH(25°C)
1.6
I
TSM (A)
10
8
1.4
1.2
1
6
4
0.8
2
0.6
T (°C)
t (s)
0.4
-20
0
0
20
40
60
80
100
0.01
0.1
1
10
100
1000
Fig. 4: Capacitance versus reverse applied
voltage (typical values) with VGN = -90V and
VGP = +90V.
C (pF)
70
line +
60
line -
50
40
30
20
10
Vline (V)
0
20
40
60
80
100
5/8
LCP02-150B1
TECHNICAL INFORMATION
Fig. 5: LCP02 concept behavior.
Rs1
L 1
TIP
V Tip
Igp
T2
Ign
T1
Th1
Th2
Gn
Gp
-Vbat
+Vb
GND
Cp
Cn
Rs2
RING
GND
L 2
V Ring
Figure 5 shows the classical protection circuit using the LCP02 crowbar concept. This topology has been
developped to protect the new two-battery voltage SLICs. It allows both positive and negative firing thresholds
to be programmed. The LCP02-150B1 has two gates (Gn and Gp). Gn is biased to negative battery voltage
-Vbat, while Gp is biased to the positive battery voltage +Vb.
When a negative surge occurs on one wire (L1 for example), a current Ign flows through the base of the
transistor T1 and then injects a current in the gate of the thyristor Th1 which fires. All the surge current
flows through the ground. After the surge, when the current flowing through Th1 becomes less negative
than the negative holding current Ih-, Th1 switches off. This holding current IH- is temperature dependant
as per figure2.
When a positive surge occurs on one wire (L1 for example), a current Igp flows through the base of the
transistor T2 and then injects a current in the gate of the thyristor Th2 which fires. All the surge current
flows through the ground. After the surge, when the current flowing through Th2 becomes less positive
than the positive holding current Ih+, Th2 switches off. This holding current IH+, typically 20mA at 25°C, is
temperature dependant and the same figure 2 also applies.
The capacitors Cn and Cp are used to speed up the crowbar structure firing during the fast rise or fall
edges. This allows to minimize the dynamical breakover voltage at the SLIC Tip and Ring inputs during fast
surges. Please note that these capacitors are generally available around the SLIC. To be efficient they
have to be as close as possible to the LCP02-150B1 gate pins (Gn and Gp) and to the reference ground
track (or plan). The optimized value for Cn and Cp is 220nF.
The series resistors Rs1 and Rs2 designed in figure 5 represent the fuse resistors or the PTCs which are
needed to withstand the power contact or the power induction tests imposed by the country standards.
Taking this factor into account, the actual lightning surge current flowing through the LCP02-150B1 is
equal to :
I surge = Vsurge / (Rg + Rs)
With
V surge = peak surge voltage imposed by the standard.
Rg = series resistor of the surge generator
Rs = series resistor of the line card (e.g. PTC)
e.g. : For a line card with 50Ω of series resistors which has to be qualified under Bellcore 1000V 10/1000µs
surge, the present current through the LCP02-150B1 is equal to :
I surge = 1000 / (10 + 50) = 17A
6/8
LCP02-150B1
The LCP02-150B1 topology is particularly optimized for the new telecom applications such as fiber in the
loop, WLL systems, decentralized central office for example. The schematics of figures 6 and 7 give the 2
most frequent topologies used for these emergent applications
Fig. 6: Protection of SLIC with positive and negative battery voltages.
Line card
-Vbat
Rs (*)
TIP
Gn
TIP
Gp
220nF
GND
LCP02
Line
SLIC
220nF
RING
Rs (*)
RING
+Vb
Rs (*) = PTC or Resistor fuse
Fig. 7: Protection of high voltage SLIC
Line card
-Vbat
TIP
Rs (*)
Gn
TIP
LCP02
RING
Gp
220nF
GND
Line
SLIC
Rs (*)
RING
Rs (*) = PTC or Resistor fuse
Figure 6 shows the classical protection topology for SLIC using both positive and negative battery volt-
ages. With such a protection the SLIC is protected against surge over +Vb and lower than -Vbat. In this
case, +Vb can be programmed up to +95V while -Vbat can be programmed down to -110V. Please note
that the differential voltage does not exceed ∆Vbat max at 190V.
Figure 7 gives the protection topology for the new SLIC using high negative voltage down to -110V.
7/8
LCP02-150B1
PACKAGE MECHANICAL DATA
SO-8 Wide Plastic
DIMENSIONS
Millimetres Inches
Min. Typ. Max. Min. Typ. Max.
REF.
L
D
A
2.50
0.099
0.010
0.079
A2
A
C
A1
0.25
A1
b
K
A2 1.51
2.00 0.059
E
b
c
0.35 0.40 0.51 0.013 0.016 0.020
0.10 0.20 0.35 0.003 0.008 0.014
e
D
E
6.05
0.239
0.245
0.35
8
5
4
5.02
6.22 0.197
8.89 0.30
E1
E1 7.62
1
e
1.27
0.05
K
10°
L
0.50
0.80 0.019
0.032
ORDER CODE
Ordering Type
LCP02-150B1
Marking
Package
Weight
0.13g
Base qty
90
Delivery mode
Tube
LCP02
SO-8-Wide
LCP02-150B1RL
1500
Tape & Reel
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written ap-
proval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 2000 STMicroelectronics - Printed in Italy - All rights reserved.
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8/8
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